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Vol.06,Issue.18
May-2017,
Pages:3508-3513
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Design, Matlab/Simulink Modeling of Novel 5-Level & 7-Level Multi-level

Inverter Topologies
SHAIK MAHABOOB SUBHANI1, T. AMAR KIRAN2
1
PG Scholar, Dept of EEE, Godavari Institute of Engineering & Technology, East Godavari (Dt), AP, India,
E-mail: [email protected].
2
Associate Professor, Dept of EEE, Godavari Institute of Engineering & Technology, East Godavari (Dt), AP, India,
E-mail: [email protected].

Abstract: This paper presents the review and analysis of multilevel inverter topologies. Multilevel inverters are most widely
used for medium-voltage high-power converter like fans, pumps and material transport drives. In this active area, different
inverter topologies, circuits, advantages and drawbacks are discussed. Multilevel Inverter topologies such as diode-clamped,
flying capacitor, cascaded H-bridge, hybrid H-bridge, new hybrid H-bridge and new cascaded multilevel inverter have been
discussed in the literature. In this work a new idea is developed to increase the level with less number of switches. It is
concluded that the topologies are closely related to each particular application, depending on their unique features and
limitations like power or voltage level, performance, reliability, costs and other technical specifications. Due to that, the
switching loss gets reduced as same like the harmonic distortion. Also, it generally regularizes the stair –case voltage waveform
from several dc sources which has reduced harmonic content. The operational principle and key waveforms are analyzed and the
performance of the proposed multilevel inverter is evaluated from the simulation results.

Keywords: Multilevel Inverter, Reduced Number Of Switches, Cascaded Inverter.

I. INTRODUCTION increased by reducing THD value using FET analysis. In

Inverters are often used to provide power to electronics in symmetrical multilevel inverter, all H-bridge cells are fed by
the case of a power outage or for activities such as camping, equal voltages, and hence all the arm cells produce similar
where no power is available. An inverter converts a direct output voltage steps. However, if all the cells are not fed by
current (DC) or battery power into an alternating current equal voltages, the inverter becomes an asymmetrical one. In
(AC) or house hold power. A Multilevel Inverter (MLI) is this inverter, the arm cells have different effect on the output
more powerful inverter which are intensively studied for voltage [6-8].
high-power applications [1],[2], and standard drives for
medium-voltage industrial applications have become II. REDUCED NO OF SWITCHES INVERTER
available. Solutions with a higher number of output voltage
levels have the capability to synthesize waveforms with a
better harmonic spectrum and to limit the motor winding
insulation stress. Thus this multilevel inverter provides
energy in high-power situations. Many studies have been
conducted toward improving multilevel inverter. Some
studies dealt with innovative topologies, such as cascaded
multilevel inverter, to optimize the components Utilization
and the asymmetrical multilevel inverter to improve the
output voltage resolution [3]. Other studies focused on
developing advanced control strategies or upgrading the
voltage source inverter strategies for implementation in
multilevel inverter [4].Different approaches have been
proposed. In this paper, a theoretical background is used to
design a strategy compatible with hybrid cascaded H-bridge
multilevel inverter; symmetrical and asymmetrical
configurations are implemented and compared [5]. The high
dynamic performance of the used method, presenting good
performances and very low torque ripples and efficiency is Fig.1.Reduced Switch Multilevel Inverter.

Copyright @ 2017 IJSETR. All rights reserved.

 SHAIK MAHABOOB SUBHANI, T. AMAR KIRAN
The generalized single-phase structure of the reduced and six stages are required in each cycle. Here in this project,
number of switches topology is shown in Fig.1. The n 3 modes are explained for the positive half cycle. Table II.
number of isolated input dc sources is there in reduced Explains the positive half cycle operation as well as negative
number of switches topology. The structure is linkage in half cycle operation.
such a way that the higher potential terminal of the
preceding source is connected to the lower potential terminal
of the succeeding source and vice versa through power
switches. Ejis defined as input sources (where j = 1 to n).
ij(t)is defined as source current for each sources. Power
switches can be either MOSFET or insulated-gate bipolar
transistor (IGBT) with an antiparallel diode are used. In
Fig.1, power switches are illustrated with MOSFETs with
antiparallel diodes, it has a complementary pairs Tj, Tj’
(where j = 1 to n + 1). vL(t) and iL(t) are Load voltage and
load current respectively.

III. CASCADED MULTILEVEL INVERTER

This technique consists of an isolated cascaded
multilevel inverter employing low-frequency three-phase
transformers and a single dc input power source. This circuit
configuration reduces a number of transformers compared
with traditional three-phase multilevel inverters using single-
phase transformers. It controls switching phase angles to
obtain an optimal switching pattern identified with the
fundamental frequency of the output voltage. Owing to this
Fig.2 Cascade H-bridge inverter.
control strategy, harmonic components of the output voltage
and switching losses can be diminished considerably. The H-
bridge modules are connected to the same dc input source in
parallel, and each secondary of the transformer is connected
in series. In this configuration, the output voltage becomes
the sum of the terminal voltages of each H-bridge module.
The amplitude of the output voltage is determined by the
input voltage and turn ratio of the transformer. Usually, a
traditional cascaded H-bridge converter employs a multi-
pulseisolation transformer to obtain the input dc source.
When the traditional cascaded H-bridge converter needs to
isolate from the ac output, it requires a three-phase
transformer between the inverter and the ac outputs. On the
other hand, the proposed inverter has an advantage of
galvanic isolation between the source and the output
voltages, which comes from being combined with
transformers.

However, when the circuit, shown in Fig.1, needs to

modify its configuration for use in three-phase applications,
there is a drawback, which is the requirement of more
transformers, considering that the same number of Fig.3. Single phase five level MLI with reduced number
transformers needs to be used in each phase. The number of of switches.
output phase voltage levels in a cascaded inverter is defined
by m = 2s +1 where s is the number of dc sources. The The six mode of operation are explained in the below
generalized structure of Cascaded MLI is shown in Fig. Table I. The graph shown in Fig 3. below has the three phase
2.The number of output phase voltage levels in a cascaded MLI on state of switches. From that graph, we can clearly
inverter is defined by m =2s+1 where s is the number of dc understand the switching state of each switches. The mode
sources. The generalized structure of Cascaded MLI is of operations are explain clearly in graphical representation.
shown in Fig.2. The working principle of the reduced The six modes of operations source current, nodal voltage
number of switch topology is explain with the help of a and the output voltage are explained clearly in the Table II,
single-phase MLI with two input dc sources E1 and E2, as where the first three mode of operation represents the
shown in Fig.3. It has three pairs of active switches T1, T2, positive half cycle level and the next threerepresents the
T3. It has complementary pairs.And has eight operating state negative half cycle levels.The traditional two or three levels
International Journal of Scientific Engineering and Technology Research
Volume.06, IssueNo.18, May-2017, Pages: 3508-3513
 Design, Matlab/Simulink Modeling of Novel 5-Level & 7-Level Multi-level Inverter Topologies
inverter does not completely eliminate the unwanted neutral point, so the number of voltage levels is odd.
harmonics in the output waveform. Therefore, using the Cascaded H-bridge multilevel inverters typically use IGBT
multilevel inverter as an alternative to traditional PWM switches. These switches have low block voltage and high
inverters is investigated. The six mode of operation are switching frequency.
explained in the below Table I. The graph shown in Fig.4
below has the three phase MLI on state of switches. From
that graph, we can clearly understand the switching state of
each switches. The mode of operations are explain clearly in
graphical representation.

Fig.5. Single phase seven level MLI with reduced number

of switches.
Fig.4. Graphical representation of Switches.
Consider the seven level inverter; it requires 6 IGBT
TABLE I: On State Switch Representation switches and three dc sources. The power circuit of inverter
is shown in the fig.5. A cascaded H-bridges multilevel
inverter is simply a series connection of multiple H bridge
inverters. Each H-bridge inverter has the same configuration
as a typical single-phase full-bridge inverter.

TABLE II: Modes of Operations

Fig .6. Output Voltage of cascaded H-bridge seven level

In 7 level topology the number of phase voltage levels at
inverter.
the converter terminals is 2N+1, where N is the number of
cells or dc link voltages. In this topology, each cell has The cascaded H-bridges multilevel inverter introduces
separate dc link capacitor and the voltage across the the idea of using Separate DC Sources (SDCSs) to produce
capacitor might differ among the cells. So, each power an AC voltage waveform as shown in Fig.6. Each H-bridge
circuit needs just one dc voltage source. The number of dc inverter is connected to its own DC source Vdc. By
link capacitors is proportional to the number of phase cascading the AC outputs of each H-bridge inverter, an AC
voltage levels .Each H-bridge cell may have positive, voltage waveform is produced. By closing the appropriate
negative or zero voltage. Final output voltage is the sum of switches, each H-bridge inverter can produce three different
all H-bridge cell voltages and is symmetric with respect to voltages: +Vdc, 0 and -Vdc. It is also possible to modularize
International Journal of Scientific Engineering and Technology Research
Volume.06, IssueNo.18, May-2017, Pages: 3508-3513
 SHAIK MAHABOOB SUBHANI, T. AMAR KIRAN
circuit layout and packaging because each level has the same
structure, and there are no extra clamping diodes or voltage
balancing capacitors. In order to reduce the overall number
of switching devices in conventional multilevel inverter
topologies, a new topology has been proposed. It has four
main switches in H-bridge configuration T1~T4, and two
auxiliary switches T5 and T6. The number of dc sources
(two) is kept unchanged as in similar 5-level conventional
cascaded H-bridge multilevel inverter.

IV. MATLAB/SIMULATION RESULTS

Here simulation is carried under the several cases by
utilizing the Matlab/Simulink tool and results are presented
as shown in Figs.7 to 20.
Case1:Single Phase Five-Level Six-Switch MLI Topology

Fig.10.Output voltage THD for Without Filter.

Fig.7.Matlab/Simulink model of symmetrical five level

inverter.

Fig.11.Output voltage THD with filter.

Case 2: Three Phase Five-Level Six-Switch MLI

Topology

Fig.8.Simulation results of five level inverter voltage.

Fig.12.Matlab/Simulink model of symmetrical three

phase five level inverter.
Fig.9.Simulation results of five level inverter Current.
International Journal of Scientific Engineering and Technology Research
Volume.06, IssueNo.18, May-2017, Pages: 3508-3513
 Design, Matlab/Simulink Modeling of Novel 5-Level & 7-Level Multi-level Inverter Topologies

Fig.13.three phase five level inverter voltage.

Case 3: Single Phase Seven-Level Six-Switch MLI

Topology
Fig.16.Seven level Output voltage THD for Without
Filter.

Fig.17.Seven level inverter THD for with filter.

Fig.14.Matlab/Simulink model of Asymmetrical seven Case 4: Three Phase Seven-Level Six-Switch MLI
level inverter. Topology

Fig.15.Simulation waveform of seven level inverter Fig.18.Matlab/Simulink model of Asymmetrical three

voltage and current. phase seven level inverter.
International Journal of Scientific Engineering and Technology Research
Volume.06, IssueNo.18, May-2017, Pages: 3508-3513
 SHAIK MAHABOOB SUBHANI, T. AMAR KIRAN
converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp.
2553–2580, Aug. 2010.
[3] G. Satyanarayana, K. Lakshmi Ganesh "Grid Integration
of Hybrid Generation Scheme for Optimal Switching Pattern
Based Asymmetrical Multilevel Inverter" is published in
Springer LNEE Series-326, ISSN-1876-1100, pp.295-303,
November, 2014.
[4] J. Rodriguez, J.-S. Lai, and F. ZhengPeng, “Multilevel
inverters: A survey of topologies, controls, applications,”
IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Aug.
2002.
[5] IlhamiColak, ErsanKabalci, RamazanBayindir, “Review
Fig.19.Three phase inverter output voltage. of multilevel voltage source inverter topologies and control
schemes”, Energy Conversion and Management, Volume 52,
Issue 2, pp: 1114–1128, February 2011.
[6] M. Vijaya Krishna, G. Satyanarayana, K. Lakshmi
Ganesh, D. RaviKiran, "THD optimization of sequential
switching technique based hybrid IPD modulation scheme
for CMLI", Science Engineering and Management Research
(ICSEMR) 2014 International Conference on, pp. 1-7, 2014.
[7] H. Abu-Rub, J. Holtz, J. Rodriguez, and G. Boaming,
“Medium voltage multilevel converters —States of the art,
challenges and requirements in industrial applications,”
IEEE Trans. Ind. Electron, vol. 57, no. 8,pp. 2581 —2596,
Aug. 2010.
Fig.20.Three phase inverter output current. [8] K Vamshi Krishna Varma, Kalahasti Sirisha, G.
Satyanarayana, K. Lakshmi Ganesh, "Optimal PWM
V. CONCLUSION strategy for 11-level series connected multilevel converter
In this paper we have provided a brief summary of using Hybrid PV/FC/BESS source", Circuit Power and
multilevel inverter circuit topologies (5-level and 7- Computing Technologies (ICCPCT) 2014 International
level).Each MLI has its own mixture of advantages and Conference on, pp. 686-691, 2014.
disadvantages and for any one particular application, one
topology will be more appropriate than the others. Often,
topologies are chosen based on what has gone before, even if
that topology may not be the best choice for the application.
The advantages of the body of research and familiarity
within the engineering community may outweigh other
technical disadvantages. Multilevel converters can achieve
an effective increase in overall switch frequency through the
cancellation of the lowest order switch frequency terms.
Among the multilevel converter topologies, the CMC is the
most promising alternative for industry application. The
obtained simulation results .met the desired output. Hence,
subsequent work in the future may include an extension to
higher level with other suggested methods. For the purpose
of minimizing THD%, a selective harmonic elimination
pulse width modulation technique can be also implemented.
When voltage levels are increased in MLI, the number of
switches will further reduce. Thus further reduces the
switching losses.
VI. REFERENCES
[1] Krishna Kumar Gupta and Shailendra Jain, “A Novel
Multilevel Inverter Based on Switched DC Sources”, IEEE
Transactions On Industrial Electronics, VOL. 61, NO. 7, pp.
3269 – 3278, JULY 2014.
[2] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L.
Franquelo, B. Wu, J. Rodriguez, M. Perez, and J. Leon,
“Recent advances and industrial applications of multilevel

International Journal of Scientific Engineering and Technology Research

Volume.06, IssueNo.18, May-2017, Pages: 3508-3513