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LECTURE-02 Instruction interpreter: A group of electronic circuits performs the intent of

instruction of fetched from memory.
MACHINE STRUCTURE, MACHINE LANGUAGE, AND
ASSEMBLY LANGUAGE Location counter: LC otherwise called as program counter PC or instruction
counter IC, is a hardware memory device which denotes the location of the
GENERAL MACHINE STRUCTURE current instruction being executed.
All the conventional modern computers are based upon the concept of stored
program computer, the model that was proposed by John von Neumann. Instruction register: A copy of the content of the LC is stored in IR.

Working register: are the memory devices that serve as “scratch pad” for the
instruction interpreter.

General register: are used by programmers as storage locations and for special
functions.

Memory address register (MAR): contains the address of the memory location
that is to read from or stored into.

Memory buffer register (MBR): contain a copy of the content of the memory
location whose address is stored in MAR. The primary interface between the
memory and the CPU is through memory buffer register.

Memory controller: is a hardware device whose work is to transfer the content

of the MBR to the core memory location whose address is stored in MAR.

I/O channels: may be thought of as separate computers which interprets

special instructions for inputting and outputting information from the memory.

To illustrate how these components of machine structure interact, let us take a

command ADD 2,176.

This instruction has three parts first the opcode i.e. ADD, second is the number
of the register that contain the first operator, third is the memory location
address that contain the second operand.

• At first, the address from the IC is copied to the MAR.

• Then the instruction is fetched to the MBR.
• The instruction is then transferred to the IR.

The components of a general machine are as follows:

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.

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• Now the first operand is placed in the WR.

• Finally the sum of WR and MBR is calculated and the stored in WR.
• The content of WR is stored to the register that contained first operand.
• And then IC is incremented to point to the next instruction.

GENERAL APPRACHES TO A NEW MACHINES

In order to know a new machine we have a number of questions in mind. These
questions can be categorized as follows.

Memory: Basic unit, size and addressing scheme.

Registers Number of registers, and size, functions, interrelation of each register.

Data: Types of data and their storing scheme.

Instruction: Classes of instructions, allowable operations and their storing

scheme.

Special Features: Additional features like interrupt and protections.

Machine structure -360 and 370

All the parameter defined above will be discussed for IBM 360 and 370
machines.

Memory
The basic unit of memory in Unit of memory Bytes Length in bits
360 and 370 is a byte (eight
bits of information). It means,
Byte 1 8
each addressable position in
memory can contain a byte of
Half word 2 16
information. There are
facilities to operate on
contiguous bytes in basic Word 4 32
units. The basic units are as
follows: Double word 8 64

• Then the operand of the instruction is checked and the corresponding A smaller unit of memory of size 4 bits is called as nibble. The size of a 360
branch is taken, here ADD branch is chosen. memory is upto 224 bytes. The addressing of a 360 memory consists of three
• Then the memory location of the second operand is placed in the MAR. parts. Specifically the value of an address equals to value of the offset, plus the
• Then the content is placed in MBR. content of the base register, plus the content of the index register.

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.

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Registers In the second scheme when we use the base register then a total of
There are a total of 16 general purpose registers of 32 bits each. In addition 8+4+4+4+12(offset)=32 bits are used, saving a total of 40-32=8 bits.
there are 4 floating point register of 64 bits each. It also has a 64 bits program
status word (PSW) that contains the value of the location counter, protection The only disadvantage with this method is that the offset can take value from 0
information and interrupt status. to 4,095 locations away from the core location to which the base register is
pointing.
The general purpose registers are basically used in arithmetic and logical
operations as base registers and helps in address formation. The general Data
purpose registers also used as scratch pads for the programmers. Let us take an The 360 may store several different types of data as is depicted in the figure.
instruction A 1,901(2,15).

A(opcode)1(operand in register 1),901(offset) (2(index register),15(base

register))

This is how the memory locations are addressed in case of 360 and 370. The use
of base registers in addressing is twofold.

First it helps the loader in the process of relocation (changing the content of
base register causes the code to be relocated to the specified location).

Secondly it decreases the size of instruction as follows: since the memory of 360
is of 224 hence a total of 24 bits are required to specify a particular location of
memory. This increases the size of instruction as opcode takes 8 bits and the
registers require 4 bits each and the address requires a 24 bits hence the size of
the instruction is 8+4+4+24=40 bits (without base register)

Fig. Addressing without the use of base register.

Fig. Addressing using base register.

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.

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The groups of bits stored in memory are interpreted by 360 processor in Instruction
several ways. The list of different interpretation are shown in the figure are as
follow.

Short form fixed integer Long form fixed integer

Decimal packed Unpacked
Short form floating point Long form floating point
Logical

E.g. +541 is represented as 0000 0010 0001 1101, the first bit represents the
sign i.e. + and the rest 15 bits represents the integer 15. Where are -021 can be
represented as 0000 0010 0001 1101 i.e. 0 2 1 and -, in decimal packed form
representation. Where are + 300 is represented as 0000 0001 0010 1100.
It is more convenient to represent the numbers in hexadecimal as every
hexadecimal digit represents four binary digits and vice versa. Thus +300
which is B’0000 0001 0010 1100’ in binary can be written as X’012C’ in
hexadecimal. The prefix B and X represents binary and hexadecimal
respectively.

Fixed point numbers can be represented by a halfword or fullword as in figure

a, b. Decimal number can be represented in a form similar to that of binary as 12
can be represented as 0001 0010 as shown in figure c, d. Floating point
numbers and logical data can be stored as in figure e, f, g.

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.

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The instructions in 360 can be arithmetic, logical, control or transfer and special
interrupt instructions. The format of 360 instructions is as in figure above.

There are five types of instructions that differ in the type of operands they use.
1. Register operand refers to the data stored in the 16 general purpose
registers (32 bits each). Registers being high-speed circuits provide faster
access to data than the data in the core. E.g. Add register 3, 4 causes the
contents of the contents of the register 4 to be added to that of register 3 Address = c(B2) + c(X2) + D2
and stored back in the register = c(5) + c(0) + 16
3. The instruction is = 1000 + 0 +16
represented as given in the = 1016
diagram. The is called as RR
format. A total of two bytes are Hence the instruction cause the content of the word (32 bits) located at address
required to represent the RR 1016 to be added to the contents of general purpose register 3 (32 bits), with
instruction 8 bits for opcode the resulting sum left in general register 3.
and 4 bits each of register(8+4+4=16 bits =2 bytes).

2. Stored Operand refers to the data stored in the core memory. The length of
the operand depends on the specific data types. For operand of length more
that one byte the address is specified by the lowest address byte (leftmost).
E.g. 32 bits binary fixed point fullword with value +237(X’00 00 01 0B’ in
hexadecimal), stored in location 1016, 1017, 1018 and 1019 as depicted
below is said to be located at 1016.

|Å---------------------4 bytes = 32 bits----------------------->|

The above figure represents an example of SS instruction format that copies the
0000 0000 0000 0000 0000 0001 0000 1011 contents from location one to location 2. The amount of content to be coped is
1016 1017 1018 1017 Byte address given by L. Here storage operand 1 addr = c(B1) + D1
= c(5) + 32
= 1000 + 32 = 1032
Storage operand 2 addr = c(B2) + D2
The address of ith storage operand is computed from the instruction in the =c(5) + 300
following manner: =1000 + 300 = 1300
Address = c(Bi)+c(Xi)+Di (RX format)
The instruction copies (moves) the 80 bytes from location 1032 -1111 to
or = c(Bi) +Di (RS, SI, SS format)
locations 1300-1379. Since a character is stored as a byte, this instruction could
be viewed as copying an 80-character from one area to another.
Where c(Bi) and c(Xi) represents the content of base and index register
respectively. If Xi=0 the c(Xi)=0 likewise for Bi. E.g. here in the figure Bi=5 and it 3. Immediate operand are a single byte of data and are stored as part of the
contain i.e. c(Bi)=1000 and Xi=0 so c(Xi)=0. Then the address of the second instruction. With the same assumption that the register 5 contain 1000. The
operand is calculated as follows for the RX instruction in the figure. SS instruction given in the figure below cause the bytes 0100 0000 (bits 8
through 15 of instruction) to be stored at location 1004.
BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.
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Hence 0100 0000 will be stored at location 1004.

Representative 360/370 instructions

A list of 360 op code with the instruction format and their hexadecimal code are
listed in the table below:

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.

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1. The 10 numbers that are to be added to are in contiguous fullwords

beginning at absolute core location 952.
2. The program is in core starting at absolute location 48.
3. The number 49 is a fullword at absolute location 948.
4. Register 1 contains a 48.

Long way, no looping

The above assumptions are illustrated in the figure.

MACHINE LANGUAGE
In this section we will dealing with the machine language of 360 machine. We
will not be using 0’s and 1’s or hexadecimal, rather we will be using mnemonics
for writing machine level programs.

The figure shows a load instruction as a series of 0’s and 1’s that can be easily
represented in the mnemonic code as L 2, 924(0,1). The program that would be
used over here adds the number 49 to the contents of 10 adjacent fullwords in
memory, under the following assumptions

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.

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the process of looping. We will be using these two techniques in our

programming. The modified program looks as below.

Each instruction over here is a fullword (4 bytes) stating from relative address 0
and absolute address 48. The program does the following.

1. Load R2 with the content of memory location 952=904+c(R1)=904+48.

2. Adds the contents of R2 to the memory location 948=900+c(R1)=900+48.
3. Stores back the content of R2 in the memory location 952.
4. Again loads R2 with the content of memory location 1 byte next to the
previous memory location and does step 2 and 3. This process is repeated
The instruction can be explained as below:
10 times.
This process works fine with small amount of data, but poses problem while
1. Load the data at 952 in R2.
process a huge amount of data. Let us suppose we need to work on 300 data so
2. Add the content of 948 to R2 and store it in R2.
a total of 300*3=900 instructions are required. As each instruction takes 4 bytes
3. Store back the content of R2 in the memory location 952.
so a total of 900*4=3600 bytes. Hence the instruction may overlay the data in
4. Load R2 with the instruction at relative address 0.
the core. And further more the data take 300*4= 1200 byte in core, so a total of
5. Add content of 896+48=944 i.e. 4 to the content of R2.
4800=3600+1200 bytes of core is used. But using R1 we would be able to access
6. Store content of R2 back to the relative address 0.
locations 4095=212 – 1 only. So many of the codes are unreached.
7. Load R2 with the instruction at relative address 8.
Address modification using instruction as data 8. Add content of 896+48=944 i.e. 4 to the content of R2.
Over here we use the concept of students of M.I.T. Whenever they went for a 9. Store content of R2 back to the relative address 8.
date, they did the following as shown in the figure below. 10. Branch to relative address 0 nine times.

So whenever Nancy refused they replace Nancy with May in step 4 and repeated
the process from the start. This process has two programming techniques. First
was the instruction step 3 can be treated as data and can be changed. Secondly Address modification of the instruction occurs as shown in the figure above.
BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.
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This process is very simple as rightmost bits of the instructions contains of

offsets, hence adding a value to the instruction changes the offset of the
instruction there by changing the instruction.

One thing is paramount importance is that, treating instructions as data is a bad

programming technique. If this process is employed, it becomes difficult for the
programmer to know what were the codes initially. In multiprocessing systems,
it violates the concept of pure procedures, which are procedure that do not
modify themselves.
Address modification using index registers
The previous two processes do not make use of index registers. So we can make
use of index register in addressing and the increment factor can be stored in the
index register and can be incremented regularly with each iteration. The codes
for the process is discussed as follows:

First process is similar to that of the process discussed in last technique. Rest of
the steps in this process are as follows:

The instruction can be explained as below: 7. Load the content of 892+48=940 i.e. 10(initially) to R3.
8. Subtract the content of 888+48=936 i.e. 1 from the content of R3 and store
1. Clear the content of R4 by subtracting R4 by itself i.e. R4. the result in R3.
2. Load the content of 904+c(4)+c(1)=904+0+48=952 to R2. 9. Store the content of R3 back to 940.
3. Add contents of 948 to R2 and store it in R2. 10. Check if the content of 940 is positive.
4. Store the content of R2 back to 952. a. If positive then send the control back to instruction stored are
5. Add content of 896+48=944 i.e. 4 to the content of R4. relative address 2.
6. Branch back to relative location 2, nine times. b. Else terminate.
Here BC is a conditional opcode is used, that check for a condition (here the
In this process R4 is cleared first and used in the address calculation process. condition is that location 940 is positive) and act accordingly depending on the
Subsequently R4 is incremented each time by 4 for each iteration. result of the condition.
Looping The second process used in looping makes use of a conditional opcode BCT, that
With the use of index register, we have understood the concept of looping. We works in a manner similar to that of BC opcode and in addition to that is
will be applying looping in two ways, but for this to happen we need to decrements the looping factor by one each time it gets executed. Hence the use
assumptions to be made, that are as follows: of BCT opcode in the programming cut short our program by three bytes. Since
1. Relative location 892 contains a 10. the process is iterative one so the 3*10 bytes of executable code are reduce by
2. Relative location 888 contains a 1 ( for first method only). the use of BCT opcode. The code of this process is as in the figure.

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.

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ASSEMBLY LANGUAGE
The era of programming languages starts with machine language and end in
English language, thereby making a move from the language that are best for
machine to that are best for programmers.
So far we have machine language and mnemonic machine language. Now we
will be using assembly language for the follows reasons (advantages).

1. It is mnemonics, e.g. we use ST instead of the bit stream 0101000 for the
store instruction.
2. Addresses are symbolic, not absolute.
3. Reading is easier.
4. Introduction of data to program is easier.

The main drawback of assembly language is that it makes use of an assembler to

translate a source program to object code. The assembly language for 360 is
much similar to assembly languages that are meant for other machines.
An assembly language program
We would write the same program in assembly language, that will be free from
The code over here are much similar to last to codes except the program starts the assumptions used as earlier. One of the assumptions states that the program
with a instruction that loads the content of 940 to R3. The process is short is is loaded at absolute address 48. The program in assembly language is as below.
discussed as follows:

1. Load the content of 940 to R3.

2. Clear the content of R4 by subtracting R4 by itself i.e. R4.
3. Load the content of 904+c(4)+c(1)=904+0+48=952 to R2.
4. Add contents of 948 to R2 and store it in R2.
5. Store the content of R2 back to 952.
6. Add content of 896+48=944 i.e. 4 to the content of R4.
7. Decrement the content of 940 and check if it is positive.
a. If positive then send the control back to instruction stored are
relative address 6.
b. Else terminate.
At last by the use of looping we have reduce the program to 26 bytes of
instruction and 52 bytes of data, in contrast to the 120 bytes of instruction and
44 bytes of data in our first attempt. Moreover all the other programs could be
placed elsewhere in core, at location 400 rather than 48, for example, and only
R1 need to be changed.

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.

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It is very difficult to know for any programmer or machine to know the address =F'10', =F'49', =F'4' are the literal which would be result in the creation of a
in the core where the loader will load the program. It is only at the time of data area containing 10, 49 and 4 and replacement of the literal operand with
execution the stating address of the program is known. Assembly language has a the address of the data it describes.
machine code named BALR that sets the address of base register to the next
L 3, =F'10' is translated by the assembler to point to a full word that contains a
instruction to be executed.
10. Generally the assembler keep track of the literal with the help of a literal
Assembly program has two type of opcode, they are machine and pseudo table. This table will contain all the constants that have been requested through
opcode. The machine opcodes are translated to machine code, while the pseudo the use of literal. A pseudo opcode LTORG place the literal at an earlier location.
opcodes are not. The pseudo instruction only give information to the assembler. This is required because, the program may be using 10000 data and it become
The list of opcodes used in the program are as follows: difficult for the offset of the load instruction to reach the literal at the end of the
program.
1. USING is a pseudo code the indicates to the assembler which general
purpose register to use as a base and what its contents will be. As we do not
The program by the use of literal looks as follows:
have any specific general register acting as the base register, so it becomes
necessary to inform indicate a base register for the program. Because the
address are relative so by the knowledge of base and offset the program can
be easily be located and executed.

2. BALR is machine opcode that load a register with the next address and
branch to the address in the second field. Since second operand is 0 so the
control will go to the next instruction.
3. START is a pseudo opcode that tell the assembler where the beginning of
the program is and allows the user to give a name to the program. In this
case the name is TEST.

4. END is a pseudo code that tells the assembler that the last card of the
program has been reached.
5. Symbolic names like TEN, DATA(4), FORTY9 etc, are use in assembly In the program we make use of '*-16' with the BCT opcode. Star in a mnemonic
language to reduce the burden of calculating the address of these data means here. The expression *-16 refers to the address of the present instruction
fields. DC are pseudo opcode used to specify the symbolic names to the minus 16 locations, which is a simple loop. This type of programming is not a
constants. good practice.

6. BR 14, the last machine opcode is used to branch to the location whose The EQU pseudo code is used to assign values to the symbols. Here BASE is
address is in general purpose register 14. By convention, calling programs assigned 15. EQU can also take arithmetic expression as its operand.
leave their return address in register 14. The program on being translated to machine code do not generate any code for
Literals the pseudo code START and USING.
The same program is repeated by using literals, that are mechanisms where by
the assembler creates data areas for the programmer, containing constants he
requests.

BY- KISHORE KUMAR SAHU (SR. LECTURER), DEPT. OF INFORMATION TECHNOLOGY.