bq2954

Lithium Ion Charge Management IC

with Integrated Switching Controller
The bq2954 charges a battery in two
Features General Description phases. First a constant-current
phase replenishes approximately
➤ Safe charge of Li-Ion battery The bq2954 Li-Ion Charge-Manage- 70% of battery capacity. Then a volt-
packs ment IC uses a flexible pulse-width age-regulation phase completes the
modulation regulator to control volt- battery charge.
➤ Pulse-width modulation control age and current during charging.
for current and voltage reg- The regulator frequency is set by an The bq2954 provides status indica-
ulation external capacitor for design flexi- tions of all charger states and faults
bility. The switch-mode design mini- for accurate determination of the
➤ Programmable high-side/low-side battery and charge-system condi-
current-sense mizes power dissipation.
tions.
➤ Fast charge terminated by se- For safety, the bq2954 inhibits fast
lectable minimum current; safety charging until the battery voltage
backup termination at maximum and temperature are within config-
time ured limits. If the battery voltage is
less than the low-voltage threshold,
➤ Pre-charge qualification detects the bq2954 provides low-current
shorted or damaged cells and conditioning of the battery.
conditions battery
For charge qualifiction, the bq2954
➤ Charging continuously qualified uses an external thermistor to mea-
by temperature and voltage limits sure battery temperature. Charging
begins when power is applied or the
➤ Direct LED control outputs to battery is inserted
display charge status and fault
conditions

Pin Connections Pin Names

TM Time-out programming TPWM Regulator timebase input
input
BTST Battery test output
TM 1 16 LED2/DSEL
CHG Charge active output
LCOM Common LED output
CHG 2 15 LED1/CSEL BAT Battery voltage input
VSS System ground
BAT 3 14 MOD VCOMP Voltage loop comp input
VCC 5.0V± 10% power
VCOMP 4 13 VCC ICOMP Current loop comp input
MOD Modulation control
ICOMP 5 12 VSS output
ITERM Minimum current
ITERM 6 11 LCOM
termination select input
LED1/ Charge status output 1/
SNS 7 10 BTST SNS Sense resistor input CSEL Charge sense select
input
TS 8 9 TPWM TS Temperature sense input
LED2/ Charge status output 2/
DSEL Display select input
16-Pin Narrow
DIP or SOIC
PN295401.eps

SLUS064–OCTOBER 1998 B

1
bq2954

Pin Descriptions TPWM Regulation timebase input

Uses an external timing capacitor to ground

TM Time-out programming input to set the pulse-width modulation (PWM)
frequency. See Equation 7.
Sets the maximum charge time. The resistor
and capacitor values are determined using BTST Battery test output
Equation 5. Figure 10 shows the resistor/ca-
pacitor connection. Driven high in the absence of a battery in or-
der to provide a potential at the battery ter-
CHG Charge active output minal when no battery is present.
An open-drain output is driven low when the LCOM Common LED output
battery is removed, during a temperature
pend, when a fault condition is present, or Common output for LED1-2. This output is
when charge is done. CHG can be used to in a high-impedance state during initiali-
disable a high-value load capacitor to detect zation to read programming input on DSEL
quickly any battery removal. and CSEL.

BAT Battery voltage input VSS Ground

Sense input. This potential is generally de- VCC VCC supply
veloped using a high-impedance resistor di-
vider network connected between the posi- 5.0V, ±10%
tive and the negative terminals of the bat-
tery. See Figures 6 and 7 and Equation 1. MOD Current-switching control output

VCOMP Voltage loop compensation input Pulse-width modulated push/pull output used
to control the charging current to the battery.
Connects to an external R-C network to sta- MOD switches high to enable current flow and
bilize the regulated voltage. low to inhibit current flow. (The maximum
duty cycle is 80%.)
ICOMP Current loop compensation input
LED1– Charger display status 1–2 outputs
Connects to an external R-C network to sta- LED2
bilize the regulated current. Drivers for the direct drive of the LED dis-
play. These outputs are tri-stated during
ITERM Charge full and minimum current termi- initialization so that DSEL and CSEL can be
nation select read.
Three-state input is used to set IFULL and DSEL Display select input (shared pin with
IMIN for fast charge termination. See Table 4. LED2)
SNS Charging current sense input Three-level input that controls the LED1–2
charge display modes.
Battery current is sensed via the voltage devel-
oped on this pin by an external sense-resistor. CSEL Charge sense-select input (shared pin
with LED1)
TS Temperature sense input
Input that controls whether current is
Used to monitor battery temperature. An exter-
sensed on low side of battery or high side of
nal resistor-divider network sets the lower and
battery. A current mirror is required for
upper temperature thresholds. (See Figures 8
high-side sense.
and 9 and Equations 3 and 4.)

2
 bq2954

VCC TM ITERM TPWM

Power-On MTO Oscillator

Reset Timer

DSEL
VSS
CSEL

Charge LED1
Voltage Display LED2
Reference Control Control
State BTST
Machine
CHG
TS
VCOMP
LCOM
BAT

SNS PWM
Regulator MOD

ICOMP BD2954.eps

Figure 1. Functional Block Diagram

Functional Description Charge Qualification

The bq2954 functional operation is described in terms of The bq2954 starts a charge cycle when power is applied
the following (Figure 1): while a battery is present or when a battery is inserted.
■ Charge algorithm Figure 2 shows the state diagram for the bq2954. The
bq2954 first checks that the battery temperature is
■ Charge qualification within the allowed, user-configurable range. If the tem-
perature is out of range, the bq2954 remains in the
■ Charge status display QUALIFICATION state (S01) and waits until the battery
■ Configuring the display and termination temperature and voltage are within the allowed range.
If during any state of charge, a temperature excursion
■ Voltage and current monitoring
occurs HOT, the bq2954 proceeds to the DONE state
■ Battery insertion and removal (S04) and indicates this state on the LED outputs and
provides no current. If this occurs, the bq2954 remains
■ Temperature monitoring in the DONE state unless the following two conditions
are met:
■ Maximum time--out
■ Temperature falls within valid charge range
■ Charge regulation
■ VBAT falls below the internal threshold,VRCHG
■ Recharge after fast charge
If these two conditions are met, a new charge cycle be-
Charge Algorithm gins. During any state of charge, if a temperature ex-
cursion occurs COLD, the bq2954 terminates charge and
returns to the QUALIFICATION state (S01). Charge re-
The bq2954 uses a two-phase fast-charge algorithm. In
starts if VBAT and temperature are in valid range.
phase 1, the bq2954 regulates constant current until the
voltage on the BAT pin, VBAT, rises to the internal When the temperature and voltage are valid, the bq2954
threshold, VREG. The bq2954 then transitions to phase 2 enters the CONDITIONING state (S02) and regulates
and regulates constant voltage (VBAT = VREG) until the current to ICOND (=IMAX/10). After an initial holdoff pe-
charging current falls below the programmed I MIN riod tHO (which prevents the IC from reacting to tran-
threshold. Fast charge then terminates, and the bq2954 sient voltage spikes that may occur when charge current
enters the Charge Complete state. (See Figure 2.) is first applied), the IC begins monitoring VBAT. If VBAT
does not rise to at least VMIN before the expiration of

3
bq2954

Volt Fault: When VBAT > VHCO

VCC "Up" Time Fault: When T = MTO/4 in State S02 or T = MTO in S03a
Hold Time: A VHCO Fault or State charge held off for 0.740s to 1.12s

Power-On
Mod = 0 No Action
Reset

Latch DSEL/CSEL Inputs

Battery Removal
Fault
VBAT < 0.8V Reset Faults
CHG = 0
Latch DSEL/CSEL Inputs
Temp Not Valid
VBAT< VRCHG 0.8V > VBAT > VHCO
Hold Time
S01 Hold-off Faults
QUALIFICATION
CHG = 0
Battst = 1
Temp Valid
VHCO < VBAT >0.8V
Volt or
Reset MTO
Time Fault

CONDITIONING VBAT < VMIN: ISNS = IMAX/10

S02 Hold Time
CHG = 1

Time Fault
Temp Not Valid
T = MTO/25
VBAT >VMIN
Reset MTO

ISNS = IMAX: VBAT < VREG

T < MTO
CURRENT
REGULATION
S03a Hold Time
CHG = 1

Volt or Time Fault

Temp Not Valid
VBAT > VHCO or T = MTO
VBAT = VREG

VOLTAGE VBAT = VREG: IMAX > ISNS > ITRMN

REGULATION T< MTO
Full Charge S03b CHG = 1
Indication ISNS = IMIN

Volt Fault

Temp Not Valid VBAT > VHCO

T = MTO
ISNS = ITRM

Temp Hot
VBAT > VRCHG
DONE S04 Hold-off MOD
VRCHG < VBAT < VHCO
CHG = 1

Temp Not Hot andVBAT < VRCHG Volt Fault

1s Hold Time after VBAT < VRCHG VBAT > VHCO

VBAT Voltages:
VRCHG = 1.92V 0.5V VREG = 2.05V
VMIN = 1.50V 0.5V VHCO = 2.30V FGbg295401.eps

Figure 2. bq2954 Charge Algorithm

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 bq2954

R2
8-24VDC ±10% D4 L2
4.7K
VDC BAT+
Q1 47uH
B130DI FMMT3906 Q5
Q2 FZT789A
R1 FMMt3904
C10 R4 D5
47uF 1K
25V 10K B130DI

C11
U2 5V 10uF
ZMR500 R5 L1
D1 20V
10K 10 uH R14 PCS4106
IN G OUT 1N4148
N RB1
D
C3 C2
1uF 1uF
Q3
25V FMMT451 5V

R15
RB2
R6 R9
10K 220 BAT-
R10
62K R8
0.25 5%
0.5W
C8
C4 1000pF 5V
D2 C6
GRREN 0.1 uF R7
1K
0.1 uF U1
16 LED2/DSEL TM 1
R13 15 LED1/CSEL CHG 2
1K D3 14 3
RED 13 MOD BAT 4
VCC VCOMP R11 R12
12 VSS ICOMP 5
11 LCOM ITERM 6
10 7 4.32K 8.45K
9 BTST SNS 8 1% 1%
R3 TPWM TS TEM+
10K C7
bq2954
C9
C5 0.01uF
470pF C1
0.1uF
Q4
0.1uF
FMMT3904

2954sch9/23/98
1. IMAX = 1.0A, Vreg = 4.2V ± 1% PER CELL
2. MTO = 3 HRS, IFULL = IMAX/5, ITERM = IMAX/10
3. TEMP = 0-45˚C,
4. Frequency = 200kHz

Figure 3. High-Efficiency Li-Ion Charger for 1–4 Cells

5
 bq2954

Table 1. Normal Fast Charge Cycle

VBAT Fast Charge Voltage IFULL

Battery Current Regulate Detect Charge
Qualification Complete
IBAT Absent Regulate Current
VREG Taper

IMAX

VMIN

ICOND

IFULL
IMIN
Time MTO

Mode 1 LED1 Low High High High Low Low

(DSEL = 0) LED2 Low Low Low Low High High
Mode 2 LED1 Low High High High Low Low
(DSEL = 1) LED2 Low Low Low Low High High
Mode 3 LED1 Low High High High Low Low
(DSEL = F) LED2 Low Low Low High High High
Mode 1 CHG Low High High High High Low
and 2 BTST High Low Low Low Low Low
CHG Low High High High High Low
Mode 3
BTST High High Low Low Low Low
GR295401.eps

time-out limit tQT (i.e., the battery has failed short), the Configuring the Display Mode, IFULL/IMIN,
bq2954 enters the Fault state. Then tQT is set to 25% of
tMTO. If VMIN is achieved before expiration of the time and ISENSE
limit, the bq2954 begins fast charging.
DSEL/LED2 and CSEL/LED1 are bi-directional pins
Once in the Fault state, the bq2954 waits until VCC is cy- with two functions: as LED driver pins (output) and as
cled or a new battery insertion is detected. It then starts a programming pins (input). The selection of pull-up,
new charge cycle and begins the qualification process again. pull-down, or no-resistor programs the display mode on
DSEL as shown in Tables 1 through 3. A pull-down or
Charge Status Display no-resistor programs the current-sense mode on CSEL.
The bq2954 latches the programming data sensed on
Charge status is indicated by the LED driver outputs the DSEL and CSEL input when VCC rises to a valid
LED1–LED2. Three display modes (Tables 1– 3) are avail- level. The LEDs go blank for approximately 400ms (typi-
able in the bq2954 and are selected by configuring pin cal) while new programming data are latched.
DSEL. Table 1 illustrates a normal fast charge cycle, Ta-
ble 2 a recharge-after-fast-charge cycle, and Table 3 an ab- When fast charge reaches a condition where the charg-
normal condition. ing current drops below IFULL, the LED1 and LED2
outputs indicate a full-battery condition. Fast charge
terminates when the charging current drops below the

6
 bq2954

Table 2. Recharge After Fast Charge Cycle

VBAT Fast Charge Voltage IFULL

Charge Complete Current Regulate Detect Charge
IBAT Regulate Current Complete

VREG Taper

IMAX
Discharge
VRECHG

VMIN

ICOND

IFULL
IMIN
Time MTO

Mode 1 LED1 Low High High Low Low

(DSEL = 0) LED2 High Low Low High High
Mode 2 LED1 Low High High Low Low
(DSEL = 1) LED2 High Low Low High High
Mode 3 LED1 Low High High Low Low
(DSEL = F) LED2 High Low High High High
Mode 1 CHG Low High High High Low
and 2 BTST Low Low Low Low Low
CHG Low High High High Low
Mode 3
BTST Low Low Low Low Low

Grbq295402.eps

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bq2954

Table 3. Abnormal Condition

VBAT
Battery Qualification Abnormal
IBAT Absent Battery
VREG

IMAX

VMIN

ICOND

IMIN
Time tQT

Mode 1 LED1 Low High Flash

(DSEL = 0) LED2 Low Low Low
Mode 2 LED1 Low High Low
(DSEL = 1) LED2 Low Low Low
Mode 3 LED1 Low High Low
(DSEL = F) LED2 Low Low Low
CHG Low High Low
BTST High Low Low

GR295403.eps

Table 4. IFULL and IMIN Thresholds

ITERM IFULL IMIN

0 IMAX/5 IMAX/10
1 IMAX/10 IMAX/15
Z IMAX/15 IMAX/20

8
 bq2954

minimum current threshold, IMIN. The IFULL and IMIN Battery insertion is detected within 500ms. Transition
thresholds are programmed using the ITERM input pin to the fast-charge phase, however, will not occur for time
(See Table 4.) tHO (approximately one second), even if voltage qualifi-
cation VMIN is reached. This delay prevents a voltage
Figures 4 and 5 show the bq2954 configured for display spike at the BAT input from causing premature entry
mode 2 and IFULL = IMAX/5 while IMIN = IMAX/10. into the fast-charge phase. It also creates a delay in
detection of battery removal if the battery is removed
Voltage and Current Monitoring during this hold-off period.

In low-side current sensing, the bq2954 monitors the Temperature Monitoring

battery pack voltage as a differential voltage between
BAT and pins. In high-side current sensing, the bq2954 Temperature is measured as a differential voltage be-
monitors the battery pack voltage as a differential volt- tween TS and BAT-. This voltage is typically generated
age between BAT and VSS pins. This voltage is derived by a NTC (negative temperature coefficient) thermistor
by scaling the battery voltage with a voltage divider. and thermistor linearization network. The bq2954 com-
(See Figures 6 and 7.) The resistance of the voltage di- pares this voltage to its internal threshold voltages to
vider must be high enough to minimize battery drain determine if charging is allowed. These thresholds are
but low enough to minimize noise susceptibility. RB1 + the following:
RB2 is typically between 150kΩ and 1MΩ. The volt-
age-divider resistors are calculated from the following: ■ High-Temperature Cutoff Voltage: VTCO = 0.4 ∗ VCC
This voltage corresponds to the maximum temperature
RB1 N ∗ VCELL (1)
= −1 (TCO) at which charging is allowed.
RB2 VREG
■ High-Temperature Fault Voltage: VHTF = 0.44 ∗ VCC
where This voltage corresponds to the temperature (HTF) at
which charging resumes after exceeding TCO.
VCELL = Manufacturer-specified charging cell voltage
N = Number of cells in series ■ Low-Temperature Fault Voltage: VLTF = 0.6 ∗ VCC
VREG = 2.05V This voltage corresponds to the minimum temperature
(LTF) at which charging is allowed.
The current sense resistor, RSNS (see Figures 6 and 7),
determines the fast-charge current. The value of RSNS Charging is inhibited if the temperature is outside the
is given by the following: LTF—TCO window. Once the temperature exceeds
TCO, it must drop below HTF before charging resumes.
0.25V (2)
R SNS =
I MAX RT1 and RT2 for the thermistor linearization network
are determined as follows:
where IMAX is the current during the constant-current
V (3)
phase of the charge cycle. (See Table 1.) 0.6 ∗ VCC =
RT1 ∗ (RT2 + R LTF )
1+
(RT2 ∗ R LTF )
Battery Insertion and Removal
1 (4)
0.44 =
VBAT is interpreted by the bq2954 to detect the presence RT1 ∗ (RT2 + R HTF )
or absence of a battery. The bq2954 determines that a 1+
(RT2 ∗ R HTF )
battery is present when VBAT is between the
High-Voltage Cutoff (V HCO = V REG + 0.25V) and where
the Low-Voltage Cutoff (VLCO = 0.8V). When VBAT is
outside this range, the bq2954 determines that no battery RLTF = thermistor resistance at LTF
is present and transitions to the battery test state, testing
for valid battery voltage. The bq2954 detects battery re- RHTF = thermistor resistance at HTF
moval when VBAT falls below VLCO. The BTST pin is V = VCC - 0.250 in low-side current sensing
driven high during battery test and can activate an exter-
nal battery contact pull-up. This pull-up may be used to V = VCC in high-side current sensing
activate an over-discharged Li-Ion battery pack. The VHCO
limit implicitly serves as an over-voltage charge fault. The TCO is determined by the values of RT1 and RT2. 1%
CHG output can be used to disconnect capacitors from the resistors are recommended.
regulation circuitry in order to quickly detect a battery-re-
moved condition.

9
bq2954

VCC VCC

10K 10K
16 1K 16 1K
LED2/DSEL LED2/DSEL
15 15
LED1 LED1
1K 1K
13 13
VCC VCC
12 12 10K
VSS VSS
6 11 6 11
LCOM LCOM

bq2954 bq2954

VSS VSS

Low-Side Sense Mode High-Side Sense Mode

FGbq295402LS.eps FGbq295402HS.eps

Figure 4. Configured Display Mode Figure 5. Configured Display Mode

(Low-Side Sense) (High-Side Sense)

VCC RSNS
BAT + VCC Switching
Circuit BAT +

RB1
MOD Current RB1
Mirror
3
BAT 3
BAT
13
VCC 13
VCC
12
VSS RB2 12
VSS RB2

7 BAT - BAT -
SNS 7
SNS

bq2954 RSNS bq2954 RB3

VSS VSS

Low-Side Sense Mode High-Side Sense Mode

FGbq295403LS.eps FGbq295403HS.eps

Figure 6. Configuring the Battery Divider Figure 7. Configuring the Battery Divider
(Low-Side Sense) (High-Side Sense)

10
 bq2954

VCC VCC

bq2954 RT1 bq2954 RT1

LPD1 LPD1

13 13
VCC NTC VCC NTC
Thermistor Thermistor
12 12
VSS RT2 RT VSS RT2 RCSEL
t

7 BAT - BAT -
SNS SNS 7
8 8
TS TS
RSNS

VSS VSS

Low-Side Sense Mode High-Side Sense Mode

FGbq295404LS.eps
FGbq295404HS.eps

Figure 8. Low-Side Temperature Sensing Figure 9. High-Side Temperature Sensing

VCC Disabling Temperature Sensing

Temperature sensing can be disabled by placing a 10kΩ
resistor between TS and BAT- and a 10kΩ resistor be-
R
tween TS and VCC. See Figures 8 and 9.
1
TM
Maximum Time-Out
C Maximum Time-Out period (tMTO) is programmed from
VCC
13 1 to 24 hours by an R-C network on the TM pin (see Fig-
ure 10) per the following equation:
12
VSS
tMTO = 500 ∗ R ∗ C (5)
where R is in ohms, C is in Farads, and tMTO is in hours.
The recommended value for C is 0.1µF.
The MTO timer is reset at the beginning of fast charge.
bq2954
If the MTO timer expires during the voltage regulation
phase, fast charging terminates and the bq2954 enters
VSS
the Charge Complete state. If the conditioning phase
continues for time equal to tQT (MTO/4) and the battery
potential does not reach VMIN, the bq2954 enters the
FGbq295405.eps
fault state and terminates charge. See Table 3. If the
MTO timer expires during the current-regulation phase
Figure 10. R-C Network/Setting MTO (VBAT never reaches VREG), fast charging is terminated,
and the bq2954 enters the fault state.

11
bq2954

Charge Regulation Where C is in Farads and the frequency is in Hz. A

typical switching rate is 100kHz, implying CPWM =
0.001µF. MOD pulse width is modulated between 0 and
The bq2954 controls charging through pulse-width 80% of the switching period.
modulation of the MOD output pin, supporting both
constant-current and constant-voltage regulation. To prevent oscillation in the voltage and current control
Charge current is monitored at the SNS pin, and charge loops, frequency compensation networks (C and R-C
voltage is monitored at the BAT pin. These voltages are respectively) are typically required on the VCOMP and
compared to an internal reference, and the MOD output ICOMP pins .
is modulated to maintain the desired value. The maxi-
mum duty cycle is 80% .
Recharge After Fast Charge
Voltage at the SNS pin is determined by the value of re-
sistor RSNS, so nominal regulated current is set by the Once charge completion occurs, a fast charge is initiated
following equation: when the battery voltage falls below VRECHG threshold.
A delay of approximately one second passes before re-
IMAX =VSNS /RSNS (6)
charge begins so that adequate time is allowed to detect
The switching frequency of the MOD output is deter- battery removal. (See Table 1.)
mined by an external capacitor (CPWM) between the pin
TPWM and VSS pins, per the following:
1 ∗ 10 −4 (7)
fPWM =
CPWM

12
 bq2954

Absolute Maximum Ratings

Symbol Parameter Minimum Maximum Unit Notes

VCC VCC relative to VSS -0.3 +7.0 V

DC voltage applied on any pin ex-

VT -0.3 +7.0 V
cluding VCC relative to VSS

-20 +70 °C Commercial

TOPR Operating ambient temperature
-40 +85 °C Industrial “N”

TSTG Storage temperature -55 +125 °C

TSOLDER Soldering temperature - +260 °C 10s max.

Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional opera-
tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo-
sure to conditions beyond the operational limits for extended periods of time may affect device reliability.

DC Thresholds (TA = TOPR; VCC = 5V ± 10%)

Symbol Parameter Rating Unit Tolerance Notes

Internal reference voltage 2.05 V 1% TA = 25°C

VREG
Temperature coefficient -0.5 mV/°C 10%

VLTF TS maximum threshold 0.6 * VCC V ± 0.03V Low-temperature fault

VHTF TS hysteresis threshold 0.44 * VCC V ± 0.03V High-temperature fault

VTCO TS minimum threshold 0.4 * VCC V ± 0.03V Temperature cutoff

VHCO High cutoff voltage VREG + 0.25V V ± 0.03V

VMIN Under-voltage threshold at BAT 1.5 V ± 0.05V

VRECHG Recharge voltage threshold at BAT 1.92 V ± 0.05V

VLCO Low cutoff voltage 0.8 V ± 0.03V

0.250 V 10% IMAX

VSNS Current sense at SNS
0.025 V 10% ICOND

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bq2954

Recommended DC Operating Conditions (TA = TOPR)

Symbol Parameter Minimum Typical Maximum Unit Notes

VCC Supply voltage 4.5 5.0 5.5 V
VTEMP TS voltage potential 0 - VCC V VTS - VSNS
VBAT BAT voltage potential 0 - VCC V
ICC Supply current - 2 4 mA Outputs unloaded
DSEL tri-state open detection -2 - 2 µA Note
IIZ ITERM tri-state open detection -2 2 µA
VIH Logic input high VCC - 0.3 - - V DSEL, ITERM
VIL Logic input low - - VSS + 0.3 V DSEL, CSEL, ITERM
LED1, LED2, BTST, output high VCC - 0.8 - - V IOH ≤ 10mA
VOH MOD output high VCC - 0.8 - - V IOH ≤ 10mA
LED1, LED2, BTST, output low - - VSS +0.8 V IOL ≤ 10mA
MOD output low - - VSS + 0.8 V IOL ≤ 10mA

VOL CHG output low - - VSS + 0.8 V IOL ≤ 5mA, Note 3

LCOM output low - - VSS + 0.5 V IOL ≤ 30mA
LED1, LED2, BTST, source -10 - - mA VOH =VCC - 0.5V
IOH MOD source -5.0 - - mA VOH =VCC - 0.5V
LED1, LED2, BTST, sink 10 - - mA VOL = VSS + 0.5V
MOD sink 5 - - mA VOL = VSS + 0.8V

IOL CHG sink 5 - - mA VOL = VSS + 0.8V, Note 3

LCOM sink 30 - - mA VOL = VSS + 0.5V
DSEL logic input low source - - +30 µA V = VSS to VSS + 0.3V, Note 2
IIL
ITERM logic input low source - - +70 µA V = VSS to VSS + 0.3V
DSEL logic input high source -30 - - µA V = VCC - 0.3V to VCC
IIH
ITERM logic input high source -70 - - µA V = VCC - 0.3V to VCC

Notes: 1. All voltages relative to VSS.

2. Conditions during initialization after VCC applied.
3. SNS = 0V.

14
 bq2954

Impedance (TA = TOPR; VCC = 5V ± 10%)

Symbol Parameter Minimum Typical Maximum Unit Notes

RBATZ BAT pin input impedance 50 - - MΩ
RSNSZ SNS pin input impedance 50 - - MΩ
RTSZ TS pin input impedance 50 - - MΩ

RPROG1 Soft-programmed pull-up or pull-down

- - 10 kΩ DSEL, CSEL
resistor value (for programming)
RPROG2 Pull-up or pull-down resistor value - - 3 kΩ ITERM
RMTO Charge timer resistor 20 - 480 kΩ

Timing (TA = TOPR; VCC = 5V ± 10%)

Symbol Parameter Minimum Typical Maximum Unit Notes

tMTO Charge time-out range 1 - 24 hours See Figure 10
tQT Pre-charge qual test time-out period - 0.25 ∗ tMTO - -
tHO Pre-charge qual test hold-off period 300 600 900 ms
fPWM PWM regulator frequency range - 100 200 kHz See Equation 7
dPWM Duty cycle 0 - 80 %

Capacitance

Symbol Parameter Minimum Typical Maximum Unit

CMTO Charge timer capacitor - - 0.1 µF
CPWM PWM capacitor - 0.001 - µF

15
bq2954

16-Pin DIP Narrow (PN)

16-Pin PN (0.300" DIP)

Inches Millimeters
Dimension Min. Max. Min. Max.
A 0.160 0.180 4.06 4.57
A1 0.015 0.040 0.38 1.02
B 0.015 0.022 0.38 0.56
B1 0.055 0.065 1.40 1.65
C 0.008 0.013 0.20 0.33
D 0.740 0.770 18.80 19.56
E 0.300 0.325 7.62 8.26
E1 0.230 0.280 5.84 7.11
e 0.300 0.370 7.62 9.40
G 0.090 0.110 2.29 2.79
L 0.115 0.150 2.92 3.81
S 0.020 0.040 0.51 1.02

16-Pin SOIC Narrow (SN)

16-Pin SN (0.150" SOIC)

Inches Millimeters
D Dimension Min. Max. Min. Max.
B
e
A 0.060 0.070 1.52 1.78
A1 0.004 0.010 0.10 0.25
B 0.013 0.020 0.33 0.51
E
C 0.007 0.010 0.18 0.25
H D 0.385 0.400 9.78 10.16
E 0.150 0.160 3.81 4.06
A e 0.045 0.055 1.14 1.40
C A1 H 0.225 0.245 5.72 6.22
L 0.015 0.035 0.38 0.89
.004
L

16
 bq2954

Data Sheet Revision History

Change No. Page No. Description of Change

1 All “Final” changes from “Preliminary” version

Note: Change 1 = Oct. 1998 B changes from Nov. 1997 “Preliminary.”

Ordering Information

bq2954

Package Option:
PN = 16-pin plastic DIP
SN = 16-pin narrow SOIC

Device:
bq2954 Li-Ion Fast-Charge IC

17
 IMPORTANT NOTICE
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Copyright © 1999, Texas Instruments Incorporated

18
 PACKAGE OPTION ADDENDUM

www.ti.com 6-Feb-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

BQ2954PN ACTIVE PDIP N 16 25 Pb-Free NIPDAU N / A for Pkg Type 0 to 70 2954PN-A3

(RoHS)
BQ2954SN ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2954
& no Sb/Br) -A3
BQ2954SNTR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2954
& no Sb/Br) -A3
BQ2954SNTRG4 ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2954
& no Sb/Br) -A3

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 6-Feb-2020

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 26-Jan-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ2954SNTR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 26-Jan-2013

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
BQ2954SNTR SOIC D 16 2500 367.0 367.0 38.0

Pack Materials-Page 2
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