bq2003

Fast-Charge IC
Features
Fast charge and conditioning of nickel cadmium or nickel-metal hydride batteries Hysteretic PWM switch-mode current regulation or gated control of an external regulator Easily integrated into systems or used as a stand-alone charger Pre-charge qualification of temperature and voltage Direct LED outputs display battery and charge status Fast-charge termination by temperature/ time, -V, maximum voltage, maximum temperature, and maximum time Optional top-off charge

General Description
The bq2003 Fast Charge IC provides comprehensive fast charge control functions together with high-speed switching power control circuitry on a monolithic CMOS device. Integration of closed-loop current control circuitry allows the bq2003 to be the basis of a cost-effective solution for stand-alone and systemintegrated chargers for batteries of one or more cells. Switch-activated discharge-beforecharge allows bq2003-based chargers to support battery conditioning and capacity determination. High-efficiency power conversion is accomplished using the bq2003 as a hysteretic PWM controller for switch-mode regulation of the charging current. The bq2003 may alternatively be used to gate an externally regulated charging current.

Fast charge may begin on application of the charging supply, replacement of the battery, or switch depression. For safety, fast charge is inhibited unless/until the battery temperature and voltage are within configured limits. Temperature, voltage, and time are monitored throughout fast charge. Fast charge is terminated by any of the following:
n

Rate of temperature rise (T/t) Negative delta voltage (-V) Maximum voltage Maximum temperature Maximum time

n n n n

After fast charge, an optional top-off phase is available. Constant-current maintenence charge is provided by an external trickle resistor.

Pin Connections

Pin Names
CCMD DCMD Charge command/select Discharge command -V enable/disable Timer mode select 1 Timer mode select 2

SNS TCO MCV TEMP CHG

Sense resistor input Temperature cutoff Maximum voltage Temperature status output Charging status output Charge current control Discharge control 5.0V 10% power

CCMD DCMD DVEN TM1 TM2 TS BAT VSS

16 15 14 13 12 11 10 9

VCC DIS MOD CHG TEMP MCV TCO SNS

DVEN TM1 TM2 TS BAT VSS

2 3 4 5 6 7 8

Temperature sense

MOD
Battery voltage

DIS
System ground

VCC

16-Pin DIP or SOIC

PN200301.eps

SLUS095A - OCTOBER 1999 I

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Pin Descriptions
CCMD, DCMD Charge initiation and discharge-beforecharge control inputs These two inputs control the conditions that b e g i n a ne w cha r g e c y cl e a n d en a b le discharge-before-charge. See Table 1. DVEN -V enable input This input enales/disables -V charge termination. If DVEN is high, the -V test is enabled. If DVEN is low, -V test is disabled. The state of DVEN may be changed at any time. TM1 TM2 Timer mode inputs TM1 and TM2 are three-state inputs that configure the fast charge safety timer, -V holdoff time, and that enhance/disable top-off. See Table 2. TS Temperature sense input Input, referenced to SNS, for an external thermistor monitoring battery temperature. BAT Single-cell voltage input The battery voltage sense input, referenced to SNS. This is created by a high-impedance resistor divider network connected between the positive and the negative terminals of the battery. Vss SNS Ground Charging current sense input SNS controls the switching of MOD based on the voltage across an external sense resistor in the current path of the battery. SNS is the reference potential for the TS and BAT pins. If SNS is connected to VSS, MOD switches high at the beginning of charge and low at the end of charge. DIS MOD CHG TCO Temperature cutoff threshold input Input to set maximum allowable battery temperature. If the potential between TS and SNS is less than the voltage at the TCO input, then fast charge or top-off charge is terminated. MCV Maximum-Cell-Voltage threshold input Input to set maximum single-cell equivalent voltage. If the voltage between BAT and SNS is greater than or equal to the voltage at the MCV input, then fast charge or top-off charge is inhibited. Note: For valid device operation, the voltage level on MCV must not exceed 0.6 VCC. TEMP Temperature status output Push-pull output indicating temperature status. TEMP is low if the voltage at the TS pin is not within the allowed range to start fast charge. Charging status output Push-pull output indicating charging status. See Figure 1. Current-switching control output MOD is a push/pull output that is used to control the charging current to the battery. MOD switches high to enable charging current flow and low to inhibit charging current flow. Discharge FET control output Push-pull output used to control an external transistor to discharge the battery before charging. VCC VCC supply input 5.0 V, 10% power input.

bq2003
Functional Description
Figure 3 shows a state diagram and Figure 4 shows a block diagram of the bq2003. the resistor connected to the positive battery terminal, and RB2 is the resistor connected to the negative battery terminal. See Figure 1. Note: This resistor-divider network input impedance to end-to-end should be at least 200k and less than 1M. A ground-referenced negative temperature coefficient thermistor placed in proximity to the battery may be used as a low-cost temperature-to-voltage transducer. The temperature sense voltage input at TS is developed using a resistor-thermistor network between VCC and batterys negative terminal See Figure 1. Both the BAT and TS inputs are referenced to SNS, so the signals used inside the IC are: VBAT - VSNS = VCELL and VTS - VSNS = VTEMP

Battery Voltage and Temperature Measurements

Battery voltage and temperature are monitored for maximum allowable values. The voltage presented on the battery sense input, BAT, should represent a single-cell potential for the battery under charge. A resistor-divider ratio of: RB1 =N-1 RB2 is recommended to maintain the battery voltage within the valid range, where N is the number of cells, RB1 is

Table 1. New Charge Cycle and Discharge Stimulus

CCMD DCMD Pulled Up/Down to: VSS VSS New Charge Cycle Started by: VCC rising to valid level Battery replacement (VCELL falling through VMCV) A rising edge on CCMD VCC rising to valid level Battery replacement (VCELL falling through VMCV) A falling edge on CCMD or DCMD A rising edge on CCMD A falling edge on CCMD Discharge-Before-Charge Started by:

A rising edge on DCMD

VCC

VCC

A rising edge on DCMD

VCC VSS

VSS VCC

A rising edge on DCMD A rising edge on DCMD

External Trickle Resistor VDC Pass Element MOD

Negative Temperature Coefficient Thermister VCC RT1 PACK+ PACK +

bq2003
BAT

RB1

TS

bq2003
SNS PACK-

RT2

N T C PACK -

RB2 SNS

Fg2003a2.eps

Figure 1. Voltage and Temperature Monitoring and Trickle Resistor

bq2003
Discharge-Before-Charge
The DCMD input is used to command discharge-beforecharge via the DIS output. Once activated, DIS becomes active (high) until VCELL falls below VEDV, at which time DIS goes low and a new fast charge cycle begins. See Table 1 for the conditions that initiate discharge-beforecharge. Discharge-before-charge is qualified by the same voltage and temperature conditions that qualify a new charge cycle start (see below). If a discharge is initiated but the pack voltage or temperature is out of range, the chip enters the charge pending mode and trickle charges the battery until the voltage and temperature qualification conditions are met, and then starts to discharge. 3. A rising edge on CCMD if it is pulled down, or a falling edge on CCMD if it is pulled up.

Starting a new charge cycle may be limited to a pushbutton or logical pulse input only by pulling one member of the DCMD and CCMD pair up while pulling the other input down. In this configuration a new charge cycle will be started only by a falling edge on CCMD if it is pulled up, and by a falling edge on CCMD if it is pulled down. See Table 1. If the battery is within the configured temperature and voltage limits, the IC begins fast charge. The valid battery voltage range is VEDV < VBAT < VMCV where: VEDV = 0.2 VCC 30mV The valid temperature range is VHTF < VTEMP < VLTF, where: VLTF = 0.4 VCC 30mV VHTF = [(1/8 VLTF) + (7/8 VTCO)] 30mV VTCO is the voltage presented at the TCO input pin, and is configured by the user with a resistor divider between VCC and ground. The allowed range is 0.2 to 0.4 VCC. If the temperature of the battery is out of range, or the voltage is too low, the chip enters the charge pending state and waits for both conditions to fall within their allowed limits. There is no time limit on the charge pending state; the charger remains in this state as long as the voltage or temperature conditons are outside of

Starting A Charge Cycle

The stimulus required to start a new charge cycle is determined by the configuration of the CCMD and DCMD inputs. If CCMD and DCMD are both pulled up or pulled down, then a new charge cycle is started by (see Figure 2): 1. 2. VCC rising above 4.5V VCELL falling through the maximum cell voltage, VMCV. VMCV is the voltage presented at the MCV input pin, and is configured by the user with a resistor divider between VCC and ground. The allowed range is 0.2 to 0.4 VCC.

Charge Pending DIS

Discharge
(Optional)

Fast Charging

Top-Off
(Optional)

MOD Switch-Mode Configuration or MOD External Regulation (SNS Grounded) CHG Status Output 4 sec. 34 sec.

TEMP Status Output Battery discharged to 0.2 Battery within temperature limits. Charge cycle start. Battery outside temperature limits.
TD200301a.eps

VCC.

Figure 2. Charge Cycle Phases

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Table 2. Fast-Charge Safety Time/Hold-Off/Top-Off Table
Corresponding Fast-Charge Rate C/4 C/2 1C 2C 4C C/2 1C 2C 4C Note: TM1 Low Float High Low Float High Low Float High TM2 Low Low Low Float Float Float High High High Typical Fast Charge and Top-Off Time Limits 360 180 90 45 23 180 90 45 23 Typical -V/MCV Hold-Off Time (seconds) 137 820 410 200 100 820 410 200 100 Top-Off Rate Disabled Disabled Disabled Disabled Disabled C/16 C/8 C/4 C/2

Typical conditions = 25C, VCC = 5.0V. maximum temperature terminations are not affected by the hold-off period.

the allowed limits. If the voltage is too high, the chip goes to the battery absent state and waits until a new charge cycle is started. Fast charge continues until termination by one or more of the five possible termination conditions:
n n n n n

T/t Termination
The bq2003 samples at the voltage at the TS pin every 34s, and compares it to the value measured two samples earlier. If VTEMP has fallen 16mV 4mV or more, fast charge is terminated. The T/t termination test is valid only when VTCO < VTEMP < VLTF.

Delta temperature/delta time (T/t) Negative delta voltage (-V) Maximum voltage Maximum temperature Maximum time

Temperature Sampling
Each sample is an average of 16 voltage measurements taken 57s apart. The resulting sample period (18.18ms) filters out harmonics around 55Hz. This technique minimizes the effect of any AC line ripple that may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is 16%.

-V Termination
If the DVEN input is high, the bq2003 samples the voltage at the BAT pin once every 34s. If VCELL is lower than any previously measured value by 12mV 4mV, fast charge is terminated. The -V test is valid in the range VMCV - (0.2 VCC) < VCELL < VMCV.

Maximum Voltage, Temperature, and Time

Anytime VCELL rises above VMCV, CHG goes high (the LED goes off) immediately. If the bq2003 is not in the voltage hold-off period, fast charging ceases if VCELL remains above MCV for a minimum of tMCV. If VCELL then falls back below VMCV before 1.5tMCV 50ms, the chip transitions to the Charge Complete state (maximum voltage termination). If VCELL remains above VMCV beyond 1.5tMCV, the bq2003 transitions to the Battery Absent state (battery removal). See Figure 3. If the bq2003 is in the voltage hold-off period when VCELL rises above VMCV, the LED goes out but fast charging continues until the expiration of the hold-off period. Temperature sampling continues during the hold-off period as well. If a new battery is inserted before the hold-off period expires, it continues in the fast charge cycle started by its predecessor. No precharge qualification is performed, and a temperature sample

Voltage Sampling
Each sample is an average of 16 voltage measurements taken 57s apart. The resulting sample period (18.18ms) filters out harmonics around 55Hz. This technique minimizes the effect of any AC line ripple that may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is 16%.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging. During the hold-off period, -V termination is disabled. This avoids premature termination on the voltage spikes sometimes produced by older batteries when fast-charge current is first applied. T/t, maximum voltage and

bq2003
taken on the new battery is compared to ones taken before the original battery was removed and any that may have been taken while no battery was present. If the IC is configured for T/t termination, this may result in a premature fast-charge termination on the newly inserted battery. Maximum temperature termination occurs anytime the voltage on the TS pin falls below the temperature cut-off threshold VTCO. Charge is also terminated if VTEMP rises above the minimum temperature fault threshold, VLTF, after fast charge begins. Maximum charge time is configured using the TM pin. Time settings are available for corresponding charge rates of C/4, C/2, 1C, and 2C. Maximum time-out termination is enforced on the fast-charge phase, then reset, and enforced again on the top-off phase, if selected. There is no time limit on the trickle-charge phase.

Charge Status Indication

Charge status is indicated by the CHG output. The state of the CHG output in the various charge cycle phases is shown in Figure 3 and illustrated in Figure 1. Temperature status is indicated by the TEMP output. TEMP is in the high state whenever VTEMP is within the temperature window defined by the VLTF and VHTF temperature limits, and is low when the battery temperature is outside these limits. In all cases, if VCELL exceeds the voltage at the MCV pin, both CHG and TEMP outputs are held high regardless of other conditions. CHG and TEMP may both be used to directly drive an LED.

Charge Current Control

The bq2003 controls charge current through the MOD output pin. The current control circuitry is designed to support implementation of a constant-current switching regulator or to gate an externally regulated current source. When used in switch-mode configuration, the nominal regulated current is: IREG = 0.235V/RSNS Charge current is monitored at the SNS input by the voltage drop across a sense resistor, RSNS, between the low side of the battery pack and ground. RSNS is sized to provide the desired fast-charge current. If the voltage at the SNS pin is less than VSNSLO, the MOD output is switched high to pass charge current to the battery. When the SNS voltage is greater than VSNSHI, the MOD output is switched lowshutting off charging current to the battery. VSNSLO = 0.044 VCC 25mV VSNSHI = 0.05 VCC 25mV When used to gate an externally regulated current source, the SNS pin is connected to VSS, and no sense resisitor is required.

Top-off Charge
An optional top-off charge phase may be selected to follow fast charge termination for the C/2 through 4C rates. This phase may be necessary on NiMH or other battery chemistries that have a tendency to terminate charge prior to reaching full capacity. With top-off enabled, charging continues at a reduced rate after fast-charge termination for a period of time selected by the TM1 and TM2 input pins. (See Table 2.) During top-off, the MOD pin is enabled at a duty cycle of 4s active for every 30s inactive. This modulation results in an average rate 1/8th that of the fast charge rate. Maximum voltage, time, and temperature are the only termination methods enabled during top-off.

External Trickle Resistor

Maintenance charging is provided by the use of an external trickle resistor between the high side of the battery pack and VDC, the input charging supply voltage. (See Figure 1.) This resistor is sized to meet two criteria.
n

With the battery removed, the resistor must pull the voltage at the BAT input above MCV for battery insertion and removal detection. With the battery at its fully charged voltage, the trickle current should be approximately equal to the self-discharge rate of the battery.

bq2003
New Charge Cycle Start or Discharge-Before-Charge Command

VCELL > VMCV Battery Voltage? VCELL < VEDF VEDV < VCELL < VMCV VTEMP > VLTF or VTEMP < VHTF Charge Pending Trickle CHG = 1 3/8s high 1/8s low VCELL > VMCV

Battery Temperature?

VHTF < VTEMP < VLTF No Discharge-Before-Charge Commanced? VEDV < VCELL < VMCV and VHTF < VTEMP < VLTF

Discharge CHG = 1 3/8s low 1/8s high

VCELL > VMCV

VCELL < VEDV VCELL > VMCV

t
Hold-off period expired? No Yes Trickle CHG = High

Battery Absent > 1.5tMCV Trickle CHG = High

Fast CHG = Low

- V or T/ t or VTEMP < VTCO or Maximum Time Out

VCELL < VMCV

Fast CHG = High

Hold-off period expires

VCELL < VMCV VCELL > VMCV Top-off CHG = 1/8s low 1/8s high VTEMP < VTCO or Maximum Time Out Charge Complete

VCELL > VMCV

Top-off selected?

Yes

Trickle CHG = 1/8s low 1/8s high

No

SD2003.eps

Figure 3. State Diagram

bq2003

TM1 TM2

TCO

OSC TEMP CHG CCMD DCMD DVEN Display Control

Timing Control

TCO Check LTF Check

VTS - VSNS

TS

Charge Control State Machine

VBAT - VSNS

A/D EDV Check MCV Check

SNS

Discharge Control

MOD Control

BAT

DIS

MOD

MCV

VCC VSS BD200301.eps

Figure 4. Block Diagram

bq2003

Absolute Maximum Ratings

Symbol VCC VT TOPR TSTG TSOLDER TBIAS Note: Parameter VCC relative to VSS DC voltage applied on any pin excluding VCC relative to VSS Operating ambient temperature Storage temperature Soldering temperature Temperature under bias Minimum -0.3 -0.3 0 -55 -40 Maximum +7.0 +7.0 +70 +125 +260 +85 Unit V V C C C C 10 sec max. Commercial Notes

Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability.

DC Thresholds
Symbol VSNSHI VSNSLO VLTF VHTF VEDV VTHERM -V

(TA = TOPR; VCC 10%) Rating 0.05 VCC 0.044 VCC 0.4 VCC (1/8 VLTF) + (7/8 VTCO) 0.2 VCC -16 -12 Tolerance 0.025 0.025 0.030 0.030 0.030 4 4 Unit V V V V V mV mV Notes Tolerance is common mode deviation. Tolerance is common mode deviation. VTEMP VLTF inhibits/ terminates charge VTEMP VHTF inhibits fast charge VCELL < VEDV inhibits fast charge VCC = 5V, TA = 25C VCC = 5V, TA = 25C

Parameter High threshold at SNS resulting in MOD = Low Low threshold at SNS resulting in MOD = High Low-temperature fault High-temperature fault End-of-discharge voltage TS input change for T/t detection BAT input change for -V detection

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Recommended DC Operating Conditions (TA = 0 to +70C)

Symbol VCC VBAT VCELL VTS VTEMP VMCV VTCO VIH Parameter Supply voltage Battery input BAT voltage potential Thermistor input TS voltage potential Maximum cell voltage Temperature cutoff Logic input high Logic input high Logic input low Logic input low Logic output high Logic output low Supply current DIS, TEMP, MOD, CHG source DIS, TEMP, MOD, CHG sink Input leakage IIL Logic input low source IIH IIZ Note: Logic input high source TM1, TM2 tri-state open detection -70 70 A A A Minimum 4.5 0 0 0 0 0.2 VCC 0.2 VCC VCC - 1.0 VCC - 0.3 VCC - 0.5 -5.0 5.0 Typical 5.0 0.75 Maximum 5.5 VCC VCC VCC VCC 0.4 VCC 0.4 VCC 1.0 0.3 0.5 2.2 1 Unit V V V V V V V V V V V V V mA mA mA A CCMD, DCMD, DVEN TM1, TM2 CCMD, DCMD, DVEN TM1, TM2 DIS, TEMP, CHG, MOD, IOH -5mA DIS, TEMP, CHG, MOD, IOL 5mA Outputs unloaded @VOH = VCC - 0.5V @VOL = VSS + 0.5V CCMD, DCMD, DVEN, V = VSS to VCC TM1, TM2, V = VSS to VSS + 0.3V TM1, TM2, V = VCC - 0.3V to VCC TM1, TM2 may be left disconnected (floating) for Z logic input state VTS - VSNS VBAT - VSNS Notes

VIL VOH VOL ICC IOH IOL

-2.0

2.0

All voltages relative to VSS except as noted.

10

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Impedance
Symbol RBAT RMCV RTCO RSNS RTS Parameter Battery input impedance MCV input impedance TCO input impedance SNS input impedance TS input impedance Minimum 50 50 50 50 50 Typical Maximum Unit M M M M M

Timing
Symbol tPW dFCV fREG tMCV Note:

(TA = 0 to +70C; VCC 10%) Parameter Pulse width for CCMD, DCMD pulse commands Time base variation MOD output regulation frequency Maximum voltage termination time limit Minimum 1 -16 200 Typical 250 Maximum 16 300 300 Unit s % kHz ms Time limit to distinguish battery removed from charge complete Notes Pulse start for charge or dischargebefore-charge VCC = 4.5V to 5.5V

Typical is at TA = 25C, VCC = 5.0V.

11

bq2003
PN: 16-Pin DIP Narrow
16-Pin PN (DIP Narrow)
Dimension Minimum A 0.160 A1 0.015 B 0.015 B1 0.055 C 0.008 D 0.740 E 0.300 E1 0.230 e 0.300 G 0.090 L 0.115 S 0.020 All dimensions are in inches. Maximum 0.180 0.040 0.022 0.065 0.013 0.770 0.325 0.280 0.370 0.110 0.150 0.040

S: 16-Pin SOIC
16-Pin S (SOIC)
D e

A C

Dimension Minimum A 0.095 A1 0.004 B 0.013 C 0.008 D 0.400 E 0.290 e 0.045 H 0.395 L 0.020 All dimensions are in inches.
.004

Maximum 0.105 0.012 0.020 0.013 0.415 0.305 0.055 0.415 0.040

A1

12

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Data Sheet Revision History
Change No. 5 5 6 7 8 8 Notes: Page No. 2 8 All 9 3 5, 7 Description Changed block diagram Added top-off values to Table 2. Revised and expanded format of this data sheet TOPR Corrected Table 1 Corrected and expanded the explanation for maximum voltage conditions Nature of Change Changed diagram. Added values. Clarification Deleted industrial temperature range. Correction Clarification

Changes 14: Please refer to the 1997 Data Book. Change 5 = Sept. 1996 F changes from Oct. 1993 E. Change 6 = Oct. 1997 G changes from Sept. 1996 F. Change 7 = June 1999 H changes from Oct. 1997 G. Change 8 = Oct. 1999 I changes from June 1999 H.

Ordering Information
bq2003

Package Option:
PN = 16-pin narrow plastic DIP S = 16-pin SOIC

Device:
bq2003 Fast-Charge IC

13

PACKAGE OPTION ADDENDUM

www.ti.com

4-Aug-2006

PACKAGING INFORMATION
Orderable Device BQ2003PN BQ2003PN-N BQ2003S BQ2003S-N BQ2003S-NTR BQ2003S-NTRG4 BQ2003SG4 BQ2003STR BQ2003STRG4
(1)

Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE

Package Type PDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC SOIC

Package Drawing N N DW DW DW DW DW DW DW

Pins Package Eco Plan (2) Qty 16 16 16 16 16 16 16 16 16 40 2000 40 25 25 40 40 2000 Pb-Free (RoHS) TBD TBD TBD TBD TBD Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br)

Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU

MSL Peak Temp (3) N / A for Pkg Type N / A for Pkg Type Level-2-220C-1 YEAR Level-2-220C-1 YEAR Level-2-220C-1 YEAR Call TI Level-1-260C-UNLIM Level-2-220C-1 YEAR Level-1-260C-UNLIM

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1