Basic ELectronics - Material - 14022017 - 081630AM

GUJARAT TECHNOLOGICAL UNIVERSITY
BASIC ELECTRONICS (Modified Version January 2014)

SUBJECT CODE: 2110016
B.E. 1st YEAR
Type of course: Basic
Prerequisite: N.A.
Rationale: N.A.
Teaching and Examination Scheme:

Teaching Scheme Credits Examination Marks Total
L T P C Theory Marks Practical Marks Marks
ESE PA ESE PA
(E) (M) Viva (V) (I)
4 0 2 6 70 30* 30 20** 150
L- Lectures; T- Tutorial/Teacher Guided Student Activity; P- Practical; C- Credit; ESE- End
Semester Examination; PA- Progressive Assessment
Content:
Teaching
Sr. No. Topic
Hrs.
Circuit Concepts
 Electrical Quantities
 Lumped Circuit Elements
 Kirchhoff’s Laws
1 6
 Meters and Measurements
 Analogy between Electrical and other Non-Electrical Physical
Systems
 A case study
Circuit Analysis Techniques:
 Thevenin and Norton Equivalent Circuits
 Node-Voltage and Mesh-Current Analysis
2  Superposition and Linearity 8
 Wye-Delta Transformation
 Computer Aided Circuit Analysis
 A Case Study
Analog Building Blocks and Operational Amplifiers Basic ideas
 The Amplifier Block
 Ideal Operational Amplifier
3 8
 Practical Properties of Operational Amplifiers
 Applications of Operational Amplifiers
 A case study
Digital Building Blocks
4 8
 Digital System Building Blocks
 Digital System Components
 Computer Systems
 Computer Networks
 A case study
Signal Processing:
 Signals and Spectral Analysis
5  Modulation, Sampling and Multiplexing 8
 Interference and Noise
 A case Study
Communication Systems
 Waves, Transmission Lines, waveguides and Antenna
Fundamentals
6 6
 Analog Communication Systems
 Digital Communication Systems
 A Case Study
Basic Control Systems
 Feedback Control Systems
7 6
 Digital Control Systems
 A Case Study
Reference Books:
1. Introduction to Electrical Engineering, M S Sarma, Oxford University Press
Course Outcome:
After completion of the course, the student will be able to –
 Determine the behavior of simple passive electrical circuits with independent voltage and
current sources.
 Design simple analog signal processing functions using operational amplifiers.
 Design simple combinational and sequential functions using gates and flip-flops.
 Explain the functioning of digital system components including DACs, ADCs, memory and
display devices,
 Explain the organization of computer systems and computer networks.
 Determine the properties of simple signal processing systems.
 Determine the behavior of analog and digital communication systems.
 Determine the behavior of simple linear feedback control systems
List of Experiments:
The practical/exercises should be properly designed and implemented with an attempt to develop
different types of skills so that students are able to acquire the competency. Following is the list of
experiments for guidance. A student should perform at least 10 experiments out of the given 14 with
at least one experiment from each Unit
S. No. Unit Practical/Exercise Apprx.

No. Hrs.
Required
1 I a. Observe the behavior of RLC circuits with ideal and 2
non-ideal voltage sources and current sources.
b. Verify Thevenin’s and Norton’s Theorems
2 II Simulate passive electrical circuits using Multisim 2
simulator and compare the simulated response with that
of the actual circuit
3 III Determine the parameters of three commercial Op 2
Amps
4 III Perform simple analog signal processing functions 2
using Op Amps
5 IV Design simple combinational functions as per 2
specifications and verify the correctness of your design
6 IV Design simple sequential functions as per specifications 2
and verify the correctness of your design
7 IV Measure the characteristics of given DACs and ADCs 2
8 V Simulate simple modulation, sampling, multiplexing,
demodulation signal processing functions Multisim 2
9 V Simulate simple filtering signal processing function 2
Multisim
10 V Measure the performance of a given signal processing 2
system
11 VI Determine the behavior of a given analog 2
communication system through simulation using
Multisim
12 VI Determine the behavior of a given digital 2
communication system through simulation using
Multisim
13 VII Determine the behavior of a second and third order 2
control systems through simulation using Multisim
14 VII Determine the behavior of a practical control system 2
using ON-OFF and P controllers through simulation
using SciLab
Determine the behavior of a practical control system
using PI and PID controllers through simulation using
SciLab
Major Equipment’s:
(1) CRO (At least 20MHz)
(2) Function Generator (Frequency range up to 20 MHz) – need to have sine, square wave
output.
(3) Dual Power Supply (0-12V/15V DC)/3A
(4) Micrometers for measurement of voltage and current with suitable ranges.
(5) Multimeter
(6) Various Electronics Components including different types of Op Amps and digital ICs.
(7) PCs
List of Open Source Software/learning website:

Software: Multisim and SciLab (www.scilab.org)
Learning Material: http://nptel.iitm.ac.in/. www.spoken-tutotial.org
*PA (M): 10 marks for Active Learning Assignments, 20 marks for other methods of PA;
ACTIVE LEARNING ASSIGNMENTS: Students will prepare power-point slides, which include
videos, animations, pictures, graphics for better understanding theory and practical work – The
faculty will allocate chapters/ parts of chapters to groups of students so that the entire syllabus of
Basic Electronics is covered. The power-point slides should be put up on the web-site of the
College/ Institute, along with the names of the students of the group, the name of the faculty,
Department and College on the first slide. The best three works should be sent to
[email protected].
**PA (I): The faculty may also allocate additional marks out of PA for Practical Work, in addition
to the regular practicals. This work may be as follows:
(i) Practical work planned by students, with the approval/ guidance of the students.
(j) Preparation of a case study on a present day electronic system of choice.
Basic Electronics ( 2110016 ) Chapter 1: Circuit Concepts
CHAPTER 1
CIRCUIT CONCEPTS
TOPICS COVERED IN THIS CHAPTER
1. Introduction
2. Various Electrical Quantities
3. Lumped Circuit Elements
4. Kirchhoff’s Laws
5. Meters and Measurements
6. Analogy between Electrical and Non-Electrical Physical Quantities
7. A Case Study – Resistance Strain Gauge
8. Questions
DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

1
EC DEPARTMENT / SEM 2 (EC, CE, EE)
1.1 INTRODUCTION:
 Electric circuits are collections of circuit elements. An electric circuit is an inter connection
of simple electric devices that have at least one closed path in which current may flow.
 A circuit element is any individual circuit component which gets connected to the other
components in a network.
 An electric circuit is an idealized mathematical model of some physical circuit. The ideal
circuit elements are the resistor, the inductor, the capacitor and the voltage and current sources.
 Electrical engineering is concerned with the analysis and design of electrical circuits, systems
and devices. In this chapter we will learn the fundamental concepts of all circuits.
1.2 ELECTRICAL QUANTITIES:
 To understand the operation of electric circuits we must familiar with electrical quantities such
as charge, current and voltage.
1.2.1 Charge and Electric Force:
 There are two types of charges:

1 Positive charge (+)
2 Negative charge (-)
 Conservation law of charges:

 Charge can be neither created nor destroyed. It can be only transferred.
 The unit of charge is Coulomb. It is denoted by C.
Fig. 1.1: Structure of the atom

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 Each atoms consist of three types of particles.

1 Protons
 Protons are positive charge (+) and it has charge of + 1.6 X 10-19 coulombs (C).
2 Electrons
 Electrons are negative charge (-) and it has charge of – 1.6 X 10-19 coulombs (C).
3 Neutron
 The neutron has zero charge.
 Coulomb’s First Law:

 “Same kind of charges repel each other and different kind of charges attract each other”.
(a) (b)
Fig. 1.2: (a) Repulsion (b) Attraction
 Coulomb’s Second Law (Inverse Square Law):

 “The force between two charges Q1 and Q2 separated by a distance R is proportional to the
product between the charges and inversely proportional to the square of distance between
them”.
 Coulomb’s law has given an expression to calculate the electric force in Newton (N) on one
point charge by the other.
Fig. 1.3: Illustration of coulomb’s law.
Force on Q1 due to Q2  𝐹̅ 21 = [Q1Q2 /4πε0εr R2] 𝑎̅21 = [K Q1Q2 /R2] 𝑎̅21
Force on Q2 due to Q1  𝐹̅ 12 = [Q1Q2 /4 πε0εr R2] 𝑎̅12 = [K Q1Q2 /R2] 𝑎̅12

Where,
F = Force between two charges in N.
K = 1 / 4πε0εr

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Q1, Q2 = Point charges in C.

ε0 = Permittivity of the free space medium (8.854 X 10-12 F/m).
εr = Relative permittivity of the medium (for air εr = 1).
a12 and a21 are unit vectors along the line joining Q1 and Q2.
R = Distance between two charges in meter.
 Forces 𝐹̅ 21 and 𝐹̅ 12 are due to Q2 and Q1. They are equal in magnitude and opposite of each
other in direction.
 The magnitude of the force is proportional to the product of the charge magnitudes.
 The magnitude of the force is inversely proportional to the square of the distance between the
charges.
 The magnitude of the force depends on the medium.
 The direction of the force is along the line joining the charges.
Ex 1: (A) A small region of an impure silicon crystal with dimensions 1.25 × 10−6 m ×10−3 m
×10−3 m has only the ions (with charge +1.6 X 10−19 C) present with a volume density of
1025/m3. The rest of the crystal volume contains equal densities of electrons (with charge −1.6
× 10−19 C) and positive ions. Find the net total charge of the crystal.
(B) Consider the charge of part (A) as a point charge Q1. Determine the force exerted by this
on a charge Q2 = 3μC when the charges are separated by a distance of 2 m in free space as
shown in figure.
(C) If the another charge Q3 = - 2μC is added to the system 1 m above Q2, as shown in figure,
calculate the force excreted on Q2.
Solution:
 In the region where both ions and free electrons exist, their opposite charge cancel. So the net
charge density is zero.
 The volume charge density = volume × charge
ρ = (1025) (1.6 × 10−19) = 1.6 × 106 C/m3
 The net total charge is then calculated as:

Q = ρ × v = (1.6 × 106) (1.25 × 10−6 × 10−3 × 10−3) = 2 × 10−6 C
 The force that Q1 exerts on Q2 is in the positive direction of x.

 Now as we know that;
F = Q1Q2 / 4πε0εrR2
Where; ε0 = 8.854 X 10-12 F/m = 10-9 / 36π and εr = 1 (Relative permittivity of air)

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 The force that Q3 exerts on Q2 is in the positive direction of y.
 The resultant force F2 acting on Q2 is in the superposition of F12 and F32 due to Q1 and Q3
respectively.
1.2.2 Conductors, Insulators and Semi-Conductors:
 Total three types of materials are present,

1. Conductors:
 Materials through which charge can flows easily are called conductors.
 A conductor has a very low resistance to the flow of charge.
 Copper is used mostly for the conductive paths on electric circuit boards and for the
fabrication of electric wires.
 Examples: Silver, gold, copper, aluminum and such metals.
2. Insulators:
 Materials that do not allow charge to move easily. Electric current cannot be made to flow
through it.
 An insulator has very high resistance to the flow of charge.
 Insulating materials wrapped around the conducting core of the wire.
 Examples: Glass, Plastic, Ceramics, Rubber etc.
3. Semi-Conductors:
 Semiconductors conductivity lies between conductors and insulators.
 Semiconductor has moderate resistance to the flow of charge.
 Examples: Silicon, Germanium, Gallium, Arsenide etc.
1.2.3 Current and Magnetic Force:
 Current:
 Rate of flow of electrons is known as current.
I=Q/t
Where,
I = Current, Q = Charge, t = Time

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 If charge varies with time, so

i = dq / dt
Where,
dq = change in charge
dt = change in time
 Unit of current is Ampere. It is denoted as A.
 1 A = 1 C/sec
 1 Coulomb of charge is the charge carried by 6.25 X 1018 electrons.
 1 mA = 10-3 A and 1 μA = 10-6 A
 Magnetic Force:
 Ampere’s law of force:

 It is concerned with magnetic forces associated with two loops of wire carrying currents.
Fig. 1.4 Illustration of ampere’s law of force
 It shows two loops of wire in free space carrying currents I1 and I2.Considering a differential
element dl1 of loop 1 and a differential element dl2 of loop 2.
 The differential magnetic force by the differential current element is
𝜇
d𝐹̅ 21= I1 d𝑙 1̅ × 0 2 [ I2 d𝑙 2̅ × 𝑎̅21 ]
4𝜋𝑅
𝜇
d𝐹̅ 12 =I2 d𝑙 2̅ × 0 2 [ I2 d𝑙 2̅ × 𝑎̅12 ]
4𝜋𝑅
 Where 𝑎̅21 and 𝑎̅12 are unit vectors along the line joining the two current elements, R is the
distance between the centers of the elements, μ0 is the permeability of free space.
 The magnitude of the force is proportional to the product of the two currents and the product
of the lengths of the two current elements.
 The magnitude of the force is inversely proportional to the square of the distance between the
current elements.
 Each current element is acted upon by a magnetic field due to the other current element,
d𝐹̅ 21 = I1 d𝑙 1̅ × B2
d𝐹̅ 12 = I2 d𝑙 2̅ × B1
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 Where B is known as the magnetic flux density with unit of N/A·m, Webers per square meter
(Wb/m2) or tesla (T).
 Current distribution is the source of magnetic field, just as charge distribution is the source of
electric field.
𝜇
𝐵̅2 = 0 2 (I2 d𝑙 2̅ × 𝑎̅21)
4𝜋𝑅
𝜇
𝐵1 = 0 2 (I1 d𝑙 1̅ × 𝑎̅12)
̅
4𝜋𝑅
 This equation is known as the Biot–Savart law.
 Lorentz force equation:

 Current is due to the flow of charges.
 I = dq/dt and d𝑙 ̅ = 𝑣̅ dt, where v is the velocity.
𝑑𝑞
d𝐹̅ = (𝑣̅ dt) × 𝐵̅ = dq (𝑣̅ × 𝐵̅)
𝑑𝑡
 Thus the force F experienced by a charge q moving with a velocity v in a magnetic field of
flux density B is given by
𝐹̅ = q (𝑣̅ × 𝐵̅)
 Total force acting on a charge q moving with velocity v in a region characterized by electric
field intensity E and a magnetic field of flux density B is
𝐹̅ = 𝐹̅ E + 𝐹̅ M = q (𝐸̅ + 𝑣̅ × 𝐵̅)
Ex 2: Consider a length of 10−6 m of wire whose center is located at the point (1, 0, 0), carrying
a current of 2 A in the positive direction of x.
(A) Find the magnetic flux density due to the current element at the point (0, 2, 2).
(B) Let another current element of length 10-3 m be located at the point (0, 2, 2), carrying a
̅𝒚 + 𝒂
current of 1 A in the direction of (- 𝒂 ̅𝒛 ). Evaluate the force on this current element
due to the other element located at (1, 0, 0).
Solution:

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1.2.4 Definitions:
 Unit Charge:
 A charge of 1 coulomb is also called as unit charge.
 Electric Field:
 The region around a charged body where another charged body experiences a mechanical force.
 Electric Flux:
 Electric flux is defined as the number of lines of force in any particular electric field.
 It is measured in Coulomb (C).
 Electric Flux Density (D) or Displacement Density:

 It is defined as the flux per unit area measured in right angle to the direction of flux.
 D = Q/A.
 It is measured in Coulomb per meter square (C/m2).
 Electric Field Strength or Field Intensity (E):

 It is defined as mechanical force experienced by a unit positive charge when it is placed at any
point in the electric field.
 E = F/Q.
 It is measured in Newton per Coulomb (N/C).
1.2.5 Electric Potential and Voltage:
 Electric potential:
 Electric potential is defined as Energy per unit charge. Potential is always reference to some
point.
 When electrical forces act on a particle, it will possess potential energy.
Electric Potential = Work done / Charge OR V=W/Q
 Unit of electric potential is Joule / Coulomb (J/C) or Volt (V).

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 One Volt:
 A body is said to have a potential of 1 volt, if 1 joule of work is done to give it a charge of 1
coulomb.
 Voltage or Potential difference (P.D.):

 Voltage is the difference in electric potential between two points.
 It is expressed in volts (V) or joules per coulomb (J/C).
 Consider two bodies A and B having potential 5 V and 1 V respectively as shown in fig. 1.5.
A B
VA VB A B
5V 1V
CURRENT
POTENTIAL VA 5V 1V VB
DIFFERENCE
VAB = VA – VB CONNECTED
WIRE
Fig. 1.5: Potential and potential difference
 So body A is at higher potential then B and the potential difference between A and B is given
by VAB.
VAB = VA – VB = 5 – 1 = 4 V.
 Voltages can be either positive or negative numbers, and it follows that VBA = −VAB.
 If VA > VB  Positive potential difference.
 If VA < VB  Negative potential difference.
 Electromotive Force (emf):

 The force which causes current to flow in the circuit is called emf.
 It defined as E.
 Its unit is volt (V).
 Difference between emf and Potential Difference:
emf Potential Difference

emf means electromotive force due to Potential difference means the
which charge can flow in the circuit. difference between potential energy
between two points in a circuit.
Unit is volt. Unit is volt.
1.2.6 Energy and Power:
 Energy:
 Total work done in an electric circuit is called electric energy.
 The energy over a time interval is found by integrating power,

9
𝑤 = ∫ 𝑝 𝑑𝑡
0
E=Pxt
 Energy is expressed in watt-seconds or joules (J).

 It is expressed in electric utility bills in kilo watt hours (kWh).1 kWh = 3.6 × 106 J.
 Power:
 Power is defined as the rate of doing work or the rate of change of energy dw/dt.
 Power = Work done / Time.
P = I2R = V2/R
 Unit of power is Watt. or J/Sec or Volt Ampere.
 1 kWh = 1 kW x 1 hr
= 103 x 60 x 60 sec
= 36 X 105 Watt Sec
= 36 X 105 J.
Ex 3: A typical 12-V automobile battery, storing about 5 mega joules (MJ) of energy, is
connected to a4-A headlight system.
(a) Find the power delivered to the headlight system.
(b) Calculate the energy consumed in 1 hour of operation.
(c) Express the auto-battery capacity in ampere-hours (Ah)
(d) compute how long the headlight system can be operated before the battery is completely
discharged.
Solution:
(a) Power delivered: P = V I = 12×4 = 48 W
(b) Assuming V and I remain constant, the energy consumed in 1 hour will equal
E = P x t = 48(60 × 60) = 172.8 × 103J = 172.8 kJ
(c) 1 Ah = (1C/s) (3600 s) = 3600 C, So here;

Q = W / V = 5 × 106 J /12V =0.417 × 106 C
Thus the auto-battery capacity is 0.417 × 106 / 3600 ∼=116 Ah
(d) 116Ah/4A = 29 hours the headlight system can be operated.
1.2.7 Source and Loads:
 A voltage rise indicates an electric source, with the charge being raised to a higher potential,
whereas a voltage drop indicates a load, with a charge going to a lower potential.

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Fig. 1.6: Source and Load
 The voltage across the source is the same as the voltage across the load.
 Source supplies energy and load absorbs energy.
Fig. 1.7: Source–Load combination
 Node: A node is a point at which two or more components or devices are connected together.
 Branch: part of a circuit containing only one component, source, or device between two nodes
is known as a branch.
 When current flows out of the positive terminal of an electric source, it implies that nonelectric
energy has been transformed into electric energy.
 Examples: Generator Source - mechanical energy → electric energy, Battery Source -
chemical energy → electric energy, Solar-Cell Source - solar energy → electric energy.
 When current flows in the direction of voltage drop, it implies that electric energy is
transformed into nonelectric energy.
 Examples: Electric Heater - electric energy → thermal energy, Motor Load - electric energy
mechanical energy, Charging Battery - electric energy → chemical energy.

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1.2.8 Sources of Electrical Energy:
 There are two types of sources;
1. Independent sources (Ideal sources):

 When the source voltage or current is independent of all other voltages and currents, such
sources are known as independent sources.
 An ideal voltage source is one whose terminal voltage V is a specified function of time,
regardless of the current i through the source.
 An ideal battery has a constant voltage V with respect to time, is known as a dc source,
because i = I is a direct current
 A sinusoidal voltage source V = Vm cosωt is produce an alternating current.
(a) (b)
Fig. 1.8: Voltage sources. (a) Ideal dc source (battery). (b) Ideal sinusoidal ac source.
 An ideal current source is defined as one whose current i is a specified function of time,
regardless of the voltage across its terminals.
(a) (b)
Fig. 1.9: Circuit symbols and i–v curves. (a) Ideal voltage source. (b) Ideal current
source
 Ideal sources could theoretically produce infinite energy, as infinite values are physically
impossible.
2. Dependent sources:
 The sources whose voltage or current does depend on the value of some other voltage or
current. Such sources are known as dependent sources or controlled sources.

12
+
-
(a) (b)
Fig. 1.10: (a) Dependent voltage source (b) Dependent current source
1.2.9 Waveforms:
 A waveform is a graph magnitude of a quantity with respect to time.

 The quantity plotted on x-axis is time and quantity is plotted on y-axis is voltage.
 Different types of waveforms are shown as below.
Fig. 1.11: (a) Sinusoidal wave (b) Square wave (C) Triangular wave (D) Sawtooth wave
 Sinusoidal waveform can be expressed as below,

f(t) = Em sin (ωt + φ)
Where,
Em = Amplitude
ωt = Angular frequency
φ = Phase angle
1. Instantaneous value:
 The value of an alternating quantity (voltage, current, power etc.) at any instant is called its
instantaneous value.

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2. Cycle:
 One complete set of positive and negative value of an alternating quantity is known as cycle.
3. Amplitude:
 The maximum value (positive or Negative) of an alternating quantity is known as its
amplitude.
4. Time Period or Periodic Time (T):
 It is defined as the time taken in second by the any waveform of an ac quantity to complete
one cycle.
T=1/f
5. Frequency:
 The number of cycle completed by an alternating quantity per second is known as frequency.
f = 1 /T
 Its unit is Hertz (Hz) or (Second)-1
6. Angular frequency:
 It is defined as below;
ω = 2πf = 2π / T
7. Average value (Favg):

 The average value of a periodic waveform f(t) is the net positive area under the curve of one
period, divided by the period.
1 𝑇
𝐹𝑎𝑣𝑔 = ∫ 𝑓(𝑡)𝑑𝑡
𝑇 0
 The average value of f(t) = Em sin (ωt + φ) is as below;
1 𝑇
𝐹𝑎𝑣𝑔 = ∫ 𝑓(𝑡)𝑑𝑡
𝑇 0
1 2𝜋
𝐹𝑎𝑣𝑔 = ∫ Em sin (ωt + φ)𝑑𝑡
𝑇 0
1
𝐹𝑎𝑣𝑔 = 2𝜋
𝐶𝑂𝑆 (1 − 1) = 0
8. RMS value (Effective value):

 RMS value of periodic waveform is equal to the square root of the average of f2(t).
1 𝑇 2
𝐹𝑟𝑚𝑠 = √ ∫ 𝑓 (𝑡)𝑑𝑡
𝑇 0
 The average value of f(t) = Em sin (ωt + φ) is as below;

𝐴
𝐹𝑟𝑚𝑠 = = 0.707 A
√2

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Ex 4: A periodic current waveform in a rectifier is shown in Figure. The wave is sinusoidal

for π/3 ≤ ωt ≤ π, and is zero for the rest of the cycle. Calculate the rms and average values
of the current.
Solution:
1 𝑇2
𝐼𝑟𝑚𝑠 = √ ∫ 𝑖 (𝑡)𝑑𝑡
𝑇 0
1.3 LUMPED CIRCUIT ELEMENTS:
 Electric circuits or networks are formed by interconnecting various devices, sources, and
components Although the effects of each element (such as heating effects, electric-field effects
or magnetic-field effects) are distributed throughout space, one often lumps them together as
lumped elements.
 Mainly two types of components are,
1. Passive components (like R which is represent heating effect, L which is represent
magnetic field, C which is represent electric field )
2. Active components (like transistor, diode, transformer etc.)

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1.3.1 Resistance (R):
 An ideal resistor is a circuit element with the property that the current through it is linearly
proportional to the potential difference across its terminals,
i = v/R = G X v or v = iR
Which is known as Ohm’s law.

 R is known as the resistance of the resistor with the SI unit of ohms (Ώ), and G is the reciprocal
of resistance called conductance, with the SI unit of siemens (S). The circuit symbols of fixed
and variable resistors are shown in Fig. 1.12
Fig. 1.12: Symbol of fixed & variable resistor
 Resistance is defined as,

R = ρ l /A = l / (σA)
Where,
ρ = Resistivity (Ώ-m)
L = Length of conductor (m)
A = Cross-sectional area of conductor (m2)
 The resistivity of conductor metals varies linearly over normal operating temperatures
according to
ρT2 = ρT1 ((T2 + T) / (T1 + T))
Where ρT2 and ρT1 are resistivities at temperatures T2 and T1, respectively, and T is a
temperature constant that depends on the conductor material. All temperatures are in degrees
Celsius.
 Resistance also depends on frequency, spiraling etc.

 The basic construction techniques of resistor are
1. Wire-wound resistors:
 Wire-wound resistors are commonly made by winding a metal wire, usually nichrome,
around a ceramic, plastic, or fiberglass core. The ends of the wire are soldered or welded
to two caps or rings, attached to the ends of the core.
2. Metal-film resistors:
 Metal-film resistors are used when a higher tolerance (more accurate value) is needed.
They are much more accurate in value than carbon film resistors. The metal-film resistor
is used for bridge circuits, filter circuits and low-noise analog signal circuits.

16
3. Composition resistors:
 Carbon composition resistors consist of a solid cylindrical resistive element with embedded
wire leads or metal end caps to which the lead wires are attached. The body of the resistor
is protected with paint or plastic.
 Color-code band for evaluating resistance is as follow;
Fig. 1.13 (A): Resistor color code chart
Fig. 1.13 (B): Calculation of Resistor value from color code chart

17
 Typical power ratings of resistors are 1, 1/2, 1/8, 1/4, 2, 5 up to 1000W.

 Instantaneous power is defined as;
P(t) = v(t)i(t) = i2R = v2/R = v2G
 Average power is defined as;
Pav = VrmsIrms = i2rmsR = V2rms/R = V2rmsG
 Series parallel combination of resistors:
Fig. 1.14: (a) Series combination (b) Parallel combination

 V = VAC = VAB + VBC = iR1 + iR2 = i(R1 + R2) = iReq
When R1 and R2 are in series,
Req = R1 + R2
 Fig. 1.14(b) shows two resistors in parallel sharing the current i in inverse proportion to their
values, while the same voltage v is applied across each of them. At node B,
 i = i1 + i2 = v/R1 + v/R2 = v (1/R1 + 1/R2) = v / (R1R2 / R1 + R2) = v / Req
When R1 and R2 are in parallel,
Req = (R1R2) / (R1 + R2)
Ex 5: A no. 14 gauge copper wire, commonly used in extension cords, has a circular wire
diameter of 64.1 mils, where 1 mil = 0.001 inch.
(a) Determine the resistance of a 100-ft-long wire at 20°C.
(b) If such a 2-wire system is connected to a 110-V (rms) residential source outlet in order to
power a household appliance drawing a current of 1 A (rms), find the rms voltage at the load
terminals.
(c) Compute the power dissipated due to the extension cord.
(d) Repeat part (a) at 50°C, given that the temperature constant for copper is 241.5°C.

18
Solution:
Ex 6: (a) Consider a series parallel combination of resistors as shown in figure. Find the
equivalent resistance as seen from terminal A-B.
(b) determine the current I and power P delivered by a 10 V dc voltage source applied at
terminal A-B, with A being at higher potential than B.
(c) Replace the voltage source by an equivalent current source at terminal A-B.
(d) Show the current and voltage distribution clearly in all branches of the original circuit
configuration.

19
Solution:

20
1.3.2 Maximum Power Transfer:
 Statement:
 “Maximum power will be transferred from a source network to a load if the load resistance
RL is equal to equivalent resistance RS of the source network”
Fig. 1.15: Power transfer between load and source

 Let us consider Figure 1.15, in which a constant voltage source v with a known internal
resistance RS is connected to a variable load resistance RL.
 When RL is equal to zero, it is called a short circuit, in which case VL becomes zero and iL is
equal to V/RS.

21
 When RL approaches infinity, it is called an open circuit, in which case i L becomes zero and
VL is equal to V. To find the value of the load resistance that will absorb maximum power from
the source.
 The power PL absorbed by the load is given by;
 Where the iL is given by;
 So ;
 For given fixed values of v and RS, in order to find the value of RL that maximizes the power
absorbed by the load, one sets the first derivative dPL/dRL equal to zero,
 So, in order to transfer maximum power to a load, the load resistance must be matched to the
source resistance or, in other words, they should be equal to each other.
 Source Loading Effect:
Fig. 1.16: Source loading effect

 From fig. 1.16;
Where;
Vint = internal voltage drop.
 As seen from above Equation, the voltage actually seen by the load VL is somewhat lower than
the open-circuit voltage of the source.

22
 When the load resistance RL is infinitely large, the load current iL goes to zero, and the load
voltage VL is then equal to the open-circuit voltage of the source V.
 Hence, it is desirable to have as small an internal resistance as possible in a practical
voltage source.
 Where iint is the internal current drawn away from the load because of the presence of the
internal source resistance.
 Thus the load will receive only part of the short-circuit current available from the source.
 When the load resistance RL is zero, the load voltage VL goes to zero, and the load current iL
is then equal to the short-circuit current of the source i.
 Hence, it is desirable to have as large an internal resistance as possible in a practical
current source.
Ex 7: In the given circuit what is the maximum power that can be absorbed by the load R L
if it varied. What is power absorbed by the load if RL = 7 Ω and RL = 11 Ω.
RS = 9 ohm
V=8V RL
 For maximum power transfer

RL =Rs = 9 Ω
 Maximum power absorbed by the load

𝑉2 8𝑋8
𝑃𝑚𝑎𝑥 = = = 1.78 𝑊𝑎𝑡𝑡𝑠
4𝑅𝐿 4𝑋9
 CASE-1: RL = 7 Ω
𝑉 8
𝐼= = = 0.5 𝐴𝑚𝑝
𝑅𝑆 + 𝑅𝐿 9+7
 Power absorbed by the load;
𝑃 = 𝐼 2 𝑅𝐿 = (0.5)2 𝑋 7 = 1.75 𝑊𝑎𝑡𝑡𝑠
 CASE-1: RL = 11 Ω
𝑉 8
𝐼= = = 0.4 𝐴𝑚𝑝
𝑅𝑆 + 𝑅𝐿 9 + 11
 Power absorbed by the load;
𝑃 = 𝐼 2 𝑅𝐿 = (0.4)2 𝑋 11 = 1.76 𝑊𝑎𝑡𝑡𝑠

23
1.3.3 Capacitor:
 Capacitor is an element that store the electrical energy in form of static charges.
 Stored Electric energy is in form of charges.
 Different types of capacitors are Air capacitor, paper capacitor, Ceramic capacitor, Plastic
capacitor, Electrolytic capacitor, Mica capacitor, Glass capacitor etc.
 Its unit is Farad (F)
Fig. 1.17: (a) Basic construction (b) Symbol
 Voltage and current equation:

 The capacitance is defined as follow;
𝑄 𝑞
𝐶= 𝑂𝑅 𝐶 =
𝑉 𝑣
 We can write above equation in terms of current
𝑑𝑣
𝑖 = 𝐶
𝑑𝑡
Where,
V = Voltage across capacitor
i = Current through a capacitor
1
𝑑𝑣 = 𝑖 𝑑𝑡
𝐶
Taking integrating both side, we get
𝑡
1 𝑡
∫ (𝑑𝑣) = ∫ 𝑖 𝑑𝑡
0 𝐶 0
1 𝑡
𝑉= ∫0 𝑖 𝑑𝑡
𝐶
 Power absorbed by capacitor:

 The power absorbed by the capacitor is given by;
P=vxi

24
 Now put value of i from above equation

𝑑𝑣
P = v x C 𝑑𝑡
 Energy stored by capacitor:

 The energy stored by the capacitor is
𝑡 𝑡
𝑑𝑣
𝐸 = ∫ 𝑝 𝑑𝑡 = ∫ 𝑣 𝑋 𝐶 𝑑𝑡
0 0 𝑑𝑡
1
𝐸 = 𝐶𝑉 2
2
 Series parallel combination:
Fig. 1.18: (a) Series connection (b) Parallel connection
 Equation for series connection:

1 1 1
= +
𝐶𝑒𝑞 𝐶1 𝐶2
𝐶1 𝐶2
𝐶𝑒𝑞 =
𝐶1 + 𝐶2
 Equation for parallel connection:
𝐶𝑒𝑞 = 𝐶1 + 𝐶2
Ex 8: Three capacitors have capacitance of 10, 50 and 25 μF. Calculate;

(a) Charge on each capacitor when they are connected in parallel to a 250 V supply.
(b) Total capacitance
(c) Potential difference across each capacitor when they are connected in series.
Solution:
10
50
25
250 V

25
(a) Parallel connection is as shown in figure;

Q1 = C1 V = 10 x 250 = 2500 μC
Q2 = C2 V = 50 x 250 = 12500 μC
Q3 = C3 V = 25 x 250 = 6750 μC
(b) Total capacitance;

Ceq = C1 + C2 + C3 = 10 + 50 + 25 = 85 μF
(c) In series connection charge on each capacitor is same so;

1 1 1 1 1 1 1 25
= + + = + + = μF
𝐶𝑒𝑞 𝐶1 𝐶2 𝐶3 10 50 25 4
Q = Ceq V = (25/4) 250 = 1562.5 μC
Similarly;
Q = C1 V1
So; V1 = Q / C1 = 1562.5 / 10 = 156.25 V
Q = C2 V2
So; V2 = Q / C2 = 1562.5 / 50 = 62.5 V
Q = C3 V3
So; V3 = Q / C3 = 1562.5 / 25 = 31.25 V
Ex 9: A capacitor of capacity of 10 μF is charged from 1000 V d.c. supply and is then

discharged through a wire. Find energy stored in capacitor.
Solution:
1 1
 Energy stored in the capacitor is, E = 2 𝐶𝑉 2 = 10 𝑋 10−6 𝑋 10002 = 5 𝐽𝑜𝑢𝑙𝑒
2
1.3.4 Inductor:
Fig. 1.19: Inductor
 Inductor is an element that store electrical energy in form of magnetic field.

 Inductor is also called a coil or choke.

26
 Inductor is defined in form of inductance (L). Inductance is a property of inductor to oppose

any change in magnitude or direction of current flowing through it.
 Its unit is Henry (H).
 Inductance of a coil is given by,
𝑁𝜑
𝐿=
𝐼
Where,
N = Number of turns
Φ = Flux
I = Current through the coil.
 Types of Inductor:
 There are two types of inductors;

1 Fixed inductor
2 Variable inductor
 Voltage and Current Equation:

 The relation between voltage and current is given by,
𝑑𝑖
𝑣=𝐿
𝑑𝑡
Where,
V = Voltage across inductor
i = Current through inductor
 We can write above equation as,
1
𝑑𝑖 = 𝑣 𝑑𝑡
𝐿
 Now take integration both the side
𝑡
1 𝑡
∫ 𝑑𝑖 = ∫ 𝑣 𝑑𝑡
0 𝐿 0
1 𝑡
𝑖 = ∫ 𝑣 𝑑𝑡
𝐿 0

27
 Energy stored by the inductor:

 The power absorbed by inductor is,
𝑃=𝑣𝑋𝑖
𝑑𝑖
𝑃 = 𝐿𝑖
𝑑𝑡
 Energy stored by the inductor:
 The energy stored by the inductor is,
𝑡 𝑡
𝑑𝑖
𝐸 = ∫ 𝑃 𝑑𝑡 = ∫ 𝐿𝑖 𝑑𝑡
0 0 𝑑𝑡
1
𝐸 = 𝐿𝑖 2
2
 Inductor in Series and parallel:
Fig. 1.20: Series and Parallel connection
 Equation for series connection:

𝐿𝑒𝑞 = 𝐿1 + 𝐿2
 Equation for parallel connection:
1 1 1
= +
𝐿𝑒𝑞 𝐿1 𝐿2
1 𝐿1 𝐿2
=
𝐿𝑒𝑞 𝐿1 + 𝐿2
 Mutual Inductance:
 When more than one loop or circuit is present, the flux produced by the current in one loop
may link another loop, thereby inducing a current in that loop.
 Such loops are said to be mutually coupled, and there exists a mutual inductance between
such loops.
 The mutual inductance between two circuits is defined as the flux linkage produced in one
circuit by a current of 1 ampere in the other circuit.

28
 Let us now consider a pair of mutually coupled inductors, as shown in Figure 1.21.
 The self-inductances L11 and L22 of inductors 1 and 2, respectively, are given by
Fig. 1.21: Mutual inductance
 Let ϕ12 is flux linkage of coil-2 due to current of coil-1.

𝑑𝜙12
𝑒2 = − 𝑁2
𝑑𝑡
𝑑𝜙12 𝑑𝑖
Or 𝑒2 = − 𝑁2 𝑑𝑖 𝑋 𝑑𝑡1
1
𝑑𝑖1
Or 𝑒2 = − 𝑀 𝑑𝑡
Where,
𝑑𝜙12
M = 𝑁2 is called mutual inductance of two coil.
𝑑𝑖1
 Coefficient of coupling:
 It is defined as the ratio of flux linkage to the total flux.
 It is denoted by K.
𝜙12 𝜙21
𝐾= =
𝜙1 𝜙2
𝜙12
As we know 𝑀 = 𝑁2 𝑖1
𝜙21
And 𝑀 = 𝑁1 𝑖2
𝜙12 𝜙21
Multiply above two Eq. so we get, 𝑀2 = 𝑁2 𝑁1 𝑖1 𝑖2
Now put 𝜙12 = 𝐾𝜙1 𝑎𝑛𝑑 𝜙12 = 𝐾𝜙2
𝐾2 𝜙1 𝜙2
So 𝑀2 = 𝑁2 𝑁1 𝑖1 𝑖2

29
𝑁1 𝜙1 𝑁2 𝜙2
𝑀2 = 𝐾 2 𝑖1 𝑖2
𝑁1 𝜙1 𝑁2 𝜙2
Now put L1 = and L2 =
𝑖1 𝑖2
2 2
𝑀 = 𝐾 𝐿1 𝐿2
𝑀 = 𝐾√𝐿1 𝐿2
𝑀
K=
√𝐿1 𝐿2
 Expression for the total emf induced in a coil:

 The total emf induced in a coil 1 is given by,
𝑑𝑖1 𝑑𝑖2
𝑒1 = 𝐿1 + 𝑀12
𝑑𝑡 𝑑𝑡
 The total emf induced in a coil 2 is given by,
𝑑𝑖2 𝑑𝑖1
𝑒2 = 𝐿2 + 𝑀21
𝑑𝑡 𝑑𝑡
 Total mutually induced emf can be positive or negative but mutual inductance will always be
positive.
 Two mutual inductances M12 and M21 are equal to each other.
M12 = M21 = M
 Dot convention or Dot notation and sign of mutual inductance:

 M positive if current in the both coils is entering into dot or leaving the dot.
 M negative if current in the one coils is entering into dot and current in other coil is leaving
the dot.
Fig. 1.22: Dot convection of mutual inductance

30
Ex 10: Three inductors have inductance of 10, 50 and 25 H. Calculate;

(a) Equivalent inductance if all inductors are connected in series.
(b) Equivalent inductance if all inductors are connected in parallel.
Solution:
(a) Leq = L1 + L2 + L3 = 10 + 50 + 25 = 85 H
1 1 1 1 1 1 1 25
(b) = + + = + + = H
𝐿𝑒𝑞 𝐿1 𝐿2 𝐿3 10 50 25 4
Ex 11: A capacitor of capacity of 20 H and current flowing through it is 1 Amp. Find energy
stored in inductor.
Solution:
1 1
 Energy stored in the capacitor is, E = 2 𝐿𝐼 2 = 20 𝑋 12 = 10 𝐽𝑜𝑢𝑙𝑒
2
1.3.5 Transformer:
 Transformer is a static device because it does not contain any rotating or moving parts.
 It is used to transfer electric power from one ac circuit to other ac circuit. During transfer of
power frequency remains same.
 Input and output in the transformer both are ac quantities.
 There are two types of transformer
1. Step up
 If output voltage is higher than input voltage then it is known as step up transformer.
2. Step down
 If output voltage is lower than input voltage then it is known as step down transformer.
 The construction of single phase transformer is shown in figure 1.23.
Fig. 1.23 (A): Transformer

31
 It consist of core and on to the core primary and secondary coil is wounded.
 It also consist of two coils/ windings;
1. Primary coil / winding
 The coil which is connected to ac supply it is known as primary coil.
2. Secondary coil / winding
 The coil which is connected to load it is known as secondary coil.
 In transformer primary and secondary windings are isolated from each other as well as from
iron coil so there is no physical connections between primary and secondary windings.
 Principle of operation of as transformer is as below;

As soon as primary winding is connected to ac supply thus ac current starts flowing through it.
Due to ac current which is produced in primary coil thus flux f is produce in the core.
Most of produced flux f gets linked with the secondary coil through core.
The varying flux f will induce voltage into the secondary coil due to mutual inductance
according to the faraday’s law of electromagnetic.
 Voltage ratio of the transformer with load:

 Let RMS produced voltage in the primary coil be E1 volts and RMS produced voltage in the
secondary coil be E2 volts.
E1 = 4.44 ϕm f N1 Volts and E2 = 4.44 ϕm f N2 Volts
 Now taking ration of above eq.
𝐸1 𝑁1 𝐸2 𝑁2
= 𝑜𝑟 =
𝐸2 𝑁2 𝐸1 𝑁1
 Voltage ratio of the transformer without load:

 If no load means load is disconnected at secondary side so I2 = 0 so;
V2 = E2
 Also I1 at the primary side is very small so;
V1 = E1
𝑉1 𝑁1 𝑉2 𝑁2
= 𝑜𝑟 =
𝑉2 𝑁2 𝑉1 𝑁1
 Transformation ratio (a):

𝑉1 𝑁1 𝐸1
𝑎= = =
𝑉2 𝑁2 𝐸2

32
 Turn ratio of transformer:

𝑁
Turn ratio = 𝑁1 = 𝑎
2
 Current ratio of transformer:

𝑝𝑜𝑤𝑒𝑟 𝑖𝑛𝑝𝑢𝑡 = 𝑝𝑜𝑤𝑒𝑟 𝑜𝑢𝑡𝑝𝑢𝑡
V1 I1 cos ϕ1 = V2 I2 cos ϕ2
Here cos ϕ1 and cos ϕ2 are power factors which are same so;
V1 I1 = V2 I2
𝐼1 𝑉2
=
𝐼2 𝑉1
𝐼1 𝑁2 1
= =
𝐼2 𝑁1 𝑎
 Ideal transformer:
Fig. 1.23 (B): Equivalent circuit viewed from source terminal for ideal transformer
 An ideal transformer is one that has no losses (associated with iron or copper) and no leakage
fluxes (i.e., all the flux in the core links both the primary and the secondary windings).
 In ideal transformer primary and secondary winding resistance are zero.
 For ideal transformer V2 = E2 and V1 = E1 so;

33
𝑉1 𝐸1
𝑎= =
𝑉2 𝐸2
 Efficiency of an ideal transformer is 100% because of no losses taking place.
1.4 KIRCHHOFF’S LAWS:
 Kirchhoff was a German scientist. He formulated two laws related with electrical circuits.
 The two laws are;
1. Kirchhoff’s current law (KCL)
2. Kirchhoff’s voltage law (KVL)
 These are basic laws that must be satisfied among circuit currents and circuit voltages. These
laws are fundamental for the systematic analysis of electric circuits.
 These laws are used to determine the current in different branches and voltage at different node
of an electric circuit.
 Kirchhoff’s current law (KCL):

 KCL states that, at any node of any circuit and at any instant of time, the sum of all currents
entering the node is equal to the sum of all currents leaving the node.
 That is, the algebraic sum of all currents (entering or leaving) at any node is zero.
∑ 𝑐𝑢𝑟𝑟𝑒𝑛𝑡𝑠 𝑒𝑛𝑡𝑒𝑟𝑖𝑛𝑔 𝑎𝑡 𝑛𝑜𝑑𝑒 𝑎 = ∑ 𝑐𝑢𝑟𝑟𝑒𝑛𝑡𝑠 𝑙𝑒𝑎𝑣𝑖𝑛𝑔 𝑓𝑟𝑜𝑚 𝑛𝑜𝑑𝑒 𝑎
Fig. 1.24: Illustration for KCL
 Figure shows Kirchhoff’s current law, in which at node a,

i1 − i2 + i3 + i4 − i5 =0 or − i1 + i2 − i3 − i4 + i5 = 0
i1 + i3 + i4 = i2 + i5
 Kirchhoff’s voltage law (KVL):
 KVL states that the algebraic sum of the voltages (drops or rises) around a closed loop of a
circuit must be zero.
 In other words, the sum of the voltage rises is equal to the sum of the voltage drops in a loop.
A loop that contains no other loops is known as a mesh.

34
Fig. 1.25: Illustration for KVL
 Figure shows the Kirchhoff’s voltage law.

− v1 + v2 − v3 − v4 + v5 =0 or v1 − v2 + v3 + v4 − v5 = 0
v1 + v3 + v4 = v2 + v5
Ex 12: Consider the circuit shown in Figure and determine the unknown currents using KCL.
 Let us assign a + sign for currents entering the node and a − sign for currents leaving the node.
Applying KCL at node a, we get
+ iS − i1 − i4 − i5 = 0
10 − 5 − 3 − i5 =0
i5 = 2 A
 Applying KCL at node b, we get

+ i1 − i2 − i3 = 0
5 − 4 − i3 =0
i3 = 1 A

35
Ex 13: For the circuit shown in Figure use KCL and KVL to determine i1, i2, vbd and vx. Also,
find veb
 Using KCL at node c, we get

i1 = 8 + (−3) = 5 A
 Using KCL at node f, we have

ibf = i1 − (−3) = 5 + 3 = 8 A
 Applying KCL at node b, we get

10 = i2 + ibf = i2 +8
i2 = 2 A
 Using KVL around the loop abdea in the clockwise direction, we have
vab + vbd + vde + vea = 0
or
5 + vbd + 8 − 20 =0
vbd = 20 − 8 − 5 = 7 V
 Applying KVL around the loop abfcea in the clockwise direction, we get
vab + vbf + vfc + vce + vea = 0
5 + 0 + 3 + vx + (−20) =0
vx = 20 − 3 − 5 = 12 V
 Note that a direct connection between b and f implies ideal connection, and hence no voltage
between these points.
veb = ved + vdb, we have veb = − 8 − 7 = −15 V

vbe = − veb = 15 V a node b is at a higher potential than node e.

36
1.5 METERS AND MEASUREMENTS:

 What is Measurement?
 Measurement is the assignment of numbers to objects or events.
 The subject of electrical measurements is such a large one that entire books have been written
on the topic.
 Practical measurements are made with real instruments, which in general disturb the operation
of a circuit to some extent when they are connected.
 Measurements may be affected by noise, which are undesirable randomly varying signals.
 Voltmeter:
 In order to measure the potential difference between two terminals or nodes of a circuit, a
voltmeter is connected across these two points.
 A practical voltmeter can usually be modeled as a parallel combination of an ideal voltmeter
(through which no current flows) and a shunt resistance RV, as shown in Fig. 1.26.
 The internal resistance RV of an ideal voltmeter is infinite, while its value in practice is of the
order of several million ohms.
 There are what are known as DC voltmeters and AC voltmeters. An AC voltmeter usually
measures the rms value of the time-varying voltage.
Fig. 1.26: Connection of a voltmeter
 Ammeter:
 In order to measure the current through a wire or line of a circuit, an ammeter is connected in
series with the line.
 A practical ammeter can usually be modeled as a series combination of an ideal ammeter and
an internal resistance RI.
 The potential difference between the two terminals of an ideal ammeter is zero, which
corresponds to zero internal resistance.
 There are what are known as DC ammeters and AC ammeters.
 An AC ammeter usually measures the rms value of the time-varying current.

37
 Note that for the ammeter to be inserted for measuring current, the circuit has to be broken,
whereas for the voltmeter to be connected for measuring voltage, the circuit need not be
disassembled.
 Multimeter that measures multiple ranges of voltage and current are available in practice.
 Ohmmeters measure the dc resistance by the use of Ohm’s law.
 A Multimeter with scales for volts, ohms, and milli amperes is known as VOM.
 An ohmmeter should not be used to measure the resistance of an electronic component that
might be damaged by the sensing current.
 Instrument Transformers:
 These are generally of two types, potential transformers (PTs) and current transformers
(CTs).
 They are designed in such a way that the former may be regarded as having an ideal potential
ratio, whereas the latter has an ideal current ratio.
 The accuracy of measurement is quite important for ITs that are commonly used in AC circuits
to supply instruments, protective relays, and control devices.
 PTs are employed to step down the voltage to a suitable level, whereas CTs (connected in
series with the line) are used to step down the current for metering purposes.
 Often the primary of a CT is not an integral part of the transformer itself, but is a part of the
line whose current is being measured.
 In addition to providing a desirable low current in the metering circuit, the CT isolates the
meter from the line, which may be at a high potential.
 Note that the secondary terminals of a CT should never be open-circuited under load.
 The student is encouraged to reason and justify this precaution.
 One of the most useful instruments for measuring currents in the ampere range is the clip-on
ammeter combining the CT with one-turn primary and the measurement functions.
 Oscilloscope:
 To measure time-varying signals (voltages and currents), an instrument known as an
oscilloscope is employed.
 It can be used as a practical electronic voltmeter which displays a graph of voltage as a function
of time.
 Such a display allows one not only to read off the voltage at any instant of time, but also to
observe the general behavior of the voltage as a function of time.
 The horizontal and vertical scales of the display are set by the oscilloscope’s controls, such as
5 ms per each horizontal division and 50 V per each vertical division.
 For periodic waveforms, the moving light spot repeatedly graphs the same repetitive shape,
and the stationary waveform is seen.
 For non-periodic cases, a common way of handling is to cause the oscilloscope to make only
one single graph, representing the voltage over a single short time period.
 This is known as single-sweep operation.
 Since the display lasts for only a very short time, it may be photographed for later inspection.

38
 Digital meters are generally more accurate and can be equipped with more scales and broader
ranges than analog meters.
 On the other hand, analog meters are generally less expensive and give an entire range or scale
of reading, which often could be very informative.
 A digital oscilloscope represents the combination of analog and digital technologies.
 By digital sampling techniques, the oscilloscope trace is digitized and stored in the digital
memory included with the digital oscilloscope.
 Digital oscilloscopes are generally more costly than analog ones, but their capability in the
analysis and processing of signals is vastly superior.
 Wheatstone bridge:
 Null measurements are made with bridge circuits and related configurations.
 They differ from direct measurements in that the quantity being measured is compared with a
known reference quantity.
 The balancing strategy avoids undesirable interaction effects and generally results in more
accurate measurement than the direct one.
 By far the most common is the Wheatstone bridge designed for precise measurement of
resistance. Fig. 1.27 shows the basic circuit in which the measurement of an unknown
resistance Rx is performed by balancing the variable resistances Ra and Rb until no current
flows through meter A.
Fig. 1.27: Wheatstone’s network

 Under this null condition,
Where;
Rs is the known standard resistance.
 There are other bridge-circuit configurations to measure inductance and capacitance.
 Typical instruments utilizing bridge circuits are found in strain gauges measuring stress and in
temperature measuring systems with thermocouples and thermistors.

39
1.6 ANALOGY BETWEEN ELECTRICAL AND NON-ELECTRICAL

PHYSICAL SYSTEM:
 The Fig. 1.28 shows analogy between water and electricity.
Fig. 1.28: Analogy between electricity and water
1. Pressure – Voltage:
 Fig. 1.28(b) shows full of water tank. This is where the water pressure is stored. The more
amount of water in tank, the greater the water pressure.
 The water tank in fig. 1.28(b) can be compared to the battery in fig. 1.28(a), where a battery
in an electric circuit stores the electric pressure (voltage).
 An empty tank of water with no pressure is similar to an empty battery with no electric
pressure.
2. Flow – Current:
 Turning of tap in Fig. 1.28(b) allows water, pushed out of the tank by pressure to flow
through the pipe and water wheels. This cause the wheels to rotate.
 Similarly, in fig. 1.28(a) turning ON switch allows current flow, pushed out of the battery
due to electric pressure through the wire and bulb.
 The flow of water is similar to the flow of current (Amperes).

40
3. Restriction – Resistance:
 The pipe size and wheel construction cause a restriction to the water flow. The restriction
of water flow is similar to resistance in an electric circuit.
 In fig. 1.28(a) the wire and bulb offer a resistance to current flow. The size of wire and
bulb affect the amount of current flowing.
 Thermal – Electrical analogy as below;
1. Heat  Analogues to  Charge

2. Heat flow  Analogues to  Current
3. Temperature  Analogues to  Voltage
4. Ambient temperature  Analogues to  Reference point (Ground)
5. Heat capacity  Analogues to  Capacitance
6. Thermal resistance  Analogues to  Resistance
1.7 A CASE STUDY – RESISTANCE STRAIN GAUGE:

 What is strain gauge?
 The strain gauge is used to measure force, load, pressure, strain, stress, thrust etc.
 Principle of strain gauge:

 There are some materials whose resistance changes when strain is applied to them or when
they are stretched and this change in resistance can be measured easily.
 For applying the strain we need force, thus the change in resistance of the material can be
calibrated to measure applied stress or strain.
 Thus the devices whose resistance changes due to applied stain, stress or force are called as
the strain gauge.
 A typical strain gauge, shown in Fig. 1.29, consists of a metal foil (such as nickel copper alloy)
which is formed by a photo etching process in multiple conductors aligned with the direction
of the strain to be measured. The conductors are usually bonded to a thin backing made out of
a tough flexible plastic. The backing film, in turn, is attached to the test structure by a suitable
adhesive.
Fig. 1.29: Resistance strain gauge and symbol

41
 The resistance of a conductor with a circular cross-sectional area A, length l, and conductivity
σ is given by
R = l / (σA)
 Depending on the compression or elongation as a consequence of an external force, the length
changes, and hence the resistance changes. The relationship between those changes is given
by the gauge factor G,
G = (ΔR/R) / (Δl / l)
Where, the factor Δl / l, the fractional change in length of an object, is known as the strain.
 Alternatively, the change in resistance due to an applied strain ε (= Δl / l) is given by
ΔR = R0Gε
Where R0 is the zero-strain resistance, that is, the resistance of the strain gauge under no strain.
 A typical gauge has R0 = 350 Ώ and G = 2. Then for a strain of 1%, the change in resistance is
ΔR = 7 Ώ.
 A Wheatstone bridge is usually employed to measure the small resistance changes associated
with precise strain determination.
 Different types of strain gauges are;

1. Unbounded metal strain gauges.
2. Bonded metal wire strain gauges.
3. Bonded metal foil strain gauges.
4. Vacuum deposited thin metal film strain gauges.
5. Sputter deposited thin film metal strain gauges.
6. Bonded semiconductor strain gauges.
7. Diffused metal strain gauge.
 Desirable properties of strain gauges are;

1. High resistance
2. High elastic limit
3. Linearity
4. Small size
5. High sensitivity
6. More accurate

42
QUESTIONS
1.1 INTRODUCTION:
1. Give definitions of Circuit and Circuit Elements.
1.2 ELECTRICAL QUANTITIES:

1. Explain charge and electric force in detail.
2. Give coulomb’s laws.
3. What is Conductors, Insulators and Semi-Conductors?
4. Explain current and magnetic force in detail.
5. Give definitions of Current and Magnetic force
6. Give definitions of following;
i. Unit charge
ii. Electric field
iii. Electric flux
iv. Electric flux density
v. Electric field intensity
7. Explain electric potential and voltage in detail.
8. Give definitions of One volt, Potential difference and emf.
9. Give difference between emf and Potential difference.
10. Explain energy and power in detail.
11. Give definition of Energy and Power.
12. Explain source and load in detail.
13. What is Independent and Dependent source?
14. Give definitions of following;
i. Waveform
ii. Instantaneous value
iii. Cycle
iv. Amplitude
v. Time Period
vi. Frequency
vii. Angular Frequency
viii. Average Value
ix. RMS value
15. Calculate the force on a charge of + 102 C placed at a point (0, 0) due to point charge Q1
and Q2. The charge Q1 = + 10-6 C is at (-2, 2) meters and Q2 = - 2 x 10-6 C.
ANS: F1 = 11.25 N, F2 = 22.5 N, Resultant force = 25.156 N

43
16. Two charges of equal magnitude 5 μC but opposite sign are separated by a distance of 10
m. find the net force experienced by a positive charge Q = 2 μC that is placed midway
between the two charges.
1.3 LUMPED CIRCUIT ELEMENTS:

1. Write short note on resistor. (GTU / SUMMER-2014)
2. What is maximum power transfer? Also derive equation for that.
3. Write short note on capacitor. (GTU / SUMMER-2014)
OR
3. Derive voltage, current and energy equations for capacitor.
4. Write short note on inductor.
OR
4. Derive voltage, current and energy equations for inductor.
5. What is mutual inductance? Explain concept of mutual inductance also derive its equations.
6. Write short note on transformer.
7. In the given circuit what is the maximum power that can be transferred to load resistor of
3 ohm if it is variable. Also find maximum power absorbed by the load resistor.
RS = 2 ohm
V = 15 V RL
ANS: RL = 2 ohm, Pmax = 28.125 Watts

8. Determine Req for the given circuit.
9. Two capacitor C1 = 4 μF and C2 = 2 μF are connected in parallel across a 200 V DC supply

find (1) Equivalent capacitance (2) Charge across each capacitor (3) If this parallel
capacitor combination connected in series with 6 μF then what would be the equivalent
capacitance of circuit becomes?
ANS: (1) Ceq = 6 μF (2) Q1 = 800 μC, Q2 = 400 μC (3) Ceq = 3 μF

44
1.4 KIRCHHOFF’S LAWS:

1. Explain KVL and KCL.
2. Two batteries A and B are connected in parallel and combination is connected across 10
ohm resistance. Battery A has an internal resistance of 0.2 ohm and internal voltage is 110
V and corresponding value of battery B are 0.25 ohm and 110 V. calculate current in each
battery and into 10 ohm resistance.
ANS: 1) Current in battery of 110 V is = - 17.58 Amp
2) Current in battery of 100 V = 28.02 Amp
3) Current in 10 ohm resistor = 10.44 Amp
3. From the figure given below, find the current flowing through 10 ohm resistance, using
Kirchhoff’s law.
2 ohm 2 ohm
12 V 6 V
10 ohm 3 ohm
4 ohm
24 V
ANS: Current in 10 ohm resistor = 0.6 Amp
1.5 METERS AND MEASUREMENTS:

1. Explain Ammeter, Voltmeter, and Multimeter. (GTU / SUMMER-2014)
2. Write short note on Instrument transformer.
3. Write short note on CRO or Oscilloscope.
4. Explain Wheatstone’s bridge.
1.6 EXPLAIN ANALOGY BETWEEN ELECTRICAL AND NON-ELECTRICAL

PHYSICAL SYSTEM:
1. Explain analogy between electrical and non-electrical physical system.
1.7 RESISTANCE STRAIN GAUGE:

1 Write short note on Resistance strain gauge.

45
Basic Electronics (2110016) Chapter-2: Circuit Analysis Techniques
CHAPTER-2 Circuit Analysis Techniques
2.1 Introduction:
 In this chapter we consider some circuit analysis techniques, since one needs not only
basic knowledge but also practical and efficient techniques for solving problems
associated with circuit operations.
 One simplifying technique often used in complex circuit problems is that of breaking the
circuit into pieces of manageable size and analyzing individually the pieces that may be
already familiar.
 Equivalent circuits are introduced which utilize Thevenin’s and Norton’s theorem to
replace a voltage source by a current source or vice versa. Nodal and loop analysis
methods are then presented. The principles of superposition and linearity are discussed.
 Also, wye-delta transformation is put forth as a tool for network reduction. Finally,
computer- aided circuit analysis with SPICE and MATLAB are introduced. The chapter
ends with a case study of practical application.
2.2 Basic Definitions for Circuit Analysis:
1) Network: The interconnection of two or more elements (sources, resistors etc.) is called
an electric network.
Figure 2.1 Simple Electrical Network
2) Circuit: If a network contains at least one closed path, it is called an electric circuit.
3) Node: The point at which two or more elements are connected together is generally
called as node e.g. A, B, C and E, in figure.
4) Junction: It is a point where three or more elements are connected together e.g. B and E
in figure-2.1.
5) Branch: A Section or portion of a network or circuit which lies between two junction
points is called as branch. As shown in figure-2.1, there are three branches between the
junctions B and E such as BE, BAE and BCE.
6) Loop: Any closed path in a network is called a loop e.g. ABEA, BCEB, ABCEA are the
loops in figure-2.1.
7) Mesh: It is the most elementary form of a loop and cannot be further divided into other
loops e.g. ABEA and BCEB are the meshes in figure-2.1 because they cannot be further

1
divided into other closed loops. But ABCEA cannot be called as mesh because it
encloses two loops ABEA and BCEB.
2.3 Thevenin and Norton equivalent circuits:
2.3.1 Thevenin Equivalent Circuit:
Statement:
Thevenin’s theorem states that any network having a number of energy sources and
resistances, when viewed form open its output terminal A and B and can be replaced by
simple equivalent network consisting of a single equivalent voltage source ( ) in series
with a single equivalent resistance ( ).
Figure 2.2 Thevenin Equivalent Circuit
Where,
VTH = Thevenin’s equivalent voltage source
= Open circuit voltage across AB terminals
RTH = Thevenin’s equivalent resistance
= Equivalent resistance across AB terminals when all the sources set to zero.
Example-1
Using Thevenin’s theorem, calculate the current in 5 Ω resistor.
Figure-2.3
Solution:
Step-1: Disconnect the resistor from the network and redraw the remaining network.

2
Figure-2.4
Step-2: Determine the Thevenin voltage ( ) by using voltage divider method or

Kirchhoff’s Voltage Law.
Apply KVL in close loop,

50-10I-3I=0
I= = 3.84
Step-3: Determine the Thevenin resistance ( ) by using voltage source is replaced by short
circuit and current source is replaced by open circuit.
Figure-2.5
= = 2.30 Ω
Step-4: Draw Thevenin’s equivalent circuit and reconnect resistor between terminal A and B.
and find out the load current by using KVL.
Figure-2.6

3
Apply KVL in close loop, 11.52 - 2.3 -5 =0
OR
Example-2
Apply Thevenin’s theorem to calculate current flowing through 5 Ω resistor.
Figure-2.7
Solution:
Figure-2.8
Step-2: Determine the Thevenin voltage ( ) by using voltage divider method or
Kirchhoff’s Voltage Law.
Apply KVL in close loop
12-1I-2I-3I=0
I= = 2
=
Figure-2.9

4
+ 2.5
=[ +2.5
+ 2.5 = 1.5 + 2.5 = 4 Ω
Figure-2.10
Example-3
Using Thevenin’s theorem find the current in 8Ω resistor in the given circuit of figure-
2.11.
Figure-2.11
Solution:
Figure-2.12

5
Apply KVL in close loop

12-3I-6I-3I=0
I= = 1 Amp
Step-2: Determine the thevenin voltage ( ) by using voltage divider method or Kirchhoff’s
Voltage Law.
Figure-2.13
So
Figure-2.14
=
=3Ω
Figure-2.15

6
= = = 2 Amp
2.3.2 Norton’s Equivalent Circuit:
Statement:
Norton’s theorem states that any network having a number of energy sources and
resistances, when viewed form open its output terminal A and B and can be replaced by
simple equivalent network consisting of a single equivalent current source ( ) in
parallel with a single equivalent resistance ( ).
Figure-2.16 Norton equivalent circuit

Where,
IN or ISC = Norton’s equivalent voltage source
= The value of current source is equal to the current passing through the
short circuit applied at the open output terminal P and Q.
Req = Equivalent resistance across PQ terminals when all the sources set to zero.
Example-4
Using Norton’s theorem, determine the current through 6 Ω resistor in figure-2.17
Figure-2.17
Solution
Step-1: Place a short circuit across the terminal A and B and calculate the short circuit
current ( ) as follows.
Figure-2.18

7
Step-3: Determine the Norton resistance or equivalent resistor or Thevenin resistor ( ).
Figure-2.19
= 3.33 Ω
Step-4: Draw Norton’s equivalent circuit and reconnect resistor between terminal A and B.
and find out the load current.
Figure-2.20
=4 = 1.427 Amp
Example-5
Determine Norton’s equivalent circuit at terminal AB for the circuit shown in figure-
2.21
Figure-2.21
Solution
Step-1: Place a short circuit across the terminal A and B and calculate the short circuit
current ( ) as follows.

8
=
= 2+ 2 = 4 Amp
Figure-2.22
Step-3: Determine the Norton resistance or equivalent resistor or Thevenin resistor ( )
= 3.33 Ω
Step-4: Draw Norton’s equivalent circuit
Figure-2.23
2.3.3 Thevenin’s and Norton’s Equivalent Circuit’s Example:
Example-6
Consider the circuit shown in Figure 2.24(a). Reduce the portion of the circuit to the left of
terminals a–b to (a) a Thevenin equivalent and (b) a Norton equivalent. Find the current
through R = 16 Ω, and comment on whether resistance matching is accomplished for
maximum power transfer.
Figure-2.24 (a) & (b)

9
Solution:
(a) Thevenin equivalent
Step:1 first convert current source to voltage source
The 6-A source with 24 Ω in parallel can be replaced by a voltage source of 6 × 24 = 144 V
with 24 in series using source transformation, in terms of voltage sources, the equivalent
circuit to the left of terminals a–b is shown in Figure 2.24(b).
Apply KVL in loop :

144 − 24IL − 48IL − 96 = 0,
72IL = 48,
IL = 2/3 A
Voc = 144 − 24(2/3)=128V
Deactivating or zeroing all ideal sources, i.e., replacing voltage sources by short circuits in
the present case, the circuit of Figure (b) reduces to that shown in Figure-2.24(c). Terminals
a–b, the 48-Ω resistor and the 24- Ω resistor are in parallel, in figure-2.24(c)
Figure-2.24 (c) & (d)
The Thevenin equivalent to the left of terminals a–b, attached with the 16- Ω resistor, is shown
in Figure-2.24(d). Note that the Thevenin equivalent of any linear circuit consists of a single
Thevenin voltage source in series with a single equivalent Thevenin resistance.
The current in the 16- Ω resistor to the right of terminals a–b can now be found,
I = 128/32 = 4 A
Solution:
(b) Norton equivalent
The 96-V source with 48 Ω in series can be replaced by a current source of 96/48 = 2A with
a parallel resistance of 48 Ω. Thus, by using source transformation, in terms of current
sources, the equivalent circuit to the left of terminals a–b is given in Figure-2.24.

10
Figure-2.24(e)
Shorting terminals a–b, find Isc ,
Isc = 6+2=8 A.
Replacing current sources by open circuits, viewed from terminals a–b,
RTh = = 16 Ω ,
which is the same as in part (a). The circuit of Figure-2.24(e) to the left of terminals a–b
reduces to that shown in Figure-2.24(f).
Figure-2.24 (f) & (g)

The Norton equivalent to the left of terminals a–b, attached with the 16-Ω resistor, is given
in Figure-2.24 (g).
Note that the Norton equivalent of any linear circuit consists of a single current source in
parallel with a single equivalent Thevenin resistance.
The current in the 16- Ω resistor to the right of terminals a–b can now be found. I= 4 A,
which is the same as in part (a).
The equivalent source resistance, also known as the output resistance, is the same as the load
resistance of 16 Ω in the present case. Hence, resistance matching is accomplished for
maximum power transfer.
Example-7
Consider the circuit of Figure 2 . 25 (a), including a dependent source. Obtain the Thevenin
equivalent at terminals a–b.
Figure-2.25 (a)

11
Solution:
First, the open-circuit voltage at terminals a–b is to be found.
KCL at node a: I + 9I = , or = 10 I
KVL for the left-hand mesh:
2000 I + 200 = 10, or 4000 I = 10, or I = 1/400 A
Voc = 200 = 200 × 10 I = 2000(1/400) = 5V
Because of the presence of a dependent source, in order to find RTh, one needs to determine
I sc after shorting terminals a–b, as shown in Figure 2.25(b).
Figure-2.25 (b) & (c)

Note that I1 = 0, since Vab = 0.
KCL at node a: Isc = 9I + I = 10 I
KVL for the outer loop: 2000 I = 10, or I = 1/200 A
Isc = 10(1/200) = 1/20 A
Hence the equivalent Thevenin resistance at, terminals a-b is
⁄
Thus, the Thevenin equivalent is given in figure-2.25(c)
2.4 Node-Voltage and Mesh-Current Analysis:
 The node-voltage and mesh-current methods, which complement each other, are well-
ordered systematic methods of analysis for solving complicated network problems.
 The former is based on the KCL equations, whereas the KVL equations form the basis
for the latter.
2.4.1 Nodal-Voltage Method
 A set of node-voltage variables that implicitly satisfy the KVL equations is selected in
order to formulate circuit equations in this nodal method of analysis.
 A reference (datum) node is chosen arbitrarily based on convenience, and from each of
the remaining nodes to the reference node, the voltage drops are defined as node-voltage
variables.
 The circuit is then described completely by the necessary number of KCL equations
whose solution yields the unknown nodal voltages from which the voltage and the
current in every circuit element can be determined.

12
 Thus, the number of simultaneous equations to be solved will be equal to one less than
the number of network nodes.
 All voltage sources in series with resistances are replaced by equivalent current sources
with conductances in parallel.
 Note that the nodal-voltage method is a general method of network analysis that can be
applied to any network.
 Figure-2.26 is redrawn as Figure-2.27, in which one can identify three nodes, A, B, and O.
 Notice that the voltages VAO, VBO, and VAB satisfy the KVL relation:
VAB + VBO − VAO = 0, or VAB = VAO − VBO = VA − VB
where the node voltages VA and VB are the voltage drops from A to O and B to O,
respectively. With node O as reference, and with VA and VB as the node-voltage unknown
variables, one can write the two independent KCL equations:
(1)
(2)
Figure-2.26 Circuit for illustration of nodal-voltage method
Figure-2.27 Redrawn Figure-2.26 for node-voltage method of analysis
An examination of these equations reveals a pattern that will allow nodal equations to be
written directly by inspection by following the rules given here for a network containing no
dependent sources.
1. For the equation of node A, the coefficient of VA is the positive sum of the conductances
connected to node A; the coefficient of VB is the negative sum of the conductances
connected between nodes A and B. The right-hand side of the equation is the sum of
the current sources feeding into node A.

13
2. For the equation of node B, a similar situation exists. Notice the coefficient of VB to be
the positive sum of the conductances connected to node B; the coefficient of VA is the
negative sum of the conductances connected between B and A. The right-hand side of the
equation is the sum of the current sources feeding into node B.
Example-8
Use nodal analysis to find the voltage across 5 Ω resistor, for the network of figure-
2.28
Figure-2.28
Solution:
Step-1 Identify the no. of nodes in the given circuit.
Figure-2.29
There are three nodes named A, B and C. Let us consider node C as reference node.
Let us assume potential at node A is and potential at node B is is as shown.
Step-2 Applying KCL at node-A,
(1)
Applying KCL at node-B,
(2)

14
Solving equation (1) and (2) we get the value of
Hence, the voltage across the 5 Ω resistor is
Example-9
Find current through 2 Ω resistance using nodal analysis.
Figure-2.30
Solution:
Step:1 Convert voltage source into current source and write conductance value in place of
resistance value
Figure-2.31
Step-2 Applying KCL at node-1
(1)
Applying KCL at node-2
(2)
Now, multiply equation (1) by 5 and equation (2) by 7 and add

15
Substitute in equation (1), we get
Current in 2 ohm resistor is
Example-10
By means of nodal analysis, find the current delivered by the 10-V source and the voltage
across the 10- Ω Resistance in the circuit shown in Figure-2.32 (a)
Figure-2.32 (a)
Solution:
Figure-2.32 (b)
Step 1: Replace all voltage sources with series resistances by their corresponding Norton
equivalents consisting of current sources with shunt conductances. The given circuit is
redrawn in Figure 2.32(b) by replacing all resistors by their equivalent conductances.
Step 2: Identify the nodes and choose a convenient reference nodes O. this is also shown in
figure 2.32(b).
Step 3: In terms of unknown node-voltage variables, write the KCL equations at all nodes
(except, of course, the reference node) by following rules 1 and 2 for nodal equations given
in this section.

16
Node A:
Node B:
Node C:
Rearranging, one gets
Step 4: Simultaneously solve the independent equations for the unknown nodal voltages
by Gauss elimination or Cramer’s rule. In our example, the solution yields
VA = 4.34 V; VB = 8.43V; VC = 17.77 V
Figure-2.32 (c)
Step 5: Obtain the desired voltages and currents by the application of KVL and Ohm’s law.
To find the current I in the 10-V source, since it does not appear in Figure 3(b) redrawn for
nodal analysis, one has to go back to the original circuit and identify the equivalence
between nodes A and O, as shown in Figure-2.32(c).
or
Now one can solve for I, delivered by the 10-V source
The voltage across the 10-Ω resistance is VB − VC = 8.43 − 17.77 = −9.34 V. The negative
sign indicates that node C is at a higher potential than node B with respect to the reference
node O.
Example-11
For the network shown in figure, find the current in each resistor by means of nodal
analysis
Figure-2.33

17
Note that the reference node is chosen at one end of an independent voltage source, so that
the node voltage VA is known at the start,
Note that we cannot express the branch current in the voltage source as a function of VB and
VC. Here we have constrained nodes B and C. Nodal voltages VB and VC are not independent.
They are related by the constrained equation
VB − VC = 24 V
Let us now form a supernode, which includes the voltage source and the two nodes B and
C, as shown in Figure-2.33. KCL must hold for this supernode, that is, the algebraic sum of
the currents entering or leaving the supernode must be zero. Thus one valid equation for the
network is given by
OR
which reduces to
VB + VC = 10 V
This equation together with the supernode constraint equation yields

and
The current in the resistors are thus given by
2.4.2 Mesh-Current Method:
 This complements the nodal-voltage method of circuit analysis. A set of independent

mesh- current variables that implicitly satisfy the KCL equations is selected in order to
formulate circuit equations in this mesh analysis.
 An elementary loop, or a mesh, is easily identified as one of the “window panes” of the
whole circuit.
 All current sources with shunt conductances will be replaced by their corresponding
Thevenin equivalents consisting of voltage sources with series resistances.
 Replacing the current source with shunt resistance by the Thevenin equivalent, Figure-
2.35 is redrawn as Figure-2.36, in which one can identify two elementary loops, or
independent meshes.
 By assigning loop or mesh-current variables I 1 and I 2, as shown in Figure 2, both in the
clockwise direction, one can write the KVL equations for the two closed paths (loops)
ABDA and BCDB,

18
Loop ABDA: or
(1)
Loop BCDB: or
(2)
 Notice that current I 1 exists in R1 and R2 in the direction indicated; I2 exists in R2 and R3
in the direction indicated; hence, the net current in R2 is I1 − I2 directed from B to D. An
examination of Equations (1) and (2) reveals a pattern that will allow loop equations to be
written directly by inspection by following rules:
1. In the first loop equation with mesh current I 1, the coefficient of I 1 is the sum of the
resistances in that mesh; the coefficient of I 2 is the negative sum of the resistances
common to both meshes. The right-hand side of the equation is the algebraic sum of the
source voltage rises taken in the direction of I 1.
2. Similar statements can be made for the second loop with mesh current I 2. (See also the
similarity in setting up the equations for the mesh-current and nodal-voltage methods of
analysis.)
 Such a formal systematic procedure will yield a set of N independent equations of the
following form for a network with N independent meshes containing no dependent
sources:
Figure-2.35 Illustration of mesh-current analysis
Figure-2.36 Redrawn figure-2.35 for mesh-current method of analysis
Example-12
For the given network, of figure write the mesh curr ent equations and
determine the currents.

19
Figure-2.37
Solution:
Applying KVL to the above circuit,
1st loop equation,
(1)
2nd loop equation
(2)
Now, multiply equation (1) by 6 and add to equation (2)
So
10/40 =0.25 A
Put the value of in equation (1)
So,
Example-13
Determine the mesh currents I 1, I 2 and I 3 for network shown figure.
Figure-2.38

20
Solution:
Applying KVL to the above circuit
The mesh current equations are,
KVL for loop-1,
(1)
KVL for loop-2
(2)
KVL for loop-3
(3)
From equation (1), (2) and (3)
[ ] =[ ] [ ]
Now,
| |
∆R = 18[(8×4) – (-1×-1)] – (-5)[(-5×4)-(-1×-3)] + (-3)[(-5×-1)-(8×-3)]

=18(32-1)+5(-20-3)-3(5+24)
=18(31)+5(-23)-3(29)
=558-115-87
∆R =356 Ω
That’s way
| |
| |
| |
Using Cramer’s rule,

21
Example-14
By means of mesh-current analysis, obtain the current in the 10-V source and the voltage
across the 10-Ω resistor in the circuit.
Figure-2.39
Solution:
Step-1: Replace all current sources with shunt resistances by their corresponding Thevenin
equivalents consisting of voltage sources with series resistances. Conductances included in
the circuit are replaced by their equivalent resistances.
In this example, since there are no current sources and conductances, the circuit of Figure-
2.39 is redrawn as Figure 2 for convenience.
Step-2: Identify elementary loops (meshes) and choose a mesh-current variable for each
elementary loop, with all loop currents in the same clockwise direction. Mesh currents I 1, I 2,
and I 3 are shown in Figure 3.
Step-3: In terms of unknown mesh-current variables, write the KVL equations for all
meshes by following the rules for mesh analysis.
Loop 1 with mesh current I 1:

Rearranging, one gets
Step-4: Simultaneously solve the independent equations for the unknown mesh currents
by Gauss Elimination or Cramer’s rule.
In this example the solution yields
I1 = 1.132 A; I2 = 0.711 A; I3 = 1.645 A
The current through the 10-V source is I1 = 1.132 A,

22
The voltage across the 10- Ω resistor is
VBC = 10(I2 − I3 ) = 10(0.711 − 1.645) = −9.34 V

Example-15
For the network shown in Figure 4, find the current delivered by the 10-V source and the
voltage across the 3-Ω resistor by means of mesh-current analysis
Figure-2.40
Solution:
Note that we cannot express the voltage across the current source in terms of the mesh currents
I1 and I2 . The current source does, however, constrain the mesh currents by the following
equation:
Let us now form a supermesh, which includes meshes 1 and 2, as shown in Figure. We now
write a KVL equation around the periphery of meshes 1 and 2 combined. These yields
1I1 + 2(I1 − I3 ) + 4(I2 − I3 ) + 4(I2 − I3 ) + 10 = 0

Next we write a KVL equation for mesh 3,
3I3 + 4(I3 − I2 ) + 2(I3 − I1 ) = 0
Simplify all this equations, and rewrite
Now we have the three linearly independent equations needed to find the three mesh
currents I1, I2, and I3
, ,
The current delivered by the 10-V source is −I2 , or −20/9 A. That is to say, the 10-V source is
absorbing the current 20/9 A.
The voltage across the 3-Ω resistor is Vx = 3 = 3(70/27) = 70/9 = 7.78 V.
2.4.3 Node-Voltage and Mesh-Current Equations with Controlled Sources
 Since a controlled source acts at its terminals in the same manner as does an independent
source, source conversion and application of KCL and KVL relations are treated
identically for both types of sources.

23
 Because the strength of a controlled source depends on the value of a voltage or current
elsewhere in the network, a constraint equation is written for each controlled source.
 After combining the constraint equations with the loop or nodal equations based on
treating all sources as independent sources, the resultant set of equations are solved for the
unknown current or voltage variables.

24
Example-16
Consider the circuit in Figure-2.41, which include a controlled source, and find the current in
the 5-V source and the voltage across the 5-Ω resistor by using (a) The loop-current method
and (b) The node-voltage method.
Figure-2.41
Solution:
(a) Loop-Current Method:
The voltage-controlled current source and its parallel resistance are converted into a voltage-
controlled voltage source and series resistance. When you are source transforming dependent
sources, note that the identity of the control variable (i.e., the location in the circuit) must be
retained.
Figure-2.42
The converted circuit is shown in Figure-2.42 with the chosen loop currents I 1 and I 2
The KVL equations are

For loop carrying I 1:
For loop carrying I 2:
The constraint equation is
Combining the constraint equation with the loop equations, one gets
; or
from which
Thus, the current through the 5-V source is , and the
voltage across the 5- Ω resistor is

25
(b) Node-Voltage Method:

The 5-V voltage source with its 10-Ω series resistor is replaced by its Norton equivalent.
Resistances are converted into conductances and the circuit is redrawn in Figure-2.43 with
the nodes shown.
The nodal equations are
Figure-2.43
The constraint equation is
Combining these with the nodal equations already written, one has
Solving, one gets

VA = 2.266V ; VB = 1.173V; VC =−1.564 V
Notice that VC = −1.564 V is the voltage V across the 5-Ω resistor, which is almost the same
as that found in part (a).
In order to find the current I through the 5-V source, one needs to go back to the original
circuit and recognize that
or
Which is the same as that found in part (a)
1.4 Superposition & Linearity:
 Mathematically a function is said to be linear if it satisfies two properties: homogeneity

(proportionality or scaling) and additivity (superposition),
(Homogeneity), Where K is a scalar constant, and
(additivity)
Linearity requires both additivity and homogeneity.
 For a linear circuit or system in which excitations x1 and x2 produce responses y1 and
y2, respectively, the application of K1x 1 and K2x 2 together (i.e., K 1x1 + K 2x2) results in
a response of (K 1y1 + K 2y2), where K1 and K2 are constants. With the cause-and-effect
relation between the excitation and the response, all linear systems satisfy the principle
of superposition.

26
 Superposition theorem is used to solve electrical circuits which have more than one
energy source.
 This theorem is applicable to only linear circuit.
 Therefore, it is not applicable to circuit which have non-linear elements such as diodes,
transistors etc.
Example-17
To explain the superposition theorem let us find the current 9 Ω resistor as shown in
the circuit.
Figure-2.44
Solution:
Step-1 Let us first consider voltage V1 only and reduce the current source to zero (open circuit)
Figure-2.45
Therefore,
from A to B
Step-2 Let us now consider current source I2 alone reducing voltage source, V1 to zero(replacing
it by short circuit)
Figure-2.46
from A to B
Step-3 Calculation of I9
Therefore, current in 9 Ω resistor when both the sources are acting,
I9 = algebraic sum of the two current

27
Example-18
Determine the current in each resistor of figure using the superposition theorem.
Figure-2.47
Solution:
Step-1: Consider 50 V source alone
Figure-2.48
The total resistance across 50 V =
Current supplied by 50 V source,
Current in 10 Ω resistor,
The current divides in parallel paths formed by resistors 3 Ω and 5 Ω
Current in 3Ω resistor,
Current in 5Ω resistor,
Step-2: Consider 25 V source alone
Figure-2.49
The total resistance across 25 =

28
Current supplied by battery = current through 5 Ω resistor
Step-3 Calculate the total current I1, I2 and I3.
According to superposition theorem

Current in 10 Ω Resistor,
Figure-2.50
Example-19
Determine the voltage across the 20-Ω resistor in the following circuit of Figure 2.51 with the
application of superposition. (W-2014) (7)
Figure-2.51
Solution:
Let us suppress the independent sources in turn, recognizing that there are two independent
sources.
First, by replacing the independent current source with an open circuit, the circuit is drawn
in Figure-2.52.
Figure-2.52

29
Notice that the designation of V’ across the 12-Ω resistor and V’/3 as the dependent current
source for this case. At node B,
or
For the mesh on the left-hand side, , or A. but, , or

V.
The voltage across the 20-Ω resistor form this part of the solution is
= = 64 V
Figure-2.53
Next, by replacing the independent voltage source with short circuit, the circuit is shown in
figure-2.53. Notice the designation of across the 12-Ω resistor and as the dependent
current source for this case. At node A,
or V
and at node B,
( ) or V
Thus, the voltage across the 20-Ω resistor for this part of the solution is
V
Then the total net response, by superposition, is
The principle of superposition is indeed powerful tool for analyzing a wide range of linear
systems in electrical, mechanical, civil or industrial engineering.
2.6 Wye-Delta Transformation
(Explain WYE-DELTA transformation in brief with necessary equations and circuit

diagrams.) (W-2014) (3)
2.6.1 Delta-Wye Transformation

 It is the replacement of delta connected resistance into equivalent star connected system.
 Suppose three resistances are connected in delta fashion between the
terminal 1, 2 and 3 as shown in figure-2.54(a).

30
 So far as the respective terminals are concerned, these three resistance ( )

can be replaced by the three resistance connected in star system as shown
in figure-2.54(b)
Figure-2.54 (a) & (b)

 These two systems will be electrically equivalent if the resistances as measured between
any pair of terminals is the same in both the arrangements when the third terminals open
circuited.
 First consider delta connection. Between the terminal 1 and 2, there are two parallel
paths, one having a resistance of and the other having a resistance of
Figure-2.55 (a) & (b)
 Resistance between the terminal 1 and 2 =
= (1)
 Now consider start connection. The resistance between the same terminals 1 and 2
(figure-2.55(b)) is . (2)
 Since the two systems are identical, resistance measured between terminals 1 and 2 in
both systems must be equal. Therefore equating the equation (1) and (2), we get.
(3)
 Similarly for terminals 2 and 3 and terminals 3 and 1, we get
(4)

31
And
(5)
Now subtracting (4) from (3) and adding the result to (5) we get,
Similarly,
Figure-2.56 Delta and Equivalent Star
2.6.2 Star-Delta Transformation:

 It is replacement of star connected resistances into equivalent delta connected system.
 Let us consider the three resistances connected in star as shown in figure-
2.57
 Now we wants to finding out values of interms of .

32
Figure-2.57
 From result of delta-star transformation we know that
(1)
(2)
(3)
 Multiplying equation (1) to (2), (2) to (3) and (3) to (1), we get
(4)
(5)
and (6)
 Adding the equation (4),(5) and (6), we get
 Equation (7) can be written as
from equation (3)

33
Similarly from equation (7), we can write
( )
Similarly,
Figure-2.58
 For the simple case when , and ,Equation

becomes
Example-20
Find out resistance between terminals A and B.
Figure-2.59

34
Solution:
First convert delta ∆ ACD into star.
Figure-2.60
Figure-2.61
The resistance 10 Ω and 10 Ω are in series. Again these series combinations are in parallel.
Thus equivalent resistance is given by

35
Figure-2.62
Now 10 Ω resistor is in series with 10 Ω resistor. So
Example-21
Find the resistance between the terminal A and B in the network shown in the figure-
2.63.
Figure-2.63
Solution:
Convert star to delta equivalent:
Figure-2.64

36
The equivalent circuit is as under.
Figure-2.65
Convert delta CBD to star:
Figure-2.66

37
Figure-2.67
Example-22
Use delta–wye transformation for network reduction and determine the current through the
12-Ω resistor in the circuit of Figure-2.68
The delta-connected portion between terminals A–B–C is replaced by an equivalent wye

connection with this equation

38
Figure-2.68 (a)
Figure-2.68 (b)
The circuit redrawn in Figure-2.69

Using the KVL equation,
By current division,
2.7 COMPUTER – AIDED CIRCUIT ANALYSIS : SPICE
 SPICE (Simulation Program with Integrated Circuit Emphasis) is a general purpose,

open source analog electronic circuit simulator software.
 It is a powerful program that is used in integrated circuit and to predict circuit behavior.
 Researchers at the University of California, Berkeley developed this computer program
during 1970.
 SPICE is program that simulates electronic circuits on computer.
 We can view any voltage or current waveform in circuit. SPICE calculates these voltages
and currents versus time (Transient Analysis) or versus frequency (AC Analysis).
Why Use SPICE?

 SPICE is a great tool for learning electronics. We can increase our understanding of
circuit’s behaviors during experiment and also modify the circuit and see what happen.
How long does it take? Change a resistor value and see the effect on a circuit in seconds.

39
 Ideally, we would actually build and test actual circuits to understand all of its behaviors.
However, we would need breadboard, components, connecting wires etc. actual circuits
also require expensive equipment like power supplies, signal generators and
oscilloscopes.
 SPICE included following analysis:
1) AC analysis
2) DC analysis
3) DC transfer curve analysis
4) Noise analysis
5) Transfer function analysis
6) Transient analysis
Advantages of SPICE software:
 It is based on the industrial standard.

 Spice is widely used in industry.
 It allows the mixing of digital and analog parts without any problems.
 Learning the spice software is quite easy.
 Figure-2.69(a) shows the block diagram which summarizes the major features of the
SPICE based circuit simulation program.
 The circuit to be analyzed is described using statement with a separate statement written
for each circuit element.
 The name of an element must begin with a particular letter identifying the type of circuit
element. Some of the circuit elements are as listed below:
R: Resistor
V: Independent voltage source
I: Independent current source
G: Voltage controlled current source
E: Voltage controlled voltage source
F: Current controlled current source
H: Current controlled voltage source
 SPICE is case insensitive. It does not recognize subscripts. So R1 will be represented as
R1 etc.
 The name of each element has to be unique. The scale factor designations used for scale
factors are as follows:
 Comment statement are identified by an asterisk (*) in the first column. It is also possible
to insert comments on any line by starting the comment with a semicolon.

40
Figure-2.69 (a)
2.8 COMPUTER – AIDED CIRCUIT ANALYSIS: MATLAB
What is MATLAB?
 MATLAB is computer program that combines computation and visualization power that
makes it particularly useful tool for engineers.
 MATLAB is an executive program, and a script can be made with a list of MATLAB
commands like other programming language.
MATLAB stands for MATrix LABoratory :
MATLAB is high-performance language for technical computing. It integrates computation,

visualization, and programming in an easy-to-use environment where problems and solutions
are expressed in familier mathematical notation. Typical uses include:
 Math and computation
 Algorithm development
 Modeling, simulation and prototyping
 Data analysis, exploration and visualization
 Scientific and engineering graphics
 Application development, including graphical user interface building
The user’s program is written, edited, created and saved in the edit window. Most of the
programs written in MATLAB are saved in the M- files.

41
Figure-2.69(b) MATLAB Features
2.9 A case study: Jump Starting a Car
 Voltage and current in an electric network are easily measured. They obey Kirchoff’s laws,
KCL and KVL, and facilitate the monitoring of energy flow. For these reasons, voltage and
current are used by engineers in order to describe the state of an electric network.
 When a car battery is weak, say 11 V in a 12-V system, in order to jump-start that car,
we bring in another car with its engine running and its alternator charging its battery.
 Let the healthy and strong battery have a voltage of 13 V. According to the recommended
practice, one should first connect the positive terminals with the red jumper cable, as
shown in Figure-2.70, and then complete the circuit between the negative terminals with
the aid of the black jumper cable.
 Note that the negative terminal of any car battery is always connected to its auto chasis.
Figure-2.70 Jumper cable connections for jump starting a car with a weak battery.
Applying KVL in Figure-2.70, we have
where vg1 is the voltage across the airgap, or the voltage existing between the black jumper
cable and the negative terminal of the weak battery.
 Now suppose one makes, by mistake, incorrect connections, as shown in Figure-2.71. Note
that the red jumper cable is connected between the positive terminal of the strong battery
and the negative terminal of the weak battery. Application of the KVL now fields.

42
or
where vg2 is the gap voltage with incorrect connections. With such a large voltage difference,
when one tries to complete the black jumper cable connection, it presents a danger to both
batteries and to the person making the connections.
Figure-2.71 Incorrect connections for jump starting a car with a weak battery.
Energy to Start an Engine

 A simplified circuit model for an automotive starter circuit is shown in Figure-2.72. Let
the car battery voltage be 12.5 V and let the automobile starter motor draw 60 A when
turning over the engine. If the engine starts after 10 seconds, we can easily calculate the
power to the starter motor, which is the same as the power out of the battery,
P = V I = 12.5 × 60 = 750 W
The energy required to start the engine can be computed as
W = 750 × 10 = 7500 J
Figure-2.72 Simplified circuit model for the automotive starter circuit
 Thus, simple circuit models can be used to simulate various physical phenomena of
practical interest. They can then be analyzed by circuit-analysis techniques to yield
meaningful solutions rather easily.

43
Problems:
1) Reduce the circuit of figure-2.73 to a Thevenin and a Norton equivalent circuit.
Ans.( )
Figure-2.73
2) Find the Thevenin and Norton equivalent circuits for the configuration of figure-2.74 as
viewed from terminal a-b. Ans.( )
Figure-2.74
3) Use the node-voltage method to find the current I through the 5-Ω resistor of the circuit
of figure-2.75 Ans.
Figure-2.75
4) Use the node-voltage method to determine the voltage across the 12- Ω resistor of the
circuit given figure-2.76. Verify by mesh analysis. Ans.
Figure-2.76
5) (a) Find the voltage across the 8-A current source in the circuit of figure 2.77 with the
use of nodal analysis. Ans.
(b) determine the current in the 0.5 resistor of the circuit by mesh analysis.
Ans.

44
Figure-2.77
6) Determine the current I through the 10- Ω resistor of the circuit of figure-2.78 by the
application of superposition. Ans.
Figure-2.78
7) Find the current I1 through the 20- Ω resistor of the circuit of figure-2.79 by the
application of superposition. Ans.
Figure-2.79
8) Find the power delivered by the source in the circuit given in figure-2.80. use network
reduction by wye-delta transformation. Ans.
Figure-2.80

45
CHAPTER 5
ANALOG BUILDING BLOCKS

TOPICS:
 THE AMPLIFIER BLOCK

 OPERATIONAL AMPLIFIER (OP-AMP)
 OP-AMP PARAMETERS
 IDEAL OP-AMP
 PRACTICAL OP-AMP
 OP-AMP APPLICATIONS
 PRACTICAL APPLICATION: A CASE STUDY
AMPLIFICATION
 Amplification is process of adding strength to the input signal without changing its
shape.
 The circuit which amplifies a small input signal is called as amplifier.
 An amplifier receives a signal from transducer or sensor or other input source and
provides a larger version of the signal to some output device or to another amplifier
stage.
 An input signal is from transducer generally small in few millivolts from a cassette or
CD input, or a few microvolts from an antenna, microphone. Its needs to be amplified
sufficiently to operate an output device like speaker, relay or other power-handling
device which works at large power.
THE AMPLIFIER BLOCK
 An amplifier can be modeled as a two-port device, that is, a box with two pairs of
terminals designated as input and output, as shown in Figure 1.1
Figure 1
Figure 1.1
Department of Electronics & Communication

BE Sem. - 2 Page 1
 The circuit model of the amplifier block shown in Figure 1.1 is developed on the basis
of the following considerations:
1) For most amplifiers, the input current is proportional to the input voltage. The
input terminals in the model are connected by a resistance Ri, known as the input
resistance of the amplifier.
2) An amplifier delivers electric power (to a speaker, for example), the output current
can be represented by its Thevenin-source model. The Thevenin resistance Ro is
known as the output resistance and the Thevenin voltage is a dependent voltage
source AVin, where A is called the open-circuit voltage amplification.
 Thus, the amplifier block is a linear circuit block in which the output is proportional
to the input, and the amplifier is characterized by the three constants Ri, Ro, and A.
 The input and output resistances may be generalized to input and output impedances
in ac systems.
 Since Ri and RS are connected in parallel,
Vin = IS
Where,IS =Source current

 Using the voltage-divider formula, one has
Vout =A Vin =
A is the open-circuit voltage amplification.
a) Voltage amplification ( AV )
Circuit shown in Figure 2 explains voltage amplification, or voltage gain.

Figure 2

 In this circuit a signal voltage VS is applied to the input of the amplifier block,
whereas the output terminals are connected to a load resistance RL.

 Evaluate the ratio of the voltage across the load to the signal voltage V L/VS, which is
known as voltage gain AV,
Av = = = RL=
b) Current gain (AI )

BE Sem. - 2 Page 2
 By defining the current gain AI to be the ratio of the current through R L to the current
through VS, one gets
c) Power gain ( AP )
 The power gain AP, defined by the ratio of the power delivered to the load to the
power given out by the signal source, is obtained as
For fixed values of Ro and Ri, AP is maximized when RL is chosen equal to Ro, and this
corresponds to maximum power transfer to the load.
EXAMPLE
For given two port block determine:
a) Vi.
b) Ii.
c) Zi.
d) Av.
SOLUTION

BE Sem. - 2 Page 3
OPERATIONAL AMPLIFIER (OP-AMP)
 The operational amplifier (OP-AMP) is a fundamental active element of analog

circuit design.
 It is most commonly used in amplifier and analog signal processing circuits in the
frequency band from 0 to 100 kHz. High-frequency OP-AMPs are used in
applications that require a bandwidth into the MHz range.
 The first OP-AMPs were vacuum-tube circuits which were developed for use in
analog computers. Modern OPAMPS are fabricated as integrated circuits (IC) so
having all advantage of monolithic IC such as small in size, inexpensive, compact,
less power consumption and versatile used in a variety of simple circuits.
 Operational amplifiers are precision, high-gain, differential amplifiers. They were
originally designed to perform mathematical operations in computers. But now a days
widely used in many other applications
 An OP-AMP can be built from individual transistors and resistors but practically all
OP-AMP are manufactured as integrated circuits. Dozens of different types of OP-
AMPs are available with various combinations of characteristics.
 In OP-AMP, internal amplifier stages use BJT or FET as amplifying devices along
with resistors and capacitors.
 The first OPAMP in IC manufactured by Fairchild Company. They named OP-AMP
as μA 741 which became extremely popular as it was used in variety of application.
OP-AMP is linear and more accurately an analog integrated circuit.
Symbol and terminals:
Figure 3
 The symbol for the OP-AMP is shown in Figure having two terminals labelled Vin+
(non inverting terminal) and Vin− (inverting terminal) are available for inputs. The
voltages of these terminals are labelled with respect to a ground.
 The output voltage is related to the difference between the two input voltages as
VO = AV ( Vin + - Vin− )
Where Av is the open-loop voltages gain.
 Thus, the OP-AMP is basically a form of differential amplifier, in which the

difference (Vin+ - Vin) is amplified.
OP-AMP BLOCK DIAGRAM

BE Sem. - 2 Page 4
 An operational amplifier is a direct coupled high gain amplifier consisting of one or
more differential (OPAMP) amplifiers and followed by a level translator and an
output stage.
 An operational amplifier is available as a single integrated circuit package.
Figure 4
Input stage
 It is a dual input balanced output differential amplifier. This stage provides most of
the voltage gain of the amplifier and also establishes the input resistance(Ri) of the
OPAMP.
Intermediate stage
 It is another differential amplifier which is driven by the output of the first stage. This
is usually dual input unbalanced output.
Level Shifting Stage
 Because direct coupling is used, the dc voltage level at the output of intermediate
stage is well above ground potential. Therefore level shifting circuit is used to shift
the dc level at the output downward to zero with respect to ground.
Output stage
 It is generally a push pull complementary amplifier. The output stage increases the
output voltage swing and raises the current supplying capability of the OPAMP. It
also provides low output resistance (RO).
OP-AMP INPUT MODES
 OPAMP has two input terminals and one output terminal. Input mode can be
determined by how you connect input signal to the both input terminals of OPAMP.
 Different OP-AMP input mode listed below.
a) Single input
b) Double-ended or differential input
c) Common-mode operation
 Each mode explained in detail below.
a) Single input
 In Single-ended input operation the input signal is connected to one input terminal
and the other input terminal connected to ground. Figure 5.1 shows the signals
connected for this operation.

BE Sem. - 2 Page 5
Figure 5.1
 In Figure 5.1 given below the input is applied to the plus input (with minus input at
ground), which results in an output having the same polarity as the applied input
signal.
 Figure 5.2 below shows an input signal applied to the minus input, the output then
being opposite in phase to the applied signal.
Figure 5.2
b) Double-ended or differential input
 In addition to using only one input, it is possible to apply signals at each input it’s
called a double-ended operation.
 Figure 5.3 given below shows an input Vd applied between the two input terminals
(recall that neither input is at ground), with the resulting amplified output in phase
with that applied between the plus and minus inputs.

Figure 5.3


BE Sem. - 2 Page 6
 Figure 5.4 below shows the same when two separate signals are applied to the inputs.
The difference signal being ( V1 - V2 ).
Figure 5.4
c) Common-mode operation
 When the same input signals are applied to both inputs, common-mode operation
results, as shown in Figure 5.5.
Figure 5.5
 Ideally, the two inputs are equally amplified, and since they result in opposite polarity
signals at the output, these signals cancel, resulting in 0-V output. Practically, a small
output signal is present.
 Producing a zero output voltage for common mode signal is called as common mode
rejection.
OP-AMP PARAMETERS
 OP-AMP characteristics are important in practice because we use them to identify the
performance of various OP-AMP ICs and select the best suitable from them for the
required application.
 OP-AMP characteristics can be classified into two categories.
(i) DC characteristics and
(ii)AC characteristics.
 DC characteristics include input bias current , input offset current, input offset voltage
and thermal drift whereas AC characteristics include the frequency response, slew
rate, stability of OPAMP, frequency compensation etc.

BE Sem. - 2 Page 7
Figure 5.6
1. OPEN-LOOP VOLTAGE GAIN ( AV )
 It is internal voltage gain of the device and represents by the ratio of output voltage to
input voltage when there are no external components.
VO = AV × Vd
 For Ideal OP-AMP, it is infinite (∞).

 A typical/practical value for an OP-AMP 741 is 2 x 105
2. INPUT RESISTANCE ( Ri )
 It is defined as the resistance looking into the two input terminals of OP-AMP.
 A typical value for an OP-AMP 741 is 2 MΩ
3. OUTPUT RESISTANCE ( Ro )
 It is defined as resistance looking from the output terminals of OP-AMP.

 For Ideal OP-AMP, it is zero.
 A typical value for an OP-AMP 741 is 60Ω - 70Ω
4. BANDWIDTH
 It is the difference between the upper and lower frequencies in a continuous set of
frequencies over which OP-AMP can work.
 A typical value for an OP-AMP 741 is 1 MHz
5. COMMON-MODE REJECTION RATIO (CMRR)
 The ability of an Op-Amp to suppress common signals is expressed in terms of its

Common-Mode-Rejection-ratio (CMRR).
CMRR =

BE Sem. - 2 Page 8
 The higher value of the CMRR is better. A very high value of CMRR means that the
differential gain AV is high and the common-mode gain AC is low.
 The CMRR is often expressed in decibels (dB) as
CMRR(dB) = 20 log

 A typical value for an OP-AMP 741 is 90 db or 31622.
6. INPUT OFFSET VOLTAGE ( Vio )
Figure 5.8
 When both inputs are tied to ground the output voltage should be zero. In practice
there will be some voltage due to mismatches in amplifier components which produce
significant output voltage. The input offset voltage Vios is the differential input
voltage required to make the output zero.
 Ideally it is zero.
 A typical value for an OP-AMP 741 is few Milivolt range. It is temperature
dependent.
7. INPUT BIAS CURRENT ( IB )
Figure 5.9
 This is the average of the currents that flow into the inverting(IB-) and non-inverting
(IB+)input terminals of the op-amp is define as input bias current.

BE Sem. - 2 Page 9
IB =
 A typical value for an OP-AMP 741 is near about 50 nA;
8. INPUT OFFSET CURRENT ( Iios )
 The algebraic difference between the currents into the inverting and non-inverting
terminals when they connected to ground is referred to as input offset current Iios.
Iio = |IB1 − IB2|
 A typical value for an OP-AMP 741 is 6 nA;
9. POWER-SUPPLY REJECTION RATIO (PSRR)
 PSRR is defined as the ratio of change in the input offset voltage Vio with a change in
one of the bias power supplying VCC, when the other power supply is held constant.
The term is also called the Supply Voltage Rejection Ratio (SVRR) or Power
Supply Sensitivity (PSS).
PSRR=
 It is expressed in microvolt/volt.
 A typical value for an OP-AMP 741 is 150 μV/ V
10. SLEW RATE ( S )

 Slew (or slewing) rate is defined as maximum rate of change of output voltage with
respect to time.
SR = maximum Volts / μS
 It is expressed in Volt / microseconds.

 Ideally it is infinite (∞).
 A typical value for an OP-AMP 741 is 0.5 V/ μS
11. INPUT CAPACITANCE ( Ci )
 It is equivalent capacitance measured at either inverting or with other terminal

connected to ground.
 A typical value for an OP-AMP 741 is 1.4 pF.
12. GAIN BANDWIDTH PRODUCT (GB)

BE Sem. - 2 Page 10
Figure 5.10
 It is defined as bandwidth of OP-AMP when voltage gain is 1. Other terms used for it
is close loop bandwidth, unity gain bandwidth and small signal bandwidth.
 A typical value for an OP-AMP 741 is 1 MHz.
13. OUTPUT VOLTAGE SWING
 It is defined as difference between the maximum positive & negative output voltage
by OP-AMP.
 It is generally ±0.9VCC (supply voltage) for typical OP-AMP. So its voltage swing
from +0.9VCC to - 0.9VCC.
Example
An operational amplifier has a slew rate of 2 V / µs. If the peak output is 12 V, what is the
power bandwidth?
Solution:
The slew rate of an operational amplifier is
Slew rate = 2 fmax VP
fmax =
As for output free of distribution, the slews determine the maximum frequency of operation
fmax for a desired output swing.
fmax =
So bandwidth = 26.5 kHz.
Example

BE Sem. - 2 Page 11
For the circuit given in figure 5.11 Iin(off) = 20 nA. If Vin(off) = 0, what is the differential
input voltage?. If A = 105, what does the output offset voltage equal?
Figure 5.11
Solution:
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = Iin(off) x 1k = 20 nA x 1 k = 20µ V
(ii) If A = 105 then the output offset voltage Vin(off) = 20 µ V x 105 = 2 volt
Output offset voltage = 2 volts.
Example
Calculate the CMRR for the circuit measurements shown in Figure.

BE Sem. - 2 Page 12
Figure 5.12
Solution
From the measurement shown in Fig. 5.12 a, using the procedure in step 1 above, we obtain
The measurement shown in Figure 5.12 b, using the procedure in step 2 above, gives us
The value of CMRR is
which can also be expressed as
Example
Determine the output voltage of an op-amp for input voltages of Vi1=150µV, Vi2=
140µV. The amplifier has a differential gain of Ad=4000 and the value of CMRR is:
(a) 100.
(b) 105.
Solution
(A)
(B)
IDEAL OP-AMP
An ideal OP-AMP would exhibit the following electrical characteristic.
1. Infinite voltage gain Ad

2. Infinite input resistance Ri, so that almost any signal source can drive it and there is
no loading of the input source.

BE Sem. - 2 Page 13
3. Zero output resistance RO, so that output can drive an infinite number of other
devices.
4. Zero output voltage when input voltage is zero.
5. Infinite bandwidth so that any frequency signals from 0 to infinite Hz can be
amplified without attenuation.
6. Infinite common mode rejection ratio so that the output common mode noise voltage
is zero.
7. Infinite slew rate, so that output voltage changes occur simultaneously with input
voltage changes.
Equivalent circuit
 Figure 5.13 shows an equivalent circuit of an OP-AMP.
Figure 5.13
 V1 and V2 are the two input voltage voltages. Ri is the input impedance of OP-AMP.
Ad·Vd is an equivalent Thevenin voltage source and RO is the Thevenin equivalent
impedance looking back into the terminal of an OP-AMP.
 This equivalent circuit is useful in analyzing the basic operating principles of OP-
AMP and in observing the effects of standard feedback arrangements
VO = Ad (V1 – V2) = Ad·Vd
 This equation indicates that the output voltage VO is directly proportional to the
algebraic difference between the two input voltages.
 In other words the OP-AMP amplifies the difference between the two input voltages.
It does not amplify the input voltages themselves.
 The polarity of the output voltage depends on the polarity of the difference voltage
Vd.
Ideal Voltage Transfer Curve:
 The graphic representation of the output equation is shown in figure in which the
output voltage VO is plotted against differential input voltage Vd, keeping gain Ad
constant.

BE Sem. - 2 Page 14
Figure 5.14
 The output voltage cannot exceed the positive and negative saturation voltages.
 These saturation voltages are specified for given values of supply voltages. This
means that the output voltage is directly proportional to the input difference voltage
only until it reaches the saturation voltages and thereafter the output voltage remains
constant.
 Thus curve is called an ideal voltage transfer curve, ideal because output offset
voltage is assumed to be zero. If the curve is drawn to scale, the curve would be
almost vertical because of very large values of Ad.
PRACTICAL OP-AMP
Figure 5.15a Figure 5.15b
Characteristics:
 Practical OP-AMPs that can be made to approximate some of ideal characteristics

using a negative feedback arrangement.
For example, a popular 741 OP-AMP has the following characteristics:
1. Very high voltage gain. The gain without feedback (known as the open-loop gain) is
of the order of 200,000.
2. Gain falls with frequency. It is constant up to about 10 kHz then falls until it reaches 1
at the transition frequency, fT. Typically, fT is 1 MHz, but is much higher in some OP-
AMPs.
3. High input resistance. This is usually at least 2 MΩ, often much more.

BE Sem. - 2 Page 15
4. Low output resistance. Typically 60-75 Ω.
5. Output takes a finite time to reach its correct value and may take additional time to
settle to a steady value. Typically 0.5V/s.
6. High value of CMRR. Typically 90db or 31622.
7. The output voltage swings to within a few volts of the supply voltages (typically ±13
V for an amplifier run on ±15 V).
8. Input voltage offset is a few millivolts.
 SUMMERY OF OP-AMP CHARACTERISTICS
Sr. No. Characteristics Value for IC 741 Ideal Value

1 Input resistance(Ri) 2 MΩ ∞
2 Output Resistance(RO) 60-75 Ω 0
3 Voltage gain(AV) 2Χ105 ∞
4 Bandwidth(BW) 1 MHZ ∞
5 CMRR 90 db ∞
6 Slew Rate 0.5 µV/V ∞
7 PSRR 150 µV/V 0
8 Input Bias Current(IB) 50 nA 0
9 Input Offset Current(Iios) 6 nA 0
10 Input Offset Voltage(Vios) 2mV 0
VIRTUAL SHORT AND VIRTUAL GROUND
 In analysis of different circuits that includes OP-AMP, need to use an important

concepts called virtual short and virtual ground.
 According to voltage short circuit concept, the potential difference between two input
terminals of an OP-AMP is almost zero
 In other words both the input terminals are approximately at the same potential.
Virtual Short
 The concept of virtual short circuit explained below.
Figure 5.16
 As shown in figure 5.16, input impedance (Ri) of ideal OP-AMP is infinite. Hence
current I flowing from one input terminal to another input terminal is zero.
 Thus the voltage drop across Ri will be zero and both the input terminals will be at
same potential.
 In other words they are virtual shorted (not actually).

BE Sem. - 2 Page 16
 Another way to explain this concept mathematically as follow:
 The output voltage of OP-AMP is given by
VO = AV· Vd
Where, AV = Open loop voltage gain and
Vd = Differential input voltage
Vd =
 But for ideal OP-AMP, AV = ∞ so, Vd = 0
Vd = Differential input voltage = V1(non-inverting)-V2(inverting)
V1=V2
 Now both at same potential so input terminal of OP-AMP at equal potential will be
consider as virtual short circuit.
Virtual Ground
Figure 5.16
 If the non inverting terminal of OP-AMP is connected to ground as shown in figure
5.16 then as per virtual short circuit concept inverting terminal also at ground
potential.
 Hence it is said to be at “virtual ground” potential.
 If the inverting terminal of OP-AMP is connected to ground then non inverting
terminal also at “virtual ground” potential.
FEEDBACK IN OP-AMP
 Feedback means part of the output given to the input.

 Thus at the input of amplifier with feedback two input signal will be simultaneously
present .one is original input signal and second is feedback signal.
 Feedback signal can be inphase or out of phase with input signal. Based on that
feedback can be classified as positive feedback and negative feedback.
 In positive feedback, feedback signal is inphase and it is generally used for oscillation
and triggering.
 In negative feedback, feedback signal is out of phase (1 0 ) and generally used in
amplifier circuits.
NEGATIVE FEEDBACK IN OP-AMP
 OP-AMP used negative feedback in most of applications.

BE Sem. - 2 Page 17
 Any input signal slightly greater than zero drive the OP-AMP output to saturation
level because of very high gain.
 Thus when operated in open-loop, the output of the OP-AMP is either negative or
positive saturation or switches between positive and negative saturation levels.
Therefore open loop op-amp is not used in linear applications.
 With negative feedback, the voltage gain (ACL) can be reduced and controlled so that
op-amp can function as a linear amplifier.
 In addition to provide a control and stable voltage gain, negative feedback provides
control of input & output impedance and amplifier bandwidth.
 In OP-AMP amplifier circuit with negative feedback, a feedback resistor RF is
connected between the output and inverting terminal as shown in figure 5.17.
Figure 5.17
OP-AMP APPLICATIONS
1) INVERTING AMPLIFIER
 Circuit diagram of OP-AMP as inverting amplifier is shown in figure 5.18

 Signal which is to be amplified connected to inverting terminal and non-inverting
terminal connected to ground.
 In this configuration output voltage signal will be 180º out of phase with input signal.
Figure 5.18
 As per ideal characteristics of OP-AMP, input resistance = ∞ so current going into op-
amp is zero. Therefore current I will pass through R1 will also passed through RF as
shown in figure.

BE Sem. - 2 Page 18
 Since V2= 0, because terminal 2 is grounded and because of that V1=0 (virtual
ground)
 As V2 = 0, so input voltage is voltage across R1 and voltage across RF is output
voltage.
Expression for gain:
Input voltage VS given by VS = IR1

Output voltage VO = - IR1
 Closed loop gain AVF =
Substitute the value of Vo and Vs.

AVF = - =-
AVF = -
 An output voltage can be
Vo = AVF x VS
Waveform:
Figure 5.18b
Example:
An OP-AMP is used in inverting mode with R = 1KΩ, RF = 15KΩ, VCC = ±15V.Calculate

the output voltage for following inputs.1) Vin = 150mV 2) Vin = 2 V
Solution:
Gain of the amplifier:

Ω
AVF = - =- = - 15
Ω
Output voltage for Vin = 150 mV
VO= AVF X Vin = - 15 X 150 X10-3 = -2.25 Volts
Output voltage for Vin = 2V

BE Sem. - 2 Page 19
VO= AVF X Vin = - 15 X 2 = -30 Volts
But Vo can never be higher than ±V sat hence Vo will be restricted to -Vsat.
Assuming –Vo(sat) = 0.9 VCC
So, VO= 0.9 X -15 = - 13.5V
Example
Find the closed loop gain of the following inverting amplifier circuit.
Figure 5.19
Solution:
Inverting op-amp gain
we can now substitute the values of the resistors in the circuit as follows,
Rin = 10 kΩ and Rƒ = 100kΩ.
and the gain of the circuit is calculated as
=- = -10.
therefore, the closed loop gain of the inverting amplifier circuit above is given -10 or 20dB
(20log(10)).
2) NON-INVERTING AMPLIFIER
 Circuit diagram of OP-AMP as non-inverting amplifier is shown in figure 5.19.

 Signal which is to be amplified connected to non-inverting terminal and inverting
terminal connected to ground.

BE Sem. - 2 Page 20
Figure 5.19
 As per ideal characteristics of OP-AMP, input resistance = ∞ so current going into op-
amp is zero.
 In this configuration output voltage signal will be in phase with input signal.
 As we Consider ideal OP-AMP, input resistance(Rin) = ∞ so current going into both
input terminals of op-amp is zero.(IB1 = IB2 = 0)
Therefore voltage across R1 given by,

V2 = Vo
 As per virtual short circuit concept
V2 = V1 = Vs
So, Vs = Vo
 Closed loop gain AVF = = = 1+

 An output voltage can be
Vo = AVF × VS
Waveform:
Figure 5.19b
Example
Calculate the output voltage of a non-inverting amplifier for values of V1= 2 V, RF =500
KΩ, and R1=100 KΩ.
Solution

BE Sem. - 2 Page 21
3) VOLTAGE FOLLOWER (UNITY GAIN BUFFER)
 In non-inverting amplifier configuration, When R1 = ∞ and RF = 0 it converts to

voltage follower or unity gain amplifier.
 This amplifier has gain unity so it’s called as unity gain amplifier.
Figure 5.20
 This configured can be obtaining by short circuit RF and open circuit R1 connected in
non-inverting amplifier configuration.
 Consider expression for closed loop gain of non-inverting amplifier that is,
AVF = 1+
Substitute value RF = 0 and R1= ∞
AVF =1
 Therefore output voltage will be equal to input voltage and in phase of input voltage.
It is not behave like conventional amplifier but can be used as resistance transformer.
It has also useful feature which are given below.
Feature:
 Very high input impedance

 Very low output impedance
 Large bandwidth
Example
Figure 5.21 shows a source connected to a load with a voltage follower. It is given that
RS = 10 kΩ and RL = 100Ω. (a) Calculate VO. (b) Calculate VO if the voltage follower is
removed and the source connected to the load.

BE Sem. - 2 Page 22
Figure 5.21
Solution
a) With the voltage follower, there is no current through RS so that the voltage at the op-
amp input is VS. It follows that VO = VS.
b) If the voltage follower is removed and the source is connected directly to the load, VO
is given by VO = VS RL/ (RS + RL) = VS /101. This is a decrease in output of 20 log
101 = 40.1 dB. This example illustrates how a unity gain amplifier can increase the
gain of a circuit.
4) SUMMING AMPLIFIER or ADDER

 It is possible to apply more than one input signals to an inverting amplifier. This
circuit will then add all these input signals to produce their addition at the output.
Such circuit called adder or summing amplifier.
 Polarity or sign of output voltage the summing or adder circuits will be negative
because we made inverting summing or adder configuration.
 Inverting adder or inverting summing amplifier:
Figure 5.22
 Figure 5.22 shows inverting summing amplifier configuration with three input
V1, V2 and V3.

BE Sem. - 2 Page 23
 Depending upon the relation between feedback resistor RF and three resistors
R1, R2 and R3 the same circuit can be used as summing amplifier, average
amplifier or scaling amplifier.
 For analysis we assumed that OP-AMP is ideal so input resistance = ∞ so
current flowing into input terminals of OP-AMP is zero (IB1=IB2=0). Addition
to this, Node A is at virtual ground potential.
 Expression for output voltage
I1 + I2 + I3 = IB2 + IF …………… (1)
But Ri = ∞ so, IB2=0 and VA=VB= 0 due to virtual ground concept.
Hence, I1 +I2+I3= IF …………… (2)
From the input side, I1 = = as VA=0
Likewise, I2 = and I3 =
And from the output side,
IF = =
As per equation (2)
+ + =
VO = -
If we substitute RF = R1= R2 = R3 then we get

VO = - ( V1+ V2 + V3 )
 SCALING OR WEIGHTED AMPLIFIER
 Above given circuit can also used as a scaling amplifier. This is possible if
each input amplified by a different factor.
VO = - where R1≠R2≠R3

BE Sem. - 2 Page 24
 AVARAGE CIRCUIT
 Inverting adder circuit can also be used as averaging circuit by setting R1=R2=R3= R
and RF = R/3
VO = -
 Magnitude of output voltage is equal to the average of input three input voltages.
Example
Find the output voltage of the following Summing Amplifier circuit.
Figure 5.23
Solution:
Using the previously found formula for the gain of the circuit
we can now substitute the values of the resistors in the circuit as follows,
we know that the output voltage is the sum of the two amplified input signals and is
calculated as:

BE Sem. - 2 Page 25
then the output voltage of the Summing Amplifier circuit above is given as -45 mV and is
negative as it’s an inverting amplifier.
5) DIFFERENCE AMPLIFIER OR SUBSTRACTOR

 The difference amplifier or substractor circuits used to obtain the subtraction of
the two input signal.
 Circuit diagram of difference amplifier or substractor given below. For analysis
we assumed that OP-AMP is ideal so input resistance = ∞ so current flowing into
input terminals of OP-AMP is zero (IB1=IB2=0).
Figure 5.24
 Expression for output voltage of difference amplifier:
VO = ( V1-V2)
 Output voltage will be amplified voltage of Difference of input voltage.
 SUBSTRACTOR:
 Same circuit can be used as substractor by placing resistor RF = R1= R.
 Equation for output voltage.
VO = ( V1 - V2 )
EXAMPLE
For the diff amp circuit of Figure 5.25, it is given that R1 = R3 = 10 kΩ and R2 = RF =20 kΩ.
Solve for the output voltage, the input resistance to the VI1 terminal, and the input resistance
to the VI2 terminal for the three cases: VI1 = 0, VI1 = −VI2, and VI1 = +VI2.

BE Sem. - 2 Page 26
Figure 5.25
Solution
Because RF /R3 = R2/R1, It follows that VO =2 (VI1 − VI2).
The input resistance to the VI1 node is 30 kΩ.
For VI1 = 0, it is 10 kΩ.

For VI1 = −VI2, it is 6 kΩ.
For VI1 = +VI2, it is 40 kΩ.
6) CURRENT-TO-VOLTAGE AMPLIFIER
 Circuit diagram of current to voltage convertor is shown below.
Figure 5.26
 For analysis we assumed that OP-AMP is ideal so input resistance = ∞ so current

flowing into input terminals of OP-AMP is zero (IB1=IB2=0).
VO = - RF Is
7) CURRENT-TO-CURRENT AMPLIFIER
 Circuit diagram of current to current convertor is shown below.

BE Sem. - 2 Page 27
Figure 5.27

 Expression for output current in the form of current gain
= 1+
8) CHARGE-TO-CHARGE AMPLIFIER
 Circuit diagram of charge to charge convertor is shown below.
Figure 5.28
9) INTEGRATORS
 Figure of integrator is shown below which is obtained by placing capacitor C in
the feedback branch and resistor R on inverting terminal. Assuming OP-AMP has
ideal characteristics.

BE Sem. - 2 Page 28
Figure 5.29

 Expression for output voltage of integration amplifier:
VO = dt + C
Figure 5.29 b
10) DIFFERENTIAL AMPLIFIER

 Figure of differentiator is shown below which is obtained by placing RF in the
feedback branch and capacitor C on inverting terminal. Assuming OP-AMP has
ideal characteristics.
Figure 5.30
BE Sem. - 2 Page 29
 Expression for output voltage of difference amplifier:
VO= - RF C1 ( Vin )
Which corresponds to a differentiator with a gain of – RFC1
 In practice, Differentiators are normally avoided because of high-frequency

noise and stability problems (which make them oscillate).
Figure 5.30b
11) FILTER
 Filters designed to pass certain frequency band or frequencies and attenuate or block
signal of frequencies outside this band.
 Mainly two type of filter available named active filters and passive filter.
INDUCTORLESS (ACTIVE) FILTERS
 Filters made from active components such BJT, FET & OP-AMP along with the
passive components known as ACTIVE FILTERS.
 Inductor is not possible to fabricate on IC so in active filter inductor is not present.

BE Sem. - 2 Page 30
1. ACTIVE LOW PASS FILTERS
 Circuit diagram and frequency response of active low pass filter given below in
figure.
 This circuits use R-C network for filtering and OP-AMP in non inverting mode as
amplifier.
 R-C value decides the cut-off frequency of the filter.
 Resistor R1 and RF decide gain of the amplifier.
Figure 5.31 Figure 5.31b
 OP-AMP used here is in non inverting mode so gain of the amplifier is

AVF = = 1+
 Frequency response curve shows frequency signal below cut-off frequency is
passed and it is consider as passband.
 Frequency signal above cut-off frequency is attenuated and it is consider as
stopband.
2. ACTIVE HIGH PASS FILTERS
 Circuit diagram and frequency response of active high pass filter given below in
figure.
 This circuits use R-C network for filtering and OP-AMP in non inverting mode as
amplifier.
 R-C value decides the cut-off frequency of the filter.
 Resistor R1 and RF decide gain of the amplifier.
Figure 5.32 Figure 5.32b

BE Sem. - 2 Page 31
 OP-AMP used here is in non inverting mode so gain of the amplifier is
AVF = = 1+
 Frequency response curve shows frequency signal below cut-off frequency is
attenuated and it is consider as stopband.
 Frequency signal above cut-off frequency is passed and it is consider as passband.
PRACTICAL APPLICATION: A CASE STUDY
Automotive Power-Assisted Steering System
Figure 5.33
 In terms of negative feedback, there exists an analogy between the operational

amplifier and the power-steering mechanism of an automobile.
 The hydraulic pump is analogous to the power supply in an op-amp circuit.
 The position of the booster-cylinder piston that is linked to the steering is analogous
to the op-amp output signal.
 The mechanical linkage between the control valve and the booster-cylinder piston is
analogous to the feedback circuit.
 The control-valve response to the difference between the input from the steering
wheel and the position of the steering linkage is analogous to the op-amp response to
its differential input signal.
 Thus the automotive power assisted steering system is but an example of negative
feedback in a mechanical sense.
 Figure illustrates in a simplified manner how a hydraulic pump driven by the engine
continuously supplies pressure to a control valve which in turn supplies the fluid to
the two sides of the booster cylinder.

BE Sem. - 2 Page 32
 A negative feedback path is established from the booster cylinder through the
mechanical linkage back to the control valve. For straight steering, the pressure
applied is equal on both sides of the cylinder and, as such, no turning force results.
 When the steering wheel is moved by the driver to turn the wheels in the desired
direction, more pressure is applied to one side of the cylinder or the other. A
mechanical feedback arm from the steering linkage causes the valve to return to its
neutral position as the wheels turn, thereby allowing the driver to make a gradual turn.
As and when the steering wheel is turned, the wheels move a proportional amount
rather than moving all the way to the extreme position.
Question
1. Explain in detail: Ideal OP-AMP.

2. List the characteristics of Practical OP-AMP.
3. Describe the appearance of a typical operational amplifier packaged as an 8-pin
integrated circuit.
4. List the terminals present on all OP-AMPs and state their functions.
5. Derive the expression of voltage gain for inverting for OP-AMP.
6. Derive the expression of voltage gain for non-inverting mode for OP-AMP.
7. Describe how an OP-AMP voltage follower works and give an example of its
applications.
8. Explain OP-AMP parameter values:
a) Input offset voltage
b) Input bias current
c) Common-mode rejection ratio
d) Slew rate
e) Open loop gain
f) Output offset voltage
9. Define filter. How are filter classified?
10. What are a passband and a stopband for filter?
11. Explain active high pass filter.
12. Explain active low pass filter.
Example
1) Design a circuit for an OP-AMP inverting amplifier with a closed-loop gain of -200,
assuming an ideal OP-AMP.
2) Design a circuit for an OP-AMP non-inverting amplifier with a closed-loop gain of

101, assuming an ideal OP-AMP.
3) An inverting OP-AMP amplifier with an input resistance of 2 kΩ an output resistance

of 100Ω and an open-circuit voltage gain of −30 (an inverting decibel gain of 29.5
dB).find out output resistance.
4) Design an inverting summer which has an output voltage given by VO = 3 – 2VI

.Assume that +15V and −15V supply voltages are available.
5) Calculate the output voltage of an op-amp summing amplifier for the following sets
of voltages and resistors. Use Rf = 1 MΩ in all cases.

BE Sem. - 2 Page 33
6) Calculate the CMRR (in dB) for the circuit measurements of Vd=1 mV, Vo=120 mV,
and VC =1 mV, Vo=20µV.
7) Determine the output voltage of an op-amp for input voltages of Vi1=200 µV and
Vi2=140
µV. The amplifier has a differential gain of Ad=6000 and the value of CMRR is:
(a) 200.
(b) 105.
8) What is the output voltage in the circuit of Figure?
9) What is the range of the voltage-gain adjustment in the circuit of Figure?
10) What input voltage results in an output of 2 V in the circuit of Figure
11) Calculate the output voltage developed by the circuit of Figure for Rf =330 KΩ.

BE Sem. - 2 Page 34
BE Sem. - 2 Page 35
Basic Electronics ( 2110016 ) Chapter 4: Digital Building Blocks & Computer Systems
CHAPTER 4
DIGITAL BUILDING BLOCKS & COMPUTER SYSTEMS

1. Introduction
2. Introduction to Digital System
3. Number systems
4. Logic gates
5. Boolean algebra
6. Different forms of boolean algebra
7. Simplification of logical function using karnaugh map (k-map)
8. Binary adders
9. Encoder
10. Decoder
11. Multiplexer
12. Demultiplexer
13. Sequential blocks
14. Shift registers
15. Counters
16. Digital-to-analog & analog-to-digital converter
17. Memory
18. Display Devices
19. Computer Systems
20. Computer Networks
21. A Case Study – Microcomputer – Controlled Bread making Machine
22. Questions

1
4.1 INTRODUCTION:
 Electronic systems usually deal with information. Representation of information is called a

signal. Signal in electronics is generally in form of voltage or current. Value of a signal is
proportional to some physical quantity and it gives information about it. For example,
temperature represented in terms of voltage signal.
 There are two types of signals which are different in terms of their characteristics with respect
to time and value.
1. Analog Signals
2. Digital Signals
 A signal whose value is defined at all instances of time is called continuous time signal. On
the other hand signal whose values are defined only at discrete instances of time is called
discrete time signal. Most of the signals that occur in nature are analog in form. A discrete
time signal can be obtained from continuous time signal by process called sampling. This has
been illustrated in Fig. 4.1.
Fig. 4.1: (a) Continuous time signal x(t) sampled at every T interval, (b) Resulting discrete
time signal x(n)
 Similarly if a signal can take any value in a given range between some minimum and maximum
value then the signal is called continuous value signal. On the other hand if a signal takes
only certain fixed values in a given range then it is called discrete value signal. The process
of converting a continuous value signal to a discrete value signal is called quantization. This
is illustrated in Fig. 4.2.
Fig. 4.2: Continuous value signal (solid line) and discrete value signal (dotted line)

2
Analog signal: Signals that are continuous in time and continuous in value are called analog signal.
Digital signal: Signals that are discrete in time and discrete in values are called digital signals.
Digital signals are generally processed by digital systems like computers and hence their values
are represented in terms of binary as shown in Fig. 4.2.
 Analog signal being continuous in time will have infinite values in any given period of time.
Practically a digital system like computer cannot handle infinite values due to limited physical
resources and processing power. This is the reason why a continuous time signal has to be
sampled and converted to discrete time signal.
 Again analog signals are continuous in value and hence can take any value in a given range.
Now ideally number of values in any given range will be infinite which cannot be represented
by finite number of bits on a computer. For example, as shown in Fig. 4.2, with three bits used
for representing values only eight different values can be represented. Thus a continuous value
signal has to be quantized and converted to discrete value signal.
 Levels of Integration
 Digital electronic circuits have become increasingly popular and successful due to integrated
circuit (IC) technology. Advancement in IC technology has made it possible to construct large
number of devices (eg. transistor, diode, resistors, capacitors, etc) on a very small chip.
Classification of IC technology based on number of components per chip is as follows.
1. Small-scale integration (SSI), containing fewer than 100 components

2. Medium-scale integration (MSI), containing 100 to 1000 components
3. Large-scale integration (LSI), containing 1000 to 10,000 components
4. Very large-scale integration (VLSI), containing more than 10,000 components
 Comparison of Analog and Digital Systems
Analog Systems Digital Systems

1 Analog systems operate on Digital systems operate on discrete time
continuous time and continuous and discrete value signals generally
value signals. represented in binary.
2 Analog systems are difficult to Digital systems are easy to design as
design. most of the components are in form of
Integrated circuits (IC).
3 Analog systems are mostly custom Digital systems have high degree of
made and lack flexibility. flexibility.
4 Less efficient in storage of More efficient in storage of information.
information.

3
5 Analog signal processed by these Digital signal are more noise-immune

systems are affected by noise very compared to analog signals.
easily.
6 Relatively costly compared to Low cost due to mass production of
digital system components.
7 Analog systems are more sensitive Digital systems are less sensitive to
to parameter variation. parameter variation
8 No conversion of input signals are Input signals are converted from analog
required before processing to digital form before it is processed
9 As no conversion of input signal is Due to process of sampling and
required there is no loss of quantization there is loss of information.
information.
10 Analog systems are more efficient Digital systems may offer limitations for
for real time processing real time processing
4.2 Introduction to Digital System:
 A digital system uses a building blocks approach. Many small operational units are
interconnected to make up the overall system.
 The most basic logical unit system is gate circuit. There are several different types of gates
with each perform differently from other logic gates.
 Digital signal consist of only two values, ‘0’ and ‘1’. These two values have logical meaning
i.e. ‘1’ represents the existence of particular condition and ‘0’ represents the absence of
condition.
 There are two types of tables are used in digital system:

1. Truth Table:
Truth table plots inputs and outputs in terms of 1s and 0s.
2. Function Table:
Function table plots inputs and outputs in term of HIGH and LOW voltage levels.
 The design of digital system may be roughly divided into three stages;
1. System Design:
It involves breaking the overall system into subsystem and specifying the characteristics
of each subsystem. For example, the system design of a digital computers involves
specifying the number and type of memory, ALU and i/p – o/p devices.
2. Logic Design:
It involves how to interconnect basic logic building blocks to perform specific function.
For example, to make a flip flop different logic gates are needs to be connected in specific
manner.

4
3. Circuit Design:
It involves specifying the interconnection of specific components like resistors, transistors,
diodes, CMOS etc. to create a logic gates.
 Advantages of Digital Systems
1. Digital systems are easier to design

2. Information storage is easy
3. Accuracy and precision are greater
4. Digital systems are more versatile
5. Digital circuits are less affected by noise
6. More digital circuitry can be fabricated on IC chips
 Logic Levels and Different types of Logics
 Digital system use the binary number system. Therefore, two-state devices are used to
represent the two binary digits 1s & 0s by two different voltage levels, called HIGH and LOW.
 Normally, the binary 0 and 1 are represented by the logic voltage levels 0 V and +5 V.
 Usually any voltage between 0 V to 0.8 V represents the logic 0 and any voltage between 2 V
to 5 V represents the logic 1. This voltage levels can be varies according to the different logical
systems.
 There are three types of logics available in digital systems.
1. Positive Logic
2. Negative Logic
3. Mixed Logic
1. Positive Logic:
In positive logic high voltage level is represent as logic 1 and low voltage level is represent as
logic 0.
High (1)
Leading Edge Trailing Edge
Low (0)
Fig. 4.3: Illustration of positive logic
2. Negative Logic:
In positive logic high voltage level is represent as logic 0 and low voltage level is represent as
logic 1.
High (0)
Leading Edge Trailing Edge
Low (1)
Fig. 4.4: Illustration of negative logic

5
3. Mixed Logic:
This scheme uses positive logic in some portions (e.g inputs) of the system while applying
negative logic (e.g. outputs) in other portion of the system.
 Suppose some function X = AB’ + A’B for this function the representation of all the logics are
as follow;
A
B’
X
A’
B
Fig. 4.5: Representation of function X = AB’ + A’B
 Truth table of the given function for all the logics is shown as follow;
Table 4.1: Truth table of Positive logic, Negative logic, Mixed logic for X = AB’ + A’B
Positive Logic Negative Logic Mixed Logic
4.3 NUMBER SYSTEMS:
4.3.1 Introduction to Number System:

 Definition & Importance
 Number system is the basis for counting various items. On hearing the word ‘number’, we
immediately think of the familiar decimal number system with 10 digits 0 to 9. But modern
computers communicate and operate with binary numbers which use only 2 digits 0 & 1. Also
different types of number systems like octal and hexadecimal are also used widely. Depending
upon the type of number system, we use different digits to represent various numbers.
 Few Common Aspects to All Numbering Systems
(i) Base or Radix

The number of symbols used for the representation of numbers in a number system is
known as its Base or Radix and is generally denoted by r.

6
(ii) Digit
Each symbol in the number system is called a Digit.
(iii) The largest value of a digit is always one less than the base
For ex, in decimal system, the largest digit is 9 (since base is 10)
(iv) Each digit position (i.e. place) represents a different multiple of base
This means that the numbers have positional importance. Hence the number systems are
known as Positional Weighted Number System. It means that the value attached to a
symbol depends on its location with respect to the decimal point.
 For example decimal number 123.4 (base 10) can actually be represented as;
(123.4)10 = 1x102 + 2x101 + 3x100 + 4x10-1
 In general, a number of any radix can be expressed as,

Nr = … + D3 x r3 + D2 x r2 + D1 x r1 + D0 x r0 + D-1 x r -1 + D-2 x r -2 + D-3 x r -3 +...
Where;
r is the base and Di is any valid digit in the number system of base r.
 The digits on the left side of the decimal point form the integer part of a number and those on
the right side form the fractional part.
 The left most digit in any number representation, which has the greatest positional weight out
of all the digits present in that number is called the most significant digit (MSD).
 The right most digit in any number representation, which has the least positional weight out of
all the digits present in that number is called the least significant digit (LSD).
 Various Numbering Systems
 Different number systems are used in various applications. The commonly used number
systems along with their base, 1st digit, last digit and available digits are as shown below:
Table 4.2: Illustration of various number system
Sr. Number Base First digit Last All digits

No System digit
1 Binary 2 0 1 0,1
2 Octal 8 0 7 0,1,2,3,4,5,6,7
3 Decimal 10 0 9 0,1,2,3,4,5,6,7,8,9
4 Hexadecimal 16 0 F 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
Note: In hexadecimal number system, meaning of A≈10, B≈11, C≈12, D≈13, E≈14 & F≈15.

7
1. Decimal number system
 Decimal number system is the most familiar no. system used in day-to-day life. The decimal
system consists of 10 unique symbols. Hence the base or radix is 10. It is a positional weighted
system. In this system, any number (integer, fraction or mixed) of any magnitude can be
represented by the use of these ten symbols only.
 The digits on the left side of the decimal point form the integer part of a decimal number while
those on right side from the fractional part. The digits on the right of the decimal point have
weights which are negative powers of 10 and the digits to the left of the decimal point have
weights which are positive powers of 10. The sum of all the digits multiplied by their weights
gives the total number being represented.
 In general, the value of any mixed decimal number

dn dn-1 dn-2 . . . d1 d0 . d-1 d-2 d-3 . . . d-k
is given by
(dn x 10n) + (dn-1 x 10n-1) + . . . + (d1 x 101) + (d0 x 100) + (d-1 x 10-1) + . . + (d-k x 10-k)
 Consider a decimal no. 9256.26. We represent it as:

9256.26 = 9 x 1000 + 2 x 100 + 5 x 10 + 6 x 1 + 2 x (1/10) + 6 x (1/100)
= 9 x 103 + 2 x 102 + 5 x 101 + 6 x 100 + 2 x 10-1 + 6 x 10-2
MSD . . . . 103 102 101 100 10-1 10-2 10-3 . . . . LSD
RADIX POINT
Fig. 4.6: Decimal position values as power of 10
2. BINARY NUMBER SYSTEM
 The binary number system is a positional weighted system. The base or radix of this number
system is 2. Hence, it has two independent symbols. The base itself cannot be a symbol. The
symbols used are 0 & 1. A binary digit is called a bit. A binary number consists of a sequence
of bits, each of which is either a 0 or a 1. The binary point separates the integer and fraction
part. The weight of each bit position is one power of 2 greater than the weight of the position
to its immediate right. The place values left on the binary point in binary are 64, 32, 16, 8, 4,
2 and 1.

8
 In general, the value of any mixed binary number

bn bn-1 bn-2 . . . b1 b0 . b-1 b-2 b-3 . . . b-k
is given by
(bn x 2n) + (bn-1 x 2n-1) + . . . + (b1 x 21) + (b0 x 20) + (b-1 x 2-1) + . . + (b-k x 2-k)
MSB . . . . 23 22 21 20 2-1 2-2 2-3 . . . . LSB
RADIX POINT
Fig. 4.7: Binary position values as power of 2
 Counting in Binary
 Counting in binary is very similar to decimal counting. Start counting with 0, the next count is
1. Moving ahead, we put 1 in the column to the left and continue the counting. Thus, 11 is the
maximum we can count using two bits. Similarly, we can continue counting with 5, 6, ... bits.
Table 4.3: Counting in Binary
Decimal Binary Decimal Binary

Number Number Number Number
0 00000 11 01011
1 00001 12 01100
2 00010 13 01101
3 00011 14 01110
4 00100 15 01111
5 00101 16 10000
6 00110 17 10001
7 00111 18 10010
8 01000 19 10011
9 01001 20 10100
10 01010 21 10101
 Applications
 The binary number system is used in digital computers because the switching circuits used in
these computers use two-state devices such as transistors, diodes, etc. These devices have to
exist in one of the two possible states: ON of OFF, OPEN or CLOSED. So, these two states
can be represented by the symbols 0 and 1, respectively.

9
3. OCTAL NUMBER SYSTEM
 The octal number system was extensively used by early minicomputers. It is also a positional
weighted system. Its base or radix is 8. It has 8 independent symbols 0 to 7.
 Since its base 8 = 23, every 3-bit group of binary can be represented by an octal digit. An octal
number is, thus 1/3 rd. the length of the corresponding binary number.
MSD . . . . 83 82 81 80 8-1 8-2 8-3 . . . . LSD
RADIX POINT
Fig. 4.8: Octal position values as power of 8
Table 4.4: Counting in Octal
Decimal Octal Decimal Octal

0 0 11 13
1 1 12 14
2 2 13 15
3 3 14 16
4 4 15 17
5 5 16 20
6 6 17 21
7 7 18 22
8 10 19 23
9 11 20 24
10 12 21 25
 Usefulness of the Octal System
 In computer work, binary numbers up to 64 bits are not uncommon. These binary numbers do
not always represent a numerical quantity; they often represent some type of code. While
dealing with large binary numbers, it is convenient and more efficient for us to write the
numbers in octal rather than binary. The ease with which conversions can be made between
octal and binary makes the octal system more attractive as a shorthand means of expressing
large binary numbers.

10
4. HEXADECIMAL NUMBER SYSTEM
 Binary numbers are too long. These numbers are fine for machines butt are too lengthy to be
handled by human beings. So, there is a need to represent the binary numbers concisely. One
number system developed with this objective is the hexadecimal number system (or Hex).
Although it is somewhat difficult to interpret than the octal number system, it has become the
most popular means of direct data entry and retrieval in digital systems.
 The hexadecimal number system is positional weighted system. The base or radix is 16 that
means, it has 16 independent symbols. The symbols used are 0 to 9 and A to F. since its base
is 16 = 24, every 4 bit binary digit combination can be represented by one hexadecimal digit.
So, a hexadecimal number is ¼ th the length of the corresponding binary number.
 A 4-bit group is called a nibble. Since computer words come in 8, 16, 32 bits and so on, they
can be easily represented in hexadecimal. The hexadecimal number system is particularly used
for human communications with computers. It is used in both large and small computers.
MSD . . . . 163 162 161 160 16-1 16-2 16-3 . . . LSD
RADIX POINT
Fig. 4.9: Hexadecimal position values as power of 16
Table 4.5: Counting in Hexadecimal
Decimal Hexadecimal Decimal Hexadecimal

0 0 21 15
1 1 22 16
2 2 23 17
3 3 24 18
4 4 25 19
5 5 26 1A
6 6 27 1B
7 7 28 1C
8 8 29 1D
9 9 30 1E
10 A 31 1F
11 B 32 20
12 C 33 21
13 D 34 22
14 E 35 23

11
15 F 36 24
16 10 37 25
17 11 38 26
18 12 39 27
19 13 40 28
20 14 41 29
4.3.2 Number Base Conversions:
 Definition and Importance
 The human beings use decimal number system while computer uses binary number system.
Therefore, it is essential to convert decimal number into its equivalent binary while feeding
number into computer and to convert binary number into its decimal equivalent while
displaying result of operation to the human beings.
 However, dealing with a large quantity of binary numbers of many bits is inconvenient for
human beings. Therefore, octal and hexadecimal numbers are used as a shorthand means of
expressing large binary numbers. Hence inter conversion among different number systems is
required.
 Conversions between Decimal, Binary, Octal and Hexadecimal
 The below table shows the decimal, binary, octal and hexadecimal numbers.
Table 4.6: Conversions between Decimal, Binary, Octal and Hexadecimal
Decimal Binary Octal Hexadecimal

0 0000 0 0
1 0001 1 1
2 0010 2 2
3 0011 3 3
4 0100 4 4
5 0101 5 5
6 0110 6 6
7 0111 7 7
8 1000 10 8
9 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C

12
13 1101 15 D
14 1110 16 E
15 1111 17 F
1. Binary to Decimal Conversion
 Binary numbers can be converted to their decimal equivalents by the positional weights method.
In this method, each binary digit of the number is multiplied by its position weight and the
product terms are added to obtain the decimal number.
Ex 1: Convert (10101)2 to decimal
Solution:
Positional weights are: 24 23 22 21 20
1 0 1 0 1 = (1 x 24) + (0 x 23) + (1 x 22) + (0 x 21) + (1 x 20)
= 16 + 0 + 4 + 0 + 1
= 21
Hence, (10101)2 = (21)10
Ex 2: Convert (11011.101)2 to decimal
Solution:
Positional weights are: 24 23 22 21 20 . 2-1 2-2 2-3
1 1 0 1.1 0 1 = (1 x 24) + (1 x 23) + (0 x 22) + (1 x 21) + (1 x 20) + (1 x 2-1) + (0 x 2-2) +
(1 x 2-3)
= 16 + 8 + 0 + 2 + 1 + 0.5 + 0 + 0.125
= 27.625
Hence, (11011.101)2 = (27.625)10
2. Octal to Decimal Conversion
 To convert an octal number to a decimal number, multiply each digit in the octal number by
the weight of its position and add all the product terms.
Ex 3: Convert (4057.06)8 to decimal
Solution:
Positional weights are: 83 82 81 80 . 8-1 8-2
4057.068 = (4 x 83) + (0 x 82) + (5 x 81) + (7 x 80) + (0 x 8-1) + (6 x 8-2)
= 2048 + 0 + 40 + 7 + 0 + 0.0937

13
= 2095.0937
Hence, (4057.06)8 = (2095.0937)10
3. Hexadecimal to Decimal Conversion
 Multiply each digit in the hex number by its position weight and add all those product terms.
In this way, we get the decimal equivalent of the hexadecimal number
Ex 4: Convert (5C7)16 to decimal
Solution:
Positional weights are: 162 161 160
5C716 = (5 x 162) + (12 x 161) + (7 x 160)
= 1280 + 192 + 7
= 147910
Hence, (5C7)16 = (1479)10
Ex 5: Convert A0F9.0EB16 to decimal
Solution:
Positional weights are: 163 162 161 160.16-1 16-2 16-3
A0F9.0EB16 = (10 x 163) + (0 x 162) + (15 x 161) + (9 x 160) + (0 x 16-1) + (14 x 16-2)
+ (11 x 16-3)
= 40960 + 0 + 240 + 9 + 0 + 0.0546 + 0.0026
= 41209.057210
Hence, (A0F9.0EB)16 = (41209.0572)10
4. Decimal to Binary Conversion
 The conversion of decimal number to binary is carried out in 2 steps. In step 1, we have to
convert integer part and in step 2, we have to convert fractional part.
 For integer part conversion, we use successive division-by-2 method. In this method we
repeatedly divide the integer part of the decimal number by 2 until the quotient is zero. The
remainder of each division becomes the numeral in the new radix. The remainders are taken in
the reverse order to form a new radix number. This means that the first remainder is the LSD
and the last remainder is the MSD in the new radix number. Thus the integers read from bottom
to top give the equivalent binary fraction.

14
 Similarly, for fractional part, we use successive multiplication-by-2 method. In this method,
the number to be converted is multiplied by the radix of new number, producing a product that
has an integer part and a fractional part. The integer part (carry) of the product becomes a
numeral in the new radix number. The fractional part is again multiplied by the radix and this
process is repeated until fractional part reaches 0 or until the new radix number is carried out
to significant digits. The integer part (carry) of each product is read from top to bottom to
represent the new radix number.
Ex 6: Convert 5210 to binary
 Here the number is integer number so we need to divide the given decimal number by 2 and
read the remainders from bottom to top to get the equivalent binary number.
2 52 Remainder
2 26 0
2 13 0
2 6 1
2 3 0
2 1 1
0 1
Hence, (52)10 = (110100)2
Ex 7: Convert (163.875)10 to binary
Solution:
Step 1: Separate the integer and fractional parts of the decimal number. Now for integer part, we
carry successive division-by-2 method as follows:
2 163 Remainder
2 81 1
2 40 1
2 20 0
2 10 0
2 5 0
2 2 1
2 1 0
0 1
So, 16310 = (10100011)2

15
Step 2: Now the fraction part is 0.87510. Carrying out successive multiplication-by-2 as follows:
0.875 x 2 = 1.75 1
0.75 x 2 = 1.5 1
0.5 x 2 = 1.0 1
So, 0.87510 = 0.1112

Hence. (163.875)10 = (10100011.111)2
5. Decimal to Octal Conversion
 Decimal to Octal conversion can be done in similar way as decimal to binary conversion. The
integer and fractional parts are to be separated and the same procedure is carried out. But the
division and multiplication are carried out by 8 as the base of octal number is 8. Following the
same steps, we can get the equivalent octal number of the given decimal number.
Ex 8: Convert 378.9310 to octal
Solution:
Step1: Conversion of integer part by successive division-by-8 method.
8 378 Remainder
8 47 2
8 5 7
0 5
So, (378)10 = (572)8
Step 2: Conversion of fractional part by successive multiplication-by-8 method.
0.93 x 8 = 7.44 7
0.44 x 8 = 3.52 3
0.52 x 8 = 4.16 4
0.16 x 8 = 1.28 1
So, 0.9310 = 0.73418
Hence, (378.93)10 = (572.7341)8
6. Decimal to Hexadecimal Conversion
 Decimal to hexadecimal conversion is carried out by 2 steps. In the first step, the integer part
of the decimal number is divided by 16 successively and the remainder is noted. The

16
remainders read from bottom to top gives the equivalent hexadecimal integer. In the second
step, the successive multiplication of fractional part by 16 is done and the integers are noted
down. Reading the integers from bottom to top gives the hexadecimal fraction.
Ex 9: Convert (3509.75)10 to hexadecimal
Solution:
Step1: Conversion of integer part by successive division-by-16 method
16 3509 Remainder
16 219 5
16 13 11 = B
0 13 = D
So, (3509)10 = (DB5)16
Step 2: Conversion of fractional part by successive multiplication-by-16 method.
0.75 x 16 = 12.0 12 = C
So, (0.75) 10 = (0.C)16

Hence, (3509.75)10 = (DB5.C)16
7. Octal to Binary Conversion
 To convert a given octal number to binary, just replace each octal digit by its 3-bit binary
equivalent.
Ex 9: Convert 367.528 to binary.
Solution:
Given octal number is 3 6 7 . 5 2
Convert each octal digit to binary 011 110 111 . 101 010
Hence, (367.52)8 = (11110111.101010)2
8. Hexadecimal to Binary Conversion
 To convert a given hexadecimal number to binary, just replace each hexadecimal digit by its
4-bit binary equivalent.

17
Ex 10: Convert 4BAC16 to binary.
Solution:
Given hexadecimal number is 4 B A C
Convert each digit to 4-bit binary 0100 1011 1010 1100
Hence, (4BAC)16 = (100101110101100)2
Ex 11: Convert 3A9.B0D16 to binary.
Solution:
Given hexadecimal number is 3 A 9 . B 0 D
Convert each digit to 4-bit binary 0011 1010 1001 . 1011 0000 110
Hence, (3A9.B0D)16 = (1110101001.101100001101)2
9. Binary to Octal Conversion
 To convert a binary number to an octal number, starting from the binary point make groups of
3 bits each, on either side of the binary point and replace each 3-bit binary group by the
equivalent octal digit.
Ex 12: Convert 110101.1010102 to octal.
Solution:
Group of 3 bits are 110 101 . 101 010
Convert each group to octal 6 5 . 5 2
Hence, (110101.101010)2 = (65.52)8
Ex 13: Convert 10101111001.01112 to octal.
Solution:
Group of 3 bits are 10 101 111 001 . 011 1
= 010 101 111 001 . 011 100
Convert each group to octal 2 5 7 1 . 3 4
Hence, (10101111001.0111)2 = (2571.34)8

18
10. Binary to Hexadecimal Conversion
 To convert a binary number to an octal number, starting from the binary point make groups of
4 bits each, on either side of the binary point and replace each 4-bit binary group by the
equivalent hexadecimal digit.
Ex 14: Convert 1011111011.0111112 to hexadecimal.
Solution:
Group of 4 bits are 10 1111 1011 . 0111 11
0010 1111 1011 . 0111 1100
Convert each group to hex 2 F B . 7 C
Hence, (1011111011.011111)2 = (2FB.7C)16
11. Octal to Hexadecimal Conversion
 To convert an octal number to hexadecimal, the simplest way is to first convert the given octal
number to binary and then the binary number to hexadecimal.
Ex 15: Convert 1245 to hex.
Solution:
Given octal number is 1 2 4 5
Convert each octal digit to binary 001 010 100 110
Group of 4 bits are 0010 1010 0110
Convert each 4–bit group to hex 2 A 6
Hence, (1245)8 = (2A6)16
Ex 16: Convert 756.6038 to hex.
Solution:
Given octal number is 7 5 6 . 6 0 3
Convert each octal digit to binary 111 101 110 . 110 000 011

19
Group of 4 bits are 0001 1110 1110 . 1100 0001 1000
Convert each 4–bit group to hex 1 E E . C 1 8
Hence, (756.603)8 = (1EE.C18)16
12. Hexadecimal to Octal Conversion
 To convert hexadecimal number to octal, the simplest way is to first convert the given
hexadecimal number to binary and then the binary number to octal.
Ex 17: Convert B9F.AE16 to octal.
Solution:
Given hex number is B 9 F . A E
Convert each hex digit to binary 1011 1001 1111 . 1010 1110
Group of 3 bits are 101 110 011 111 . 101 011 100
Convert each 3–bit group to octal 5 6 3 7 . 5 3 4
Hence, (B9F.AE)16 = (5637.534)8
13. Any radix r number to Decimal Conversion
 We can convert a given number in radix r to decimal by multiplying each digit by its positional
weights and taking sum of all the products.
Ex 18: Convert 12213 to decimal.
Solution:
Here, the given number is in base 3. Its positional weights are: 33 32 31 30
1 2 2 1 = (1 x 33) + (2 x 32) + (2 x 31) + (1 x 30)
= 27 + 18 + 6 + 1
= 52
Hence, (1221)3 = (52)10
Ex 19: Convert 234.025 to decimal.
Solution:
Here, the given number is in base 5. Its positional weights are: 52 51 50 . 5-1 5-2

20
2 3 4 . 0 2 = (2 x 52) + (3 x 51) + (4 x 50) + (0 x 5-1) + (2 x 5-2)

= 50 + 15 + 4 + 0 + 0.08
= 69.08
Hence, (234.02)5 = (69.08)10
14. Decimal to any radix r Conversion
 Decimal number can be converted in any radix by 2 steps. In step1, the integer part of the
decimal number is divided successively by the radix r and the remainders are noted down.
Taking the remainders from bottom to top gives the radix r equivalent of the integer part.
Similarly, the fractional part is successively multiplied by the radix r and the integer part of
the result is noted down. Noting the carry from top to bottom gives the fractional part
equivalent in radix r.
Ex 20: Convert 1989.3510 to base 12.
Solution:
Step 1: Separate the integer and fractional parts of the decimal number. Now for integer part, we
carry successive division-by-12 method as follows:
12 1989 Remainder
12 165 9
12 13 9
12 1 1
0 1
So, (1989)10 = (1199)12
Step 2: Now the fraction part is 0.3510. Carrying out successive multiplication-by-12 as follows:
0.35 x12 = 4.2 4

0.2 x12 = 2.4 2
0.4 x12 = 4.8 4
So, 0.3510 = 0.42412
Hence. (1989.35)10 = (1199.424)12

21
15. Find the value of unknown base
Ex 21: Determine b if (33)10 = (201)b
Solution:
We have, (33)10 = (201)b
33 = 2 x b2 + 0 x b1 + 1 x b0
= 2b2 + 1
2b2 = 32
b2 = 16
b = ±4
But base of any number cannot be negative. Hence value of b = 4.
Ex 22: Determine b if (193)b = (623)8
Solution:
We have, (193)b = (623)8
1 x b2 + 9 x b1 + 3 x b0 = 6 x 82 + 2 x 81 + 3 x 80
b2 + 9b + 3 = 384 + 16 + 3
b2 + 9b + 3 = 403
b2 + 9b – 400 = 0
b = 16, b = -25
As base is always positive, value of b=16.
16. Binary Coded Decimal (BCD)
 It is a numeric code that is used to represent decimal using binary bits i.e. 1’s and 0’s. It is
different from representation of a decimal number in binary system i.e. base 2 system.
 In BCD representation each digit of a decimal number is represented by a group of four bits.
These bits are given with weights of 8-4-2-1 and hence many a times BCD code is also called
8421 code. Code for each digit of decimal is as follows.
Table 4.7: Conversions between Decimal to BCD code
Decimal BCD code

Digit 8421
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101

22
6 0110
7 0111
8 1000
9 1001
Ex 23: (58)10 = ( )BCD
Solution:
Decimal: 5 8
0101 1000
Thus (58)10 = (01011000)BCD.
 It should be noted that binary representation of (58)10 will be (111010)2 which is quite different
from the BCD representation.
Ex 23: (001001011001)BCD = ()10
Solution:
BCD: 0010 0101 1001
2 5 9
(001001011001)BCD = (259)10
 It can be observed that BCD codes are less efficient for representation compared to binary as
it requires more number of bits then required in binary representation. However, it is popular
because of its ease of conversion to and from decimal.
4.4 LOGIC GATES:
 Logic gates are the fundamental building blocks of digital systems. They are the physical
devices that performs the basic Boolean operations of AND, OR and NOT.
 Input and outputs of logic gates (that is basically a voltage signal) can occur only in two levels.
These two levels are termed as High and Low or True and False or ON and OFF or simply 1
and 0. In representation of higher of the two voltage levels is symbolized as 1 and lower
symbolized as 0 the gate is said to be positive logic gate. However, if higher of the two voltage
levels is symbolized as 0 and lower as 1 then it is said to be negative logic gate.
 Input output behavior of a gate is generally represented using truth table. It is a table that lists
output for all possible combinations of inputs.
 There are total seven logic gates in which three are basic logic gates (AND, OR, NOT) and
two are universal logic gates (NAND, NOR).

23
 Various basic gates are discussed as follows;
1. NOT Gate:
 NOT gate has one inputs and one output. The output becomes logic 1 when input is at logic 0
and output becomes logic 0 when the input is at logic 1. Thus it inverts or complements the
logic available at input and hence called and inverter or complement. It is represented by a
bar over the variable “ ̅ ”or with a symbol “ ’ ”. Thus, for example, X = A΄ or X = A read
as “X is equal to Not A or A bar or A complement”. NOT gate and its truth table are shown in
fig. 4.10.
Fig. 4.10: Illustration of NOT gate
2. AND Gate:
 AND gate means all or nothing logic

 AND gate has two or more inputs and one output. The output becomes logic 1 only when each
one of its input is at logic 1. For all other input combinations it gives output logic 0. It is
represented by a symbol •. Thus, for example, X = A · B (also written simply as X = AB) is
read as “X is equal to A AND B”. Two input AND gate and its truth table is shown in fig. 4.11.

24
Fig. 4.11: Illustration of AND gate
 Operation of AND gate can be understood through the example of two switches connected in
series as shown in fig. 4.11. Here we assume switches A and B to present logic 1 when in ON
condition and logic 0 in OFF condition. Similarly, if lamp is ON we assume logic 1 and in OFF
condition we assume it as logic 0. Then it can be determined that the lamp will be ON (at logic
1) only when both the switches A and B are ON (at logic 1).
3. OR Gate:
 OR gate means any or all logic

 OR gate has two or more inputs and one output. The output becomes logic 1 when at least
(minimum) one of the inputs is at logic 1. It is represented by a symbol +. Thus, for example,
X = A + B is read as “X is equal to A OR B”. Two input AND gate and its truth table is shown
in fig. 4.12.
Fig. 4.12: Illustration of AND gate

25
4. Exclusive OR Gate (EX-OR):
 It also means Inequality detector because it gives output high when both inputs are different.
 Exclusive OR gate give output equal to 1 when the two inputs are exclusively different. This
is the reason why it is also known as inequality gate. The schematic symbol and truth table of
the gate is shown in fig. 4.13. It is represented by a symbol  . Thus, for example, X  A  B
is read as “X is equal to A XOR B.” The logic expression this gate in terms of AND, OR and
NOT operation is X  A  B  AB  AB .
Fig. 4.13: Illustration of EX-OR gate
5. Exclusive NOR Gate (EX-NOR):
 It also means equality detector because it gives output high when both inputs are same.
 Exclusive NOR gate is XOR gate followed by inverter. Thus it is complement of XOR gate.
This is the reason why it is also known as equality gate. The logic symbol, logic expression,
chematic symbol, truth table of the gate is shown in fig. 4.14.
 X = AB + A’B’

26
Fig. 4.14: Illustration of EX-NOR gate
 Universal Gates:
 NAND and NOR gates are known as a universal gates because from this two gates all other
gates can be constructed.
6. NAND Gate:
 NAND gate represents combination of AND gate followed by NOT gate. It represents
complement of AND operation. Schematic symbol of NAND gate and its truth table are shown
in fig. 4.15. The logic expression is given as X  ( A  B) or X = (A·B)’.
Fig. 4.15: Illustration of NAND gate

27
 NAND gate as Universal gate
1. Implementing NOT gate

 All NAND input pins connect to the input signal A gives an output A’.
2. Implementing AND gate

 The AND is replaced by a NAND gate with its output complemented by a NAND gate inverter.
3. Implementing OR gate
 The OR gate is replaced by a NAND gate with all its inputs complemented by NAND gate
inverters.
7. NOR Gate:
 NOR gate represents combination of OR gate followed by NOT gate. It represents complement
of OR operation. Schematic symbol of NOR gate and its truth table are shown in fig. 4.16. The
logic expression is given as X  ( A  B) or X = (A+B)’.

28
Fig. 4.16: Illustration of NOR gate
 NOR gate as Universal gate.
1. Implementing NOT gate

 All NOR input pins connect to the input signal A gives an output A`.
2. Implementing AND gate

 The AND gate is replaced by a NOR gate with all its inputs complemented by NOR gate
inverters.
3. Implementing OR gate
 The OR is replaced by a NOR gate with its output complemented by a NOR gate inverter.
 Gates with More Inputs
 Any logic gates can be designed to accept three or more input values.
 As an example, three-input AND gate produces an output of 1 only if all input values are 1.

29
Fig. 4.17: Illustration of gates with more inputs
 Constructing Gates
 A transistor is a device that acts, depending on the voltage level of an input signal, either as a
wire that conducts electricity or as a resistor that blocks the flow of electricity
 A transistor has no moving parts, yet acts like a switch.
 It is made of a semiconductor material, which is neither a particularly good conductor of
electricity, such as copper, nor a particularly good insulator, such as rubber.
 A transistor is shown in fig. 4.18.
Fig. 4.18: Transistor
 A transistor has three terminals

1. A source
2. A base
3. An emitter, typically connected to a ground wire
 If the electrical signal is grounded, it is allowed to flow through an alternative route to the
ground (literally) where it can do no harm.
 It turns out that, because the way a transistor works, the easiest gates to create are the NOT,
NAND, and NOR gates shown in fig. 4.19.

30
Fig. 4.19: Logic gates using transistor
4.5 BOOLEAN ALGEBRA:
 Inventor of Boolean algebra was George Boole (1815 - 1864).
 Designing of any digital system there are three main objectives;

1. Build a system which operates within given specifications
2. Build a reliable system
3. Minimize resources
 Boolean algebra is a system of mathematical logic.

 Any complex logic can be expressed by Boolean function.
 Boolean algebra is governed by certain rules and laws.
 Boolean algebra is different from ordinary algebra & binary number system.
In ordinary algebra; A + A = 2A and AA = A2, here A is numeric value.
 In Boolean algebra;
A + A = A and AA = A, here A has logical significance, but no numeric significance.
Binary no. system Ordinary no. system Boolean algebra

1 + 1 = 10 1+1=2 1+1=1
 In Boolean algebra there is nothing like subtracting or division, no negative or fractional

numbers.
 Boolean algebra represent logical operation only. Logical multiplication is same as AND
operation and logical addition is same as OR operation.
 Boolean algebra has only two values 0 & 1.
 In Boolean algebra;

31
If A = 0 then A ≠ 1.
If A = 1 then A ≠ 0.
 Let’s introduce Boolean algebra by considering a practical problem
 Suppose a system which transmitting 2 bit binary information over 2 line to another system.
 So with 2 line, 4 unique code could be represented.
 The receiving system may need to identify the presence of certain transmitted codes.
 As an example suppose system is to identify the occurrence of the code representing the
decimal number 1 and 2. Each one of these code appear on the 2 lines, a circuit is to generate
an output 1.
 When any other code present the output should be 0.
 The method of implementing this system is shown in table 4.8.
Table 4.8: Binary to Decimal conversion

Binary Decimal
AB
00 0
01 1
10 2
11 3
 We want output 1 if decimal 1 & 2 otherwise 0 as defined above.

 Below circuit generate output 1 when A = 0 & B = 1 or A = 1 & B = 0.
Fig. 4.20
 Types of logic circuit
 There are two types of logic circuit;

1. Sequential circuit
2. Combinational circuit

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 Difference between combinational & sequential circuit:
Combinational Circuit Sequential Circuit

Output is dependent only on the input at Output is dependent on present input and
the same instant of time past output.
It does not contains memory elements. It contains memory element.
Its behavior is described by the set of Its behavior is described by the set of
output function. next state function and the set of output
function.
No feedback is available. Feedback is available.
It does not contains periodic clock signal. It contains clock signals.
Faster than sequential circuit. Slower than combinational circuit.
e.g. half adder, full adder, etc. e.g. Flip flop, counter, etc.
 Advantages of Boolean Algebra
1. Minimize the no. of gates used in circuit.

2. Decrease the cost of circuit.
3. Minimize the resources.
4. Less fabrication area is required to design a circuit.
5. Minimize the designer’s time.
6. Reducing to a simple form. Simpler the expression more simple will be hardware.
7. Reduce the complexity.
 Axioms of Boolean Algebra
 Axioms or postulate of Boolean algebra are a set of logical expression that we accept without
proof & upon which we can build a set of useful theorems.
Axioms 1: 0 · 0 = 0
Axioms 2: 0 · 1 = 0
Axioms 3: 1 · 0 = 0
Axioms 4: 1 · 1 = 1
Axioms 5: 0 + 0 = 0
Axioms 6: 0 + 1 = 1
Axioms 7: 1 + 0 = 1

33
Axioms 8: 1 · 1 = 1
Axioms 9: 1’ = 0
Axioms 10: 0’ = 1
4.5.1 Laws of Boolean Algebra
1. Complementation Laws:
 The term complement simply means to invert, i.e. to change 0’s to 1’s and 1’s to 0’s.
Law 1: 0’ = 1
Law 2: 1’ = 0
Law 3: If A = 0 then A’ = 1
Law 4: If A = 1 then A’ = 0
Law 5: A’’ = A
2. AND Laws:
Law 1: A · 0 = 0
Law 2: A · 1 = A
Law 3: A · A = A
Law 4: A · A’ = 0
3. OR Laws:
Law 1: A + 0 = A
Law 2: A + 1 = 1
Law 3: A + A = A
Law 4: A + A’ = 1
4. Commutative Laws:
 Commutative laws allow change in position of AND or OR variables.
Law 1: A + B = B + A
Proof:
Fig. 4.21

34
 This law can be extended to any numbers of variables for e.g.

A+B+C=B+A+C=C+B+A=C+A+B
Law 2: A · B = B · A
Proof:
Fig. 4.22
 This law can be extended to any numbers of variables for e.g.

A·B·C=B·A·C=C·B·A=C·A·B
5. Associative Laws:
 The associative laws allow grouping of variables.
Law 1: (A + B) + C = A + (B + C)
Proof:
Fig. 4.23
 This law can be extended to any no. of variables for e.g.

A + (B + C + D) = (A + B + C) + D = (A + B) + (C + D)

35
Law 2: (A · B) · C = A · (B · C)
Proof:
Fig. 4.24
 This law can be extended to any no. of variables for e.g.

A · (B · C · D) = (A · B · C) · D = (A · B) · (C · D)
6. Distributive Laws:
 The distributive laws allow factoring or multiplying out of expressions.
Law 1: A (B + C) = AB + AC
Proof:
Fig. 4.25
Law 2: A + BC = (A + B) (A + C)
Proof: R.H.S. = (A + B) (A + C)
= AA + AC + BA + BC
= A + AC + BA + BC
= A + BC (B’cz 1 + C + B = 1 + B = 1)
= L.H.S.

36
Law 3: A + A’B = A + B
Proof: L.H.S. = A + A’B
= (A + A’) (A + B)
=A+B
= R.H.S.
7. Idempotence Laws:
 Idempotence means the same value.
Law 1: A · A = A
Proof:
Case 1: If A = 0  A · A = 0 · 0 = 0 = A
Case 2: If A = 1  A · A = 1 · 1 = 1 = A
Fig. 4.26
Law 2: A + A = A
Proof:
Case 1: If A = 0  A + A = 0 + 0 = 0 = A
Case 2: If A = 1  A + A = 1 + 1 = 1 = A
Fig. 4.27
8. Complementation Law / Negation Law:
Law 1: A · A’ = 0
Proof:
Case 1: If A = 0  A’ = 1 So, A · A’ = 0 · 1 = 0
Case 2: If A = 1  A’ = 0 So, A · A’ = 1 · 0 = 0
Fig. 4.28
Law 2: A + A’ = 1
Proof:
Case 1: If A = 0  A’ = 1 So, A + A’ = 0 + 1 = 1
Case 2: If A = 1  A’ = 0 So, A + A’ = 1 + 0 = 1

37
Fig. 4.29
9. Double Negation Law:
 This law states that double negation of a variables is equal to the variable itself.
Law 1: A’’ = A
Proof:
Case 1: If A = 0  A’’ = 0’’ = 1’ = A
Case 2: If A = 1  A’’ = 1’’ = 0’ = A
Fig. 4.30
 Any odd no. of inversion is equivalent to single inversion.
 Any even no. of inversion is equivalent to no inversion at all.
10. Identity Law:
Law 1: A · 1 = A
Proof:
Case 1: If A= 1  A · 1 = 1 · 1 = 1 = A
Case 2: If A= 0  A · 0 = 0 · 0 = 0 = A
Fig. 4.31
Law 2: A + 1 = 1
Proof:
Case 1: If A= 1  A + 1 = 1 + 1 = 1 = A
Case 2: If A= 0  A + 0 = 0 + 0 = 0 = A
Fig. 4.32
11. Null Law:
Law 1: A · 0 = 0
Proof:
Case 1: If A= 1  A · 0 = 1 · 0 = 0 = 0
Case 2: If A= 0  A · 0 = 0 · 0 = 0 = 0

38
Fig. 4.33
Law 2: A + 0 = A
Proof:
Case 1: If A= 1  A + 0 = 1 + 0 = 1 = A
Case 2: If A= 0  A + 0 = 0 + 0 = 0 = A
Fig. 4.34
12. Absorption Law:
Law 1: A + AB = A
Proof: L.H.S. = A + AB
= A (1 + B)
= A (1)
=A
R.H.S.
Law 2: A (A + B) = A
Proof: L.H.S. = A (A + B)
= A · A + AB
= A + AB
= A (1 + B)
= A (1)
=A
= L.H.S.
13. Consensus Theorem:
Theorem 1: A · B + A’C + BC = AB + A’C

Proof: L.H.S. = AB + A’C + BC
= AB + A’C + BC (A +A’)
= AB + A’C + BCA + BCA’
= AB (1 + C) + A’C (1 + B)
= AB + A’C
= R.H.S.
 This theorem can be extended as,

AB + A’C + BCD = AB + A’C

39
Theorem 2: (A + B) (A’ + C) (B + C) = (A + B) (A’ + C)

Proof: L.H.S. = (A + B) (A’ + C) (B + C)
= (AA’ + AC + A’B + BC) (B + C)
= (0 + AC + A’B + BC) (B + C)
= ACB +ACC +A’BB + A’BC + BCB + BCC
= ABC + AC + A’B + A’BC + BC + BC
= ABC + AC + A’B + A’BC + BC
= AC (1 + B) + A’B (1 + C) + BC
= AC + A’B + BC …………………………(1)
R.H.S. = (A + B) (A’ + C)
= AA’ + AC + BA’ + BC
= 0 + AC + BA’ + BC
= AC + A’B + BC …………………………(2)
Equation (1) = Equation (2)
So. L.H.S = R.H.S.
 This theorem can be extended to any no. of variables.

(A + B) (A’ + C) (B + C + D) = (A + B) (A’ + C)
14. Transposition theorem:
Theorem: AB + A’C = (A + C) (A’ +B)

Proof: R.H.S. = (A + C) (A’ +B)
= AA’ + AB + CA’ + CB
= 0 + AB + CA’ + CB
= AB + CA’ + CB
= AB + A’C (B’cz of AB + A’C + BC = AB + A’C)
=L.H.S.
15. De Morgan’s Theorem:
Law 1: (A + B)’ = A’ · B’
Proof:
Fig. 4.35

40
Law 2: (A· B)’ = A’ + B’

Proof:
Fig. 4.36
16. Duality Theorem:
 Duality theorem arises as a result of presence of two logic system i.e. positive & negative logic
system.
 This theorem helps to convert from one logic system to another.
 From changing one logic system to another following steps are taken:
1. 0 becomes 1, 1 becomes 0.
2. AND becomes OR, OR becomes AND.
3. ‘+’ becomes ‘·’, ‘·’ becomes ‘+’.
4. Variables are not complemented in the process.

41
4.5.2 Reduction of Boolean Expressions
 Demorganize the following functions:
Ex 24: [(A + B’) (C + D’)]’
Solution:
[(A + B’) (C + D’)]’
= (A + B’)’ + (C + D’)’
= A’ B’’ + C’D’’
= A’B + C’D
Ex 25: [(AB)’ (CD + E’F) ((AB)’ + (CD)’)]’
Solution:
[(AB)’ (CD + E’F) ((AB)’ + (CD)’)]’
= (AB)’’ + (CD + E’F)’ + ((AB)’ + (CD)’)’
= AB + [(CD)’ (E’F)’] + [(AB)’’ (CD)’’]
= AB + (C’ + D’) (E + F’) + ABCD
Ex 26: [(AB)’ + A’ + AB]’
Solution:
[(AB)’ + A’ + AB]’
= AB’’ · A’’ · AB’
= ABA (A’ + B’)
= AB (A’ + B’)
= ABA’ + ABB’
=0
Ex 27: [P (Q + R)]’
Solution:
[P (Q + R)]’
= P’ + (Q + R)’
= P’ + Q’ R’
Ex 28: [(P + Q’) (R’ + S)]’
Solution:
[(P + Q’) (R’ + S)]’
= (P + Q’)’ + (R’ + S)’
= P’ Q’’ + R’’ S’
= P’Q + RS’

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Ex 29: [[(A + B)’ (C + D)’]’ [(E + F)’ (G + H)’]’]’
Solution:
[[(A + B)’ (C + D)’]’ [(E + F)’ (G + H)’]’]’
= [(A + B)’ (C + D)’]’’ + [(E + F)’ (G + H)’]’’
= [(A + B)’ (C + D)’] + [(E + F)’ (G + H)’]
= A’B’C’D’ + E’F’G’H’
 Reducing the following functions:
Ex 30: A [ B + C’ (AB + AC’)’ ]
Solution:
A [ B + C’ (AB + AC’)’ ]
= A [ B + C’ (AB)’ (AC’)’ ]
= A [ B + C’ (A’ + B’) (A’ + C) ]
= A [ B + (A’ C’ + B’ C’) (A’ + C) ]
= A [ B + (A’ C’A’ + B’ C’A’) (A’ C’ C + B’ C’ C) ]
= A [ B + (A’C’ + B’ C’A’) (0 + 0) ]
= A [ B + A’C’ ( 1 + B’) ]
= A [ B + A’C’]
= AB + A’AC’
= AB + 0
= AB
Ex 31: A + B [ AC + (B + C’)D ]
Solution:
A + B [ AC + (B + C’)D ]
= A + B [ AC + (BD + C’D) ]
= A + ABC + BBD + BC’D
= A + ABC + BD + BC’D
= A (1 + BC) + BD (1 + C’)
= A (1) + BD (1)
= A + BD
Ex 32: (A + (BC)’)’ (AB’ + ABC)
Solution:
(A + (BC)’)’ (AB’ + ABC)
= (A’ (BC)’’) (AB’ + ABC)
= (A’BC) (AB’ + ABC)
= A’BCAB’ + A’BCABC
=0+0
=0

43
Ex 33: (B + BC) (B + B’C) (B + D)
Solution:
(B + BC) (B + B’C) (B + D)
= (BB + BB’C + BBC + BCB’C) (B + D)
= (B + 0 + BC + 0) (B + D)
= B (1 + C) (B + D)
= B (B + D)
= BB + BD
= B + BD
= B (1 + D)
=B
Ex 34: AB + AB’C +BC’
Solution:
AB + AB’C +BC’
= A (B + B’C) + BC’
= A (B + B’) (B + C) + BC’
= A (1) (B + C) + BC’
= AB + AC + BC’
= CA + C’B + AB
= CA + C’B (B’cz of Consensus theorem 1)
Ex 35: AB’C + B + BD’ + ABD’ + A’C
Solution:
AB’C + B + BD’ + ABD’ + A’C
= AB’C + B (1 + D’ + AD’) + A’C
= AB’C + B + A’C
= C (A’ + AB’) + B
= C (A’ + A) (A’ + B’) + B
= C (1) (A’ + B’) + B
= C (A’ + B’) + B
= A’C + CB’ + B
= A’C + (C + B) (B’ + B)
= A’C + (B + C) (1)
= A’C + B + C
= C (1 + A’) + B
=B+C
Ex 36: A’B’ + A’B
Solution:
A’B’ + A’B = A’ (B’ + B) = A’

44
Ex 37: A’B’ + AB’
Solution:
A’B’ + AB’
= B’ (A’ + A)
= B’
Ex 38: A’B + AB
Solution:
A’B + AB
= B (A’ + A)
= B (1)
=B
Ex 39: A’B’ + A’B + AB’ + AB
Solution:
A’B’ + A’B + AB’ + AB
= A’ (B’ + B) + A (B’ + B)
= A’ + A
=1
Ex 40: [(A + B) (A’ + B)] + [(A + B) (A + B’)]
Solution:
[(A + B) (A’ + B)] + [(A + B) (A + B’)]
= [AA’ + AB + BA’ + BB] + [AA + AB’ + BA + BB”]
= [0 + AB + A’B + B] + [A + AB’ + AB + 0]
= [B (A + A’ + 1)] + [A (1 + B’ + B)]
=B+A
=A+B
Ex 41: [(A + B’) (A’ + B’)] + [(A’ + B’) (A’ + B’)]
Solution:
[(A + B’) (A’ + B’)] + [(A’ + B’) (A’ + B’)]
= [AA’ + AB’ + B’A’ + B’B’] + [A’A’ + A’B’ + B’A’ + B’B’]
= [0 + AB’ + A’B’ + B’] + [A’ + A’B’ + B’]
= [B’ (A + A’ + 1)] + [A’ + B’(1)]
= B’ + A’ + B’
= A’ + B’

45
Ex 42: (A + B) (A + B’) (A’ + B) (A’ + B’)
Solution:
(A + B) (A + B’) (A’ + B) (A’ + B’)
= (AA + AB’ + BA + BB’) (A’A’ + A’B’ + BA’ + BB’)
= [A (1+ B’ + B)] [A’ (1 + B’ + B)]
= AA’
=0
 Examples of Logic Circuits and Boolean Expressions
Ex 43: For the logic circuit shown fig. 4.37, find the Boolean expression and the truth table.
Identify the gate that given circuit realizes.
Fig. 4.37
Solution:
Here,
Output of OR gate will be (A+B)
Output of NAND gate will be (AB)’
Hence the final out C will be AND of these two outputs
Hence
C = (A+B) · (A·B)’
Truth table for the same can be given in table 4.9.
Table 4.9
Input Output
A B A+B A·B (A·B)’ (A+B) · (A·B)’
0 0 0 0 1 0
0 1 1 0 1 1
1 0 1 0 1 1
1 1 1 1 0 0
From the truth table it is clear that the circuit realizes Ex-OR gate.

46
Ex 44: For the logic circuit shown fig. 4.38, find the Boolean expression.
Fig. 4.38
Solution:
Here,
Output of top AND gate will be AB’
Output of bottom AND gate will be A’B
Hence the final out C will be OR of these two outputs
Hence
C = AB’+A’B
Ex 45: For the logic circuit shown fig. 4.39, find the Boolean expression and the truth table.
Identify the gate that given circuit realizes.
Fig. 4.39
Solution:
Here, bubble indicates inversion.
Hence input of top OR gate is A’ and B’ and hence its output will be A’+B’
Output of bottom OR gate will be A+B
Hence the final output Y will be AND of these two outputs.
Hence,
Y = (A’+B’)(A+B).
Truth table for the same can be given in table 4.10.
Table 4.10
Input Output
A B A’ B’ A’+B’ A+B (A’+B’) (A+B)
0 0 1 1 1 0 0
0 1 1 0 1 1 1
1 0 0 1 1 1 1
1 1 0 0 0 1 0
Note: that circuit in example 44 is same as circuit in this example. This is because NAND gate is
equivalent to Bubbled OR gate.

47
Ex 46: For the given Boolean expression draw the logic circuit.
F = X + (Y’ + Z)
Solution:
The expression primarily involves three operators i.e NOT, AND and OR
To generate Y’ a NOT gate is required.
To generate Y’Z an AND gate is required.
To generate final output OR gate is required.
The circuit can be drawn as shown in fig. 4.40.
Fig. 4.40
4.6 DIFFERENT FORMS OF BOOLEAN ALGEBRA:
 There are two types of boolean form

1. Standard form
2. Canonical form
1. Standard Forms
 In this configuration, the terms that form the function may contain one, two, or any number of
literals.
 There are two types of standard forms: (i) sum of product (SOP) (ii) product of sum (POS).
 Sum of Product (SOP)
 The SOP is a Boolean expression containing AND terms, called product terms, of one or more
literals each. The sum denote the ORing of these terms.
 An example of a function expressed in sum of product is:
F = Y’ + XY + X’YZ’
 Product of Sum (POS)
 The POS is a Boolean expression containing OR terms, called sum terms. Each terms may
have any no. of literals. The product denotes ANDing of these terms.
 An example of a function expressed in product of sum is:
F = X (Y’ + Z) (X’ + Y + Z’ + W)

48
 A Boolean expression function may be expressed in a nonstandard form. For example the
function:
F = (AB + CD) (A’B’ + C’D’)
Above function is neither sum of product nor in product sums. It can be changed to a
standard form by using distributive law as below;
F = ABC’D’ + A’B’CD
2. Canonical Forms
 Any boolean expression can be expressed in Sum of Product (SOP) form or Product of Sum
(POS) form, they are called canonical form.
 SOP - Sum of Product
 A standard SOP form is one in which a no. of product terms, each one of which contains all
the variables of the function either in complemented or non-complemented form, summed
together
 Each of the product term is called MINTERM.
 For minterms,
Each non-complemented variable  1
Each complemented variable  0
 Decimal equivalent is expressed in terms of lower case ‘m’.
 For example,
1. XYZ = 111 = m7
2. A’BC = 011 = m3
3. P’Q’R’ = 000 = m0
4. T’S’ = 00 = m0
5. B’C = 01 = m1
Ex 47: F1 = X’Y’Z + XY’Z’ + XYZ
Solution:
F1 = X’Y’Z + XY’Z’ + XYZ
= 001 + 100 + 111
= m1 + m4 + m7
= Σm (1, 4, 7)
Ex 48: F2 = P’Q’ + PQ
Solution:
F2 = P’Q’ + PQ
= 00 + 11
= m0 + m3 = Σm (0, 3)

49
Ex 49: F3 = XY’ZW + XYZ’W’ + X’Y’Z’W’
Solution:
F3 = XY’ZW + XYZ’W’ + X’Y’Z’W’
= 1011 + 1100 + 0000
= m11 + m12 + m0
= Σm (0, 11, 12)
 POS - Product of Sum
 A standard POS form is one in which a no. of sum terms, each one of which contains all the
variables of the function either in complemented or non-complemented form, are multiplied
together
 Each of the product term is called MAXTERM
 For maxterms,
Each non-complemented variable  0
Each complemented variable  1
 Decimal equivalent is expressed in terms of upper case ‘M’.
 For example,
1. X+Y+Z = 000 = M0
2. P’+Q’+R’ = 111 = M7
3. A’+B+C’+D = 1010 = M10
Ex 50: F1 = (P’+Q) (P+Q’)
Solution:
F1 = (P’+Q) (P+Q’)
= (10) (01) = M2·M1
= ΠM (1, 2)
Ex 51: F2 = (X’+Y’+Z’+W) (X’+Y+Z+W’) (X+Y’+Z+W’)
Solution:
F2 = (X’+Y’+Z’+W) (X’+Y+Z+W’) (X+Y’+Z+W’)
= (1110) (1001) (0101) = M14·M9·M5
= ΠM (5, 9, 14)
Ex 52: F3 = (A’+B+C) (A+B’+C) (A+B+C’)
Solution:
F3 = (A’+B+C) (A+B’+C) (A+B+C’)
= (100) (010) (001)
= M4 M2 M1
= ΠM (1, 2, 4)

50
4.6.1 Minterms & Maxterms for 3 variables
Table 4.11: Representation of Minterms & Maxterms for 3 Variable
4.6.2 Conversion between Canonical forms
 The complement of a function expressed as the sum of minterms equals the sum of minterms
missing from original function
 This is because the original function is expressed by those minterms that make the function
equal to 1, while its complement is 1 for those minterms that the function is 0.
Ex 53: F (A, B, C) = Σ (1, 4, 5, 6, 7)
Solution:
STEP 1:
Take complement of the given function;
F’ (A, B, C) = Σ (0, 2, 3) = (m0 + m2 + m3)’
STEP 2:
Put value of MINTERM in form of variables;
F’= (A’B’C’ + A’BC’ + A’BC)’
= (A+B+C) (A+B’+C) (A+B’+C’)
= M0·M2·M3
= ΠM (0, 2, 3)
In general, mj’ = Mj
Ex 54: F (A, B, C, D) = ΠM (0, 3, 7, 10, 14, 15)
Solution:
STEP 1:
Take complement of the given function;
F’(A,B,C,D)= ΠM(1,2,4,5,6,8,9,11,12,13) = (M1 M2 M4 M5 M6 M8 M9 M11 M12 M13)’

51
STEP 2:
Put value of MAXTERM in form of variables;
F’= [(A+B+C+D’) (A+B+C’+D) (A+B’+C+D) (A+B’+C+D’) (A+B’+C’+D)
(A’+B+C+D) (A’+B+C+D’) (A’+B+C’+D’) (A’+B’+C+D) (A’+B’+C+D’)]’
= (A’B’C’D) + (A’B’CD’) + (A’BC’D’) + (A’BC’D) + (A’BCD’)
(AB’C’D’) + (AB’C’D) + (AB’CD) + (ABC’D’) + (ABC’D)
= m1 + m2 + m4 + m5 + m6 + m8 + m9 + m11 + m12 + m13
= Σm (1, 2, 4, 5, 6, 8, 9, 11, 12, 13)
4.6.3 Convert to Minterms
Ex 55: F = A + B’C
Solution:
A  B & C is missing. So multiply with (B + B’) & (C + C’).
B’C  A is missing. So multiply with (A + A’).
A = A (B + B’) (C + C’)
= (AB + AB’) (C +C’)
= ABC + AB’C + ABC’ + AB’C’
B’C = B’C (A + A’)

= AB’C + A’B’C
So, A + B’C = ABC + AB’C + ABC’ + AB’C’ + AB’C + A’B’C

= ABC + AB’C + ABC’ + AB’C’ + A’B’C
= 111 + 101 + 110 + 100 + 001
= m7 + m6 + m5 + m4 + m1
= Σm (1, 4, 5, 6, 7)
4.6.4 Convert to Maxterms
Ex 56: F = A (B + C’)
Solution:
A  B & C is missing. So add BB’ & CC’.

B + C’  A is missing. So add AA’.
A = A + BB’ + CC’
= (A + B) (A +B’) + CC
= (A + B + CC’) (A + B’ + CC’)
= (A + B + C) (A + B + C’) (A + B’ + C) (A + B’ + C’)
B + C’ = B + C’ + AA’ = (A + B + C’) (A’ + B + C’)

52
So, A (B + C’) = (A + B + C) (A + B + C’) (A + B’ + C) (A + B’ + C’)

(A + B + C’) (A’ + B + C’)
= (A + B + C) (A + B + C’) (A + B’ + C) (A + B’ + C’)
(A’ + B + C’)
= (000) (001) (010) (011) (101)
= ΠM (0, 1, 2, 3, 5)
Ex 57: F = XY + X’Z
Solution:
F = XY + X’Z
= (XY + X’) (XY + Z)
= (X +X’) (Y + X’) (X + Z) (Y + Z)
= (Y + X’) (X + Z) (Y + Z)
X’ + Y = X’ + Y + ZZ’
= (X’ + Y + Z) (X’ + Y + Z’)
= (100) (101)
X + Z = X’ + Z + YY’
= (X + Y + Z) (X + Y’ + Z)
= (000) (010)
Y + Z = Y + Z + XX’
= (X + Y + Z) (X’ + Y + Z)
= (000) (100)
So, F = XY + X’Z
= (100) (101) (000) (010)
= M4 M5 M0 M2
F = ΠM (0, 2, 4, 5)
4.7 SIMPLIFICATION OF LOGICAL FUNCTION USING KARNAUGH

MAP (K-MAP):
4.7.1 Karnaugh Map (k-map) Introduction
 A Boolean expression may have many different forms.

 With the use of K-map, the complexity of reducing expression becomes easy and Boolean
expression obtained is simplified.
 K-map also be said as pictorial form of truth table.

53
 K-map is alternative way of simplifying logic circuits.

 Instead of using Boolean algebra simplification techniques, you can transfer logic values from
a Boolean statement or a truth table into a Karnaugh map (k-map)
 Tool for representing Boolean functions of up to six variables.
 K-maps are tables of rows and columns with entries represent 1’s or 0’s of SOP and POS
representations.
 K-map cells are arranged such that adjacent cells correspond to truth rows that differ in only
one bit position (logical adjacency)
 K-Map are often used to simplify logic problems with up to 6 variables
 No. of Cells = 2n, where n is a number of variables.
 The Karnaugh map is completed by entering a ‘1’ (or ‘0’) in each of the appropriate cells.
 Within the map, adjacent cells containing 1's (or 0’s) are grouped together in twos, fours, or
eights and so on.
4.7.2 2 variable k-map
 For 2 variable k-map, there are 22 = 4 input combinations.

 If A & B are two variables then;
SOP  Minterms  A’B’ (m0, 00) ; A’B (m1, 01) ; AB’ (m2, 10) ; AB (m3, 11)
POS  Maxterms  A + B (M0, 00) ; A + B’ (M1, 01) ; A’ + B (M2, 10) ; A’ + B’ (M3, 11)
 Mapping of SOP Expression:

B
B’ B B
0 1 B’ B
A
A 0 1
A’ 0 A’B’ A’B m0 m1
0 1 A’ 0
0 1
A 1 AB’ AB A 1
m2 m3
2 3 2 3
Fig. 4.41: Mapping of SOP form for two variable K-Map
 1 in a cell indicates that the minterm is included in Boolean expression.

 For e.g. if F = ∑m (0, 2, 3), then 1 is put in cell no. 0, 2, 3 as shown below.
B
B’ B
A 0 1
A’ 0 1 0
0 1
A 1 1 1
2 3
Fig. 4.42

54
Ex. 58: Map for a 2-input OR gate.
Fig. 4.43
Ex. 59: Map for a 2-input EX-OR gate.
Fig. 4.44
F = A’B’ + AB
 Map following SOP expressions:
Ex. 60: F = AB
Solution:
B
B’ B
A 0 1
A’ 0 0 0
0 1
A 1 0 1
2 3
Fig. 4.45

55
Ex. 61: F = AB’ + A’B +A’B’
Solution:
B
B’ B
A 0 1
A’ 0 1 1
0 1
A 1 1 0
2 3
Fig. 4.46
Ex. 62: F (A, B) = ∑ (0, 2)
Solution:
B
B’ B
A 0 1
A’ 0 1 0
0 1
A 1 1 0
2 3
Fig. 4.47
Ex. 63: F = m0 + m1
Solution:
B
B’ B
A 0 1
A’ 0 1 1
0 1
A 1 0 0
2 3
Fig. 4.48

56
 Map following POS expressions:
B
B B B’
B B’ A 0 1
A 0 1
A 0 A+B A+B’ A 0 M0 M1
0 1
0 1
A’ 1 A’+B A’+B’
M2 M3
A’ 1
2 3 2 3
Fig. 4.49: Mapping of POS form for two variable K-Map
 0 in a cell indicates that the maxterm is included in Boolean expression.

 For e.g. if F = Π M (0, 2, 3), then 0 is put in cell no. 0, 2, 3 as shown below.
B
B’ B
A 0 1
A’ 0 0 1
0 1
A 1 0 0
2 3
Fig. 4.50
Ex 64: F (A, B) = (A+B) (A’+B)
Solution:
B
B B’
A 0 1
A 0 0 1
0 1
0 1
A’ 1
2 3
Fig. 4.51

57
Ex 65: F = M0·M1·M2
Solution:
B
B B’
A 0 1
A 0 0 0
0 1
0 1
A’ 1
2 3
Fig. 4.52
Ex 66: F = ΠM (1, 3)
Solution:
B
B B’
A 0 1
A 0 1 0
0 1
1 0
A’ 1
2 3
Fig. 4.53
 Reduce following SOP expressions:
Ex 67: F = m0 + m1
Solution:
B
B’ B
A 0 1
A’ 0 1 1
0 1
A 1 0 0
2 3
Fig. 4.54
F = A’

58
Ex 68: F = A’B’ + AB’
Solution:
B
B’ B
A 0 1
A’ 0 1 0
0 1
A 1 1 0
2 3
Fig. 4.55
F = B’
Ex 69: F = Σ (1, 3)
Solution:
B
B’ B
A 0 1
A’ 0 0 1
0 1
A 1 0 1
2 3
Fig. 4.56
F=B
Ex 70: F = m0 + m3
Solution:
Fig. 4.57
F = A’B’ + AB

59
Ex 71: F = ∑m (0, 1, 2, 3)
Solution:
B
B’ B
A 0 1
A’ 0 1 1
0 1
A 1 1 1
2 3
Fig. 4.58
F=1
 Reduce following POS expressions:
Ex 72: F = Π (0, 2, 3)
Solution:
B
B B’
A 0 1
A 0 0 1
0 1
0 0
A’ 1
2 3
Fig. 4.59
F = A’B
Ex 73: F = (A+B) (A’+B) (A+B’)
Solution:
B
B B’
A 0 1
A 0 0 0
0 1
0 1
A’ 1
2 3
Fig. 4.60
F = AB

60
Ex 74: F = M3·M1·M2
Solution:
B
B B’
A 0 1
A 0 1 0
0 1
0 0
A’ 1
2 3
Fig. 4.61
F = A’B’
Ex 75: F = m2 + m3
Solution:
F = m2 + m3 = Π (0, 1)
B
B B’
A 0 1
A 0 0 0
0 1
1 1
A’ 1
2 3
Fig. 4.62
F=A
Ex 76: F = ΠM (0, 1, 2, 3)
Solution:
B
B B’
A 0 1
A 0 0 0
0 1
0 0
A’ 1
2 3
Fig. 4.63
F=0

61
 Reduce following SOP expression:
 For 3 variables, in SOP form there are 8 combinations as follow;
Table 4.12
A’B’C’ (m0, 000)

A’B’C (m1, 001)
A’BC’ (m2, 010)
A’BC (m3, 011)
AB’C’ (m4, 100)
A’BC’ (m5, 101)
A’B’C (m6, 110)
ABC (m7, 111)
 For the case of 3 variables, we form a map consisting of 23=8 cells as shown in Figure
Fig. 4.64: Mapping of SOP form for 3 variable K-Map

62
Ex 77: F = A’B’C’ + ABC + A’BC’
Solution:
Fig. 4.65
F = A’B’C + ABC + A’BC’
Ex 78: F = Σ (1, 6, 7)
Solution:
Fig. 4.66
F = A’B’C + AB
Ex 79: F = A’B’C’ + ABC’ + AB’C’ + A’BC
Solution:
Fig. 4.67
F = B’C’ + AC’ + A’BC

63
Ex 80: F = Σm (0, 1, 2, 4, 5, 6)
Solution:
Fig. 4.68
F = B’ + C’
Ex 81: F = m3 + m4 +m6 + m7
Solution:
Fig. 4.69
F = BC + AC’
Ex 82: F = Σm (3, 7, 1, 6, 0, 2, 5, 4)
Solution:
Fig. 4.70
F=1

64
 Reduce following POS expression
 For 3 variables, in POS form there are 8 combinations as follow;
Table 4.13
A+B+C (M0, 000)

A + B + C’ (M1, 001)
A + B’ + C (M2, 010)
A + B’ + C’ (M3, 011)
A’ + B + C (M4, 100)
A’ + B + C’ (M5, 101)
A’ + B’ + C (M6, 110)
A’ + B’ + C’ (M7, 111)
 For the case of 3 variables, we form a map consisting of 23=8 cells as shown in Figure
Fig. 4.71: Mapping of POS form for 3 variable K-Map
Ex 83: F = (A’+B’+C’) (A’+B+C’)
Solution:
Fig. 4.72
F = (A’ + C’)

65
Ex 84: F = ΠM (1, 2, 5)
Solution:
Fig. 4.73
F = (B + C’) (A + B + C)
Ex 85: F = M0·M3·M7
Solution:
Fig. 4.74
F = (A + B + C) (B’ + C’)
Ex 86: F = (A+B+C) (A+B’+C’) (A’+B+C)
Solution:
Fig. 4.75
F = (B + C) (A + B’ + C’)

66
Ex 87: F = ΠM (5, 7, 0, 3, 2, 4, 6, 1)
Solution:
Fig. 4.76
F=0
 Reduce following SOP expression:
 For 4 variables, 24 = 16 combinations are available;
Fig. 4.77: Mapping of SOP form for 4 variable
 Looping:
 Looping Groups of Two:

67
Fig. 4.78: Looping groups of two
 Looping Groups of Four:
Fig. 4.79: Looping groups of four

68
 Looping Groups of Eight:
Fig. 4.80: Looping groups of eight
Ex 88: Solve following examples.

69
Fig. 4.81
Ex 89: ∑ (0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14)
Solution:
Fig. 4.82
F = C’ + A’D’ + BD’

70
Ex 90: A’B’C’ + B’CD’ + A’BCD’ + AB’C’
Solution:
Fig. 4.83
F = B’C’ + B’D’ + A’CD’
Ex 91: ∑ (0, 1, 2, 3, 5, 7, 8, 9, 12, 13)
Solution:
Fig. 4.84
F = A’B’ + AC’ + A’D
Ex 92: ∑ (0, 1, 3, 4, 5, 6, 7, 13, 15)
Solution:
Fig. 4.85
F = A’C’ + A’D + BD + A’B

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Ex 93: ∑m (5, 6, 7, 9, 10, 11, 13, 14, 15)
Solution:
Fig. 4.86
F = BD + BC + AD + AC
 Reduce following POS expression:

 For 4 variables, 24 = 16 combinations are available;
Fig. 4.87: Mapping of POS form for 4 variable K-Map
Ex 94: ΠM (0, 1, 2, 5, 7, 8, 9, 10, 14, 15)
Solution:
Fig. 4.88
F = (B + D) (B + C) (A + B’ + D’) (A’ + B’ + C’)

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Ex 95: M1 M3 M4 M7 M9 M11 M12 M14 M15
Solution:
Fig. 4.89
F = (B’ + D) (C’ + B’) (D’ + B)
 Don’t Care Combinations:
Ex 96: ∑m (1, 5, 6, 12, 13, 14) + d (2, 4)
Solution:
Fig. 4.90
F = BC’ + BD’ + A’C’D
Ex 97: ΠM (4, 7, 10, 11, 12, 15) · d (6, 8)
Solution:

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Fig. 4.91
F = (B’ + C + D) (B’ + C’ + D’) (A’ + B + C’)
4.8 BINARY ADDERS:
 Binary adders are of two types;

1. Half adder
2. Full adder
4.8.1 Half adder
 A binary adder adds two binary bits. Block diagram of half adder is shown in fig. 4.92.
A Sum (S)
Half
Inputs Outputs
Adder
B Carry(C)
Fig. 4.92: Block diagram of half adder
 There are two input terminals, which are marked as A and B. Binary numbers, the sum of
which has to be made are applied here. There are two output terminals. One terminal is for
sum bit S and the other is the carry bit C. Truth table of half adder is shown in table 4.13
Table 4.13: Truth table for half adder
Inputs Outputs
A B S (Sum) C (Carry)
0 0 0 0
1 0 1 0
0 1 1 0
1 1 0 1

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 From truth table we can write the expression for sum S and carry C.
 For sum and carry summing up input combinations for which the output is 1.
S = A’B + AB’
C = AB
 It is seen that the sum S can be realized by EX-OR gate and carry C can be realized by an
AND gate. Such circuit is shown in Fig. 4.93
Fig. 4.93: Circuit of half adder
4.8.2 Full adder
 Full adder is made up of two half adder and OR gate.

 It has three inputs and two output.
 It can able to add 3 digit at a time.
 Fig. 4.94 shows the full adder logic circuit using half adder and OR gate.
Fig. 4.94: Block diagram of full adder
Table 4.14: Truth table for full adder

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 For sum and carry summing up input combinations for which the output is 1.
S = A XOR B XOR Cin
C = (A XOR B) Cin + AB
Fig. 4.95: Circuit diagram of full adder
4.8.3 Comparison between Half Adder & Full adder
Half Adder Full Adder

It is used for 1 bit addition. It is used for multi bit addition.
One EX-OR gate and one AND gate are used. Two EX-OR gates, two AND gates and one
OR gate are used.
Output is the sum of two signal. Output is the sum of three signal.
Circuit is simple. Circuit is complicated.
There are two input and output terminals. There are three input and output terminals.
It can not be used as full adder. It can be used as half adder.
4.9 ENCODER:
 Encoding is the process of forming an encoded representation of a set of inputs.

 An encoder is a combinational network that generates an n-bit binary code that uniquely
identifies the one out of m activated inputs (0 ≤ m ≤ 2n − 1).
Block diagram Truth table
Fig. 4.96: Block diagram & Truth table of the 8 to 3 encoder

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Fig. 4.97: Circuit diagram of the 8 to 3 encoder
 Notice that only one of the eight inputs is allowed to be activated at any given time. The logic
diagram for the 8-to-3 encoder is shown in Fig. 4.97.
4.10 DECODER:
 An n-bit binary code is capable of encoding up to 2n distinct elements of information.

 A decoder is a combinational network that decodes (converts) the n-bit binary-coded input to
m outputs (m ≤ 2n).
Block diagram Truth table

Fig. 4.98: Block diagram & Truth table of the 3 to 8 decoder
 The block diagram of a 3-bit to 8-element decoder is shown in Fig. 4.98, where the three inputs
are decoded into eight outputs, one for each combination of the input variables.
 In the truth table, observe that for each input combination, there is only one output that is equal
to 1 (i.e., each combination selects only one of the eight outputs).

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Fig. 4.99: Circuit diagram of the 3 to 8 decoder
 Decoding is so common in digital design that decoders are commercially available as MSI
(medium-scale integration) packages in the form of 2-to-4, 3-to-8, and 4-to-10 decoders.
Integrated circuits for decoders are available in different forms.
4.11 MULTIPLEXER:
 A multiplexer is a data selector.

 A multiplexer is a combinational network that selects one of several possible input signals and
directs that signal to a single output terminal. The selection of a particular input is controlled
by a set of selection variables.
 A multiplexer with n selection variables can usually select one out of 2n input signals.
Block diagram of a 4-to-1 multiplexer Truth table

Fig. 4.100: Block diagram & Truth table of the multiplexer

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Fig. 4.101: Circuit diagram of the 4 to 1 multiplexer
 Boolean expression Y = S0’ S1’ I0 + S0 S1’ I1 + S0 S1’ I2 + S0 S1 I3

 Notice that each of the four inputs (I0, I1, I2, and I3) is selected by S1 and S0, and directed to the
output Q. In general, only the input whose address is given by the select lines is directed to the
output. The logic diagram is shown in Fig. 4.101.
 2 to 1, 4 to 1, 8 to 1 and 16-to-1 multiplexers are commercially available as MSI packages.
4.12 DEMULTIPLEXER:
Fig. 4.102: Block diagram of the demultiplexer
 It has one input common data, ‘n’ select lines and ‘m’ output lines
 A demultiplexer performs the reverse operation of a multiplexer i.e. it receives one input and
distributes it over several outputs
 At a time only one output line is selected by the select lines and the input is transmitted to the
selected output line
 Relation between ‘n’ output lines and m select lines is as follows :
n = 2m

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 1 to 4 Demultiplexer has one data input F; select line inputs a, b and four outputs A, B, C & D
 The select lines control the data to be routed. It helps in selecting the output on which the data
will be routed.
 Based on the switch control, the input is routed to particular output.
Select Line
Output Line
b a
0 0 A
0 1 B
1 0 C
1 1 D
Fig. 4.103 (A): Switch representation & Truth table of 1 to 4 demultiplexer
Boolean Equation
A = Fb′a′; B = Fb′a;
C = Fba′; D = Fba;
Working
 When ab = “00”, the input data F is routed to the output A

 When ab = “01”, the input data F is routed to the output B
 When ab = “0”, the input data F is routed to the output C
 When ab = “11”, the input data F is routed to the output D
Fig. 4.103 (B): Representation of working of the 1 to 4 demultiplexer

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Fig. 4.104: Circuit diagram of 1 to 4 demultiplexer
Ex 4.98: A table of minterms for three variables is as follows:
Implement the following Boolean functions by using one 3-to-8 decoder and three three-input OR
gates:

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Solution:
4.13 SEQUENTIAL BLOCKS:
 The output of a sequential block depends not only on the present inputs but also on inputs at
earlier times.
 Sequential blocks have this kind of memory, and some of them are used as computer memories.
 Most sequential blocks are of the kind known as multivibrators, which can be
1. Monostable - the switch remains in only one of its two positions.
2. Bistable - the switch will remain stable in either of its two positions.
3. Unstable - the switch changes its position continuously as a kind of oscillator, being
unstable in both of its two states.
 The most common sequential block is the flip-flop, which is a bistable circuit that remembers
a single binary digit according to instructions.
 Flip-flops are the basic sequential building blocks. Various types of flip-flops exist, such as
the SR flip flop (SRFF), D flip-flop (or latch), and JK flip-flop (JKFF), which differ from
one another in the way instructions for storing information are applied.
4.13.1 SR FLIP-FLOP (SRFF)
 The symbol for the SRFF is shown in Fig. 4.105 (a), in which S stands for “set,” R stands for
“reset” on the input side, and there are two outputs, the normal output Q and the complementary
output Q . The operation of the SRFF can be understood by the following four basic rules.
(a) Block diagram (b) Truth table

Fig. 4.105: Block diagram & Truth table of the SR flip-flop

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 If S = 1 and R = 0, then Q = 1 regardless of past history. This is known as the set condition.
 If S = 0 and R = 1, then Q = 0 regardless of past history. This is known as the reset condition.
 If S = 0 and R = 0, then Q does not change and stays at its previous value. This is a highly
stable input condition.
 The inputs S = 1 and R = 1 are not allowed (i.e., forbidden) because Q Q = 11; Q is no longer
complementary to Q. This is an unacceptable output state. Such a meaningless instruction
should not be used.
 Fig. 4.106 summarizes the specification for an SRFF in terms of a truth table, in which Qn is
the state of the circuit before a clock pulse and Qn+1 is the state of the circuit following a clock
pulse.
Fig. 4.106: Circuit diagram of the SR flip-flop
 Flip-flops can be constructed using combinations of logic blocks. The realization of an SRFF
can be achieved from two NAND gates (plus two inverters), as shown in Fig.4.106.
 Edge triggered SRFF symbols are illustrated in Fig. 4.107. The triangle on the Ck (clock) input
indicates that the flip-flop is triggered on the edge of a clock pulse.
 Edge triggered SRFF:
(a) (b)
Fig. 4.107: (a) Triggered on positive edge of clock pulse. (b) Triggered on negative edge of
clock pulse

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Ex 4.99: The inputs to an SRFF are shown in Fig. 4.108 Determine the value of Q at times t1,
t2 and t3.
Fig. 4.108
Solution:
Notice that the value of Q at time t0 is not given; however, it is not necessary to have this
information. The first pulse of S sets the SRFF in the state Q = 1. Thus at t = t1, Q = 1. While the
second pulse of S tries again to set the SRFF, there will be no change since Q was already 1. Thus
at t = t2, Q = 1. The pulse of R then resets the SRFF and then at t = t3, Q = 0.
4.13.2 D FLIP-FLOP (LATCH OR DELAY ELEMENT)
 The symbol and circuit diagram for the clocked D flip-flop is shown in Fig. 4.109, in which
the two output terminals Q and Q behave just as in the SRFF, and the input terminals are D
and Ck (clock).
 The term clocked flip-flop indicates that this device cannot change its state (i.e., Q cannot
change) unless a specific change instruction is given through the clock (Ck) input.
(a) Symbol (b) Q for various inputs D
Fig. 4.109: (a) Symbol of D flip-flop (b) Truth table of D flip-flop (c) Circuit Diagram of D
flip-flop

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 The value of Q after the change instruction is equal to the value of D at the time the change
instruction is received. The value of Q before the change instruction does not matter. Fig. 4.109
(b) illustrates the values taken by Q after the change instruction for various inputs D and prior
values of Q.
 While there are several variations of the device, in the rising-edge triggered flip-flop a change
instruction is effected whenever the Ck input makes a change from 0 to 1.
 Propagation delay: which means that there is a small delay (about 20 ns) between the change
instruction and the time Q actually changes. The value of D that matters is its value when the
change instruction is received, not its value at the later time when Q changes.
 Timing diagram: A timing diagram depicts inputs and outputs (as a function of time) of the
flip-flop (or any other logic device) showing the transitions that occur over time.
Ex 4.100: The positive-edge triggered D flip-flop is given the inputs shown in below fig. 4.110,
with a zero initial value of Q. Draw the timing diagram.
Solution:
4.13.3 JK Flip-Flop (JKFF)
(a) (b) (c)

Fig. 4.110: (a) Block diagram (b) Truth table & (c) Circuit diagram for JK flip-flop

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 The JKFF differs from an SRFF in that output Q is fed back to the K-gate input and, Q to the
J-gate input. Assuming Q Q = 01, gate B is disabled by Q = 0 (i.e., F =1).
 The only way to make the circuit changeover is for gate A to be enabled by making J = 1 and
Q = 1 (which it is already). Then when Ck = 1, all inputs to gate A are 1 and E goes to zero,
which makes Q = 1. With Q and F both equal to 1, Q = 0, so the flip-flop has changed state.
 Note that the input condition JK = 11 is allowed, and in this condition, when the flip-flop is
clocked, the output always changes state; thus it is said to toggle.
 If the clock pulse is short enough to permit the flip-flop to change only once, the JKFF operates
well. However, with modern high-speed ICs a race is more likely to occur.
 Race around Condition: It is a condition, in which two pulses are intended to arrive at a
destination gate in some specific order, but due to each one racing through different paths in
the logic with a different number of gates, the propagation delays stack up differently and the
timing order is lost.
 This can be eliminated by introducing delays in the feedback paths between outputs (Q and
Q ) and inputs (J and K). A better solution to the problem is the master–slave JKFF.
 MASTER–SLAVE JK FLIP-FLOP
 Fig. 4.111 illustrates a master–slave JKFF, in which gates A, B, C, and D form the master flip-
flop and T, U, V, and W form the slave.
Fig. 4.111: Master–slave JK flip-flop
 The output of the master–slave JKFF can be predicted for all combinations of J and K and for
any duration of clock pulse. Thus it is the most versatile and universal type of flip-flop. SRFFs
are also available in master–slave configuration.
 Ck = 1 Enables the Master & Disables the Slave.

 Ck = 0 Disables the Master & Enables the Slave.

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 Ck = 1 enables the master; ̅̅̅̅

𝐶𝑘 = 0 disables the slave. Let Q Q = 10 and JK = 11 before the
occurrence of a clock pulse. B is enabled by Q = 1 so that when the clock pulse arrives (i.e.,
Ck = 1), F goes to zero and ̅̅̅̅
𝑄𝑀 to 1. Now with E = 1 and ̅̅̅̅𝑄𝑀 = 1, QM goes to zero so that the
master has been reset.
 However, the slave remains disabled until Ck goes to zero. Note that the slave, at this stage, is
essentially an SRFF with inputs S and R equal to QM and ̅̅̅̅ 𝑄𝑀 , respectively. Thus, when Ck
̅̅̅̅
goes to zero, 𝐶𝑘 goes to 1 and the slave is now reset by its inputs QM ̅̅̅̅
𝑄𝑀 = 01. But the feedback
to J and K cannot cause a race because, with Ck = 0, the master is disabled.
 Using this configuration race around condition will be not taking place because at any clock
duration only one (master or slave) drives output.
4.14 SHIFT REGISTERS:
 A register (Shift register) is a collection of flip flops (and some basic combinational gates to
perform different binary arithmetic and logic operations), where each flip-flop is used to store
1 bit of information.
 JKFFs and SRFFs are also used in shift-register construction.
4.14.1 Types of Shift Registers
 Fig. 4.112 shows the block diagram of a 4-bit shift-right register that uses D flip-flops. JKFFs
and SRFFs are also used in shift-register construction.
 Observe in the timing diagram, each successive clock pulse transfers (or shifts) the data bit
from one flip-flop to next one to right and appear at the output in serial form. The shift register
is then known as a serial-in serial-out (SISO) shift register.
Fig. 4.112: Block diagram of a 4-bit SISO shift-right register

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Fig. 4.113: Timing diagram
 PISO (parallel-in serial-out), SIPO (serial-in parallel-out), and PIPO (parallel-in

parallel-out) shift registers are also often used to read in the input data and read out the output
data in a convenient way that is needed for the operations involved.
Fig. 4.114: Parallel in Serial out (PISO) shift register
Fig. 4.115: Serial in parallel out (SIPO) shift register

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Fig. 4.116: Parallel-in parallel-out (PIPO) shift registers
 Right-shifting registers are employed in multiplication algorithms, whereas left-shifting

registers are utilized in division algorithms.
 Bidirectional shift registers: - Registers that are capable of shifting the data to the left or right
are known as bidirectional shift registers.
 Universal register: - The register along with additional gates on a single chip forms an IC
component known as the universal register, which usually includes the shift-left, shift-right,
parallel-input, and no-change operations.
Ex 4.101: Given the block diagram for a 4-bit shift-left register shown in below Figure, draw
the output (Q0, Q1, Q2, Q3, and data out) as a function of time for the clock, clear, and data-
in signals given in below Figure.
(a)
(b)

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Solution:
4.15 COUNTERS:
 The shift register can be used as a counter because the data are shifted for each clock pulse. A
counter is a register that goes through a predetermined sequence of states when input pulses
are received. Besides, computers, timers, frequency meters, and various other digital devices
contain counters for counting events. There are mainly types discussed below.
4.15.1 Asynchronous/Ripple counters
 Output of each flip-flop activates the next flip-flop throughout the entire sequence of the
counter’s states.
Fig. 4.117: Block diagram of a 3-bit Asynchronous /ripple counter using JKFFs

90
Fig. 4.118: Timing Diagram & Output for 8 clock pulses
 Notice from the timing diagram that the output Q0 of the leftmost flip-flop will change its state
at every clock pulse if the clear signal equals zero.
 The output Q1, controlled by Q0, will change its state every time Q0 changes from 0 to 1.
Similarly Q2 is controlled by Q1.
 Outputs for the first 8 clock pulses shown in fig. 4.118 Observe that a 3-bit counter will cycle
through 8 states, 000 through 111. An n-bit ripple counter, in general, will cycle through 2n
states; it is known as a divide-by-2n counter or modulo-2n binary counter.
 Taking the outputs from Q2 Q1 Q0, the counter becomes an up-counter; taking the outputs
from 𝑄̅ 2 𝑄̅ 1 𝑄̅ 0 the counter becomes a down-counter, which counts down from a preset number.
 The slow speed of operation, caused by the long time required for changes in state to ripple
through the flip-flops, is a disadvantage of ripple counters.
4.15.2 Synchronous/Parallel counter
 In Synchronous Counter, the external clock signal is connected to the clock input of each
individual flip-flop within the Counter so that all of the flip-flops are clocked together
simultaneously and in parallel at the same time giving a fixed time relationship. In other words,
changes in the output occur in “synchronisation” with the clock signal.
 The result of this synchronisation is that all the individual output bits changing state at exactly
the same time in response to the common clock signal with no ripple effect and therefore, no
propagation delay.
 Slow speed of operation problem is overcome by using synchronous converters. However,
additional control logic is needed to determine which flip-flops, if any, must change state, since
flip-flops are triggered simultaneously.

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Fig. 4.119: 4-bit binary synchronous counter
 It can be seen that the external clock pulses (pulses to be counted) are fed directly to each J-K
flip-flop in the counter chain and that both the J and K inputs are all tied together in toggle
mode, but only in the first flip-flop, flip-flop A (LSB) are they connected HIGH, logic “1″
allowing the flip-flop to toggle on every clock pulse. Then the synchronous counter follows a
predetermined sequence of states in response to the common clock signal, advancing one state
for each pulse.
 The J and K inputs of flip-flop B are connected to the output “Q” of flip-flop A, but
the J and K inputs of flip-flops C and D are driven from AND gates which are also supplied
with signals from the input and output of the previous stage.
 If we enable each J-K flip-flop to toggle based on whether or not all preceding flip-flop outputs
(Q) are “HIGH” we can obtain the same counting sequence as with the asynchronous circuit
but without the ripple effect, since each flip-flop in this circuit will be clocked at exactly the
same time.
 Then as there is no inherent propagation delay in synchronous counters, because all the counter
stages are triggered in parallel at the same time, the maximum operating frequency of this type
of frequency counter is much higher than that for a similar asynchronous counter circuit.
Fig. 4.120: Timing Diagram of 4-bit binary synchronous counter

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 Because this 4-bit synchronous counter counts sequentially on every clock pulse the resulting
outputs count upwards from 0 (“0000″) to 15 (“1111″). Therefore, this type of counter is also
known as a 4-bit Synchronous Up Counter.
4.15.3 Ring counter
 As in a synchronous counter, all flip-flops are triggered simultaneously. However, the output
of each flip-flop drives only an adjacent flip-flop. A single pulse propagates through the ring
in a ring counter, whereas all remaining flip-flops are at the zero state.
Fig. 4.121: 4-bit (modulo-4) ring counter
 Some counters are also programmable. Fig. 4.121 shows a 4-bit (modulo-4) ring counter using
D flip-flops; its timing diagram is given in Fig. 4.122.
Fig. 4.122: Timing diagram 4-bit (modulo-4) ring counter
 A modulo-n ring counter requires N flip-flops and no other gates, whereas modulo-N ripple
and synchronous counters need only log2 N flip-flops. However, ripple and synchronous
counters generally use more components than ring counters.
Ex 101: The block diagram for a 3-bit ripple counter is shown in Figure. Obtain a state table
for the number of pulses N = 0 to 8, and draw a state diagram to explain its operation.

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(a)
Solution:
 State table:
(b)
 State diagram:
(c)
The state table and the state diagram are given in Figures (b) and (c). The horizontal arrows
indicate the times when clock inputs are applied to FF2 and FF3. These times are located by
noting that every time Q1 makes a transition from 1 to 0, FF2 is clocked, and when Q2 goes from
1 to 0, FF3 is clocked. In the state diagram, the eight states of the system are indicated by the
values of the three-digit binary number Q3 Q2 Q1.

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4.16 DIGITAL-TO-ANALOG & ANALOG-TO-DIGITAL CONVERTER:
 For the results of digital computations to be used in the analog world, it becomes necessary to
convert the digital values to proportional analog values.
 Unlike analog signals, digital data can be transmitted, manipulated, and stored without
degradation. But a DAC is needed to convert the digital signal to analog to drive an earphone
or loudspeaker amplifier in order to produce sound (analog air pressure waves).
4.16.1 Digital-to-analog (D/A) converters

 Fig. 4.123 shows the block diagram of a typical digital-to-analog (D/A) converter, which
accepts an n-bit parallel digital code as an input and provides an analog current or voltage as
an output.
 For an ideal D/A converter, the analog output for an n-bit binary code is given by
Vo = −Vref (b0 + b1 × 2−1 + b2 × 2−2 +· · ·+ bn−1 × 2−n+1)
Fig. 4.123: Block diagram of D/A converter

Where;
V0 - analog output voltage
Vref - reference analog input voltage
b0 - most significant bit of binary input code
bn−1 - least significant bit of binary input code
 In order to provide current-to-voltage conversion and/or buffering, an op amp is used at the

output. However, in some high-speed applications where a limited output voltage range is
acceptable, a resistor, instead of an op amp, is used for the current-to-voltage conversion,
thereby eliminating the delay associated with the op amp.
1. Weighted-resistor D/A converter
 Fig. 4.124 shows a 4-bit weighted-resistor D/A converter which includes a reference voltage
source, a set of four electronically controlled switches, a set of four binary-weighted precision
resistors, and an Op-Amp.

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Fig. 4.124: Circuit diagram of weighted resistor D/A converter
 Each binary bit of digital input code controls its own switch. The switch closes with a bit value
of 1, and the switch stays open with binary 0. The resistor connected to the most significant bit
(MSB), b0, has a value of R; b1 is connected to 2R, b2 to 4R, and b3 to 8R.
 Thus, each low-order bit is connected to a resistor that is higher by a factor of 2. For a 4-bit
D/A converter, the binary input range is from 0000 to 1111.
 An important design parameter of a D/A converter is the resolution, which is the smallest
output voltage change, ∆V, which for an n-bit D/A converter is given by
𝑉𝑟𝑒𝑓
∆𝑉 = n
2 −1
 The range of resistor values becomes impractical for binary words longer than 4 bits. Also, the
dynamic range of the op amp limits the selection of resistance values.
 To overcome these limitations, the R–2R ladder D/A converter is developed.
2. R–2R Ladder D/A Converter
 Fig. 4.125 shows a 4-bit R–2R ladder D/A converter, which contains a reference voltage source,
a set of four switches, two resistors per bit, and an op amp.
Fig. 4.125: Circuit diagram of 4-bit R–2R ladder D/A converter

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 The analog output voltage can be shown to be because only two resistor values (R and 2R) are
used, the R–2R ladder converter networks are relatively simple to manufacture, fast, practical,
and reliable.
 The commercially available AD558, which is an 8-bit R-2R D/A converter, is an example.
3. 2n - R D/A CONVERTER
 An n-bit 2n –R D/A converter needs 2n resistors of equal value R and (2n+1 −2) analog switches.
 A 3-bit 2n −R D/A converter is shown in Fig. 4.126, which includes the eight resistors
connected in series to form a voltage divider providing eight analog voltage levels, as well as
14 analog switches controlled by the digital input code such that each code creates a single
path from the voltage divider to the converter output.
Vo = −Vref (b0 × 2−1 + b1 × 2−2 +· · ·+ bn−1 × 2−n)
Fig. 4.126: Circuit diagram of 4-bit 2n– R D/A converter
 A unit-gain amplifier is connected to the output in order to prevent loading of the voltage
divider.
 2n − R D/A converters are economically manufactured as LSI packages in spite of the large
number of components needed.
Ex 102: For the 4-bit D/A converter of Fig. 4.124 with Vref = −5 V, determine the range of
analog output voltage and the smallest increment.

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Solution:
Vo = −Vref (b0 + b1 × 2−1 + b2 × 2−2 +· · ·+ bn−1 × 2−n+1)

So; 5 x (1 + 1 x 2-1 + 1 x 2-2 + 1 x 2-3) = 5 x 1.875 = 9.375 V
The smallest increment is given by 5 x 1 x 2-3 = 5/8 = 0.625 V
Ex 103: For the 3-bit 2n–R D/A converter of Fig. 4.126, calculate the analog output voltage
when the input is (a) 100, and (b) 010.
Solution:
(a) For the binary input 100, switches controlled by B0, .B1, and .B2 will be closed. A path is then
produced between the output Vo and point 4, where the voltage is equal to Vref /2. The analog
output voltage is therefore Vref/2.
(b) For the binary input 010, switches controlled by B0, B1, and .B2 will be closed. A path exists
between Vo and point 6, where the voltage is equal to Vref/4. The analog output voltage is thus
Vref/4.
4.16.2 ANALOG-TO- DIGITAL (D/A) CONVERTERS
 The A/D converter converts analog input signals into digital output data in many areas such
process control, aircraft control, and telemetry. Being the interface between analog systems
and digital systems, it plays a key role in many industrial, commercial, and military systems.
 Several types of A/D converters exist: counter-controlled, successive-approximation, and dual-
ramp (dual-slope) converters.
 The commercially available LM311 is an example that is widely used by designers.
1. Counter-Controlled A/D Converter
 Resetting the binary counter to zero produces D/A output voltage V2 = 0 and initiates the
analog-to-digital conversion.
 When the analog input V1 is larger than the DAC (D/A converter) output voltage, the
comparator output will be high, thereby enabling the AND gate and incrementing the counter.
 V2 is increased as the counter gets incremented; when V2 is slightly greater than the analog
input signal, the comparator signal becomes low, thereby causing the AND gate to stop the
counter. The counter output at this point becomes the digital representation of the analog input
signal.
 The relatively long conversion time needed to encode the analog input signal is the major
disadvantage of this method.

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Fig. 4.127: Circuit diagram of counter-controlled A/D converter
2. Successive-Approximation A/D Converter
 This converter, shown in Fig. 4.128, also contains a D/A converter, but the binary counter is
replaced by a successive-approximation register (SAR), which makes the analog-to-digital
conversion much faster.
Fig. 4.128: Circuit diagram of successive-approximation A/D converter
 The SAR sets the MSB to 1 and all other bits to 0, after a start-of conversion pulse. If the
comparator indicates the D/A converter output to be larger than the signal to be converted, then
the MSB is reset to 0 and the next bit is tried as the MSB.

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 On the other hand, if the signal to be converted is larger than the D/A computer output, then
the MSB remains 1. This procedure is repeated for each bit until the binary equivalent of the
input analog signal is obtained at the end.
 This method requires only n clock periods, compared to the 2n clock periods needed by the
counter-controlled A/D converter, where n is the number of bits required to encode the analog
signal.
 The National ADC 0844 is a popular 8-bit A/D converter based on the SAR.
3. Dual-Ramp (Dual-Slope) A/D Converter
 After a start-of-conversion pulse, the counter is cleared and the analog input Vin becomes the
input of the ramp generator (integrator). When the output of the ramp generator Vo reaches
zero, the counter starts to count.
Fig. 4.129: Circuit diagram of dual-ramp A/D converter
 After a fixed amount of time T, as shown in Fig. 4.130, the output of the ramp generator is
proportional to the analog input signal. At the end of T, the reference voltage Vref is selected,
when the integrator gives out a ramp with a positive slope. As Vo increases, the counter is
incremented until Vo reaches the comparator threshold voltage of 0 V, when the counter stops
being incremented again. The value of the counter becomes the binary code for the analog
voltage Vin, since the number of clock pulses passing through the control logic gate for a time
t is proportional to the analog signal Vin. Dual-ramp A/D converters can provide accuracy at
low cost, even though the process is slow because a double clock pulse count is an inherent
part of the process.

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Fig. 4.130: Output of ramp generator in dual-ramp A/D converter.
Ex 104: The speed of an 8-bit A/D converter is limited by the counter, which has a maximum
speed of 40 × 106 counts per second. Estimate the maximum number of A/D conversions per
second that can be achieved.
Solution:
The rate of the clock will be constant, independent of the analog input. It must be slow enough to
allow the counter to count up to the highest possible input voltage. This will require 255(= 27 + 26
+ 25 + 24 + 23 + 22 + 21 + 20) counts, which will take 255 / (40 × 106) = 6.375 μs.
Thus, the process can be repeated 106/6.375 = 156,863 times per second.
4.17 MEMORY:
 For a digital computer which stores both programs and data, memory can be divided into three
types:
1. Random-access memory
2. Mass storage, and
3. Archival storage.
1. Random-access memory
 It includes read-and-write memory (RAM), read-only memory (ROM), programmable read-
only memory (PROM), and erasable programmable read-only memory (EPROM), in which
any memory location can be accessed in about the same time, the time required to access data
in a mass-storage device is relative to its location in the device.
2. Mass storage
 Such as magnetic disk memory, has a relatively large storage capacity and is lower in cost per
bit than random access memory.
3. Archival storage

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 Such as magnetic tape, is long-term storage with a very large capacity, but with a very slow
access time, and may need user intervention for access by the system.
4.17.1 Read-and-write memory (RAM)
 Writing is the same as storing data into memory and reading is the same as retrieving the data
later.
 RAM is said to be volatile because its contents are retained only as long as power is present.
 A RAM device is a collection of 2n addressable storage locations, each of which contains k
bits.
Fig. 4.131: Block diagram of 2n X k bit RAM
 Its block diagram is shown in Fig. 4.131, in which each cell may be a flip-flop or a capacitor,
and n address lines are decoded to select k cells.
 A static RAM, in which each cell is a flip-flop, is the read-and-write memory that retains its
data so long as the power is applied, without any further action needed from the computer.
Static RAM is used in microprocessor-based systems requiring small memory. Common static-
RAM sizes are 2K × 8, 8K × 8, and 32K × 8, where K stands for 210 = 1024.
 A dynamic RAM, in which each cell is a capacitor (which leaks charges and therefore requires
continuous refreshing from the computer to maintain its value), is the read-and-write memory
that is used in large memory systems due to its lower cost and greater density. Common
dynamic-RAM packages are available in 16K-bit, 64K-bit, 256K-bit, and 1M-bit (where M
stands for mega = 220) sizes.
4.17.2 Read-only memory (ROM)
 ROM is nonvolatile (because it maintains its contents even when its power is shut off) and is
used to store data and programs that do not change during the operation of the system.
1. The mask-programmed ROM
 It is read-only devices that are programmed for data storage during the manufacturing of the
chip itself. These are generally less expensive devices for mass production. Character-font
memory for laser printers is a good example.

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2. Programmable read-only memory (PROM)
 It is a field-programmable memory that is fabricated by the manufacturer containing all 0s and

is programmed irreversibly by the user by electrically changing appropriate 0s to 1s. PROMs
are quite economical in small quantities.
3. Erasable programmable read-only memory (EPROM)
 It is nonvolatile and widely used in microprocessor systems for program storage. It can be
erased by shining an ultraviolet light and reprogrammed if necessary. These are produced in
low to moderate volumes.
4. Electrically erasable programmable ROM (EEPROM)
 It is used for remote-area applications. The device is provided with special pins which, when
activated electrically, alter the rewriting of selected memory locations.
 Difference between ROM, EPROM & EEPROM
ROM/PROM EPROM EEPROM/E2PROM

One time programmable so Technique used for erasing A voltage of 20 V to 25 V is
erasing is not possible is UV light applied to erasing
Erasing is not possible Selective erasing is not Selective erasing is possible. A
possible. All the locations particular locations can be
get erased erased
Erasing is not possible Erasing can be done in 10 to Erasing can be done in 10 ms
15 min.
Less expensive Moderate cost More expensive
4.17.3 Magnetic storage devices
 Magnetic disk memory is nonvolatile and provides large storage capabilities with moderate
access times.
 The data are stored on one or more rigid aluminum circular disks coated with iron oxide.
 The most common disks have 11-in diameters and 200 tracks (concentric rings of data) per
surface, numbered from 0 to 199, starting with the outside perimeter of the disk, with a typical
track packing density of 4000 bits per inch.
 Disks are mounted on a common spindle, and all disks rotate at a typical speed of 3600
revolutions per minute (rpm).
 A typical disk has 17 sectors of fixed size per track and 512 bytes (1 byte = 8 bits) of
information per sector. Any desired sector can be quickly accessed.
1. Floppy disks

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 Floppy disks, also known as flexible disks, are the low-cost, medium-capacity, nonvolatile
memory devices made of soft flexible mylar plastic with magnetically sensitive iron-oxide
coating.
 The original 8-in standard floppy is no longer in popular use. The 514 - in mini floppy has a
disk and a disk jacket covering the mylar media for protection, along with a write-protect notch
and index hole.
 The present-day mini floppy disks are either double-sided/double-density (DS/DD) with 9
sectors per track or 40 tracks per side or double-sided/quad-density (DS/QD) with 9 or 15
sectors per track and 80 tracks per side.
 In a DS/DD mini floppy disk, about 720 kbytes of data can be stored; whereas in a DS/QD
mini-floppy disk, about 1–2 Mbytes of data can be stored. The 312 -in microfloppy disk, also
known as a microdiskette, is enclosed in a rigid protective case and is provided with a write-
protect notch.
 Micro diskettes are recorded in quad-density format with a capacity of 2 Mbytes; 4- to 16-
Mbyte 312 -in diskettes are being developed. Also, 2-in diskettes are introduced in electronic
cameras and portable personal computers.
2. Magnetic tapes
 Magnetic tapes are ideal devices for storing vast quantities of information inexpensively.
However, the access time is slow because the entire tape must be read sequentially.
 The most commonly used tapes are ½-in wide, 2400 or 3600 ft long, and contained in a long
10½-in reel. Tape densities of 200, 556, 800, 1600, 6250, and 12,500 bits per inch (BPI) are
standard.
 In addition to these magnetic storage devices, two newer types of secondary storage have come
into use: Winchester disks and videodisks (also known as optical disks).
 The former are sealed modules that contain both the disk and the read/write mechanism,
requiring little maintenance and allowing higher-density recording. The latter have been
introduced recently, with high reliability and durability and a storage capacity of 1 Gbyte of
data (equivalent to almost 400,000 typewritten pages of information).
 A typical 14-in optical disk has 40,000 tracks and 25 sectors per track, with each sector holding
up to 1 Kbyte of information. While a write-once optical-disk drive is currently available, a
read-and-write drive is being developed.
4.18 DISPLAY DEVICES:
 Display devices can be categorized as on/off indicators, numeric, alphanumeric, or graphical

displays. They may also be classified as active and passive devices.
 Active display devices emit light, such as light-emitting diodes (LEDs), whereas passive
display devices, such as liquid-crystal displays (LCDs), reflect or absorb light.
1. Light-emitting diode (LED)

 This is a reliable, rugged, and inexpensive semiconductor display device requiring about 10
mA of current flow for full illumination. An LED is shown in Fig. 4.132.

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Fig. 4.132: Light emitting diode (LED)
 It is available in red, yellow, or green color; Two-color LEDs are also available in common
size.

2. Liquid-crystal display (LCD)
 This display needs only microwatts of power (over a thousand times less than a LED) and is
used in such devices as electronic wrist watches.
 With the application of an electric field the molecules of the liquid-crystal material are
straightened out, absorbing the light and the display appears black.
 With no electric field applied, the display appears as a silver mirror because the light is
reflected.
3. Segment displays
 Seven-segment displays are the most commonly used numeric display devices, while 10- and
16-segment display devices are alphanumeric which are used to display number and character.
(a) (b)
Fig. 4.133: (a) Seven segments (b) Shows its internal structure, consisting of a single LED
for each of the segments
(a) (b)
Fig. 4.134: (a) Displays the digits by an appropriate combination of lighted segments (b)
The 16-segment display commonly used for alphanumeric data

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4. Cathode-ray tube (CRT)
 While the CRT display is one of the oldest, it still remains one of the most popular display
Technologies. The raster-scanned display devices work similarly to commercial television sets,
whereas graphics display devices use different technologies to achieve extremely high
resolution.
 A CRT video signal has only two levels, with a 0 level causing a dark spot and a 1 level causing
a bright spot. The appropriate combination of 1s and 0s displays data on a CRT screen, with
each Character displayed by dot-matrix displays, typically in 5 × 7 or 7 × 9 display fonts.
4.19 COMPUTER SYSTEMS:
 Digital computers, in general, are automatic machines that accept data and instructions,
perform predefined operations very quickly on the data, and have the results available to the
user in various forms. They can be classified as microcomputers, minicomputers, mainframes,
and supercomputers.
1. Microcomputers:
 Microcomputer has become a common part of everyday life. Today’s 16- and 32-bit
microcomputer systems are also dedicated for real-time applications in a distributed system. A
microprocessor is an LSI device, which is a realization of the computer central-processor unit
(CPU) in IC form. The microprocessor is the CPU of the microcomputer system.
2. Minicomputers:
 Minicomputer developed in the early 1960s, are high-performance, general-purpose multiuser

Computers. These are also designed for real-time dedicated applications. The PDP-11 series
from Digital Equipment Corporation (DEC) have been the most prominent 16-bit
minicomputers, and are now obsolete.
 The 32-bit minicomputers, known as superminis, were developed in the 1970s, the most
prominent one being the VAX 8600 from DEC, which was capable of executing about 5
million instructions per second (MIPS). New VAX lines with larger MIPS have been
developed since.
3. Mainframes
 Mainframes capable of executing in excess of 53 MIPS, are high-performance, general-

purpose Computers supporting very large databases, ranging in price from one to ten million
dollars.
 These are used by many universities, large businesses, and government agencies, and are
supplied mainly by IBM. Examples include IBM 360, CDC 7600 of Control Data Corporation,
and Texas Instrument Advanced Scientific Computer (TI–ASC).

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4. Supercomputers:
 Supercomputers capable of executing in excess of one billion floating-point operations per

second (FLOPS), are very powerful, extremely high-performance computers for applications
that are beyond the reach of the mainframes, and cost more than ten million dollars.
 These are used for weather prediction, image processing, and nuclear-energy studies that
require high-precision processing of ordered data achieved by a speed advantage due to parallel
processors. Cyber 205, Cray X-MP, and Cray 2 are some examples of supercomputers. In the
1980s, supercomputing centers were developed at six American universities for high
performance computing.
 By 1990 it was possible to build chips with a million components; semiconductor memories
became standard in all computers; widespread use of computer networks and workstations had
occurred. Explosive growth of wide area networking took place with transmission rates of 45
million bits per second.
4.19.1 Organization / Architecture of computer system & Introduction to microprocessor
 There are two principal components: hardware and software.

 The hardware refers as physical components such as memory unit (MU), arithmetic and logic
unit (ALU), control unit (CU), input/output (I/O) devices, etc.
 Software refers as the programs (collections of ordered instructions) that direct the hardware
operations.
 Microprocessors are classified by word size in bits, such as 1-bit, 4-bit, 8-bit, and 16-bit
microprocessors; generally speaking, the larger the word size, the more powerful the processor.
Fig. 4.135: Block diagram of Organization / Architecture

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Fig. 4.136: Block diagram of typical microprocessor
 CPU
 This is the brain of the computer as it perform all the calculating, organizing and control
functions.
 BUS
 A bus, which is a set of wires carrying address, data, and control signals, is employed for
interconnecting the major components of a microcomputer system.
1. Address lines
 These are unidirectional signals that specify the address of a memory location of an I/O
device. With a typical 24-bit address bus, the microprocessor can access 224 (over 16
million) memory locations. Memory is generally organized in blocks of 8, 16, or 32 bits.
2. Data bus
 It is a bidirectional bus, varying in size from 8 to 32 bits, which carries data between the
CPU, MU, and I/O units.
3. Control bus
 It provides signals to synchronize the memory and I/O operations, select either memory or
an I/O device, and request either the read or the write operation from the device selected.
 Arithmetic logic unit (ALU)

 It accepts data from the data bus, processes the data as per program-storage instructions and/or
external control signals, and feeds the results into temporary storage, from which external
control and actuator control functions can be performed.

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 Accumulators
 Accumulators are parallel storage registers used for processing the work in progress,
temporarily storing addresses and data, and general functions.
 Stacks
 It provide temporary data storage in a sequential order and are of use during the execution of
subroutines. A subroutine is a group of instructions that appears only once in the program code,
but can be executed from different points in the program.
 Program counter
 It is a register/counter that holds the address of the memory location containing the next
instruction to be executed.
 Status register
 It contains condition-code bits or flags (set to logic 1 or logic 0, depending on the result of the
previous instruction) that are used to make decisions and redirect the program flow.
 Control unit (CU)

 It consists of the timing and data-routing circuits, decodes the instruction being processed and
properly establishes data paths among the various elements of the microprocessor.
 Instructions
 It generally consist of a series of arithmetic and logic type operations, and also include
directions for fetching and transferring data.
4.20 COMPUTER NETWORKS:
 Computer network is defined as two or more computers are connected in such a way that they
can share their data, information as well as their resources.
 Computer network is the interconnected collection of autonomous computer and peripheral
devices.
 The links connecting the devices are called communication channels.
 The concepts of connecting computers for sharing resources or data are called networking.
 Two computers are said to be interconnected if they are able to exchange information.
 Networks are used by people because;

1. Access to remote information
Eg. WWW, E-commerce, E-shopping
2. Person to person communication
Eg. E-mail, Chat, Video conferencing
3. Interactive environment
Eg. Games, Songs, Video on demand

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 Advantages / Need of computer network:

1. Efficient management of resources
2. Faster data sharing
3. Keeping information reliable and up to date
4. High reliability
5. Efficient communication
4.20.1 Types of Networks
1. LAN (Local Area Network)

 LAN is a group of computer and network communication devices interconnected within the
geographically limited area. Such as office, building, computer lab or campus.
 LAN tends to use only one type of transmitting medium was cabling.
 Characteristics of LAN
1. It allows users to share storage devices like printer, application data and other network
resources.
2. It transfers data at high speed (more than 1 mbps)
3. Multiple accesses
4. It exists in limited geographically area (up to few kilometers)
5. Its technology is less expensive.
6. It having a lower error rate.
Fig. 4.137: Illustration of LAN
 Advantages of LAN
1. LAN are the best means provide a cost effective multi-user computer environment.
2. LAN can fit any site requirement.
3. Any number of users can be accommodated.

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4. Allows sharing of mass center storage and printers.

5. It is flexible and growth oriented.
6. It provides data integrity.
7. Transfer data at high speed.
2. MAN (Metropolitan Area Network)
 A MAN covers a much larger area and might cover an entire city but uses the LAN technology.
 It may be a single network which as able television network or it may be means of connecting
a number of LAN’s together into a larger network. So that resources may be shared LAN to
LAN as well as device to device.
 For example, a company can use a MAN to connect the LAN’s in all of its offices throughout
a city.
 A special category or standard has been adopted for MAN, and this standard is now being
implemented and it is called DQDB (Distributed Queue Dual Bus).
 A MAN can support both data and voice.
Fig. 4.138: Illustration of MAN
3. WAN (Wide Area Network)
 When a network is spread over wide areas, such as cities, states, countries or continent it is
called a WAN.
 Communication on a WAN takes place via telephone lines, satellite or microwave transmission
rather than physical cable.
 Most WAN are combination of LANs and other types of communication.
Fig. 4.139: Illustration of WAN

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 Characteristics of WAN
1. They exists in unlimited geographical area.

2. They are more susceptible to error due to the distance the data can travel.
3. They interconnect multiple LAN.
4.20.2 Network Architecture
 Computer network architecture refers to the convention used to define how the different
protocols of the system interact with each other support the end users.
 The ISO 7-layer model for an OSI is shown in fig. 4.140.
Fig. 4.140: ISO 7-layer model for an OSI
 All layers need be implemented; the more layers that are used, the more functionality and
reliability are built into the system. Starting from the bottom layer, the functions of the layers
are as follow.

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1. Physical— Defines the type of medium, the transmission method, and the transmission
rates available for the network; provides the means for transferring data across the
interconnection channel and controlling its use.
2. Data Link— Defines how the network medium is accessed, which protocols are used the
packeting/framing methods, and the virtual circuit/connection services; responsible for the
transfer of data across the link; provides for the detection and correction of data
transmission errors.
3. Network— Standardizes the way in which addressing is accomplished between linked
networks; performs networking functions and internetworking.
4. Transport— Handles the task of reliable message delivery and flow control between
applications on different stations; provides source-to-destination data integrity.
5. Session— Establishes two-way communication between applications running on different
stations on the network; provides the user interface into the transport layer.
6. Presentation— Translates data formats so that computers with different “languages” can
communicate; provides the syntax (rules) of representation of data between devices.
7. Application— Interfaces directly with the application programs running on the stations;
provides services such as file access and transfer, peer-to-peer communication among
applications, and resource sharing; provides support to process end users’ applications such
as electronic mail, database management, and file management.
4.20.3 Network Topology
 Topology which refers to the way interconnection path between many users.
 The five basic network topologies are Bus, Star, Ring, Mesh, Tree topologies as illustrate in
Fig. 4.141.
 Bus topology is used predominantly by LANs, whereas star topology is commonly used by
private-branch exchange (PBX) systems.
 Ring topology may have centralized control (with one node as the controller) or decentralized
control (with all nodes having equal status).
 Tree topology is used in most of the remote-access networks, whereas distributed topology is
common in public and modern communications networks.
 Star topology has a dedicated point to point link only to a center controller usually called HUB.
There are not direct linked to each other.
 A fully distributed network / mesh topology allows every set of nodes to communicate
directly with every other set through a single link and provides an alternative route between
nodes.
(a) (b) (c)

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(d) (e)
Fig. 4.141: (a) Bus topology (b) Star topology (c) Ring topology (d) Tree topology (e) mesh
topology
 Structure of typical TCP/IP Internet
 The Internet is physically a collection of packet switching networks interconnected by

gateways along with protocols that allow them to function logically as a single, large, virtual
network.
 Gateways (often called IP routers) route packets to other gateways until they can be delivered
to the final destination directly across one physical network. Fig. 4.142 shows the structure of
physical networks and gateways that provide interconnection.
Fig. 4.142: Structure of typical TCP/IP Internet
 Gateways do not provide direct connections among all pairs of networks. The TCP/IP is
designated to provide a universal interconnection among machines, independent of the
particular network to which they are attached.
 Besides gateways that interconnect physical networks, as shown in Fig. 4.142, Internet access
software is needed on each host (any end-user computer system that connects to a network) to
allow application programs to use the Internet as if it were a single, real physical network.
Hosts may range in size from personal computers to supercomputers.
4.20.4 Transmission Media
 These, also known as physical channels, can be either bounded or unbounded.

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 Bounded media, in which signals representing data are confined to the physical media, are
twisted pairs of wires, coaxial cables, and optical-fiber cables, used in most LANs.
 Unbounded media, such as the atmosphere, the ocean, and outer space in which the
transmission is wireless, use infrared radiation, lasers, microwave radiation, radio waves, and
satellites.
 Data are transmitted from one node to another through various transmission media in computer
communications networks.
 Twisted pairs are used in low-performance and low-cost applications with a data rate of about
1 Mbit per second (Mbps) for a transmission distance of about 1 km.
 Baseband coaxial cables used for digital transmission are usually 50Ω cables with a data rate
of about 10 Mbps over a distance of about 2 km.
 Broad-band coaxial cables used for analog transmission (cable TV) are usually 75 Ω cables
with a data rate of about 500 Mbps over a distance of about 10 km.
 Optical fiber cable is the lighter and cheaper fiber-optic cables support data transmission of
about 1 Gbps over a distance of about 100 km.
4.20.5 Types of Data Transmission
 Data can be transferred between two stations in either serial or parallel transmission.
 Parallel data transmission, in which a group of bits moves over several lines at the same time,
is used when the two stations are close to each other (usually within a few meters), as in a
computer–printer configuration.
 Serial data transmission, in which a stream of bits moves one by one over a single line, is
used over a long distance. Serial data transfer can be either asynchronous or synchronous.
 Asynchronous data communication is most commonly applied in low-speed terminals and
small computers. Large-scale integration (LSI) devices known as UARTs (universal
asynchronous receivers/transmitters) are commercially available for asynchronous data
transfer.
 Synchronous data communication is used for transferring large amounts of data at high speed.
USARTs (universal synchronous/asynchronous receivers/transmitters) are commercially
available LSI devices.
 Frequency-division multiplexing (FDM) is a technique for data transmission widely used in
telephone, radio, and cable TV systems in which the transmission frequency spectrum (i.e.,
bandwidth) is divided into smaller bands known as sub-channels.
 Data transmission between two stations can be achieved in either simplex, half-duplex, or full-
duplex mode.
 In a simplex mode, mainly used in radio and TV broadcasts, information travels only in one
direction. This mode is rarely used in data communications.
 In a half-duplex mode, used by radio communications, information may travel in both
directions, but only in one direction at a time. The transmitter becomes the receiver and vice
versa. E.g. Walkie – Talkie.

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 In a full-duplex mode, information may travel in both directions simultaneously. This mode,
used in telephone systems, adopts two different carrier frequencies.
4.20.6 Modem
 A modem (modulator/demodulator) is an electronic device that takes digital data as a serial

stream of bits and produces a modulated carrier signal as an output. That is to say, the digital
signals are converted to an analog form with a relatively narrow bandwidth.
 The carrier signal is then transmitted over the telephone line to a similar modem at the receiving
end, where the carrier signal is demodulated back into its original serial stream of bits, as shown
in Fig. 4.143
Fig. 4.143: Input/output signals of a modem
 The serial digital data to be transmitted are modulated, filtered, and amplified for analog
transmission; the analog data received at the receiving end are amplified, filtered, and
demodulated to produce serial digital signals.
 There are four different types of modems: half-duplex, full-duplex, synchronous, and
asynchronous.
 With half-duplex modems data can be transmitted in only one direction at a time. Fullduplex
modems transmit data in both directions at the same time; one modem is designated as the
originating modem and the other as the answering modem, while transmitting and receiving
data are done at different frequencies.
 Asynchronous modems are low-data-rate modems transmitting serial data at a rate of about
1800 bits per second (bps).
 Synchronous modems are high-data-rate modems transmitting serial data at a rate of about
10,800 bps.
 Modems can also be classified as voice-band or wide-band modems.

 Voice-band modems are low-to-high speed modems designed for use on dial-up, voice-grade,
and standard telephone lines up to a rate of about 10,800 bps.
 Microprocessor-controlled modems are known as smart modems, such as the Hayes modem,
manufactured by Hayes Microcomputer Products.
 The portable acoustic-coupler device, which is a different type of voice-band modem, is a
low-speed modem with a rate of about 600 bps that is connected acoustically to a standard
telephone.
 Wide-band modems are very high-speed modems with rates of 19,200 bps and above,
designed for use with dedicated telephone lines. These are currently used mostly on private
communications systems.

116
4.21 PRACTICAL APPLICATION: A CASE STUDY:

MICROCOMPUTER CONTROLLED BREAD MAKING MACHINE:
 Fig. 4.144 shows a simplified schematic diagram of a microcomputer-controlled bread making

machine.
Fig. 4.144: Schematic diagram of Microcomputer-Controlled Bread making Machine
 A microcomputer along with its timing circuit, keypad, and display unit controls the heating
resistor, fan motor, and bread-ingredient mixing motor by means of digitally activated switches.
 An analog temperature sensor, through an A/D converter, provides the status of temperature to
the microcomputer.
 A digital timer circuit counts down, showing the time remaining in the process.
 The control programs are stored in ROM and determine when and how long the machine
should mix the ingredients added to the bread pan, when and how long the heating resistor
should be turned on or off for various parts of the cycle, and when and how long the fan should
be on to cool the loaf after baking is finished. The parameters such as light, medium, or dark
bread crust are entered through the keypad into RAM.
 According to the programs stored and the parameters entered, the machine initially mixes the
ingredients for several minutes.
 The heating resistor is turned on to warm the yeast, causing the dough to rise while a
temperature of about 90°F is maintained. The time remaining and the temperature are
continually checked until the baked loaf is cooled, and the finished bread is finally ready in
about 4 hours.
 Microprocessors and computers in various forms are used extensively in household appliances,
automobiles, and industrial equipment.

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QUESTIONS
4.1 Introduction
1. Define analog and digital signal.
2. Give comparison of analog and digital systems.
4.2 Introduction to Digital System

1. Give advantages and disadvantages of digital systems.
2. Define positive, negative and mixed logic systems.
4.3 Number systems

1. Convert following binary number in to decimal number
i. 11001.011 [Ans: (25.375)10]
ii. (110011)2 = (?)10 [Ans: (51)10]
2. Convert following decimal number in to binary number
i. 81 [Ans: (1010001)2]
ii. (163)10 = (?)2 [Ans: (10100011)2]
iii. 537 [Ans: (1000011001)2]
iv. (111)10 = (?)2 [Ans: (1101111)2]
v. 0.875 [Ans: (0.111)2]
vi. 35.17 [Ans: (100011.0010101)2]
3. Convert following octal number in to decimal number
i. (37246)8 = (?)10 [Ans: (16038)10]
ii. 103.45 [Ans: (67.578)10]
4. Convert following decimal number in to octal number
i. 654 [Ans: (1216)8]
ii. (890)10 = (?)8 [Ans: (1572)8]
iii. 0.23 [Ans: (0.165)8]
5. Convert following binary number in to octal number
i. (111101001)2 = (?)8 [Ans: (751)8]
6. Convert following octal number in to binary number
i. 611 [Ans: (110001001)2]
5. Convert following hexadecimal number in to decimal number
i. 10 [Ans: (16)10]
ii. (AF)16 = (?)10 [Ans: (175)10]
iii. (3A1.4)16 = (?)10 [Ans: (929.25)10]
6. Convert following decimal number in to hexadecimal number
i. 246 [Ans: (F6)16]
ii. (0.56)10 = (?)16 [Ans: (8F)16]
7. Convert following binary number in to hexadecimal number
i. 10001100 [Ans: (8C)16]
ii. 00110111 [Ans: (37)16]
8. Convert following hexadecimal number in to octal number
i. BC05 [Ans: (136005)8]
ii. (35AC.90F)16 = (?)8 [Ans: (32654.4417)8]

118
9. Convert following octal number in to hexadecimal number

i. 65302 [Ans: (6AC2)16]
ii. (3764.670)8 = (?)16 [Ans: (7F4.DC0)16]
10. Convert following number in to defined radix r conversion
i. (1543)10 = (?)5
ii. (1420)10 = (?)4
iii. (10111)2 = (?)12
11. Find the value of unknown base
i. Determine b if (34)10 = (202)b
4.4 Logic gates

1. Explain various logic gates with its logic symbol and truth table.
2. Design all basic gates using universal gates.
4.5 Boolean algebra

1. Give difference between sequential and combinational circuits.
2. Explain various laws of Boolean algebra.
3. Explain De-Morgan’s theorem.
4.6 Different forms of boolean algebra

1. Explain standard and canonical form.
OR
1. Define SOP and POS form.
4.7 Simplification of logical function using karnaugh map (k-map)

1. What is k-map?
4.8 Binary adders

1. Explain half adder and full adder in detail.
2. Give comparison between half adder and full adder
4.9 Encoder
1. What is encoder? Explain it in detail with necessary diagrams.
2. Explain octal to binary (8 to 3) encoder.
4.10 Decoder
1. What is decoder? Explain it in detail with necessary diagrams.
2. Implement full adder using decoder.
3. Implement following function using decoder: F = Σ(4, 6, 7, 9, 10, 13)
4.11 Multiplexer
1. What is multiplexer? Explain it in detail.
2. Implement the function F(x, y) = ∑(0, 1, 3) using multiplexer.
3. Implement the function F(x, y, z) = ∑(1, 2, 6, 7) using 4 X 1 multiplexer.

119
4.12 Demultiplexer
1. What is demultiplexer? Explain it in detail.
2. Explain 1 to 8 demultiplexer in detail.
4.13 Sequential blocks

1. Explain SR flip-flop with necessary diagrams.
2. Explain D flip-flop with necessary diagrams.
3. Explain JK flip-flop with necessary diagrams.
4. Explain master-slave JK flip-flop in detail.
5. Explain race around condition in JK flip-flop.
4.14 Shift registers

1. Explain serial-in serial-out shift register with timing diagram.
2. Explain PISO, SIPO and PIPO shift registers with diagram.
4.15 Counters
1. Explain asynchronous or Ripple counter.
2. Explain synchronous counter.
3. Explain ring counter.
4.16 Digital-to-analog & analog-to-digital converter

1. What is digital to analog converter? Explain various types of digital to analog converter with
its applications.
2. What is analog to digital converter? Explain various types of analog to digital converter with
its applications.
4.17 Memory
1. What is memory? List down applications of it. Also explain ROM, RAM, PROM, EPROM
and EEPROM.
2. Give comparison of ROM, EPROM and EEPROM.
4.18 Display Devices

1. Explain various display devices.
4.19 Computer Systems

1. What is computer system? Explain organization / Architecture of computer system.
2. Draw block diagram of basic microprocessor system and explain all the block of it in brief.
4.20 Computer Networks

1. What is computer network? Give advantages of it. Also explain various types of computer
networks.
2. Explain computer architecture.
OR
2. Explain ISO 7-layer model for an OSI.

120
3. Explain various network topologies (Mesh, Ring, Star, Bus, Tree topology) with its
advantages.
4. Write short note on transmission media.
5. Explain various types of data transmission modes.
6. What is modem? Explain it in detail with block diagram.
4.21 A Case Study – Microcomputer – Controlled Bread making Machine

1. Write short note on Microcomputer – Controlled Bread making Machine with diagram.

121
Chapter 5
SIGNAL PROCESSING
 Signal and signal classification
 Spectral analysis
 Modulation
 Sampling and Multiplexing
 Interference and noise
 Practical application: case study
SIGNAL
 Signal is the representation of a physical quantity that conveys information about that
quantity.
 As electric quantities like voltage or current are relatively easy in processing and
transmitting.
 Signals are generally represented in form of voltage or current. Thus electric signal is
a voltage or current waveform whose variation with respect to time or frequency
represents desired information about physical quantity of interest.
 For example temperature sensor gives output voltage that is proportional to the
temperature being measured.
Classification of Signals
Signals as per their characteristics can be classified as follows.

1. Continuous time and Discrete time signals
2. Continuous value and Discrete value signals
3. Periodic and Aperiodic (non-periodic) signals
4. Deterministic and Random signals
5. Even and Odd signals
6. Causal and Non-causal signals
7. Energy and Power signals
1) Continuous time and Discrete time Signals:
 A signal whose value is defined at all instances of time is called continuous time
signal.
 On the other hand signal whose values are defined only at discrete instances of
time is called discrete time signal.
 Most of the signals in nature are continuous time signals. A discrete time signal
can be obtained from continuous time signal by process called sampling. This has
been illustrated in Figure 1.

BE Semester 2, 2110016 Page 1
Figure 1: (a) Continuous time signal x(t) sampled at every T interval, (b) Resulting
discrete time signal x(n).
2) Continuous value and Discrete value signals:
 If a signal can take any value in a give range between some minimum and
maximum value then the signal is called continuous value signal.
 On the other hand if a signal takes only certain fixed values in a given range then
it is called discrete value signal. For processing the signal on digital systems these
discrete values are represented in terms of binary.
 The process of converting a continuous value signal to a discrete value signal is

called quantization. This is illustrated in Figure 2.
Figure 2: Continuous value signal (solid line) and discrete value signal (dotted line).
3) Periodic and Aperiodic (non-periodic) signals:
 Periodic signals are one that repeats itself after a regular interval of time. A
periodic signal x(t) satisfies following property.
where, k is any integer and T is the smallest interval after which the signal
repeats itself, called the period of the signal.
 Number of times a periodic signal repeats itself in 1 second is called frequency

(f). f = 1/T.
 Signals that are not repetitive in nature are aperiodic or non-periodic signals.
 Periodic and aperiodic signals are illustrated in Figure 3.
(a) (b)

(c) (d)
Figure 3: (a) sinusoidal signal & (b) pulse train are periodic signals; (c) exponential signal
and (d) unit step signal are aperiodic signals.
4) Deterministic and Random signals:
 Deterministic signals are those signals whose values are completely specified for
any given time. Thus, a deterministic signal can be modeled by a mathematical
function of time. For example x(t) = Asin(100πt).
 Random signals are those signals that take random values at any given time and
hence they cannot be represented as function of time. Such signals are
characterized statistically.
5) Even and Odd signals
 A signal x ( t ) is referred to as an even signal if x (-t ) = x (t ). They are symmetric

around time t = 0. Example x(t) = Acos(2πft).
 A signal x ( t ) is referred to as an odd signal if x ( - t ) = - x ( t ). They are not

symmetric around time t = 0. Example x(t) = Asin(2πft).
 These signals are illustrated in Figure 4.
(a) (b)
Figure 4. (a) Even signal (b) Odd signal.
 Any signal x(t), in general, can be expressed as the sum of its even and odd parts as
expressed below.
Example
Discuss the nature of evenness and oddness of:

(a) The sinusoidal signal x(t) = A cos(2πf0t + θ).
(b) The complex exponential signal x(t) = ej2𝜋fot .
Solution

a) The signal is, in general, neither even nor odd.
However,
for the special case of θ = 0,it is even;
for the special case of θ = ±π/2, it is odd.
In general,
x(t) = A cos θ cos 2πf0t − A sin θ sin 2πf0t
Since cos 2πf0t is even and sin 2πf0t is odd, it follows that
xe(t) = A cos θ cos 2πf0t and
xo(t) = −A sin θ sin 2πf0t
b) For θ = 0, x(t) = A ej2𝜋fot , the real part and the magnitude are even; the imaginary part
and the phase are odd. Noting that a complex signal x(t) is called hermitian if its real
part is even and its imaginary part is odd, the signal and symmetry are then said to be
hermitian.
6) Causal and Non-causal signals:
 A signal x(t) is said to be causal if, for all t < 0, x(t) = 0.
 A signal whose values are defined for both t < 0 and t > 0 are called non-causal
signals.
Causal signal Non-Causal signal.
7) Energy and Power signals:
 Energy and power of a signal x(t) is defined as
 A signal is Energy signal if and only if the energy Ex of the signal, is well defined
and finite i.e. 0 < Ex < ∞.
 A signal is a power-type signal if and only if the power Px of the signal, is well
defined and finite i.e. 0 < Px < ∞.
 Typically for energy signal average power is 0 and for power signal energy is ∞.

 Typically periodic signals are power signals. For example x(t) = Acos(2πft).
Example
Classify each of the following signals as an energy signal or a power signal, by calculating
the energy E, or the power P (A, θ, ω and τ are real positive constants).
1) x1(t) = A | sin(ωt + θ)|
2) x2(t) = Aτ / √τ + jt, j=√−1
3) x3(t) = At2e−t/τ u(t).
Solution
1) Power signal.
The signal is periodic, with period π/ω, and
2) Neither energy nor power
and
3) Energy signal
4) Real and Complex signals:
 A signal x(t) is a real signal if its value is a real number.
 A signal x(t) is a complex signal if its value is a complex number. A complex

signal x(t) is represented as
x ( t ) = x1 ( t ) + j x 2 ( t )
 where x1(t) and x2(t) are real signals and j = √−1 .

Popular example of complex signal is complex exponential signal x(t) = ej2πft
x(t) = 𝑒 𝑗2𝜋𝑓𝑡 = cos(2𝜋𝑓𝑡) + 𝑗𝑠𝑖𝑛(2𝜋𝑓𝑡)
Example
A signal x(n) is graphically illustrated in Figure given below. Show a graphical representation
of the signals x(n - 3) and x(n + 2).

Solution
The signal x(n -3) is obtained by delaying x(n) by three units in time. The result is illustrated
in Figure
On the other hand, the signal x(n + 2) is obtained by advancing x(n) by two units in time. The
result is illustrated in Figure.
Note: The Delay corresponds to shifting a signal to the right, whereas advance implies
shifting the signal to the left on the time axis.
SIGNAL PROCESSING
Any operation performed on the signal to achieve the desired purpose is called signal
processing. Simple examples of signal processing can be amplification of a signal so as to
increase the strength of the signal or modulation of a signal so as to communicate it over a
longer distance, etc.
Example of Signal processing in Analog communication system
Simple block diagram of an analog communication system representing various signal

processing operation at different stages is shown in Figure 5.

Figure 5. Block diagram of analog communication system showing need of signal processing
operations.
Transducer:
 A transducer is usually required to convert the output of a source into an electrical
signal that is suitable for transmission.
 Typical examples include a microphone converting an acoustic speech or a video
camera converting an image into electric signals.
Transmitter:
 The transmitter (input processor) converts the electric signal into a form that is
suitable for transmission through the physical channel or transmission medium.
 For example, in radio and TV broadcasts, the signal is appropriately modulated before
transmission.
Communication channel:
 The communication channel (transmission medium) is the physical medium that is
utilized to send the signal from the transmitter to the receiver.
 The channel can be wired (land line telephones) or wireless (radio, mobile phones).
 The transmission medium is the most vulnerable part of a communication system and
the signal while traveling over the transmission medium may get corrupted (get error)
due to phenomena like attenuation, distortion, interference, noise, etc.
Receiver:
 The receiver is to recover the message signal contained in the received signal. For
example a modulated signal when received has to be demodulated to get the desired
information.
 The received signal can appropriately converted back to the desired form using output
transducer. For example, loudspeaker to convert electrical signals to sound.
This system to successfully work may require number of signal processing operations like
 Amplification to compensate for attenuation

 Filtering to reduce interference and noise, and/or to obtain selected facets of
information
 Equalization to correct some types of distortion
 Frequency translation or sampling to get a signal that better suits the system
characteristics
 Multiplexing to permit one transmission system to handle two or more information-
bearing signals simultaneously

Example of Signal processing Digital Communication System
Block diagram of a digital signal processing system is shown in Figure 6. For each function
performed on transmitter side, there is an inverse operation on the receiver side.
Figure 6. Digital signal processing system showing need of signal processing operations.
Analog to digital convertor(A/D):

 The analog input signal (such as an audio or video signal) must first be converted to a
digital signal by an analog to digital (A/D) converter.
Source encoder:
 Source encoder works to convert the output of A/D converted in more efficient
representation so that less number of bits has to be transmitted over the channel.
 For example: data compression.
Channel encoder:
 The purpose of the channel encoder is to introduce some redundancy in a controlled
manner in the binary information sequence, so that the redundancy can be used at the
receiver to overcome the effects of noise and interference encountered in the
transmission of the signal through the channel.
 The binary sequence generated by the channel encoder is modulated before
transmission over the channel. Example of digital modulation can be amplitude shift
keying (ASK), frequency-shift keying (FSK), etc.
 On the receiver side opposite signal processing operations are performed starting with
demodulation, channel decoding and source decoding and digital to analog
conversion.
Frequency domain representation of a sinusoidal signal
x(t) = A cos(2πft + θ)
 Till now a sinusoidal signal has been represented as a function of time t. Such
representation is called time domain representation.

 However such sinusoidal signal can be completely characterized by three quantities:
its amplitude, phase and frequency.
 Hence instead of representing it as a function of time we can also represent it as a
function of frequency. Such representation is called frequency domain representation.
 Such frequency domain representation of a signal x(t) consists of two plots amplitude
vs. frequency and phase vs. frequency. Such representation is called signal spectrum
(or line spectrum).
 Spectrum of x(t) is shown in Figure 7. The advantage of the frequency domain
representation is that it can display clearly the various frequency components that
exist in a signal.
Amplitude Phase
A

f Frequency (Hz) f Frequency (Hz)
Figure 7 Spectrum of 𝑥(𝑡) = 𝐴 cos(2𝜋𝑓𝑡 + 𝜃).
 In spectrum representation Sinusoidal signals are important because they have unique
(single) frequencies.
 An arbitrary signal does not have a unique frequency. The signal shown in Figure 8 is
periodic but not pure sinusoidal. It actually is sum of two sinusoidal signals of
different frequencies represented as follows.
x(t )  3 sin(2f1t )  sin(2 (3 f1 )t )
 The magnitude spectrum is also shown in the Figure.
Amplitude
Frequency (Hz)
Figure 8. Arbitrary periodic signal and its amplitude spectrum.
FOURIER SERIES
 A Fourier series is an expansion of a periodic function f(x) in terms of an infinite sum

of sines and cosines.
 Fourier series make use of the orthogonality relationships of the sine and cosine
functions. The computation and study of Fourier series is known as harmonic
analysis and is extremely useful in signal processing.

 Fourier series representation of an arbitrary periodic signal x(t) with period T, is given
by as
Where, 𝜔 = 2𝜋/𝑇 and
 From this representation the magnitude and phase of nth frequency component (called
nth harmonics) can be calculated using
(arctan = tan-1)
Example
Find the Fourier series for the square 2π-periodic wave defined on the interval [−π, π]:
Solution
First we calculate the constant ao:
Find now the Fourier coefficients for n ≠ 0:
Since ,
we can write:
Thus, the Fourier series for the square wave is
We can easily find the first few terms of the series. By setting, for example, n = 5, we get

The graph of the function and the Fourier series expansion for n = 10 is shown in Figure 9.
Figure 9.2 n = 5, n = 10
Figure 9.1 n = 10
Example
Find the Fourier series for the function
defined on the interval [−π, π].
Solution
First we find the constant a0:
Now we calculate the coefficients an:
Notice that
Since cos (n − 1)π = (−1)n −1, we get the following expression for the coefficients an:

It's seen that an = 0 for odd n. For even n, when n = 2k (k = 1,2,3,...), we have
Calculate the coefficients bn. Start with b1:
The other coefficients bn for n > 1 are zero. Indeed,
Thus, the Fourier series of the given function is given by
Graphs of the function and its Fourier expansions for n = 2 and n = 8 are shown in Figure 10.
Figure 10.1 n = 2, n = 8 Figure 10.2 n = 10
SPECTRUM ANALYSIS
 The frequency spectrum of a time-domain signal is a representation of that signal in

the frequency domain.
 The frequency spectrum can be generated via a Fourier transform of the signal, and
the resulting values are usually presented as amplitude and phase, both plotted versus
frequency.
 The process of obtaining the spectrum of a given signal using the basic mathematical
tools is known as frequency or spectral analysis.
SIGNAL BANDWIDTH

 The range of frequency over which frequency components are present in spectrum of
a signal is called signal bandwidth.
 In other words signal bandwidth is defined as the difference between the maximum
and minimum values of frequencies present in signal spectrum.
 Bandwidth of a voice signal is 3 kHz, high quality audio is 20 kHz and that of a video
signal is 5 MHz.
FILTERING
 A filter is a frequency selective network which allows certain frequency components

to pass through it without attenuation (i.e reducing their value) and does not allow
other frequency components to pass through it (i.e. heavily attenuate).
 For example, a low pass filter designed with cutoff frequency fc will allow all
frequency components below fc to pass through it and heavily attenuate frequency
components above fc.
 Similarly a high pass filter designed with cutoff frequency fc will allow all frequency
components above fc to pass through it and heavily attenuate frequency components
below fc.
 When as signal passes over the transmission line it may get contaminated with other
unwanted (noise) signals. These signals if have different frequencies compared to
signal frequency then they can be removed easily using a filter.
DISTORTION
 Any undesired alteration in the nature of the signal is known as distortion. Generally
when a signal is communicated over a transmission line they may be subjected to
distortion.
 Distortionless transmission line is one in which the signal obtained at the output of the
transmission line is replica of the signal at the input. This means that the shape of the
signal is preserved.
 Transmission line can be modeled as liner network as shown in the Figure 11 where
H(f) indicates the effect on amplitude of various frequency components of signals
and θ(f) indicates the effect on phase of various frequency components of signal.
Where,
K= scaled factor
td = delayed in time
Figure 11 Model of transmission line.
Transmission line is said to be distortion less if
 This means that the transmission line is distortion free if amplitude and phase of all
frequency components present in the signal are uniformly affected. In this case the
overall amplitude of the signal may change and signal may be delayed(td) but still the
nature of shape of the signal remains same.

 Transmission line that does not satisfy this condition will cause distortion in the
signal.
Types of distortions:
 Amplitude or frequency distortion: If the amplitude of different frequency

components in the input signal x(t) is affected differently i.e. H(f) ≠ K (constant) then
such distortion is called amplitude or frequency distortion.
 Phase distortion: If different frequency components in the input signal x(t) are delayed
by different time i.e. effect of phase at different frequency is not constant then such
distortion is called phase distortion.
EQUALIZER
 Equalizer is a system that is used to compensate for the distortion that may occur in
the signal when communicated over the transmission line.
 Equalizer is used at the receiver end of the transmission line. The signal received from
the transmission line is given to the equalizer. Equalizer is designed such that it
affects the amplitude and phase of various frequency components of the signal so as
to compensate for the distortion that may have occurred in transmission line.
 Thus, as shown in Figure 2 transmission line followed by equalizer combinely acts as

a distortionless transmission line.
Figure 12, Transmission line with equalizer.
MODULATION
 Modulation is the process whereby the amplitude (or another characteristic) of a wave
is varied as a function of the instantaneous value of another wave. The first wave,
which is usually a single-frequency wave, is called the carrier wave; the second is
called the modulating wave.
 Demodulation or detection is the process whereby a wave resulting from modulation
is so operated upon that a wave is obtained having substantially the characteristics of
the original modulating wave.
 Modulation and demodulation are then reverse processes. The information from a
signal x(t) is impressed on a carrier waveform whose characteristics suit a particular
application.
 If the carrier is a sinusoid, we will see that a phenomenon known as frequency
translation occurs. If, on the other hand, the carrier is a pulse train, the modulating
signal needs to be sampled as part of the modulation process.
 Frequency translation and sampling have extensive use in communication systems.
Both of these lend to multiplexing, which permits a transmission system to handle two
or more information-bearing signals simultaneously.

Frequency Translation and Product Modulation
 The basic operation needed to build modulators is the multiplication of two signals.
Whenever sinusoids are multiplied, frequency translation takes place.
(a) Product modulator (b) Waveforms

Figure 13
 Figure 13(a) shows a product modulator, which multiplies the signal x(t) and a
sinusoidal carrier wave at frequency fc to yield
xc(t) = x(t) cos 2πfct
 Choosing x(t) to be a low-pass signal with bandwidthW << fc, Figure 13 (b) depicts
the relationship between xc(t) and x(t). The modulated wave xc(t) can now be seen to
have a bandpass spectrum resulting from frequency translation.
 If x(t) contains a sinusoidal component Amcos2πfmt, multiplication by a sinusoidal
carrier wave cos2πfct with fc >> fm yields
𝐴𝑚 𝐴𝑚
(Am cos 2πfmt) × (cos 2πfct) = cos 2π(fc − fm)t + cos 2π(fc + fm) t
2 2
Where,
fc =frequency of carrier signal
fm = frequency of modulated signal
 Waveforms of the signal, the carrier wave, and the product, as well as their respective
line spectra, are shown in Figure. Notice that the low frequency fm has been
translated to the higher frequencies fc ± fm.

Figure 13.1
 Next, let us consider an arbitrary low-pass signal x(t) with the typical amplitude
spectrum of Figure 13.1.(a). The amplitude spectrum of the modulated wave xc(t) will
now have two sidebands (lower and upper sidebands), each of width W on either side
of fc, as illustrated in
 Figure 13.1(b). Thus, we have a signal that can be transmitted over a bandpass system
with a minimum bandwidth of
B = 2W
 which is twice the bandwidth of the modulating signal. This process is then known as
double sideband modulation (DSB). Either the lower or the upper sideband may be
removed by filtering so as to obtain single-sideband modulation (SSB) with B=W, if
the bandwidth needs to be conserved.
 By choosing the carrier frequency fc at a value where the system has favorable
characteristics, the frequency translation by product modulation helps in minimizing
the distortion and other problems in system design.
 Now, in order to recover x(t) from xc(t), the product demodulator shown in Figure 14.
(a),which has a local oscillator synchronized in frequency and phase with the carrier
wave, can be used. The input y(t) to the low-pass filter is given by
indicating that the multiplication has produced both upward and downward frequency
translation.
 In Equation above, the first term is proportional to x(t), while the second looks like
DSB at carrier frequency 2fc. Then, if the low-pass filter in Figure 14(a) rejects the
high-frequency components and passes f ≤ W, the filtered output z(t) will have the
desired form z(t) = Kx(t).

(a) Product demodulator. (b) Spectrum prior to low-pass filtering.
Figure 14
SAMPLING
 Sampling is a process of converting a continuous time signal to discrete time signals.

 Thus a signal which was described at all instances of time, after sampling is described
only by its values at discrete instances of time commonly called samples.
 Number of samples taken per second is called the sampling frequency (fs). Hence time
between two samples called sampling interval can be defined as Ts = 1/fs
 The process of sampling can be understood as shown in Figure 15 (a).
 The switch is closed for a small interval of time at every Ts instance and for this time
the input is available on the output side. This can be modeled as shown in Figure
15(b) using a switching function s(t) as shown in Figure 15(c).
 Sampled signal is multiplication of continuous time signal x(t) with the switching
signal s(t).
(a) (b)
(b) (d)
Figure 15 (a) Switching sampler (b) Model of sampler (c) Train of pulses as switching
function (d) sampled signal
 As signal is represented only by discrete samples, the complete information is not

retained. However, sampling theorem gives the condition of proper sampling that if
satisfied it is possible to reconstruct the signal back from the sample values.

 Sampling Theorem: Minimum sampling frequency that is necessary to reconstruct
the signal back from the sampled signal should be twice that of the maximum
frequency component present preset in the signal being sampled.
 Thus if the signal to be sampled has all frequency components within range of 0≤f≤W
then fs ≥ 2W. This sampling frequency is called Nyquist rate.
 Higher the sampling frequency better will be the reconstruction of original signal
from the sampled signal.
 If the signal is sampled as sampling frequency less than the Nyquist rate, then it will
not be possible to reconstruct the original signal back and the information will be lost.
Error that occurs due to this is called aliasing.
Example
Consider the analog signal
a) Determine the minimum sampling rate required to avoid aliasing.

b) Suppose that the signal is sampled at the rate FS= 200 Hz. What is the discrete-time
signal obtained after sampling?
c) Suppose that the signal is sampled a: the rate FS = 75 Hz. What is the discrete-time
signal obtained after sampling'!
d) What is the frequency 0 < F < FS/2 of a sinusoid that yields samples identical to those
obtained in part (c)?
Solution
a) The frequency of the analog signal is F = 50 Hz. Hence the minimum sampling rate
required to avoid aliasing is FS = 100 Hz.
b) If the signal is sampled at FS= 220 Hz. the discrete-time signal is
c) If the signal is sampled at FS= 75 Hz. the discrete-time signal is
d) For the sampling rate of FS= 75 Hz, we have
F= f FS = 75f
The frequency of the sinusoid in part (c) is f = 1/3. Hence
F = 25 Hz
Clearly, the sinusoidal signal

Sampled at F, = 75 samples/s yields identical samples. Hence F = 50 Hz is an alias of
F = 25 Hz for the sampling rate F, = 75 Hz.
PULSE MODULATION
 Pulse modulation systems represent a message signal by a train of pulses.

 Pulse modulation can be either analog or digital.
 In analog pulse modulation, the amplitude, the width or position of the carrier pulse is
changed in accordance with the modulating signal. The three basic pulse modulation
techniques are Pulse Amplitude Modulation (PAM), Pulse Width Modulation (PWM) and
Pulse Position modulation (PPM).
Classification
Figure 16
General block diagram
Figure 17
 The pulse generator produces a pulse train with the sampled values carried by the
pulse amplitude, duration, or relative position. These are then known as pulse
amplitude modulation (PAM), pulse duration modulation or pulse width modulation
(PDM or PWM), and pulse position modulation (PPM), respectively.
 At the output end, the modulated pulses are converted back to sample values for
reconstruction by low-pass filtering.
PULSE AMPLITUDE MODULATION (PAM)

 Pulse Amplitude Modulation (PAM) is based on a conversion the signal into a series
of amplitude-modulated pulses as illustrated in Figure 18
Figure 18
 In PAM the amplitude of a constant width, constant-position pulse is varied according

to the amplitude of the sample of the analog signal.
 PAM waveforms resemble the original analog signal more than the waveforms for
PWM or PPM.
 This is used as an intermediate form of modulation with PSK, QAM, and PCM,
although it is seldom used by itself.
Pulse Width Modulation (PWM)
 It is sometimes called pulse duration modulation (PDM) or pulse length modulation

(PLM).
 In PWM width of a constant amplitude pulse is varied proportional to the amplitude
of the analog signal at the time the signal is sampled
 PWM used in special-purpose communications system mainly for the military but are
seldom used for commercial digital transmission.
 Figure 19 shows how PWM works on analog information signal.
Figure 19
Pulse Position Modulation (PPM)
 In PPM the position of a constant-width pulse within a prescribed time slot is varied
according to the amplitude of the sample of the analog signal.
 The higher the amplitude of the sample, the farther to the right the pulse is positioned
within the prescribed time slot.
 The highest amplitude sample produces a pulse to the far right, and the lowest
amplitude sample produces a pulse to the far left.
 It is used in special-purpose communications system mainly for the military but are
seldom used for commercial digital transmission
 Figure 20 shows how PPM works on analog information signal

Figure 20
MULTIPLEXING
 Multiplexing is an operation where in two or more signals are transmitted jointly over
the same transmission channel.
 Multiplexing helps to efficiently use resources for communication more information.
 There are two commonly used methods for multiplexing.

1. Time division multiplexing (TDM)
2. Frequency division multiplexing (FDM)
Time division multiplexing (TDM)
 In TDM the same transmission channel is used by more than one source of
information in time shared mode. Information from each source is transmitted on the
channel one-by-one. Basic model of TDM is shown in Figure 21.
Figure 21. Basic model of TDM system.
 On the input side an electronic switch obtains samples from each input every Ts
seconds.
 The sample taken is passed over the transmission line. Similarly on the output side
another synchronized electronic switch distributes the samples to individual channels
for reconstruction.
 Low pass filters (LPF) ensures that sampling and reconstruction occurs without errors
due to sampling.
Application of TDM: Network data transmission, ISDN, WAV audio standard etc
Frequency division multiplexing (FDM)

 In FDM more than one signal are transmitted over a single communication channel at
different frequencies.
 FDM system works on sharing the available bandwidth of the communication
channel. Basic block diagram of FDM is shown in Figure 22.
BPF1 Demodulator
Signal 1 Modulator 1 Signal 1
(fc1) 1
Carrier fc1
Common
Communication
Channel BPF2 Demodulator
Signal 2 Modulator 2 Mixer Signal 2
(fc2) 2
Carrier fc2
BPF3 Demodulator
Signal 3 Modulator 3 Signal 3
(fc3) 3
Carrier fc3
Figure 22 Block diagram of FDM.
 On the input side each signal is modulated at using different carrier frequencies.
These signals of different frequencies are mixed and transmitted over the channel.
 On the receiver side the signal is given to number of bandpass filter designed with
different band frequencies.
 The band frequencies are corresponding to carrier frequency on the input side.
Bandpass filter will allow to pass signal corresponding to specific frequency only.
 Thus the signals that were mixed gets separated and the information signal can be
received by performing demodulation.
Application of FDM: Telephone system, TV broadcasting, FM radio
INTERFERENCE
Interference refers to the effect of unwanted signals/phenomenon that contaminate (introduce

error) the information signal.
Interfering signals can enter the system in following ways:
 Capacitive coupling, because of the stray capacitance between the system and an
external voltage
 Magnetic coupling, because of the mutual inductance between the system and an
external current
 Radiative coupling, because of electromagnetic radiation impinging on the system,
particularly in the channel
 Ground-loop coupling, because of the currents flowing between different ground
points
Interference can be of different types

 AC hum due to power lines
 High frequency pulses
 Erratic waveforms known as statics
Effect of interference is reduced generally through following practices.
 Shielding i.e. enclosing the system inside a conducting box which is connected to
earth, so that any interfering signal will get directly by pass to ground.
 Interference is generally a common mode signal and hence this can be rejected using
differential amplifier having high CMRR (Common Mode Rejection Ratio).
 Using appropriate filters that will help to separate interfering signal from information
signal on basis of their frequencies.
NOISE
 Any unwanted signal that contaminates the information signal is called Noise.
 Noise may get added to the information signal from number of sources both external
and internal to the system.
 Noise can be categorized into four types
1. Thermal noise
2. Intermodulation noise
3. Cross talk
4. Impulse noise
Thermal noise
 Thermal noise is due to random motion of electrons in the wire. It is present in all
electronic devices and transmission line. It is proportional to temperature. It uniformly
distributed over all frequencies and hence also called as white noise.
Thermal noise power = N = kTB Watts

Where k = Boltzman’s constant
T = Temperature in Kelvin
B = Bandwidth
Intermodulation
 Intermodulation noise is generated when signals with different frequencies are
transmitted over common transmission channel as in FDM. These produces additional
components with frequencies equal to sum and difference of signal frequencies
traveling on the medium
Crosstalk
 Crosstalk basically means interference between two adjacent lines carrying
information signal. It occurs due to electrical coupling between nearby conductors.
Very common example of crosstalk is over telephone lines.
Impulse noise
 Impulse noise is a kind of momentary noise that may be generated due to external
electromagnetic disturbance, lightning etc. It thus different from the earlier three noise
which are regular in nature.
SIGNAL TO NOISE RATIO (SNR)
 Signal to noise ratio is defined as

Average signal power
SNR =
Average noise power
 SNR is ratio of desired signal power to unwanted noise power.
 SNR indicates the effect of noise over the signal. It should be as high as possible.
 SNR is a ratio of two powers. So it is often defined in decibels (dB).
[SNR]dB = 10 log10 SNR
ATTENUATION
 As the signal travels over a distance on the transmission line it losses some energy in
form of heat due to resistance of the medium. Because of this strength of the signal
reduces. This is called attenuation.
 Attenuation is expressed in decibels as
Pout
Attenuation = 10 log10
Pin
Where Pin = power at sending end

Pout = power at receiving end
 Effect of attenuation can be reduced by introducing amplifiers (generally called

repeaters) on the transmission line.
PRACTICAL APPLICATION: A CASE STUDY
Antinoise Systems - Noise Cancellation
 Traditionally sound-absorbing materials have been used quite effectively to reduce

noise levels in aircraft, amphitheaters, and other locations. An alternate way is to
develop an electronic system that cancels the noise.
 For passengers in airplanes, helicopters, and other flying equipment, a proper
headgear is being developed in order to eliminate the annoying noise.
 For industrial workers who are facing long-term ill effects due to various noises at
their workplace and for persons who are irritated by the pedestrian noise levels in
certain locations, antinoise systems that nearly eliminate or nullify noise become very
desirable.

Figure 24 Block diagram of antinoise system to suppress the noise in an aircraft.
 Figure 24 illustrates in block-diagram form the principle of noise cancellation as

applied to an aircraft carrying passengers.
 The electric signal resulting after sampling the noise at the noise sources is passed
through a filter whose transfer function is continuously adjusted by a special-purpose
computer to match the transfer function of the sound path.
 An inverted version of the signal is finally applied to loudspeakers, which project the
sound waves out of phase with those from the noise sources, nearly canceling the
noise. Microphones on the headrests monitor the sound experienced by the airline
passengers so that the computer can determine the proper filter adjustments.
 Signal processing, which is concerned with manipulating signals to extract
information and to use that information to generate other useful electric signals, is
indeed an important and far reaching subject.
Example:
1) Determine whether or not each of the following signals is periodic. In case a signal is
periodic, specify its fundamental period.
a) x(n) = 3 cos(5𝜋 + n/6)
b) x(n) = 2exp[ j(𝜋 /6 - 𝜋)]
c) x(n) = cos(n𝜋f2) - sin(𝜋n/8) + 3cos(n𝜋/4 + 𝜋/3)
2) Classify the following signals into energy-type or power-type signals, and determine
the energy or power content of the signal.

3) For the power-type signals given, find the power content in each case.
4) Let x(t) = 12 cos 2π100t + 8 cos 2π150t, and xc(t) = x(t) cos 2πfct, where fc = 600 Hz.
Sketch the amplitude spectrum.
(b) List all the frequencies in the product xc(t) cos 2π500t, where xc(t) is given in part
(a)
QUESTIONS
1. What is signal? Give classification of signal.

2. What is signal spectrum? Explain signal bandwidth.
3. Explain various signals processing operation in:
a) Analog communication systems
b) Digital communication systems
4. Explain various signals processing operation:
a) Filtering
b) Sampling
5. Explain multiplexing. Also Explain TDM and FDM
6. Explain in detail:
a) Noise and its type
b) Interference and its type

Basic Electronics ( 2110016 ) Chapter 6: Communication Systems
CHAPTER 6
COMMUNICATION SYSTEMS
1. Introduction to Communication Systems

2. Transmission lines
3. Waveguides
4. Antenna fundamentals
5. Electronics communication system
6. Radio broadcasting
7. Television broadcasting
8. Mobile communication systems
9. Digital communication system
10.GPS
11.QUESTIONS

1
6.1 Introduction to Communication Systems
 A communication system is the means of conveying the information from one place to
other, this information can be of different type such as sound, picture, music, computer
data etc.
 The communication between human being can be verbal, non-verbal, via body language,
facial expression, written words etc.
 Second World War played an important role in development of various communication
systems.
 After 1947 invention of transistor, the communication systems like satellite
communication system & fiber optic communication system are developed.
6.1.1 Communication Channels:

In any communication system, the communication channel provides transmitter and receiver.
Any one of the following communication channels can be used:
 A pair of conducting wires.
 Coaxial cable
 An optical fiber cable.
 An underwater ocean channel. (Acoustical transmission of information)
 Free space for transmission using electromagnetic waves.
 Data storage media such as optical disc, magnetic disc etc.
 Figure 1 shows the frequency bands of the electromagnetic spectrum.
Wired Communication Channels:

 The wire line channels (twisted pair wires) are used primarily for telephone networks that
carry voice, data and video information but have bandwidth limitations.
 The co-axial cables are used for higher frequencies and they are guided Electromagnetic
Channels.
 The advantages of optical fiber cables are it has very large bandwidth, small size & less
interference made it reliable channel for communication.
Wireless Communication Channels:

 The Wireless communication systems use the free space as their communication medium
they do not need the wires for sending the information from one place to the other.
 The radio or TV broadcasting; satellite communication are the examples of the wireless
communication. These systems transmit the signal using a transmitting antenna in the
space.
 The transmitted signal is in the form of electromagnetic waves. A receiving antenna will
Pick up this signal and feed it to the receiver.
 Wireless communication can be used for the long distance communication from country
to the other or even from one planet to the other.
 The size of transmitting antenna depends on the wavelength of the signal being
transmitted.

2
Figure-1 Frequency bands of the electromagnetic spectrum. (Source: A. Carlson, Communication Systems,
3rd ed., McGraw-Hill, New York, 1986.)

3
6.1.2 Modes of propagation of EM Waves
 The three possible modes in which an EM wave can propagate through space are:
o Ground wave propagation.
o Sky wave propagation
o Space wave propagation or line of sight (LOS) propagation
 Once the signal leaves the antenna it can take any of the following three paths.
 The three basic paths that a radio signal can take are:
1) Along the surface of the earth (ground wave propagation).
2) Up to the layer called "ionosphere" and back to the earth (sky wave propagation).
3) From transmitter to receiver in a straight line. (Space wave propagation)
 The type of propagation is decided by the path taken by the signal to reach the receiver
from the transmitter.
 The path taken by a radio signal depends on many factors including the frequency of the
signal, atmospheric conditions and the time of day.
 The figure 2 shows the relation between the type of propagation and frequency.
Figure-2 Relation between the type of propagation and frequency
 Ground Wave propagation:
Figure-3 Ground Wave propagation
 The ground or surface wave leaves the antenna and remains closed to the earth. The
ground wave will actually follow the curvature of the earth and therefore can travel a
distance beyond the horizon. Figure 3 shows the Ground wave propagation.

4
 The ground wave propagation is the strongest at the low and medium frequency ranges.
The ground wave is the path chosen by the signal when the frequency is between 30 kHz
and 3 MHz.
 In the AM radio broadcasting operating in MW band.
 The VLF transmission is used for ship communication such as radio navigation and
marine mobile communications.
 Sky Wave propagation - The ionosphere:
Figure-4 Sky Wave propagation

 In sky wave propagation, the transmitted signal travels into the upper atmosphere where
it is bent or reflected back to earth.
 This bending or reflection of the signal takes place due to the presence of a layer called as
Ionosphere in the upper atmosphere.
 Due to ionization, this part of the atmosphere becomes electrically charged. The atoms
take an extra electron or lose one to become negative or positive ions respectively.
 The free electrons are also present. This layer of ions is known as ionosphere. It is a thick
but invisible layer.
 Along with the ultraviolet radiation, the alpha-α, beta-β and gamma-γ radiations from the
sun and the cosmic rays are also responsible for the ionization.
 Sky wave propagation is preferred for the short wave (SW) band of frequencies (3 MHz-
30 MHz).
 Above 30 MHz the EM waves get absorbed by the ionosphere so, communication is not
possible.
 Space Wave propagation (Line of Sight propagation):
 For the frequencies above 30 MHz the space wave propagation is used.it takes place by
the space waves or direct waves. Figure 5 shows the space wave propagation.
 These waves travel in a straight line directly from the transmitting antenna to the
receiving antenna.
 Application of space wave propagation is: TV broadcasting, FM radio broadcasting,
Microwave links, Satellite Communication.

5
Figure-5 Space Wave propagation
6.1.3 Electromagnetic (EM) Waves
Figure-6 EM Wave
 Figure 6 shows the EM wave. The electromagnetic waves are oscillations, which
propagate through free space. They travel through free space at the speed of light.
 These waves are known as electromagnetic waves because the electric and magnetic
fields are simultaneously present.
 The directions of these fields are perpendicular to each other and to the direction of
propagation of the wave.
Characteristic Impedance:
 The ratio between the electric field intensity and magnetic field intensity is called as
characteristic impedance of the medium and it is expressed in ohms.
Polarization:

6
 The polarization of a plane EM wave is simply the orientation of the electric field vector
with respect to the earth surface.
 If the polarization remains constant then it is called as the linear polarization. The linear
polarization can be of two types:
o Horizontal polarization
o Vertical polarization
6.2 Transmission Lines

 The transmitter output is in the form of electrical signal at the desired frequency of
operation.
 This electrical signal is taken from the transmitter output to the transmitting antenna by
special conductors, called “transmission lines” as shown in figure 7.
Figure-7 Application of transmission line
 The receiving antenna receives the EM waves transmitted by the transmitting antenna and
converts them into electrical signals.
 These electrical signals are connected to the receiver via transmission lines.
 Transmission lines are conducting wires used for connecting points that are some
distance apart from each other.
 They are also used for impedance matching between transmitter and antenna and from
receiving antenna to receiver.
 All the practical transmission lines are arranged in some uniform pattern, to simplify the
calculations, reduce cost and increase convenience.
6.2.1 Types of transmission lines:
 There are two types of commonly used transmission lines as follows :

o Coaxial (unbalanced) line and
o Parallel-wire (balanced) line
 The transmission lines can be used for wired communication up to frequencies as high as
18 GHz.
 Transmission lines can be rigid or flexible; air spaced or filled with different dielectric
materials.
 They consist of two conductors.
 Figure-8 shows the types of transmission lines.

7
Figure-8 Types of Transmission Lines (parallel wire & coaxial line)
6.2.2 Equivalent circuit representation:
 Figure-9 shows the general equivalent circuit of transmission line.

 Each conductor has certain length and diameter, so it will have inductance and resistance.
 The wires are separated by a medium called dielectric which is not a perfect insulator;
some current will flow through it from one conductor to the other. This will give rise to
conductance G.
 There is small capacitance present between the two conductors.
Figure-9 General equivalent circuit of transmission line

6.2.3 Primary line constants:
 The four constants are: distributed series inductance, a distributed shunt distributed series
resistance and a distributed shunt conductance.
o R is series resistance in ohms/unit length
o L is series inductance in henries/ unit length
o C is shunt capacitance in farads/unit length
o G is shunt conductance in suscptance/unit length.
These are known as primary line constants or primary parameters of line.
6.2.4 Secondary Line Constant:
 The secondary line constants or line parameters are:

o Characteristic impedance
o Propagation constant

8
 Characteristic impedance:
The characteristic impedance is defined as:
Where ⍵ = 2𝜋f
 Propagation constant:
The propagation constant of a transmission line is defined as follows:
Where is called attenuation constant and is the phase constant.
6.2.5 Advantages:
 Simple construction
 Flexibility
 High mechanical strength
 Not very expensive
6.2.6 Disadvantages:
 It can be used only for point to point communication.

 Power loss increase with increase in frequency.
 It cannot handle high voltage.
6.3 Waveguides
 Any system of conductors and insulators carrying EM waves is called waveguide. It is

used at microwave frequencies (300 MHz to 300 GHz)
 At higher frequency, when power levels are large and attenuation in transmission line is
significant, connections between system components are often made through waveguide.
 Which are usually hollow, closed, rigid conductor configurations through which wave
propagate.
 Waveguides are preferred to transmission lines because at very high frequency they are
less lossy than transmission lines.
 Figure-10 shows the simplest shape of the waveguides: rectangular and circular.
6.3.1 Advantages:
 Small size.
 Reduced losses as compared to a transmission line.

9
 Operation at very high frequencies is possible (up to 325 GHz).

 They are simpler to manufacture.
 Due to absence of the inner conductor, there is no possibility of flashover or sparking
between the inner and outer conductors.
 Large power handling capability.
Figure-10 Types of Waveguides (a) Rectangular (b) Circular
6.3.2 Disadvantages:
 Low frequency operation is not possible as they become bulky at low frequencies.
 Absolute efficiency is low.
6.4 Antenna Fundamentals
 Antenna is a metallic object, often a wire or collection of wire which is used to perform
following functions :
o It couples the transmitter output to the free space, or the received input to the
receiver.
o It must be capable of radiating or receiving the electromagnetic waves.
o It converts the high frequency current into electromagnetic waves and vice versa.
Figure-11 shows how an antenna can be used in communication system.
Figure-11 Communication system involving antennas

10
Where,
Pt =Power generated by the transmitter
Lt, Lr= Transmitting-path and receiving-path loss
Lta, Lra= Transmitting antenna loss and receiving antenna loss
R= Distance of separation between the antennas
S= Signal power available at the lossless antenna output
Sr= Signal power available at the receiver input
6.4.1 ISOTROPIC RADIATOR:
 An isotropic radiator is a point source antenna which radiates equally in all the directions.
 All the points at distance “r” from the source lie on the surface of the sphere and have
equal power densities.
 The electromagnetic waves spread uniformly in all the directions in space.
 The isotropic radiator is used for study the radiation patterns of other antennas. Figure-12
shows the isotropic radiator.
Figure-12 Isotropic radiator
6.4.2 Important Terms and Definitions:
Radiation pattern of Antenna:
 A graph or diagram which tells us about the manner in which an antenna radiates power
in different directions is known as the Radiation pattern of antenna. Figure-13 shows
radiation pattern of an antenna.
 For a receiving antenna the diagram is known as the directional pattern of the antenna.
Directive Gain:
 The power gain of an antenna is defined as ratio of power fed to an isotropic antenna to
the power fed to a directional antenna to develop the same field strength at the same
distance, in the direction of maximum radiation.

11
Figure-13 Radiation pattern of an antenna
Antenna Resistance:
 The antenna resistance has two components

o Radiation resistance
o Resistance due to the actual losses in the antenna.
Beam width of Antenna:
 Beam width of an antenna is defined as the frequency range over which the operation is
satisfactory. Figure-14 shows the beam width of antenna.
 It is the frequency difference between the half power points.
 There are two types of bandwidths. One is related to the radiation pattern and the other
one is related to its input impedance.
 The angular separation between two 3 dB down points on the field strength of radiation
pattern of antenna.
 Beam width is expressed in degrees.
Figure-14 Beam width of antenna
6.4.3 Types of Antennas:
 Different types of antennas are being used depending on the frequency range, gain
requirement etc.

12
Half wave Dipole Antennas:

 The dipole antennas are also called as the resonant antennas.
 A resonant transmission line has a resonant length which is multiple of half wavelength
(λ/2).
 The dipole antennas have lengths of which are all multiples of λ/2. Hence the dipole
antennas are resonant antennas.
Radiation Pattern:
 The radiation is maximum at right angles to the dipole and reduces on both the side of the
maximum. The radiation is zero in line with the antenna. Figure-15 shows half wave
dipole with its radiation pattern.
Figure-15 Half wave dipole with its Radiation pattern
 Folded Dipole Antenna:
 The dipole antenna used in the Yagi antenna is folded dipole. The folded dipole is a
single antenna but it consists of two elements. Figure 16 shows the folded dipole antenna.
 The first element is fed directly while the second one is coupled inductively at its ends.
 The radiation pattern of the folded dipole is same as that of the straight dipole.
 But the input impedance of the folded dipole is four times higher than that of the straight
dipole.
Figure-16 Folded dipole antenna
Advantages of Folded Dipole:

 Higher input resistance.
 Higher bandwidth.
 Ease of construction.

13
 Cost efficient.
 Impedance matching.
 Yagi-Uda Antenna:
 The Yagi antenna or Yagi-Uda antenna it is called group of dipole antenna and one or
more parasitic element.
 Figure-17 and 18 shows the Yagi antenna & radiation pattern of respectively.
 The Yagi antenna can be used as a transmitting or receiving antenna.
 The YAGI-UDA array is commonly used for television reception. It is usually seen with
3 to 12 elements, although even 40 elements are sometimes employed. Design
frequencies from 100 to 1000 MHz are typical.
 A half-wave or folded half-wave dipole is the active element. The array consists of
parallel dipoles, all lying in the same plane. The reflector, which reflects waves back
toward the active element, enhances radiation in the axis of the array.
 The radiation pattern, with linear polarization, exhibits a principal lobe in the direction.
The other elements, called directors, are designed to enhance radiation in the direction.
Gain increases with the number of elements and is often in the range of 10 to 20 dB. The
Bandwidth is usually small.
Figure-17 Construction of Yagi antenna Figure-18 Radiation pattern of Yagi-antenna
Advantages:
 It is a directional antenna.
 It has a moderate gain of about 7dB.
 It is very compact.
 Large bandwidth.
 Can be used at high frequencies.
 Adjustable front-to-back Ratio.

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Disadvantages:
 The gain is not very high.
 Needs a large number of elements to be used.
Applications:
 Yagi antenna is used as HF transmitting antenna.
 It is also used at higher frequencies at VHF as TV receiving antenna.
 Microwave Antennas:
 The frequency band from l to 100 GHz is called as the microwave frequency antennas
operating in this frequency band are called as the microwave antennas.
 The microwave antennas are expected to be highly directional.
 Figure-19 shows Dish antenna with a parabolic reflector and direction pattern.
 Types of microwave antennas are:
o Dish antenna
o Horn antenna
 Dish Antenna:
 Dish antennas are the microwave antennas which use parabolic reflectors.
 The special geometric property of a parabolic reflector makes it very useful as a
microwave light reflector.
Radiation pattern:
 The radiation pattern includes a narrow main lobe in the desired direction AB and small
side lobes in all other directions.
Figure-19 Dish antenna with a parabolic reflector and direction pattern

Advantages:
 Very high gain.
 High directivity.
 Relatively narrow beam width.

15
Disadvantages:
 Presence of side lobes.
 Reception of signals from undesirable sources
 Side lobes created due to diffraction.
Applications:
 Satellite TV reception.
 Point to point microwave links.
 Horn Antennas:
 When a waveguide is opened, it becomes an electromagnetic horn. Thus waveguides are

terminated into horns.
 If the impedance matching is ensured, then all the energy travelling in the forward
direction to be radiated.
 The directivity is improved and diffraction is reduced. Figure-20 & 21 shows different
types of horn antennas & radiation pattern respectively.
 The three most commonly used horn configurations are:
1. Sectoral
2. Pyramidal
3. Circular
(a) Sectoral (b) pyramidal (c) Circular

Figure-20 Horn antennas
Applications:
 As feed antennas.
 All highly directional microwave antennas
 Satellite antennas.
 Antennas on the spacecrafts.

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Figure-21 Radiation pattern of horn antennas
6.5 ELECTRONIC COMMUNICATION SYSTEMS
 Classification of electronic communication systems on the basis of nature of information

signal.
1. Analog communication systems
2. Digital communication systems.
Figure-22 Classification based on analog and digital communication
Examples of analog modulation:

 Amplitude Modulation (AM)
 Frequency Modulation (FM)
 Phase Modulation (PM)
 Pulse Amplitude Modulation (PAM)
 Pulse Width Modulation (PWM)
 Pulse Position Modulation (PPM)
Applications:
 Radio broadcasting (AM and FM.)
 TV broadcasting
 Telephones
 In the subsequent sections we are going to discuss the analog modulation systems one by
one.

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6.5.1 Amplitude Modulation (AM)
 Amplitude modulation (AM) is the type of analog modulation in which the amplitude of
the carrier is varied in proportion with the instantaneous value of information signal.
Figure-23 Different types of AM
Conventional AM (DSB-FC):
 The conventional AM is also known as double side band full carrier (DSB-FC) system.
 The frequency of the sinusoidal carrier is much higher than that of the modulating signal.
Generation of AM wave:
Figure-24 Generation of AM wave

 Figure-24 shows the principle of generation of AM waves. The oscillator produces a
sinusoidal carrier of desired frequency.
 This carrier along with the modulating signal is applied to a multiplier circuit. At the
output of the multiplier we get the AM wave. Figure-25 shows AM waveforms.

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Figure-25 AM waveform
Expression of AM wave
 Let the modulating signal be sinusoidal and be represented as,
Where, is the instantaneous amplitude of the modulating signal,

is the peak amplitude,
and
= frequency of the modulating signal.
 Let the carrier signal also be sinusoidal at a much higher frequency than that of the
modulating signal. The instantaneous carrier signal is given by,
Where, = Peak carrier amplitude,

= Carrier frequency and
.
 The AM wave is expressed by the following expression,
 Let , be the modulation index.

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 When , the modulation index m has values between o and 1 and no distortion is
introduced in the AM wave. But if then m is greater than 1. This will distort the
shape of AM signal. The distortion is called as over modulation
 This expression represents the Amplitude Modulated (AM) signal i.e. DSB-FC in time.
Frequency spectrum of the AM wave
 So consider the equation for AM wave
 As per the definition of the modulation index,
 Simplify we get,
 For the second term in the above expression use the following identity:
 Gets simplified as follows:
 In the above equation first term is carrier, second is upper sideband (USB) and third is
lower sideband (LSB)
 The bandwidth of the AM signal is given by the subtraction of the highest and the lowest
frequency component in the frequency spectrum.
Figure-26 Single sided frequency spectrum of AM wave

Advantages:
 AM transmitters are less complex.
 AM receivers are simple, detection is easy.
 AM receivers are cost efficient.
 AM waves can travel a longer distance.

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 Low bandwidth.
Disadvantages:
 Power wastage takes place.
 AM needs larger bandwidth.
 AM wave gets affected due to noise.
Applications:
 Radio broadcasting.
 Picture transmission in a TV system.
AM message demodulation: Standard AM envelope Detector:

 The modulated signals are transmitted by the transmitter via air medium or wire medium.
 At the receiver, the original information signal is separated from the carrier. This process
is called as demodulation or detection. Detection is exactly the opposite process of
modulation.
 The original modulation signal is recovered back from the AM signal by the process of
detection.
 Thus the process of detection or demodulation is the process of recovering the message
signal from the received modulated signal
Operation:
 The standard AM wave is applied at the input of the detector.
 In detector, at every positive half cycle of the input the detector diode is forward biased.
 It will charge the filter capacitor C connected across the load resistance R to almost the
peak value of the input voltage.
Figure-27 (a) Standard AM envelope detector (b) its response

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 As soon as the capacitor charges to the peak value, the diode stops conducting. The
capacitor will discharge through R between the positive peaks.
 The discharging process continues until the next positive half cycle. When the input
signal becomes greater than the capacitor voltage, the diode conducts again and the
process repeats itself.
 The input-output waveforms for the envelope detector shows the charging discharging of
the filter capacitor and the approximate output voltage.
 The envelope of the AM wave is being recovered successfully.
 This time constant should not be too long which will not allow the capacitor discharge at
the maximum rate of change of the envelope.
6.5.2 Angle Modulation:
 In angle modulation either frequency or phase of the carrier is varied according to the
message signal, but the carrier amplitude is constant.
6.5.3 Frequency Modulation (FM)
 In sinusoidal frequency modulation (FM), the modulating signal

is a pure sinusoidal signal. The carrier signal c(t) is also a sinewave at much higher
frequency.
 FM is a system of modulation in which the instantaneous frequency of the carrier is
varied in proportion with the amplitude of the modulating signal. The amplitude of the
carrier signal remain constant. Thus the information is conveyed via frequency changes.
 The amount by which the carrier frequency varies from its unmodulated value is called as
deviation. The deviation (δ) is made proportional to the instantaneous value of
modulating voltage.
 The rate at which this frequency variation or oscillations takes place is equal to the
modulating frequency . Figure 28 shows FM waveforms.

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 The amplitude of the FM wave always remains constant. This is the biggest advantage of
FM.
Figure-28 FM waveform
 For the FM wave the modulating signal be a sinusoidal signal of amplitude and
frequency .
 The unmodulated carrier is represented by the expression,
 In FM, the frequency (f) of the FM wave varies in accordance with the modulating
voltage. The instantaneous frequency of the FM wave is denoted by and is given by,
 Where = and it is called as frequency deviation. Where is a constant with

units Hz/Volts.
 Frequency deviation represents the maximum departure of the instantaneous frequency
of the FM wave from the carrier frequency .
 Since = the frequency deviation is proportional to the amplitude of modulating
voltage and it is independent of the modulating frequency .
 The Maximum frequency of FM wave is,
The minimum frequency of a FM wave is

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Equation for the FM wave is
 But i.e. the modulation index of FM wave. Hence the equation for FM wave is
given as,
 The modulation index of an FM wave is defined as,
 In AM the maximum value of the modulation index m is 1. But for FM the modulation
index can be greater than 1.
 Percentage modulation of FM wave
 Bandwidth of FM is greater than AM.
Generation of FM wave:
 Figure 29 shows the block schematic of a simple FM modulator. It is a simple voltage
controlled oscillator (VCO).
 The modulating signal instantaneous value. Thus we get an FM wave at the output of the
VCO.
Figure-29 generation of FM signal
Advantages of FM:
 Improved noise immunity
 Low power is required to be transmitted to obtain the same quality of received signal at
the receiver.
 Covers a larger area with the same amount of transmitted power.

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 Transmitted power remains constant.

 All the transmitted power is useful.
Disadvantages of FM:
 Very large bandwidth is required.
 Since the space wave propagation is used, the radius of transmission is limited by the line
of sight.
 FM transmission and reception equipment‟s are complex.
Application of FM:
 Radio broadcasting
 Satellite communication
 Point to point communication
 Sound broadcasting in TV
 Police wireless
Figure-30 FM detector
Demodulation of FM:
 A detector or demodulator is a circuit which receives an FM wave at its input and
produces the message signal or modulating signal at its output.
 Demodulator or detector is exactly opposite to the modulation process.
 The AM detector is basically an envelope detector. But FM demodulator is basically a
frequency to amplitude converter.
 It is expected to convert the frequency variation in FM wave at its input into amplitude
variations at its output to recover the original modulating signal. Figure 30 shows FM
detector.
Requirements of FM detector:
The FM demodulator must satisfy the following requirements
 It must convert frequency variations into amplitude variations
 This conversion must be linear and efficient.
 The demodulator circuit should be insensitive to amplitude changes. It should respond
only to the frequency changes.
 It should not be too critical in its adjustment and operation.

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A general FM demodulator:
Figure-31 General FM demodulator

 Figure-31 shows the block diagram of a general FM demodulator. The FM signal which
is to be demodulated is applied at the input of the FM to AM converter. This block
converts the frequency variations in FM signal into proportional amplitude variations.
 The FM demodulator is a simple envelop detector discussed earlier which demodulates
AM and recovers the original modulating signal.
Pre-emphasis:
 In, FM the noise has a greater effect on the higher modulating frequencies. This effect
can be reduced by increasing the value of modulation index for higher modulating
frequencies .
 This can be done by increasing the deviation δ and δ can be increased by increasing the
amplitude of modulating signal at higher modulating frequencies.
 Thus if we boost the amplitude of higher frequency modulating signals artificially then it
will be possible to improve the noise immunity at higher modulating frequencies.
 The artificial boosting of higher modulating frequencies is called as pre-emphasis.
 Boosting of higher frequency modulating signal is achieved by using t pre-emphasis
circuit at the transmitter.
De-emphasis:
 The artificial boosting given to the higher modulating frequencies in the process of pre-
emphasis is nullified or compensated at the receiver by a process called de-emphasis.
 The artificially boosted high frequency signals are brought to their original amplitude
using the de-emphasis circuit. This is done at the FM receiver.
6.5.4 Phase Modulation (PM)
 Phase modulation is very similar to the frequency modulation. The only difference is that
the phase of the carrier is varied instead of varying the frequency. The amplitude of the
carrier remains constant.
 As shown in figure 32 as the modulating signal goes positive, the amount of phase lag
increases with the amplitude of the modulating signal. The effect is that the carrier signal
is stretched or its frequency is reduced.

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 When the modulating signal goes negative, the phase shift becomes leading. This causes
the carrier wave to be effectively compressed. The effect is as if the carrier frequency is
increased.
 Thus phase modulation produces frequency modulation.
 Note that the PM wave of figure 5 is the same as the FM wave produced by dx(t)/dt i.e.
the derivative of x(t) with respect to time.
 So in figure-32 we have plotted the derivation of x(t) which is original x(t) shifted by 90°.
Figure-32 PM modulation waveform
 From the discussion it is clear that the difference between FM and PM waves can be
made only by comparing with the original modulating wave.
 The PM wave is obtained by varying the phase angle ϕ of a carrier in proportion with the
amplitude of the modulating voltage.
If the carrier voltage is expressed as,
Then the PM wave can be expressed as,
 Here = maximum phase change corresponding to the maximum amplitude of the

modulating signal. For the sake of uniformity let us modify the equation as,
( )
Where = modulating index of PM.
 The FM and PM waves look identical when their modulating index are identical.
However if we change the modulating frequency then will change but there is no
change in the value of .

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Generation of PM:-
Figure-33 General PM demodulator

 Figure-33 shows the generation of PM wave. The modulating signal is applied to a
differentiator.
 Then the differentiated modulating signal is applied to the VCO to produce the PM wave.
 Bandwidth of PM is less than that for FM. The bandwidth of a PM signal can be
calculated from the maximum modulating frequency and the maximum amplitude of the
modulating signal.
6.6 RADIO BROADCASTING
 Radio (AM and FM) and television broadcasting are the most common familiar forms of
communication via analog transmission systems.
 The receiver used in radio and TV broadcasting are known as the super heterodyne
receivers.
6.6.1 Super heterodyne AM radio receiver:
 In super heterodyne AM every selected RF signal converted to a fixed lower frequency

called as the intermediate frequency (IF).
 This frequency contains the same modulation as the original carrier. The IF signal is then
amplified and detected to get back the modulating signal.
 As the IF is lower than the lowest RF signal frequency, the possibility of oscillations and
instability is minimized.
 Also the required value of Q for constant Bandwidth does not depend on the frequency of
desired signal, because the IF is constant and same for all the incoming RF signals.
 Thus the super heterodyne receiver solves all the problems associated with the RF
receiver.
 The radio and TV receivers operate on the principle of super heterodying. The block
diagram of a super heterodyne AM radio receiver is shown in figure-34.

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Figure-34 The Superheterodyne AM radio receiver

Operation:
 The DSB-FC or AM signal transmitted by the transmitter travels through the air and
reaches the receiving antenna. This signal is in the form of electromagnetic waves. It
induces a very small voltage into the receiving antenna.
 RF: The RF stage is an amplifier which is used to select the wanted signal and reject
other out of many, present at the antenna. It also reduces the effect of noise. At the output
of the RF amplifier we get the desired signal at frequency .
 Mixer: The mixer receives signals from the RF amplifier at frequency and from the
local oscillator at frequency such that
 Intermediate frequency (IF): The mixer will mix these signals to produce signals
having frequencies and . Out of these the difference of frequency
component i.e. is selected and all others are rejected. This frequency is called as
the intermediate frequency (IF). IF =
 In order to maintain constant difference between the local oscillator frequency and the
incoming frequency, ganged tuning is used. This is simultaneous tuning of RF amplifier,
mixer and local oscillator and it is achieved by using ganged tuning capacitors.
 The intermediate frequency signal is then amplified by one or more IF amplifier stages.
IF amplifier provide most of the gain and the bandwidth requirements of receiver.
Therefore the sensitivity and selectivity of this receiver do not change much with changes
in the incoming frequency.
 The amplified IF signal is detected by the detector to recover the original modulating
signal. This is then amplified and applied to the loudspeaker.
 AGC means automatic gain control. This circuit controls the gains of the RF and IF
amplifiers to maintain a constant output voltage level when the signal level at the receiver

29
input is fluctuating. This is done by feeding a controlling dc voltage to the RF and IF

amplifiers. The amplitude of this dc voltage is proportional to the detector output.
6.6.2 Super heterodyne FM radio receiver:
 Figure 35 shows the block diagram of a FM receiver. The first thing that strikes us is it‟s
similarly with the AM receiver.
 The FM receiver also operates on the principle of super heterodyning, as the AM receiver.
 The FM receiver is different from the AM receiver in the following way:
 The operating frequency in FM are much higher than in AM.
 The FM receivers need the circuits like limiter and de-emphasis.
 The FM demodulators are different from AM detectors.
 The method to obtain the AGC is different in FM receiver.
Figure-35 The Super heterodyne FM radio receiver
 The advantages of using the RF amplifier are:

o It improves the signal to noise ratio.
o It will match the receiver input impedance to the antenna impedance.
 Similar to AM receivers, the mixer stage in FM receiver will down convert the received
signal to intermediate frequency (IF).
 The IF produced at the output of the mixer is at 10.7 MHz in FM receivers as compared
to 455 to 470 kHz in AM receivers.
 IF amplifier used in FM receivers are similar to those used in the AM receiver but the IF
and the bandwidth required are much higher than those in the AM receivers. Here the IF
is 10.7 MHz and the bandwidth is 200 kHz.

30
 Due to the large bandwidth the gain per stage will be low. Therefore two or more IF
amplifiers are required to be used.
 The FM wave which is transmitted by the transmitter has constant amplitude. But while
travelling, noise and other unwanted signals get added to it and change its amplitude.
These unwanted amplitude changes in the received FM signal must be removed before
the signal goes for demodulation.
 Otherwise distortion appears in the demodulated signal as the demodulators react to
amplitude changes as well as frequency changes.
 The amplitude limiter will remove all the unwanted amplitude variations from the
received signal and it is always placed before the FM detector.
6.7 Television broadcasting

6.7.1 Introduction:
 The meaning of the word "Television" is to see at a distance. The first demonstration of
television was made in 1925 by J. L. Baird in London and by C. F. Jenkins in USA.
 In a TV system both picture and sound are to be transmitted simultaneously and then they
are to be received at a long distance.
 To transmit the sound + picture information, a transmitter along with a transmitting
antenna is needed and to receive this signal we need a receiving antenna and a TV
receiver.
 A television system is required to reproduce the shape of each object the brightness and
tonal contents, movements, sound, color and perspective contents of picture.
 The camera tube at the transmitter acts like a human eye. It converts the image into an
equivalent electrical signal- whereas the picture tube at the receiver converts the electrical
signal into an image. About 150,000 effective elements are displayed in each scene.
 There are 25 pictures or frames shown per second. This is related to the 50 Hz ac line
frequency. This is the minimum picture rate required to see a flicker free picture.
 A special type of scanning process called as the interlaced scanning is used by TV system
in order to reduce the effect of flicker.
6.7.2 TV camera:
 A TV camera tube is a transducer which converts, all the picture information into an
equivalent electrical signal.
 The amplitude of the electric signal produced at the output of camera tube is proportional
to the brightness of the point being scanned by the electron Beam.
 In order to synchronize the TV receiver with the TV transmitter, synchronizing (sync)
information is transmitted along with the picture information.
 At the receiver, the sync signals derived from the transmitted sync signal are used for
controlling the vertical and horizontal sync circuits.
 The transmission and reception of black and white pictures take place in this way.

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6.7.3 TV Transmitter:
 Color TV needs more information. It has to transmit brightness information like black
and white TV and also the color information.
 The color information is transmitted via chrominance or chrome signal.
 Actually the Red, Green and Blue colors are indicated, but all the other colors can be
made from these three basic colors.
 By adding these basic colors together in proper proportion, it is possible to generate any
color.
 FDM is used for interleaving the chrominance signal with the luminance signal. Figure
36 shows color TV transmitter.
Figure-36 TV Transmitter
TV camera:
 The first block in the TV transmitter is a TV camera which converts the optical
information such as intensity; color etc. into an electrical signal.
 The electrical signal obtained at the output of TV camera is called as "video signal.
Video amplifier:
 The video signal obtained at the output of the TV camera is weak. Therefore a video
amplifier is used to amplify it to an adequate level.
 This amplifier is a wideband amplifier with a bandwidth of about 5 kHz. This is
necessary because video signals can have frequencies anywhere between 0 to 5 MHz
Modulator:
 The amplified video signal acts as a "modulating signal." The other input to the
modulator is the "carrier'' signal generated by an RF oscillator.

32
Power amplifier:
 The power amplifier is used to raise the power content of the amplitude modulated video
signal to the required level, so that the transmitted signal can reach a long distance.
Diplexer:
 This is a combining network which connects the outputs of video section as well as the
sound section to a common transmitting antenna. It isolates these two sections from each
other.
Microphone:
 A microphone is used to convert the sound signal into an equivalent electrical signal.
Sound amplifier:
 An audio amplifier is used to amplify$ the weak audio signal coming from the
microphone. This amplified audio signal is then applied as a "modulating signal" to the
sound modulator.
Sound modulator:
 The audio signal from the audio amplifier will "frequency modulate" the carrier signal
produced by the RF oscillator. Thus sound is frequency modulated (FM).
Transmitting antenna:
 The transmitting antenna converts the AM video signal + FM sound signal into
electromagnetic waves. These waves are transmitted in all the directions. The
transmitting antennas are installed on hill tops or on tall building in order to increase the
range of transmission.
6.7.4 TV reciever:
Figure-37 TV receiver
Figure-37 shows color TV receiver which has following blocks.

33
Receiving antenna:
 A special receiving antenna called "Yagi-Uda" antenna is used to receive the TV
transmission.
RF and IF amplifier:
 The weak signal coming from the antenna is amplified by the RF amplifier to and
translated to a lower frequency called intermediate frequency (IF)
Detector:
 The detector will separate the video, audio and sync. Signals from each other.
Video amplifier:
 The demodulated video signal is amplified by a video amplifier to an adequate voltage
level. The video amplifier is a wideband amplifier having bandwidth of approximately 5
MHz
Picture tube:
 The amplified video signal is applied to the cathode of a picture tube. It will convert the
electrical signal into an optical signal, to reproduce the originally transmitted picture.
Sound detector:
 The separated sound signal is applied to the sound detector. It is an FM demodulator
which demodulates the frequency modulated audio signal to produce the original audio
signal.
Audio amplifier:
 The demodulated sound signal is amplified by the audio amplifier and the amplified
signal is used to drive a loud-speaker. The loud-speaker then converts this signal into
sound waves.
6.8 Mobile Communication Systems (Cellular System)

6.8.1 Cellular Concept
 Cellular phone is wireless communication just like cordless phone.

 In cell phone distance is not restricted to within home but one can travel in the city or
even - outside the city without interruption in communication.
 In the cellular system city is divided into small areas called „cells‟. Each cell is around l0
square kilometer.
 Each cell is (The cellular network is as shown in Fig. linked to central location called the
Mobile Telephone Switching Office (MTSO).
 MTSO coordinates all mobile calls between an area comprised of several cell sites and
the central office. Figure 38 shows the cellular network.

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Figure- 38 The Cellular Network

1. Cell:
 The basic geographic unit of a cellular communication system is called as a cell.
 Its shape is hexagonal.
 Cells are the base stations transmitting over small geographic areas.
 The size of a cell is not fixed. practically the shape of the cell may not be a perfect
hexagon figure 39 shows cell structure.
Figure-39 Cell structure

2. Cluster:
 A group of cells is called as a cluster.

 The cluster size (n) is not fixed. It depends on the requirements of a particular area.
 The l-G (first generation) cellular systems were analog systems. They use FM signal for
communication.
 The 2-G (Second Generation) cellular systems are all digital systems. The two most
widely used 2-G systems are :
l. GSM
2. IS-95.

35
6.8.2 Basic Structure of Mobile phone System:
 In the mobile communication either the transmitter or the receiver or both are going to be
movable. Figure 40 shows the basic structure of mobile telephone network.
Figure-40 Basic structure of mobile telephone network

Description:
 The task of the base stations is to act as an interface between the mobile phone and the
cellular radio system.
 The switching center acts as the interface between the public switched Telephone
Network (PSTN).
 If a mobile subscriber travels from one cell area to the other then it automatically gets
connected
 To base station of that cell. Thus the service provided to a mobile subscriber is
continuous without any break.
Functions of MTSO:
 The MTSO controls all the cells and provides the interface between each cell and the
main telephone office.
 As the vehicle moves from one cell to the next the system automatically switches from
one cell to the next.
Advantages of using MTSO

 It operates at a much higher frequency. So more spectrum space is available and so more
number of channels can be accommodated.
 Due to MTSO, the cellular system can use the concept of frequency reuse. This will
allow the cells to use the same frequency.
 The cells of different size can be accommodated.

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6.8.3 Evolution of Mobile Phones
 The first generation (1G) of cellular telephony was designed for voice communication
using analog signals.
 One of the important first generation (1G) mobile systems used in North America is
AMPS (Advanced Mobile Phone System). It is one of the leading analog cellular systems
in North America.
 It makes use of FDMA (Frequency Division Multiple Access) to separate channels in a
link.
 The second generation (2G) of cellular telephony was developed in order to improve the
quality of communication.
 The second generation was designed for digital voice. Three major systems in the second
generation (2G) are: 1 D-AMPS 2 GSM 3.IS-95
 The 3G (third generation) wireless systems show a tremendous improvement in the
field of wireless access. Multimegabit internet access, voice over internet is some of the
examples of 3G systems.
 The users are able to receive live music, conduct interactive web sessions and have a
simultaneous voice and data access using a mobile handset.
 The 3G version of 2G CDMA systems is called as CDMA 2000.
 The 3G evolution for GSM, 15-136 and PDC systems has lead to wideband CDMA (W-
CDMA) which is also known as Universal Mobile Telecommunication Service (UMTS).
Applications of 3G Cellular Services

 Personal applications
 Content applications
 Communications applications
 Productivity applications
 Business application
6.9 Digital Communication System
6.9.1 Introduction
 Definition: The modulation system or technique in which the transmitted signal is in the
form of digital. Pulses of constant amplitude, constant frequency and phase are called as
digital modulation System.
 Examples: Pulse Code Modulation (PCM) and Delta Modulation (DM) are the examples
of digital modulation.
 In the PCM and DM, a train of digital pulses is transmitted by the transmitter.
Applications of digital communications:

 Long distance communication between earth and space ships.
 Satellite communication.

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 Military communications which needs coding.

 Telephone systems.
 Data and computer communications.
6.9.2 Pulse Code Modulation:
 The PCM output is in the coded digital form. It is in the form of digital pulses of constant
amplitude, width and position.
 The information is transmitted in the form of code words. A PCM system consists of a
PCM encoder (transmitter) and a PCM decoder (receiver).
 The essential operations in the PCM transmitter are sampling, quantizing and encoding
figure 41 shows PCM transmitter.
Figure-41 PCM transmitter
 PCM is the simplest and oldest waveform coding scheme for processing an analog signal
by sampling, quantizing, and binary encoding.
 Sampling of an analog signal makes it discrete in time.
 Quantization consists of rounding exact sample values to the nearest of a set of discrete
amplitudes called quantum levels.
 The quantizer is said to be uniform when the step size between any two adjacent quantum
levels is a constant.
 After the quantization of message samples, the digital system will then code each
quantized sample into a sequence of binary digits (bits) 0 and 1.
 After quantization and coding the samples of the message, a suitable waveform has to be
chosen to represent the bits. This waveform can then be transmitted directly over the
channel figure-42 shows PCM receiver.

38
Figure-42 PCM receiver
 The operations of the receiver are basically the inverse of those in the transmitter.
 The first and most critical receiver operation is to reconstruct the originally transmitted
PCM signal as nearly as possible to minimize the effect of noise. Figure 43 shows PCM
waveform.
Figure-43 Waveforms at different points in PCM transmitter

39
Advantages:
 Very high noise immunity.
 Due to digital nature of the signal, repeaters can be placed between the transmitter and
the receivers.
 The repeaters actually regenerate the received PCM signal. This is not possible in analog
systems.
 It is possible to store the PCM signal due to its digital nature.
 It is possible to use various coding techniques so that only the desired person can decode
the received signal. This makes the communication secure.
Disadvantages:
 The encoding, decoding and quantizing circuitry of PCM is complex.
 PCM requires a large bandwidth as compared to the other systems.
Applications:
 In telephony systems.
 In the space communication space craft transmits signals to earth.
Shape of the PCM signal:
 Figure-44 shows input to and output of a PCM system. It is important to understand that
the output is in the form of binary codes. Each transmitted binary code represents a
particular amplitude of the input signal. Hence the “information” is contained in the
“code” which is being transmitted.
 The range of input signal magnitudes is divided into 8-equal levels. Each level is denoted
by a three bit digital word between 000 and 111.
Figure-44 Input and output waveforms of a PCM system

40
 Input signal x(t) is sampled. If the sample is in the 5th window of amplitude then a digital
word 101 is transmitted. If the sample is in the 2nd window then the transmitted word is
010 and so on.
 In this example we have converted the amplitudes into 3 bit codes, but in practice the
number of bits per word can be as high as 8, 9 and 10.
6.9.3 QUANTIZATION PROCESS
 Quantization is a process of approximation or rounding off.

 Quantizer converts the sampled signal into an approximate quantized signal which
consists of only a finite number of predefined voltage levels.
 The input signal x (t) is assumed to have a peak to, peak swing of VH, to VL volts. This
entire voltage range has been divided into „Q‟ equal intervals each of size „S‟
 "S" is called as the step size and its value is given as, S= VH - VL / Q
 The quantized signal xo (t) is thus an approximation of x (t). The difference between
them is called as quantization error or quantization noise. Figure-45 Process of
Quantization.
Figure-45 Process of Quantization

6.9.4 Signal Multiplexing
 When the data from many sources in time are interlaced the interlacing of data is called
as time multiplexing, in which a single link can handle all sources.
 When a large number of PCM signals are to be transmitted over a communication
channel, multiplexing of these PCM signals is required.

41
Figure-46 Time multiplexing for similar analog signal
6.9.5 Digital Signal (DS) Service
 The telephone companies implement TDM (time division multiplexing) through the
hierarchy of digital signals. This is called as Digital Signal (DS) Service.
 A DS0 signal is the basic input signal which is a single digital channel (64 kbps PCM
channel).
 24 DS0 signals are multiplexed using TDM to produce a DSI signal. The bit rate of DSI
is24 x 64 kbps = 1.544 Mbps plus 8 kbps of overhead.
 4 DS1 signals are multiplexed at the second level of multiplexing to obtain the DS2
signal.
 7 DS2 signals are multiplexed to produce a DS3 signal. Finally 6 DS3 lines are
multiplexed to obtain a DS4 signal. Its bit rate is 274.176 Mbps.
Figure-47 Digital TDM hierarchy for North American telephone communication system
6.9.6 Digital to Analog Conversion
 The digital signals at the input are converted in analog signals. These analog signals are
transmitted over long distances.

42
 The most familiar use of this transformation is for transmitting digital data through the
public telephone network.
Figure-48 Digital data to analog signal
Types of Digital Carrier Modulation:
Figure-49 Types of digital to analog modulation
6.9.7 Amplitude Shift Keying (ASK) or Digital Amplitude Modulation
 Amplitude shift keying (ASK) is the simplest type of digital CW modulation.

 It is also called as digital amplitude modulation.
 The carrier is a sine wave of frequency fc. We can represent the carrier signal
mathematically as follows :
 The digital signal from the computer is a unipolar NRZ (non-return to zero) signal which
acts as the modulating signal.
 The ASK modulator is nothing but a multiplier followed by a band pass filter.
 Due to the multiplication, the ASK output will be present only when a binary "1" is to be
transmitted.
 The ASK output corresponding to a binary "0" is zero.

43
Figure-50 ASK generator
Figure-51 ASK Waveforms
6.9.8 Frequency Shift Keying (FSK)
 In frequency shift keying (FSK), the frequency of a sinusoidal carrier is shifted between
two discrete values.
 One of these frequencies (f1) represents a binary “1 and the other value (f0) represents a
binary “0”
 There is no change in the amplitude of the carrier.
Figure-52 FSK generation

44
Figure-53 FSK waveform

Disadvantages:
 High bandwidth requirement
 FSK is extensively used in low speed modems having bit rates below 1200 bits/sec.
 The FSK is not preferred for the high speed modems because with increase in speed, the
bit rate Increases.
Advantages:
 FSK is relatively easy to implement.
 It has better noise immunity than ASK. Therefore the probability of error free reception
of data is high.
6.9.9 Phase Shift Keying (PSK)
 This is another form of digital CW modulation.

 Phase shift keying (PSK) is the most efficient of the three modulation methods.
Figure-54 Binary phase shift keying (BPSK)

45
BPSK Generation:
Figure-55 BPSK generation

Advantages:
 BPSK has a bandwidth which is lower than that of a BFSK signal.
 BPSK has the best performance of all the systems in presence of noise. It gives the
minimum Possibility of error.
 BPSK has very good noise immunity.
Disadvantage:
 Generation and detection of BPSK is not easy.
Applications:
 Phase shift keying is the most efficient of the three modulation methods and it is used for
high bit rates even higher than 1800 bit/sec.
 Due to low bandwidth requirement the BPSK modems are preferred over the FSK
modems, at higher operating speeds.
6.9.10 Comparison of Binary Modulation Systems:
Figure-56 Comparison of Binary Modulation Systems

46
6.10 GPS (Global Positioning System):
 GPS allows a person to determine the time and his exact location (in terms of latitude,
longitude and altitude) anywhere on the earth.
 The GPS uses MEO (Medium Earth orbit) satellite system in which multiple satellites are
orbiting at an altitude of about 18000 km above the earth.
 GPS operates on the principle of triangulation.
 The practical GPS system uses 24 satellites in six orbits.
 The orbits and the location of the satellites in each orbit are designed in such a way that at
any instant of time, four satellites are visible from any point on the earth. This will satisfy
the necessity of four spheres required for exact positioning.
 A GPS receiver can also show your position on the map.
Figure-57 Practical GPS

Applications of GPS:
 GPS is used by military forces.
 Navigation. The driver of a car can find the location of his vehicle.
 GPS gives the location and database uses this information to find a path to the destination.
 Surveying
 Geological applications.

47
QUESTIONS
MCQ
1) In the given pulse modulations, which one is not the type of pulse modulation?
(a) PWM, (b) PSK, (c) PPM, (d) PAM
2) A radio station transmitting AM wave with 1 MHz frequency band having a wavelength
of ________.
(a) 3 meter, (b) 300 meter, (c) 0.3 meter, (d) 30 meter
3) Commercial FM radio broadcasting utilizes a frequency band ______.
(a) 90 MHz to 110 MHz, (b) 70 MHz to 120MHz, (c) 110 MHz to 180MHz, (d) 88MHz
to 108MHz
4) In Which process Sampling is used?
(a) Frequency Division, (b) Signal amplification, (c) Signal attenuation, (d) Digital
Modulation
5) Minimum bandwidth of an AM wave is ________.
(a) fm (b) 2fm (c) 0.5fm (d) 4fm
6) PCM is a _________Pulse Modulation Technique.
(a) Analog (b) Digital (c) Hybrid (d) None of Above
7) The first cellular systems were ___________.
(a) Analog (b) Digital (c) Hybrid (d) None of Above
8) Electrical energy at a frequency of 1454 Hz is in what frequency range?
(a) Radio (b) Audio (c) High (d) Super-high
9) In a frequency modulation receiver, the __________ is in between the antenna and the
mixer.
(a) audio frequency amplifier (b) high frequency oscillator
(c) intermediate frequency amplifier (d) radio frequency amplifier
Descriptive Questions
1) Explain in detail Pulse modulation with necessary diagrams.

2) Explain in brief Product Modulation and Demodulation with necessary diagrams.
3) Write short not on Cellular communication system.
4) Define Waveguide, Transmission lines and Antenna.
5) Define The following Terms. (a) Interference (b) Noise Margin
6) What do you understand about multiplexing? Explain any one of the Multiplexing
technique.
7) Draw & Explain the functional description of digital communication system in brief.
8) Draw block diagram of Pulse code Modulation.
9) What do you understand about isotropic radiator?
10) Classify the standard based on 2G & 3G.
11) What do you understand about frequency reuse concept & Why it is used in cellular
system?
12) Compare DSB-FC, DSB-SC, SSB, VSB.

48
13) Explain in brief cellular concept in mobile radio system.

14) State the need of modulation and what are the other advantages of modulation in
communication system?
15) Define the following terms: (a) Reflection (b) Directivity (c) Isotropic Radiator
16) What is transmission medium? What are the different types of transmission medium?
17) Explain transmission line and waveguide.
18) Explain parameters of antenna and also explain Yagi-Uda antenna.
19) What is modulation? Explain AM modulation and demodulation
20) Difference between AM, FM, & PM and analog & digital comm. system
21) Explain super-heterodyne receiver with block diagram.
22) What is digital communication? Also explain PCM.
23) Explain GPS.
24) Explain cellular system.

49
Basic Electronics ( 2110016 ) Chapter 7: Basic Control System
CHAPTER 7
BASIC CONTROL SYSTEMS
1. Introduction
2. Classification of Control System
3. Classification of Feedback Control System
4. Block Diagram Reduction
5. Transfer Function
6. Introduction to Time Response
7. Classification of Various Control Action (P, I, D, PI, PD & PID)
8. Digital Control System
9. A Case Study : Digital Process Control
10.Questions

1
7.1 INTRODUCTION:
 In modern times control system play a very important role in our daily life.
 From a simple bread toaster to a complex modern power plant, there is a series of control
principles that affect our life.
 Advanced examples of launching a satellite, regulating the generation in a power plant,
tracking an enemy plane on radar etc.
 The principle of control theory is applicable to engineering as well as non-engineering fields.
 Important Definitions:
 System:-
“A system is an arrangement of or a combination of different physical components connected
or related in such a manner so as to form an entire unit to attain a certain objective.”
Thus a system is a collection of objects etc. in such a manner so as to achieve an aim or
output. Thus a system has an input, an output and a way to achieve this input-output
combination.
 Output:-
The actual response obtained from a system is called output.
 Input:-
The stimulus or excitation applied to a control system from an external source in order to
produce the output is called input.
 Control:-
It means to regulate, direct or command a system so that the desired objective is attained.
Combining the above definitions

 Control System:-
It is an arrangement of different physical elements connected in such a manner so as to
regulate, direct or command itself to achieve a certain objective. (or command some other
system to achieve a certain objective.)
 Error Detector
It is the comparator which compares the output of the feedback element with the reference
input signal and the difference of these two signals appears as the output of the error detector.
 Feedback Element
Feedback element converts the controlled variable to a form which is comparable to the
reference input signal. For e.g., if the reference input is voltage and the controlled variable is
speed, then the feedback element (called transducer) converts speed into voltage which is
compared with the reference input signal which is also in the form of voltage.

2
 Feedback Control
The feedback control is an operation where the output is fed back to the input. The feedback
output may be in-phase or out-of-phase with respect to the input and accordingly it is termed
positive or negative feedback respectively. All control systems are usually negative feedback
systems. The oscillators are the examples of positive feedback systems. In a negative
feedback system, the difference between the reference input and the output produces an error
which is reduced gradually to achieve the desired output in accordance with the reference
input signal.
 Requirements of a Good Control System:-
1) Accuracy:
Accuracy is very high as any error arising should be corrected. Accuracy can be improved by
using feedback element. Because of feedback element, system becomes closed loop system.
In closed loop control system, steady state error tends to zero. To increase the accuracy error
detector should be present in control system.
2) Sensitivity:
A control system senses changes in output due to environmental or parametric changes,
internal disturbance or any other parameters and corrects the same.
Any control system should be insensitive to such parameters but very sensitive to the input
signal.
3) Noise:
Noise is an undesired input signal. A good control system should be in sensitive to such input
signal. A good control system should be able to reduce the effects of wise or undesired input.
4) Stability:
Stability means bounded input and bounded output. In the absence of the time increase. A
good control system response is stable for all variations.
5) Bandwidth:
Operating frequency range decides the bandwidth of any system. For frequency response of
good control system, bandwidth should be large.
The required output means maximum possible output without overshoots and it should be
stable for required input frequency.

3
6) Speed:
A good control system should have high speed. That is output of system should be as fast as
possible.
7) Oscillation:
For a good control system, oscillations of output should be constant or sustained oscillation
which follows the barkhausein’s criteria.
7.2 CLASSIFICATION OF CONTROL SYSTEMS:
 “Control action is that quantity responsible for activating the system to produce the output”
(1) Open loop control system
(2) Close loop control system
1. Open loop control system:
 “A system in which the control action is totally independent of the output of the system is
called as open loop system”
Figure 7.1: Open loop control system
 Refer figure 7.1, Reference input r(t) is applied to the controller which generates the
actuating signal u(t). u(t) actuates the process to give controlled output c(t). The Control
action has nothing to do with status of output c(t). Hence system is open loop.
 Traffic Light Controller
A traffic flow control system used on roads is time dependent. The traffic on the road
becomes mobile or stationary depending on the duration and sequence of lamp glow. The
sequence and duration are controlled by relays which are predetermined and not dependent
the rush on the road.

4
Figure 7.2: Traffic Light Controller
 Other Example: Automatic hand driver, Automatic washing machine, bread toaster,
automatic coffee server, automatic milk server, electric lift, theatre lamp dimmer, cold
drinks-milk bottling etc.
2. Close loop control system:
 “A system in which the control action is somehow dependent on the output is called as close
loop system” or
 “Feedback is that property of the system which permits the output to be compared with the
reference input so that appropriate control action is formed”
Figue 7.3 Close Loop Control System
 Home heating system
 In this system, the heating system is operated by a valve. The actual temperature is sensed by
a thermal sensor and compared with the desired temperature. The difference between the two,
actuates the valve mechanism to change the temperature as per the requirement.

5
Figure 7.4: Domestic Heating System
 Other Example: automatic electric iron, DC motor speed controlled by tacho

feedback ,railway reservation status display, missile launched and auto tracked by radar,
Servo voltage stabilizer, water level controller etc…
 Advantages:
 Accuracy of such system is always very high because controller modifies and manipulated
the actuating signal such that error in the system will be zero.
 Such system senses environmental changes, as well as internal disturbances and accordingly
modifies the error
 In such system, there is reduced effect of nonlinearities and distortions.
 Bandwidth of such system i.e. operating frequency zone for such system is very high.
 Disadvantages:
 Such systems are complicated and time consuming from design point of view and hence
costlier.
 Due to feedback, system tried to correct the error from time to time. Tendency to overcorrect
the error may cause oscillations without bound in the system. Hence system has to be
designed taking into consideration problems of instability due to feedback. The stability
problems are severe and must be taken care of while designing the system.
1.2.1 Difference between closed loop and Open loop control system
Open Loop Control system Close Loop Control system

No feedback element. Hence feedback Feedback exists. Hence feedback elements
elements absent exists
No error detector Error detector is present
It is inaccurate It is accurate
Highly sensitive to parameter change Less sensitive to parameter changes
Small bandwidth Large bandwidth
Stable May become unstable

6
Economical Costly
Example : Coffee maker Example : Temperature control of oven
7.3 CLASSIFICATION FEEDBACK CONTROL SYSTEMS:
 According to the method of analysis and design
1. Linear Control system

 Linear feedback control system are idealized models that are conceived by the analyst for the
sake of simplicity of analysis and design.
 For the design and analysis of linear systems there exist a wealth of analytical and graphical
techniques.
2. Non Linear control system

 Nonlinear system are very difficult to analysis mathematically, and there are no general
methods that can be used for a broad class of nonlinear system.
3. Time-invariant systems
 When the parameters of a control system are stationary with respect to time during the
operation of the system, the system is known as a time-invariant system.
4. Time varying system

 A system in which certain quantities governing the system's behavior change with time, so
that the system will respond differently to the same input at different times.
 According to the types of signal found in the system
1. Continuous time system

 A continuous time system is one in which the signals at various parts of the system are all
functions of the continuous time variable t.
2. Discrete-time System
 A discrete time system is one in which the signal at various parts of the system are all
functions of the discrete time variable t.
Figure 7.5: Continuous and Discrete time System

7
 According to the type of system components

 Electromechanical control system
 Hydraulic control system
 Pneumatic control system
 Biological control system
 According to the main purpose of the system

 Position control system : Here the output position, such as the shaft position on motor
exactly follow the variations of the input position
 Velocity control system
 Regulators : Speed control of a motor
 Servomechanisms : Automobile Power steering
7.4 BLOCK DIAGRAM REDUCTION:

Table 7.1: Block Diagram Reduction

8

9

10

11
7.5 TRANSFER FUNCTION:
 Transfer function is defined as the ratio of the Laplace transform of output to the Laplace
transform of input with all initial conditions as zero. The concept of transfer function is
applicable to single-input-single-output, linear time-invariant systems. The dynamics of
linear time-invariant system are represented by a linear differential equation such as:
dn y(t) dn-1 y(t) dy(t) dm u(t) du(t)

an n + an-1 n-1 + …+ a1 + a0 y(t)= b m m + …+ b1 + b0 u(t)
dt dt dt dt dt
 Derivation of Transfer Function of Closed Loop Control System
Figure 7.6: Simple form of Closed Loop Control System
 In the above fig., the control system is negative feedback closed loop control system. The
feedback is added negatively to the reference input. Various signals are,
R(s) = Reference Input Signal
E(s) = Error Signal
B(s) = Feedback Signal
C(s) = Output Signal
G(s) = Transfer Function of Forward path
H(s) = Transfer Function of Feedback path
Now,
C(s) = G(s) · E(s)
Also,
E(s) = R(s) – B(s) and B(s) = C(s) · H(s)
∴E(s) = R(s) – C(s) · H(s)

12
∴C(s) = G(s) · [R(s) – C(s) · H(s)]

∴C(s) = G(s) · R(s) – G(s) · C(s) · H(s)
∴C(s) + G(s) · C(s) · H(s) = G(s) · R(s)
∴C(s) [1 + G(s) · H(s)] = G(s) · R(s)
C(s) G(s)
∴ =
R(s) 1+G(s)∙H(s)
 If there is a positive feedback closed loop control system, then the transfer function will be,
C(s) G(s)
=
R(s) 1-G(s)∙H(s)
7.6 INTRODUCTION TO TIME RESPONSE:
 In time domain analysis, time is independent variable. When a system is given an excitation
(input), there is a response (output). This response varies with time, is called the time
response.
 Generally the response of any system has two type.
1. Transient Response
2. Steady state Response
1. Transient Response
 That part of the time response which goes to zero as time becomes very large is called as
transient response. It is denoted by ct(t).
2. Steady state Response
 It is basically the final value achieved by the system output.
 “The part of response that remains after the transient have died out is called as steady state
response”
3. Steady state error :
 “The difference between desired output and actual output of system is called as steady state
error (ess)”
7.6.1 Transient Response specifications
 In many practical cases, the desired performance characteristics are specified in terms of
time-domain quantities.
 Frequently, the performance characteristics of a control system are specified in terms of the
transient response to a unit-step input since it is easy to generate and is sufficiently drastic.

13
Figure 7.7: Transient Response
1) Delay Time (Td): It is the time required for the response to reach 50% of the final value in
the first attempt.
2) Rise Time (Tr): The time required for the response to rise from 10% to 90% of the final
value for over damped systems. (To rise from 0% to100% of the final value for under
damped systems.)
3) Peak time (Tp): It is the required for the response to reach the first peak.
4) Peak Overshoot (Mp): The maximum overshoot is the maximum peak value of the response
curve measured from unity. It is therefore the largest error between input and output during
the transient period.
5) Settling Time (Ts): It is the time required for the response curve to reach and stay within a
specified percentage of the final value.
7.7 CLASSIFICATION OF VARIOUS CONTROL ACTION:

 Various types of control systems are discussed in the earlier sections. In this section the
control systems are discussed from the view point of the controlling action. Various types of
systems result.
 These may be
1. ON-OFF type control
2. Proportional control (P)
3. Derivative control (D)
4. Integral control (I)

14
5. Proportional Derivative control (PD)

6. Proportional Integral control (PI)
7. Proportional Integral Derivative control (PID)
1. ON-OFF Control:
In this there are two operating states ON and OFF. The correction depends only on the direction
of the error and not on its magnitude. As for example in ON-OFF type temperature control
system of a furnace, the power is switched on, whenever the temperature is found to be lower
than the desired. Another example is water level controller.
2. Proportional control:
In proportional control system, the control action is proportional to the error. The error is
detected and amplified and control is applied. Greater is the control. The block diagram is shown.
Figure 7.8: Proportional Control
3. Derivative control:
In this type of controller the output of the controller is proportional to the time derivative of the
error i.e. the rate of change of error. In this the response becomes rapid for rapidly changing error.
This is not suitable for slowly changing error as it causes drift.
Figure 7.9: Derivative Control

15
4. Integral control:
In this type of control the controller output is proportional to the time integral of error or the rate
of change of output is proportional to the error. This eliminates drift but there will be oscillations
or hunting in the system.
Figure 7.10: Integral Control

It is seen that each of above controls has some limitations. So normally a combined action is
used.
5. Proportional Derivative Control (PD):

In this type of control part of the control is proportional to the error and the part of the control is
proportional to the time derivative of the error. The block diagram is shown in figure.
Figure 7.11: Proportional Derivative Control
In this case the oscillations are damped but the steady state error remains.
6. Proportional Integral Control (PI):

In this the part of the control signal is proportional to the error and part of the signal is
proportional to the time integral of the error signal.
Due to the proportional component the simplicity is improved. Due to integral action, the steady
state error is reduced. But the stability is reduced as the system will oscillate.

16
Figure 7.12: Proportional Integral Control
7. Proportional Integral and Derivative Control (PID):

In this case the control action comprises of all the three types i.e. proportional, integral and
derivative. The block diagram is shown in figure.
Figure 7.13: Proportional Integral and Derivative Control

Figure 7.14 and 7.15 show the characteristics of various controller actions.
Figure 7.14 Characteristics of Controllers Figure 7.15 Characteristics of

Combined Controllers

17
7.8 DIGITAL CONTROL SYSTEM:
Figure 7.16: Typical digital control system
 Figure 7.16 illustrates a typical digital control system, in which the signal at one or more
points of the system is expressed in a numerical code for digital-computer or digital-
transducer processing in the system.
 Because of the digitally coded (such as binary-coded) signals in some parts of the system,
it becomes necessary to employ digital-to-analog (D/A) and analog-to-digital (A/D)
converters.
 In spite of the basic differences between the structures and components of a sampled-data
and a digital control system, from an analytical standpoint both types of systems are
treated by the same analytical tools.
Figure 7.17: Block diagram of a type of digital control system
 The block diagram of Figure 7.17 is a functional representation of a type of digital control
system, in which G and H serve the same function as in any feedback system.
 Note that the error signal is sampled and a digital processor is used.
 The controller in this system is the digital processor whose output, reconverted to an analog
signal, becomes the excitation for the block G. As usual, G is the subsystem that provides the
output to be controlled.
 A central computer which controls several functions could be used as a digital processor; or a
microprocessor (special purpose computer) designed for the particular control function may
also be used as a digital processor.

18
 Large, high-speed computers with their speed, memory, and computational ability, as well as
programmability, are utilized for central control in large automated manufacturing facilities.
Sampled data and digital control offer several advantages over analog systems:
 More compact and lightweight

 Improved sensitivity
 Better reliability, speed, and accuracy
 More flexibility and versatility (in programming)
 Lower cost
 More rugged in construction
 No drift
 Less effect due to noise and disturbance.
Example of Digital Control System:
Missile Launching and Guidance System:

 The missile launching and guidance system shown in figure which is an example of military
application of feedback control.
Figure 7.18
 The radar detects the presence of the target aircraft through its rotating antenna and passes
the detection signal to the computer indicating the velocity and position of the target.

19
 The computer calculates the firing angle which is the launch command signal.
 This command signal is passed to the launcher i.e. the drive motor, through the power
amplifier. The launcher angular position is feedback to the launch computer and the missile
is fired.
Aircraft Control System:
Figure 7.19
 The system consists of three basic parts: The aircraft, the radar unit and the controlling unit.
 The radar unit measures the approximate vertical and lateral positions of the aircraft, which
are then transmitted to the controlling unit. From these measurements, the controlling unit
calculates appropriate pitch and bank commands.
 These commands are then transmitted to the aircraft autopilots which in turn cause the
aircraft to respond.

20
7.9 A Case Study : Digital Process Control
 Figure 7.20 shows a block diagram for microcomputer-based control of a physical process,
such as a chemical plant. A slight variation of the system can be used for automotive
instrumentation in which sensors furnish various signals for speed, fuel reserve, battery
voltage, oil pressure, engine temperature, and so on.
Figure 7.20 block diagram for microcomputer-based control of a physical process
 The data are presented to the driver in one or more displays on the dashboard. In a
physical process on the other hand, based on the display information, an operator can
assess and direct the operation of the control process through a keyboard or other input
devices to the microcomputer.
 Various physical inputs, such as power and materials, are regulated by actuators, which
are in turn controlled by the microcomputer.
 Electric signals related to the controlled-process parameters, such as pressure and
temperature, are produced by various sensors, which in turn feed the information to the
microcomputer. Actuators and sensors may be either analog or digital.
 Digital-to-analog (D/A) converters are used to convert the digital signals to analog form
so as to suit the analog actuators, where as analog-to-digital (A/D) converters are
employed to convert the analog sensor signals to digital form so as to suit the
microcomputer.

21
 One can think of so many systems in daily practice controlled or monitored by

microcomputers. Some examples include monitoring patients in intensive cardiac-care
units of hospitals, nuclear-reactor controls, traffic signals, aircraft and automobile
instrumentation, chemical plants, and various manufacturing processes.

22
QUESTIONS
1. What is control system? Explain open loop control system and close loop control system.
2. Compare between open loop control system and close loop control system.
3. Classify feedback control system in details.
4. What is transfer function? Give elementary block diagram of closed loop system and find its
transfer function.
5. Defined a transient response and steady state response?
6. Defined following term: Delay time, Rise time, Peak time, Peak Overshoot, Setting time.
7. Explain P, I, D, PI, PD and PID controller.
8. Explain Digital control system with example.

23

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GUJARAT TECHNOLOGICAL UNIVERSITY

BASIC ELECTRONICS (Modified Version January 2014)

Type of course: Basic

Teaching and Examination Scheme:

S. No. Unit Practical/Exercise Apprx.

List of Open Source Software/learning website:

TOPICS COVERED IN THIS CHAPTER

2. Various Electrical Quantities

3. Lumped Circuit Elements

5. Meters and Measurements

6. Analogy between Electrical and Non-Electrical Physical Quantities

7. A Case Study – Resistance Strain Gauge

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

1.2 ELECTRICAL QUANTITIES:

1.2.1 Charge and Electric Force:

 There are two types of charges:

 Conservation law of charges:

Fig. 1.1: Structure of the atom

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

 Each atoms consist of three types of particles.

 Coulomb’s First Law:

 Coulomb’s Second Law (Inverse Square Law):

Fig. 1.3: Illustration of coulomb’s law.

Force on Q1 due to Q2  𝐹̅ 21 = [Q1Q2 /4πε0εr R2] 𝑎̅21 = [K Q1Q2 /R2] 𝑎̅21

Force on Q2 due to Q1  𝐹̅ 12 = [Q1Q2 /4 πε0εr R2] 𝑎̅12 = [K Q1Q2 /R2] 𝑎̅12

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

Q1, Q2 = Point charges in C.

 The net total charge is then calculated as:

 The force that Q1 exerts on Q2 is in the positive direction of x.

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

 The force that Q3 exerts on Q2 is in the positive direction of y.

1.2.2 Conductors, Insulators and Semi-Conductors:

 Total three types of materials are present,

1.2.3 Current and Magnetic Force:

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

 If charge varies with time, so

 Ampere’s law of force:

Fig. 1.4 Illustration of ampere’s law of force

 Lorentz force equation:

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

 Electric Flux Density (D) or Displacement Density:

 Electric Field Strength or Field Intensity (E):

1.2.5 Electric Potential and Voltage:

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

 Voltage or Potential difference (P.D.):

Fig. 1.5: Potential and potential difference

 Electromotive Force (emf):

 Difference between emf and Potential Difference:

emf Potential Difference

Unit is volt. Unit is volt.

1.2.6 Energy and Power:

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT

 Energy is expressed in watt-seconds or joules (J).

(a) Power delivered: P = V I = 12×4 = 48 W

(c) 1 Ah = (1C/s) (3600 s) = 3600 C, So here;

(d) 116Ah/4A = 29 hours the headlight system can be operated.

1.2.7 Source and Loads:

DARSHAN INSTITUTE OF ENGINEERING AND TECHNOLOGY, RAJKOT