5 BJT e PDF
5 BJT e PDF
5 BJT e PDF
(BJTs)
Electronics
2.
DE
TTK
Sedra/Smith
Microelectronic
Circuits
Chapter
5
DE
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1
5.Chapter
Content
1.
Device
Structure
and
Physical
Opera-on
2.
Current‐Voltage
Characteris-cs
3.
The
BJT
as
an
Amplifier
and
as
a
Switch
4.
BJTcircuits
at
DC
5.
Biasing
in
BJT
Amplifier
Circuits
6.
Small‐signal
Opera-on
and
Models
7.
Single
Stage
BJT
Amplifiers
8.
The
BJT
Internal
Capacitances
and
High‐Frequency
Model
9.
Frequency
Response
of
the
Common‐EmiYer
Amplifier
10.
The
basic
BJT
Digital
Inverter
11.
SPICE
BJT
model
DE
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2
5.1
Device
Structure
and
Physical
Opera8on
NPN BJT
Electrons
and
holes
are
par-cipate
In
the
current‐conduc-on
process:
Bipolar
device
PNP BJT
BJT
modes
of
opera-on:
Üzemmód
EBJ
CBJ
Felhasználás:
Cutoff
Reverse
Reverse
Kapcsoló
üzem
Ac-ve
Forward
Reverse
Erősítő
Reverse
ac-ve
Reverse
Forward
Alig
használt
Satura-on
Forward
Forward
Kapcsoló
üzem
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3
5.1.2
Opera8on
of
the
npn
transistor
inthe
ac8ve
mode
BE:
forward
biasing
CB:
reverse
biasng
Heavily
doped
EmiYer,
lightly
doped
and
narrow
Base
BE:
Two
current
component:
1.
E
electrons
injected
to
B
(majority
carriers)
2.
B
injects
holes
to
E
(minority
carriers)
The
electrons
in
the
Base
are
not
able
to
recombinate,
so
they
reach
the
reverse
biased
CB
diodes
deple-on
zone,
where
they
raise
the
satura-on
current
The
emiYer
current:
The
collector
current:
α,
iE = iC + iB , iC = α • iE , β=
1− α
α:
common
base
current
gain
(
α
<
1,
≈0.99),
€ € β:
common
emiYer
current
gain
(50..200)
€
DE
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4
Large
signal
model
Valid
only
in
the
ac-ve
mode
Ebers‐Moll model
In all opera-ng modes
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5
5.2
U‐I
characteris8cs
U‐I rela-ons in ac-ve mode:
v BE /VT iC IS v BE /VT
iC = IS e , iB = = e ,
β β
iC IS v BE /VT
iE = = e ,
BJT
α α
€
€
iE
iC = α • iE , iB = (1− α )iE = ,
β +1
€
iC = α • iE , iE = (β + 1)iB ,
€
€
α, β
BJT
biasing
€ β= € α= ,
1− α β +1
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Example
5.1
β=100,
vBE=0.7V
IC=1mA‐nál.
Design
the
circuit:
Let
IC=2mA
and
VC=5V.
Solu-on:
VCBJ:
nega-ve,
ac-ve
mode.
RC=10V/2mA=5kΩ,
If
vBE=0.7V
at
IC=1mA
Than
at
2mA:
2
VBE = 0.7 + VT ln = 0.717V,
1
VB=0V,
so
VE=
‐0.717V,
Then:
IE€=IC/α=2/101=2.02mA,
(IE=IC+IB=IC+2/β=2+2/100=2.02mA)
RE=(VE‐(‐15V)/IE=(‐0.717+15)/2.02=7.07kΩ,
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5.2.2
Grafical
representa-on
of
BJTs
iC = IS e v BE /VT ,
iE‐vBE
and
iB‐vBE
are
exponen-al
behaviors
€ ‐2mV/0C
Common base characteris-cs:
Notes:
• Breakdown
at
high
vBC,
• Moderate
slope
in
iC
(in
func-on
of
vCE)
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8
5.2.3
TheEarly
effect
A
karakterisz-ka
vonalak
nem
vízszintesek.
A
–vCE
tengelyen
van
egy
fesz,
érték
ahol
összefutnak.
A
jelenség
oka
a
kiüríteY
réteg
vCE
függése.
VA
-pikusan:
50...100
V
értékű.
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9
Grafical...
Common
emiYer
Characteris-cs:
ΔiC
β AC = ,
ΔiB
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10
Satura-on
voltage
and
resistor
β is smaller in sat. Mode than in ac-ve mode
The
reciprocal
value
of
the
slope:
RSAT
.
(1Ohm..10Ohm)
Circuit
model
in
Satura-on
mode:
DE
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11
5.3
The
BJT
as
an
amplifier
and
as
a
switch
5.3.1
Large
Signal
Opera8on
–
The
Transfer
Characteris8c
From
the
circuit:
vO = vCE = VCC − RC iC ,
In
detail:
€ 0
‹
vI
‹
0.5V:
The
device
is
in
Cutoff
mode.
v I › 0.5V:
Ac-ve
mode:
(from
Y
)
v I increases
iC
increases
iC = IS e v BE /VT = IS e v I /VT ,
vO = vCE = VCC − RC IS e v I /VT ,
vO
also
decreases
(by
ex
func-on)
very
rapidly.
€ If
vCE
decreases
below
vBE
by
0.4V:
CBJ
switches
on:
The
transistor
get
into
the
satura-on
mode.
(at
Z
)
€ (Note:
We
can
control
by
iB
as
well)
DE
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12
5.3.2
Amplifier
Gain
Linear
amplifier:
at
Q
(Quescent
point).
We
should
bias
the
device.
At
Q:
VBE
–
VCE
–
IC
characterise
the
device.
Around
Q
:
the
transmission
(gain)
is
linear:
dv o
Av = ,
dv I v I = v BE
€ dv o 1 I R
Av = =− IS e v BE /VT RC = − C C ,
dv I v I = v BE
VT VT
€
The
gain
is
nega-ve.
For
symmetrical
output
signal
swing:
VCE
≈
VCC/2
€
DE
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13
5.3.3
Grafical
Analysis
Determining IB
Determining IC és UCE
DE
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14
Grafical
Analysis
Determining Vbe, ib, ic Determining Vce
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15
5.3.4
Opera8on
as
a
switch
The BJT works in cutoff and saturated modes.
Cutoff
region:
(We
should
switch
off
the
BJT)
vBE
<
0.5V,
iB
=
0,
iC
=
0,
vc
=
VCC.
Saturated region: (We should switch on the BJT)
At
Vi=0.5V
:only
small
iB
.
vBE
≈
0.7V
,
so:
Vi
>
0.7V
v I " v BE
Then:
iB = ,
RB
iC = "iB , Only
for
ac-ve
mode:
-ll
the
CB
diode
is
closed.
While
CB
diode
is
open:
! vC
›v B
" 0.4V,
where: v
C =
VCC "
RC i
C ,
(vCB
opens
at:
0.4V)
!
Obviosly:
If
vI
increases,
iB
also
increases,
then
vC
decreases.
If
vC
decreases
below
vB
by
0.4V:
We
have
reached
the
border
of
the
saturated
mode:
! !
V " 0.3 IC (EOS )
Then: iC (EOS
) =
CC
,
we
suppose
henceforward:
vBE
≈
0.7V
iB (EOS ) = ,
RC "
EOS:
Edge
of
Satura-on
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16
! !
Opera8on
as
a
switch
Raising more the vI the BJT gets deeper into the sat. mode, but VCE does not decreases significantly.
This is lower than the normal β.
€ „Overdrive factor”: IB / IB(EOS)
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17
Example
5.3
Lets determine RB! β: 50...150, Overdrive factor: 10
Solve:
VCC − VCEsat 10 − 0.2
VCEsat ≅ 0.2V, iCsat = = = 9.8mA,
RC 1
ICsat 9.8
IB = = = 0.196mA,
β min 50
€ €
With
overdrive
10:
v I − v BE 5 − 0.7
€ IB = 10 • 0.196 = 1.96mA, RB = = = 2.2kΩ,
iB 1.96
Exercise
5.21
€
Given:
VCC=+5V,
vI=+5V,
R
€ B=RC=1kOhm,
β=100.
Ques-ons:
IB,
IC,
VC,
βforced,
in
saturated
mode.
RB
=?
at
EOS.
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5.4
BJT
circuits
at
DC
We
suppose
in
the
following
:
VBE=0.7V,
VSAT=0.2V,
there
is
no
Early‐effect.
(With
beYer
model,
it
can
be
reached
beYer
result,
but,
with
more
difficulty.)
Main
ques-on:
In
which
mode
is
the
BJT
opera-ng?
Procedure to decide:
1. Assume:
It
is
in
ac-ve
mode
2. Determine
the
U
and
I
values
3. Check
the
consistency
of
the
result
with
the
ac-ve
mode
assump-on?
(VBE
=
0.7V,
VCB
›
‐0.4V
‐NPN),
Yes:
OK.
4. If
not:
New
assump-on:
It
is
in
saturated
mode.
5. Determine
the
new
U
and
I
values
6. Check:
Is
the
BJT
in
saturated
mode?
(βforced
‹
βmin)
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Example
5.4
Determine
the
U
and
I
values!
β=100
1.Assump-on: BE is open
3.Assump-on:
ac-ve
mode
(VC
can
be
higher,
than
VB)
4.VC=5.3V,VB=4V: really ac-ve mode
IC=αIE
α=β/(β+1)
DE
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Example
5.5
Determine
the
U
and
I
values!
β›50
b.figure
Assump-on:
ac-ve
mode
Calcula-on:
VC
‹
VB
:
wrong
assump-on
b.figure
Assump-on:
saturated
mode
Calcula-on:
on
figure
Check:
βforced=IC/IB=?
(βforced=1.5,
smaller
than
βmin
,
so
the
BJT
is
in
sat.
mode)
DE
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21
Example
5.6
Determine
the
U
and
I
values!
1:
VB
=
0,
E
is
connected
to
ground
BEJ
does
not
conduct
(Base‐EmiYer
Junc-on)
2:
VB
=
0,
C++
CBJ
nem
vezet
CUTOFF
mode
DE
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22
Example
5.7
Determine
the
U
and
I
values!
(PNP
transistor!)
Note
For
3.:
VC
can
be
nega-ve,
so
it
is
possible
that
it
is
in
ac-ve
mode.
At
this
case:
IC=αIE
β
=
?
Assump-on:
β
=100.
(typical
value
50..200)
The
value
of
β
does
not
influence
the
the
design
parameters(IC,
IE
etc.)
General
design
rule:
the
design
is
as
insensi-ve
to
β
as
possible.
(varia-on
on
β
is
high)
DE
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This
is
a
good
design.
23
Example
5.8
Determine
the
U
and
I
values!
β=100
Notes:
1.BEJ
is
clearly
forward
biased
3.
Assume:
ac-ve
mode
Check:
VCB=0.7V
ac-ve
mode,
but
the
value
of
IE
and
IC
depends
cri-cally
on
β.
If
β
raises
by
10%:
The
BJT
leaves
the
ac-ve
region.
(the
devia-on
of
β
is
high:
50..150)
This
is
a
bad
design!
DE
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24
Example
5.9
U=?,
I=?
βmin=30
First:
Ac-ve
mode:
Second:
Sturated
mode
VB≅0,
VE=0.7,
IE=
4.3mA
1.
By
using
VB
as
a
parameter:
but
in
Ac-ve
mode:
2.
Subs-tu-ng
the
2,4,7
equa-ons
into
ICmax=0.5mA
!
(VCB
reverse!)
IE
=
IC
+
IB
:
VB
=
3.13V
Impossible,
so
the
BJT
is
saturated!
3.
With
this
value:
VE
=
3.83V,
VC
=
3.63V
IE
=
1.17mA,
IC
=
0.86mA,
IB=0.31mA
Check:
βforced=
IC/IB
=
0.86/0.31
≈
2.8
(
‹‹
β
DE
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min
,
so
really
in
sat.
mode
)
25
Example
5.10
U=?,
I=?
β=100
1. Simplifying
the
base
circuit:
Thevenin
equivalent
VBB=+15RB2/(RB1+RB2)=+5V,
RBB=RB1
x
RB2=33.3kOhm
2.
Loop
equa-on
for
L:
I
VBB = IB RBB + VBE + IE RE , IB = E ,
β +1
Subs-tu-ng
and
rearranging:
VBB − VBE 1.29
IE = = 1.29mA, IB = = 0.0128mA,
€ RE ( RBB /(β + 1)) 101
€
VB = VBE + IE RE = 0.7 + 1.29 • 3 = 4.57V,
€ Assume:
ac-ve
mode:
€
€
IC = α • IE = 0.99 •1.29 = 1.28mA,
VC = +15 − IC RC = 15 −1.28 • 5 = 8.6V
VC › VB by 4.03V, so CBJ closed: ac-ve mode
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Example
5.11
U=?,
I=?
This
is
the
5.10
circuit
with
Q2
added.
VB1,
IE1,IB1,IC1,
the
same
as
before:
VB1=
+4.57V,
IE1=
1.29mA,
IB1=
0.0128mA,
IC1=
1.28mA
VC1 is different: because of IB2
Let
IB2
‹‹
IC1
0
(first
approx.)
VC1≅
15
‐
IC1RC1
=8.6V,
(Q1
in
ac-ve
mode)
DE
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Example
5.11
Q2
:
The
emiYer
is
connected
to
+15V:
Safe
to
assume:
the
EBJ
is
forward
biased
Then:
VE 2 = VC1 + VEBQ 2 ≅ 8.6 + 0.7 = 9.3V,
and
+15 − VE 2
IE 2 = = 2.85mA,
RE 2
€
The
collector
is
conn.
to
ground
via
RC2,
so
the
transistor
can
be
in
ac-ve
mode.
€ So:
The
value
of
IB2:
(previous
assump-on:
0mA)
IC 2 = α 2 IE 2 = 0.99 • 2.85 = 2.82mA, (β = 100) IE 2 2.85
and
IB 2 = = = 0.028mA,
β 2 +1 101
VC 2 = IC 2 RC 2 = 2.82 • 2.7 = 7.62V Really
much
smaller,
then
IC1.
€
This
value
is
lower,
then
VB2,
so
Q2
is
We
can
calculate
the
U
–
I
values
again:
in
ac-ve
mode.
€IRC1
=
1.252mA,
VC1
=
8.74V,
€ VE2
=
9.44V,
IE2
=
2.78mA,
IC2
=
2.75mA,
VC2
=
7.43V,
IB2
NEW
=
0.0275mA
≅ IB2
prev.
(no
need
to
iterate
again)
DE
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28
Example
5.12
U=?,
I=?
β=100
The transistors Q1, Q2 can not be open simultaneously. (posi-ve VBEQ1 closes VBEQ2)
1. Assump-on:
Q2
is
On
(and
Q1
is
Off):
A
current
should
flow
from
1k
to
the
Q2
EmiYer.
Thus
the
Q2
Base
will
be
at
a
nega-ve
voltage,
and
base
current
will
be
flowing
out
of
the
base
through
the
10k
resistor
into
the
+5V.
Impossible
since
if
the
base
is
nega-ve
current
comes
from
the
+5V
to
the
base.
So
the
original
assump-on
(Q2
is
On)
is
incorrect.
2. Q1:
On.
Ac-ve
or
saturated?
Obviously:
The
IB1
comes
from
+5V
and
flows
to
Q1
Base,
so
its
voltage
is
smaller,
than
+5V.
Thus
CBJ
of
Q1
is
reverse
biased:
Q1
is
in
ac-ve
mode.
From
this
point,
determining
the
U
and
I
values
are
easy.
(fig.b.,
Homework)
DE
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29
5.5
Biasing
in
BJT
amplifier
circuits
Introduc-on
Opera-ng point: The DC U and I values on the device without signal input
Mit
várunk
a
beállítástól?
•
Independent
of
temperature
change
•
Independent
of
change
of
β
•
Maximal
output
swing
Wrong Biasing methods:
(a):
Constant
voltage
at
the
base
Small
change
in
U,
high
change
on
I
az
U‐I
(b):
Constant
current
at
the
base
Large
varia-on
on
β
results
High
U
and
I
changes.
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30
5.5.1The
classical
circuits
Voltage divider and RE resistor.
A Thevenin equivalent:
R2 R1 • R2
VBB = VCC , RBB = ,
R1 + R2 R1 + R2
€ €
For
the
L
loop:
VBB − VBE
subs-tu-ng:
IE=(β+1)IB
into
VBB
+ IB R
B + VBE
+ IE R
E = 0,
yields:
IE = ,
RE + RB /(β + 1)
RB
IE
will
be
independent
of
changes
of
T
and
β
if:
VBB ››VBE és RE ›› ,
β +1
€
€
Conflic-ng
requirements:
VBB
:
the
bigger
the
beYer
(unfortunately
then
VCB
is
small)
We
want
VCB
to
be
large
(large
output
swing)
€
€ DE
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31
BJT
biasing
IE
will
be
independent
of
β,
if
RB
is
small.
RB
RE ›› ,
β +1
It
will
be
fulfilled
if
R1
and
R2
are
small.
(At
very
small
values:
high
divider
current
and
low
Rin)
If
the
current
of
the
divider
high
enough
in
rela-on
of
I
€ B:
Usually:
I0 ≅ IE ...0.1IE ,
The
RE
has
stabilising
effect:
€
Let
us
suppose
(any
reason):
IE ↑⇒ VE ↑⇒ VB = áll.⇒ VBE ↓⇒ IC ↓⇒ IE ↓,
RE
provides
a
nega-ve
feedback:
stabilises
the
bias
current.
(nega-ve
feedback
:
later)
€
DE
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32
Example
5.13
Determine
the
values
of
the
biasing
resistors!
Data:
VCC=+12V,
IE=1mA,
Solu-on:
1. „One
third
rule”:
VR =1/3VCC ,VCE =1/3VCC ,U RC =1/3VCC
2. So
VBB=+4V
3. VE=4‐VBE≅3.3V
4. RE=VE/RE=3.3/1=3.3kΩ
5. If
I0=0.1IE=0.1x1=0.1mA,
(I0:current
of
the
divider)
6. R1+R2=12/0.1=120kΩ
€
7. R2/(R1+R2)VCC=4V
8. So:
R2=40kΩ,
R1=80kΩ
We
have
assumed:
IB=0,
If
IB≠0:
VBB − VBE 4 − 0.7
9. IE:
IE = =
80x40
= 0.93mA,
RE + RB /(β + 1) 3.3 +
101
11.
Finishing:
reducing
RE
l:
RE=3kΩIE=1.01mA≅1mA
10. If
I0=1mAR 2=4kΩ,
R1=8kΩ
RC=(12‐VC)/IC
€
Then:
VBB − VBE 4 − 0.7
IE = = = 0.99mA ≅ 1mA,
IC=αIE=0.991mA≅1mA
RE + RB /(β + 1) 3.3 + 0.027
RC=4kΩ
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€
5.5.2
Two
power
supply
version
of
classical
bias
arrangement
For the L loop:
IBRB+VBE+IERE‐VEE=0 ‐ből:
VEE − VBE
IE = ,
RE + RB /(β + 1)
RB
:
only
for
signal
coupling.
€
We
can
neglect
it
for
the
biasing
(RB=0)
It
is
the
case
for
CB
mplifier.
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5.5.3
Biasing
using
CB
feedback
resistor
Only for CE amplifier!
Detailed analisis. Book!
DE
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5.5.4
Biasing
using
constant
current
source
BeYer than the previous:
IE
independent
of
changes
of
β
and
RB
,
RB
can
be
high
(high
RIN)
without
reducing
the
stability
of
biasing.
Current
generator:
L
loop:
‐VCC+IREFR+VBE‐VEE=0
L
VCC − (−VEE ) − VBE
IREF =
R
Q1
and
Q2
are
:
€
VCC + VEE − VBE
I = IREF =
R
This
is
a
„current
mirror”.
€
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5.5
Small
signal
opera8on
and
models
DC
U
and
I
with
input
signal
Only
the
DC
biasing
U
and
I
rela-ons
at
DC:
IC
IE = , IC = α • IE ,
α
(ac-ve
region,
-ll
VC
≥
VB‐0.4)
€ IC
IB = , IC = β • IB ,
β
€
€ VC = VCE = VCC − IC RC ,
€
€ DE
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5.6.1
The
collector
current
and
the
transconductance
The total vBE: v BE = VBE + v be ,
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5.6.2
The
Base
current
and
the
input
resistance
at
the
Base
iC IC 1 IC DC
komponent
of
iB
:
I = IC ,
iB = = + v be , B
β β β VT β
1 IC
AC
komponent
of
iB
:
ib = v be ,
β VT
€ IC € g
From
the
previous:
m
V
,
g =
# ib = m v be ,
T € β
v be β V
The
small
signal
input
resistance:
rπ =
=
,
other
form:
rπ = T ,
ib gm IB
5.6.2
EmiYer
current
and
the
input
resistance
at
the
EmiYer
€ €
iC IC 1 IC DC
komponent
of
iB
:
€ I = IC ,
iE = = + v be€
, E
α α α VT α 1 I
AC
komponent
of
iB
:
ie = C
v be ,
α VT
€ €
The
small
signal
input
resistance:
r =
v be =
α ≅
1 ,
other
form:
r = VT ,
e
ie gm€ gm
e
IE
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€ €
5.6.4
Voltage
Gain
The whole (AC+DC) vC: vC = VCC − iC RC ,
€ C.
(Uout):
The
AC
component
of
v
v c = −ic RC = −gm v be RC = −(gm RC )v be ,
€
The
gain:
vc I
A
v =
m RC
,
= −g
other
form
Av
= −
C RC
,
(as
earlier)
€
v be VT
Exercise
5.38
€ €
What
is
the
voltage
gain,
vC,
iB?
Data:
IC=1mA,
VCC=15V,
RC=10kΩ,
β=100,
vbe=0.005sin(ωt),
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5.6.5
Separa-ng
the
Signal
and
the
DC
quan--es
It
is
obvious:
On
a
BJT
circuit
the
measured
U
and
I
values
consists
of
two
parts
:
• DC
I
and
U:
biasing
„put
on
a
DC
glass”
• AC
I
and
U:
signal
transmission
„put
on
an
AC
glass”
The U‐I values can be calculated by different equa-ons.
From
the
AC
signal
transmission
point
of
view:
new
circuit
:
This
is
the
small
signal
model.
Making
the
model:
We
subs-tute
the
DC
voltage
generators
with
shorts.
Why?
(easy
to
understand)
There
are
two
types
of
models:
„π”
and
„T”,
Two
varia-ons
at
each
model.
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5.6.6
The
hibrid
π
model
Voltage controlled current generator: Current controlled current generator:
valid for the NPN and PNP transistors as well
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5.6.7
Tha
T
model
Voltage controlled current generator: Current controlled current generator:
valid for the NPN and PNP transistors as well
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5.6.8
Applica-on
of
the
Small
Signal
Equivalent
Circuits
By using this method, the modling and calcula-ng a BJT circuit becomes a systema-c procedure.
1. Determine the DC opera-ng point for the BJT, mainly IC!
2. Calculate
the
small
signal
model
parameters:
gm=IC/VT,
rπ=β/gm,
re=VT/IE=α/gm.
5. Make circuit analisys for determining the parameters needed (gains, resistors)!
The next examples are very useful.
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Example
5.14
Try to find the gain! β=100,
Solu-on: (By using the method)
IB=(VBB‐VBE)/RBB=(3‐0.7)/100k=0.023mA,
IC= βIB=100x0.023mA=2.3mA,
VC=VCC‐ICRC=10‐2.3x3=3.1V
Then:
re=VT/IE=25mV/(2.3/0.99)mA=10.8Ohm,
gm=IC/VT=2.3mA/25mV=92mA/V,
rπ=β/gm=100/92=1.09kOhm,
The values are on the figure:
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Example
5.14
The
model:
The
voltage
sources
are
subs-tuted
by
shorts!
Analysis:
rπ 1.09
v be = v i = vi = 0.011v i ,
rπ + RBB 101.09
€
Example
5.16
What
is
the
gain?
What
are
the
signal
shapes?
Solu-on:
DC
biasing
(C:open)
By
using
the
T
model
(C:short)
DC
biasing:
α=0.99
IE=(10‐VE)/RE=(10‐0.7)/10=0.93mA
re=VT/IE=25mV/0.93mA=27Ohm,
Let:
β=100α=0.99,
Av=vo/vi=183.3
(posi-ve)
IC=0.99IE=0.92mA
VC=‐10+ICRC=‐10+0.92x5=‐5.4V
(Check:
Is
it
in
acˆve
mode?)
Change
on
VC
in
ac-ve
mode:‐5.4V...+0.4V
(sat.limit)
and:
‐5.4V...‐10V.
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Example
5.16
The
output
swing
to
the
satura-on
and
cut‐off
limits
of
the
BJT.
(At
the
limit:
We
are
over
the
small
signal
limit,
there
is
no
linear
transmission.)
The
small
signal
limit
at
the
input
:
abouth
10mV
peak.
The
output
signal
with
the
given
gain:
(183.3)
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5.6.10
The
Early‐effect
on
the
model
There are nonideal current generators :
(VA + VCE ) VA
ro = ≅ ,
IC IC
The
output
voltage
will
change:
€
v o = −gm v be (RC ro ),
€ DE
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Example
5.40
data:
I=100mA,
β=100,
VA=100V,
Rsig=2k,
RL=8k,
Ques-ons:
a.:
VB,
VE,
VC
:?
b.:
gm,
rπ,
ro
:?
c.:
determine
the
π
model
(a.
var.),
in
case
Z
is
grounded.
Given:
source
resistance
at
the
input
and
load
at
the
output
d.:
What
is
the
full
voltage
gain?
(vy/vsig)
e.:
What
is
the
error
on
gain
by
neglec-ng
ro?
Homework
1.
Everybody
must
solve
and
give
to
me!
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5.7
Single‐stage
BJT
amplifiers
Three
possibility
for
the
structure:
1. Common
emiYer
2. Common
base
3. Common
collector
The biasing scheme are the same at all three structures.
5.7.1 The basic structure – the same biasing network
If I, RB, RC, β are known, everithing can be calculated.
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Exercise
5.41
Find
the
DC
U
and
I
values!
What
is
the
voltage
swing
at
the
collector?
Given:
RC=8kΩ,
RB=100kΩ,
VCC=+10V,
VEE=‐10V,
Find
the
values
of
the
BJT
small
signal
parameters!
(π
és
T)
VA=100V
(Early
voltage)
a. β=100,
b. β=
50,
Homework
!
c. β=200,
Homework
!
Solu-on: Subs-tu-ng the equa-ons on the previous figure:
‐
direc-on:
VC
decreases:
Till
the
tr.
will
saturate
(VCB
opens
to
0.4V),
Vcmin=‐0.6V
ΔVC=
3.4V
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Exercise
5.41
Small signal models ( π és T )
From
the
5.4
table:
IC V
gm = = 40mA /V, re = T = 25Ω,
VT IE
VT V
rπ = = 2.5kΩ, ro = A = 100kΩ,
€ IB IC
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53
€
5.7.2
Characterising
BJT
amplifiers
The
amplifier
with
load
and
signal
source:
Defini-ons:
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54
Characterising
BJT
amplifiers
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55
Eqivalent
circuits
Rela-onships:
Ri, Ro, Avo, Ais, Gm : proper values of the amplifier: independents of Rsig, and RL .
Rin,
Rout,
Av,
Ai,
Gvo,
Gv
:
depend
one
or
both
of
them:
Rsig,
and
RL.
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What
model
to
use,
which
parameter
to
determine?
It can be answered by the full circuit and its connec-ng circuits.
The models are equivalents. The same result whatever type we use.
Parameter
determina-ons:
Some-mes
we
need
only
the
proper
values.
(design)
Some-me
we
need
the
full
amplifier
values.
(using)
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57
5.7.3
The
Common‐EmiYer
(CE)
Amplifier
The
circuit:
CC1,
CC2:
in
and
out
coupling.
DC:
open,
AC:
short
CE:
bypass
capacitor:
AC:
shortgood
ground
at
E
(it
will
shunt
the
infinite
resistor
of
current
gen.
)
prac-cal
value:1..10..100μF
Examina-on of the effect on the circuit: later
Ekvivalent circuit with the π model:
Put on the: „AC glass”
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Terminal
parameters
of
the
CE
amplifiers
vi
Input
resistance:
Rin = = RB Rib = RB rπ , ha RB ››rπ : Rin ≅ rπ ,
ii
vo
Voltage
gain
(proper):
Av = = −gm (ro RC RL ),
vi €
€ v
Open
loop
gain:
Avo = o = −gm (ro RC ), ha ro ››RC : Avo = −gm RC ,
RL=∞
v i R =∞
L
€
vo
Output
resistance:
Rout = = RC ro , ha ro ››RC : Rout ≅ RC ,
io v sig=0
€
€
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€
€
5.7.5
The
Common‐Base
(CB)
amplifier
v vo
Input
resistance:
Rin = i = re , A
kimene-
ellenállás:
Rout = = RC ,
ii io v sig=0
v o −α ie (RC RL ) α
Volage
gain
(proper):
Av =
=
=
C R
L ) =
gm (R
(R
C RL
),
vi −ie re re
€ €
v
Open
loop
gain:
Avo = o = gm RC ,
RL=∞
vi R L =∞ DE
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€
5.7.6
The
Common‐Collector
(CC)
amplifier
or
EmiYer
Follower
The circuit:
The T model: ro is paralel with RL
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61
CC
amplifier
The simplified T model:
Calcula-on
of
the
parameters
are
complex!
For
the
calcula-on:
At
the
input
ib,
at
the
output
ie
flows.
By
the
Thevenin
theorem:
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62
Tha
analysis
of
the
CC
amplifier
vo RB (ro RL )
Full
amplifier
gain:
Gv = = ,
v sig Rsig + RB Rsig + RB
+ re + (ro RL )
β +1
RL
if RB ››Rsig and ro ››RL , Gv ≅ ,
Rsig
+ re + RL
€ β +1
€ RB ro
if RL = ∞, Gvo = ,
Rsig + RB Rsig RB
€ + re + ro
β +1
If
in
the
denominator:
components
next
to
the
RL
and
re
are
small:
€
The
voltage
gain
≅ 1.
(typical
value
of
the
FC
amplifier)
€
The
output
resistance:
v Rsig RB Rsig RB
Rout = o = ro re + , because
ro
high:
Rout = re + ,
io β + 1 β + 1
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5.7.7
Summary
and
Comparison
1. The
CE
has
high
voltage
gain.
They
give
the
bulk
of
an
amplifier
chain.
2. Using
emiYer
resistance:
beYer
parameters,
with
gain
reduc-on.
3. The
CB
amplifier
has
low
input
resistance.
Good
high
frequency
response.
4. Applica-on
for
Voltage
follower:
isola-ng
the
signal
source
from
the
load.
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5.8
The
BJT
internal
capacitances
and
high‐frequency
model
High
frequency
π
model:
Cμ:
CB
deple-on
region
capacitance
Cπ = Cde + Cje,
Cde:
Diffusion
capacitance
of
the
base
Cje:
Capacitance
of
the
BE
region
The values of the Cμ and Cπ are not know but they can be calc. from the freq. response of hFE (β)
Without
analysis:
The
cutoff
frequency:
β0 1
h fe = β = , ωβ = ,
1+ s(Cπ + Cπ )rπ (Cπ + Cπ )rπ
€ €
Unity
Gain
bandwidth:
ωT = β 0ω β ,
capaci-ve coupled amplifier
The freq. response:
3 band
Bandwith:
(BW)
from
the
midband
‐3dB
BW
=
fH
–
fL
In
prac-ce:
BW
≅
fH
,
(fH
››
fL)
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66
CE
frequency
response
At midband: The capacitors can be neglected, frequency independent response.
At high frequency: The coupling capacitors are shorts.
High frequency model:
AŒer simplifica-on:
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67
High
frequency
response
of
the
CE
amplifier
Subs-tu-ng Cμ :
During
the
process
Cμ
will
be
transformed
to
the
input.
Cμ
at
the
input
will
be
higher
by
the
factor
(1+gmRL).
(gm
:
gain
at
midband)
This
is
the
Miller
effect.
Transformed
capacitor
(C):
Miller
capacitance
The
HF
response
with
the
Miller
capacitance:
Vo AM
= ,
Vsig 1+ s
ω0
ω 1
fH = 0 = ,
,
2π 2πCin Rsig
€
The
fH
is
small
because
of
the
Miller
capacitance.
€(100KHz..MHz)
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Example
5.18
Determine the Gain at midband and fH !
data:
VCC=VEE=10V,
I=1mA,
RB=100kΩ,
RC=8kΩ,
Rsig=5kΩ,
RL=5kΩ,
β0=100,
VA=100V,
Cμ=1pF,
fT=800MHz,
rx=50Ω.
Solu-on:
Parameters
of
π
model:
IC 1mA β0 100 VA 100V
gm = = 40mA /V, rπ = = = 2.5kΩ, ro = = = 100kΩ,
VT 25mV gm 40mA /V IC 1mA
gm Cµ = 1pF,
Cπ + Cµ = = 8 pF,
ωT
€ € Cµ = 7 pF, €
Gain
at
midband:
€
RB rπ
€ AM = − gm RL, , RL, = ro RC RL = 3kΩ, AM = −39,
€ RB + Rsig rπ + rx + ( RB Rsig )
The
circuit
aŒer
elimina-ng
DC
sources
:
(Igen
:
open
VCC
:
short
)
Analysis by separa-ng C‐s:
1: Effect of CC1
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70
The
low‐frequency
response
2: Effect of CCE
3: Effect of CC2
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71
The
low‐frequency
response
Summa-on:
Vo s s s
The
transmission:
= −AM ,
Vsig s + ω P1 s + ω P 2 s + ω P3
Generaly
CE
gives
the
highest
fP
€ 1 1 1 1
For
calcula-ng
the
‐3dB
fL
value
(approx.):
fL ≅ + + ,
2π CC1RC1 CE RE CC 2 RC 2
(RC1 and RC2: seen by CC1 and CC2 )
€
Ekvivalent
:
f L = f P1 + f P 2 + f P 3 ,
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€ 72
Example
5.19
Given:
CE
amplifier
(example
5.18
).
RB=100kΩ,
RC=8kΩ,
RL=5kΩ,
Rsig=5kΩ,
β0=100,
gm=40mA/V,
rπ=2.5kΩ
determine:
the
values
of
CC1,
CC2,
CE
,
to
reach:
fL=100Hz.
Solu-on:
1:
R‐s
seen
by
C‐s:
RC1 = ( RB rπ ) + Rsig = 7.44kΩ,
R R
RE = re + B sig = 72Ω,
β +1
€ RC 2 = RC + RL = 13kΩ,
2:
Suppose
:
CE
is
the
dominant
and
contributes
80%
of
the
value
fL:
€ 1
= 0.8 • 2π •100, → CE = 27.6µF,
€ CE • RE
3:
CC1
contributes
10%
of
fL:
1
= 0.1• 2π •100, → CC1 = 2.1µF,
€ CC1 • RC1
3:
CC2
contributes
10%
of
fL:
1
= 0.1• 2π •100, → CC 2 = 1.2µF,
€ CC 2 • RC 2
(
choose
C
from
standardised
values:
fL‹100Hz
)
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5.11
SPICE
BJT
models
and
simula-on
(Wikipedia
transistor models)
Types
of
models:
Models
for
device
design:
They
can
simulate
the
physical
and
chemical
processes
during
the
manufacturing
Models
for
circuit
design:
Large
signal,
nonlinear
models:
• Physical
(Based
on
the
physical
working)
• Empirical
(Based
on
measured
data)
• Table
(Data
on
tables
and
extrapola-ng)
Small
signal
models:
(for
circuit
with
linear
behavier)
• Ebers–Moll
model
• Gummel–Poon
model
• BSIM3
(see
BSIM)
• BSIM4
• BSIMSOI
• EKV
MOSFET
Model
(its
web
site
at
EPFL)
• PSP
• HICUM
• MEXTRAM.
• Hybrid‐pi
model
• H‐parameter
model
74
BJT
SPICE
Ebers‐Moll
model
IS v BE
iBE =
βF
(e n F VT
−1),
IS v BC
iBC =
βR
(e n R VT
−1),
€
iCE = IS (e v BE n F VT
− e v BC n R VT
),
€
iB = iBE + iBC ,
€ iC = iCE − iBC ,
iE = iCE + iBE ,
€
Handling
of
Special
effects:
€
eg:
Early‐effect
€
v BC
iCE = IS (e v BE n F VT
− e v BC n R VT
)1− V ,
A
€
Ebers‐Moll
model
with
capacitances
BeYer model:
Gummel‐Poon model
76
Parameters
of
Model
Typical values:
77
Simula-ng
by
Tina
‐
demo
78