ECE 6730: Radio Frequency Integrated Circuit Design: University of Utah Electrical and Computer Engineering Department
ECE 6730: Radio Frequency Integrated Circuit Design: University of Utah Electrical and Computer Engineering Department
ECE 6730: Radio Frequency Integrated Circuit Design: University of Utah Electrical and Computer Engineering Department
University of Utah
Electrical and Computer Engineering Department
ECE 6730: Radio Frequency Integrated Circuit Design
Course Description:
This course will cover the design and analysis of radio frequency integrated circuits
(RFICs) for communications. We will begin with an overview of RF and wireless technology,
and cover some fundamental concepts in RF design such as nonlinearity, sensitivity, and
dynamic range. Matching and impedance transformation networks will be discussed, as
well as S-parameters. Following this we will discuss transciever architectures (Heterodyne,
Direct Conversion, etc.), and review modulation and upconversion concepts. The latter
half of the course will be devoted to a detailed examination of each of the blocks in the
transciever architectures discussed: Low Noise Amplifiers, Mixers, Oscillators, Frequency
Synthesizers, and Power Amplifiers.
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If you are unsure if you meet the prerequisite or would like to take the course despite not meeting it,
come and talk to me after class and we can discuss your situation.
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ECE 6730: RF Integrated Circuit Design Spring 2009
Assignments:
Projects:
The project for this class will involve the design and simulation of a down-conversion
chain for a radio frequency receiver in a 0.18 µm CMOS process. The project will be split
into three subprojects: the first will be to design a low noise amplifier (LNA), the second
will be to design a mixer, and the third will be to design a VCO and combine the three
blocks into a complete down-conversion chain. Several different performance metrics will be
given (noise figure, power, area, linearity), and students will be ranked against one another
in each category to determine an overall performance score. Most of the emphasis will be
placed on having a well thought-out and justified design approach (i.e., analytical design
rather than “SPICE monkeying”).
Exams:
There will be an in-class midterm exam and a final exam. Students will be allowed to
bring one one page of notes to the midterm and two pages of notes to the final.
Feedback:
Grading:
Assignments . . . . . . . . . . . . . . . . . . . . . . . . . 5%
Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40%
Midterm Exam . . . . . . . . . . . . . . . . . . . . . 20%
Final Exam . . . . . . . . . . . . . . . . . . . . . . . . . 35%
Late Policy:
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ECE 6730: RF Integrated Circuit Design Spring 2009
Tentative Schedule: