127 Multilevel Inverter: International Research Journal of Engineering and Technology (IRJET)
127 Multilevel Inverter: International Research Journal of Engineering and Technology (IRJET)
127 Multilevel Inverter: International Research Journal of Engineering and Technology (IRJET)
(EMC) when operated at high voltage, Lower EMI due to (FRT) capabilities of renewable energy plants equipped
small output voltage steps, Smaller rating of semiconductor with multilevel converters. Since the main attention of
devices, Better feature in output voltage in terms of less this paper is the grid side converter control, the energy
distortion generating system was simplified to an equivalent
variable current source. The grid side converter is
This project recounts the development of a novel hybrid connected to the grid through an LCL filter. Two
multilevel single phase inverter that has 8 power switches controllers are developed to achieve grid currents
and 4 power diodes to produce 31-levels in the output regulation. The control of DC bus voltage is achieved by PI-
voltage with incorporating all features listed above. The regulation. Performances of the two controllers and the
topology was applied to an induction motor and the improved modulation technique are compared and
performance of the inverter is studied using MATLAB/ evaluated in terms of accordance with the grid
SIMULINK. And the hardware prototype is developed for the connection requirements (GCR) including, low voltage
verification of concept and the output results are clearly ride-through capabilities, frequency variation and reactive
presented. power control. The main shortcoming of this system are12
switches are required for 3-level output itself.
1.1 OBJECTIVE:
Rabia Guedouani et al (2012) have proposed a control
The main objectives of the project are: strategy of a three –phase five-level double converter for
induction motor drives. The converter consists of the five-
To reduce the number of power switches used level NPC rectifier, DC link, and the five-level NPC inverter. In
with the help of new multilevel inverter topology. this control strategy, the DC link voltages are controlled by
using a closed loop with an optimized stabilization system
To study the performance of 31-level inverter with called clamping bridge. It provides a fast and flexible control
the help of MATLAB/SIMULINK. of the converter capacitor voltage. This method will redress
the imbalance of DC link voltage. This control strategy is
To reduce the Total Harmonic Distortion in the completely independent from the load control, leading to a
output of the inverter. simpler implementation. The three-phase five-level NPC
rectifier-inverter system is an ideal interface between a
2. LITERATURE REVIEW utility and renewable energy sources such as photovoltaic or
wind generator. The main shortcoming of this system is
Jinn-Chang Wu(2010) has proposed a three-phase three-
addition of NPC rectifier block to input side of the inverter
wire hybrid power filter configured by a three-phase passive
for balancing capacitor voltage. So the cost of the system is
power filter and a three-phase diode-clamped multi-level
high.
power converter with a small power capacity of zero-
sequence current loop connected in series to compensate for Sakthivel Muragan (2009) has discussed about the transistor
the harmonic currents of non linear load. The salient feature clamped inverter with the conventional diode clamped
is that a small power capacity of zero-sequence current loop inverter. In this method the gate driver concept is introduced
is applied to overcome the problem of balancing voltages of and this method is simple because only one switch is turned
two DC capacitors for a diode-clamped multi-level power ON at a time. By utilizing this concept a eleven level
converter applying in the three-phase three-wire hybrid multilevel inverter has been developed and the THD is found
power filter. A laboratory prototype is developed to verify to be much less than the conventional method. The main
the performance of the proposed three-phase three-wire shortcoming of this method is that, n number of gate driver
hybrid power filter. The experimental results have circuits are required for n number output levels.
demonstrated the feasibility and practicality of the proposed
three-phase three-wire hybrid power filter. The main Jing Zhao (2011), has present multilevel circuit topologies
disadvantage of this method is high harmonic content in the based on switched-capacitor and diode-clamped converters
output current i.e. THD is nearly 22% and more number of (MCT-BSD). The topology structure and the operation
clamping diodes is used. principle, including the working states transitions of the
diode-clamped part, the volt-ages balancing mechanism of
Mohamed Abbes et al (2012) have presented a new the dc link capacitors, and the pulse width modulated carrier
control strategy for the three-level, neutral point control strategy are presented. The switched-capacitor
clamped (NPC), voltage source converter. The converter circuits contribute not only to balancing the voltages of
can be used in many high-power renewable energy capacitors but also to boosting the output voltage with a
systems such as direct drive wind turbines and hybrid certain input dc voltage. The results show that balancing the
generating units. The developed control algorithm voltages of capacitors, boosting the output voltages, and
proposes an improved solution to balance DC bus operating under the three-phase condition are all realized
intermediate voltages using space vector modulation effectively in the MCT-BSD. In this method more number of
(SVM) techniques. It aims to guarantee fault ride-through
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 146
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 03 | Mar 2019 www.irjet.net p-ISSN: 2395-0072
power switches and capacitor are used and the THD is The MATLAB/System generator based simulation results
around 13% these are major drawbacks of this method. validated through FPGA based prototype for a typical output
level exhibit the drastic enhancement in the quality of output
Miao Chang-xin et al (2010), have presented Flying capacitor voltage. The total harmonic distortion (THD) obtained using
multilevel inverters. In order to improve the harmonic a harmonic spectrum reveals the mitigation of the frequency
performance of the output voltage under low modulation components of output voltage other than the fundamental
index region, the paper presents a novel PWM method for and paves the way to open a new avenue for nurturing
flying capacitor multilevel inverters based on the idea of innovative applications in this domain. The drawbacks of the
controlling freedom degree. The novel PWM method can system are THD is around 7.8% and 15 switches are used for
balance the flying capacitor voltage in a certain period. The 15-levels and the forward blocking voltage is low.
validity of the novel PWM method is demonstrated by the
experimental results. The proposed PWM method is efficient Himanshu Misra (2011), has discussed about the multilevel
for five-level output only, as the number of output level voltage source inverters using unique structure so it produce
increase the THD in the output also increase. high output voltages with low harmonics without the use of
transformers or series-connected synchronized switching
Jaison Mathew(2011), has present a multilevel inverter devices. The inverter consists of eleven switches and five
topology suitable for the generation of dodecagonal space separate dc sources with a load to produce 11 level output
vectors instead of hexagonal space vectors as in the case of voltage. In this method less number of switches is used
conventional schemes. This feature eliminates all the compare to the conventional methods. The simulation of
6n+1,(n=odd), harmonics from the phase voltage and eleven level multilevel inverter is done with pulse width
current in the entire modulation range with an increase in modulation technique. In this topology the switches in the
the linear modulation range. The topology is realized by upper leg have high voltage rating than the switches in the
flying capacitor based three level inverters feeding from two lower leg and the upper two batteries of the circuit are used
ends of an open end winding induction motor with for more number of times compare to other three batteries.
asymmetric dc links. The flying capacitor voltage is tightly
controlled throughout the modulation range using 3. PROPOSED WORK
redundant switching state for any load power factor. The
main drawbacks of the system are control is complex; more The proposed topology comprises bye-pass diode technique
number of freewheeling diodes are used. and common H-Bridge configuration to form hybrid
multilevel inverter shown in Figure 1. The bye-pass diode
Pengwei sun (2012), has present a new type of cascade technique is used to produce only positive voltage steps. In
inverter based on dual buck inverter with phase-shift control this technique a special circuit is employed i.e the power
scheme. The proposed cascaded dual buck inverter with switches and the DC source are connected in series and the
phase shift control inherits all the merits of dual buck type diodes are connected in parallel. To increase the number of
inverters and overcomes some of their drawbacks (i.e) voltage levels in the output a source, switch and diode is
improved system reliability. Here the phase-shift control and added to the byepass diode technique topology.
cascade topology reduce the ripple current or cut down the
size of the passive components by increasing the equivalent
switching frequency. Even though cascade topology solve the
issue of zero crossing distortion by using phase shift control
scheme the main drawback of this inverter we should turn
on the switches based on the direction of the output current.
Moreover when phase shifted PWM is fed to different
cascade unit, current zero-crossing distortion is theoretically
eliminated.
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 147
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 03 | Mar 2019 www.irjet.net p-ISSN: 2395-0072
will conduct during the positive half cycle and the Voltage on each stage can be calculated by using the
equation
switches ) will conduct during the negative half
cycle. 3.2
The number switches used in this topology is given by the
equation
+4 3.3
2 II +2Vs
3 III +3Vs
4 IV +4Vs
5 V +5Vs
6 VI +6Vs
7 VII +7Vs
8 VIII +8Vs
9 IX +9Vs
-1 3.1 15 XV +15Vs
For example if S=3, the output wave form has 15 levels 16 XVI NIL NIL 0
(±7, ±6, ±5, ±4, ±3, ±2, ±1 and 0),
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 148
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 03 | Mar 2019 www.irjet.net p-ISSN: 2395-0072
4. PERFORMANCE ANALYSIS
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 149
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 03 | Mar 2019 www.irjet.net p-ISSN: 2395-0072
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 150
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 03 | Mar 2019 www.irjet.net p-ISSN: 2395-0072
the MATLAB software and the output current waveform is technique and common H-bridge technique pulse generator
analyzed for THD using FFT method. Here 50 cycles of load are used. Both the operations are independent to each other.
current are taken as a sample for FFT analysis. The By producing correct triggering pulse to the switch, the
maximum frequency of 150Hz is taken as a limit for clear switching losses can be minimized.
visibility of the harmonic spectrum. The figure 11 shows the
harmonic spectrum obtained from FFT analysis for
conventional CHB inverter.
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 151
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 03 | Mar 2019 www.irjet.net p-ISSN: 2395-0072
switching device
bye pass diode,
clamping diodes,
DC split capacitors,
DC source,
output voltage levels
Figure 18 Switching pulse for switch S4
THD
The pulse generator 5 is used to generate switching pulse for
switch S4. The amplitude of the pulse is 1 and the conduction are taken into account. The comparison results are shown
period is 50%, time period is (1/200). The figure 18shows in following table
the switching pulse for S4.
Table 2 Harmonic Comparison
4.2.7 SWITCHING PULSE FOR H-BRIDGE
KEY FACTORS SERIES DUAL PROPOSED
PARALLEL BRIDGE HYBRID MLI
Since the main inverter circuit is used to produce stair case
SWITCHED MLI
voltage waveform only in positive half cycle so H-bridge MLI
circuit is used to produce both positive and negative sine
waveform. Figure 19 shows the H-bridge inverter circuit. SWITCHING 10 10 8
One switch in the upper leg and one switch in the lower leg DEVICE
will conduct same leg switches are does not get conduct at
BYPASE 1 2 4
same time to avoid the short circuit and damage of the
DIODE
switches. Figure 20 shows Pulse for H-Bridge Inverter.
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 152
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 03 | Mar 2019 www.irjet.net p-ISSN: 2395-0072
From the above harmonic comparison table, we observe that 5.2 FUTURE WORK
the percentage of THD present in output of proposed
inverter is low than the conventional method. These results The major scope of the future work is hardware
indicate that the proposed inverter can be utilized for implementation of high power 31-level voltage source
sensitive load and for standalone inverter operation inverter for domestic home UPS. This system can be used for
home UPS due to its nearby output sine waveform and less
4.4 MODEL OF SWITCHING ON SIX BIT UP/DOWN harmonic content. Since conventional home UPS inverter
COUNTER: efficiency is only about 40%. The hybrid inverter use only
less number of power switches so the inverter efficiency will
The counter switching scheme is not the only possible low be certainly high. The main applications of hybrid inverter
frequency switching scheme that can be used to eliminate are given below:
harmonics in the multilevel converter's output voltage. To
illustrate this point, the proposed switching schemes for a Air conditioner: The hybrid inverter can also be used in air
multilevel inverter with six separate de sources for single conditioner to modulate the frequency of the alternating
phase (s = 6) and with the number of switching limited to 64 current to control the speed of the air conditioner motor to
per quarter cycle. The other schemes are considered because achieve continuous adjustment of temperature.
they may produce a voltage waveform with lower THO than
the counter method, particularly at lower amplitude Stand alone inverter: They are commonly used in remote
modulation indices. V de is varied in order to keep the renewable energy systems producing power from
modulation index in a range for which the THD is minimum. photovoltaic panels and small wind turbines, most of these
system use modified sine wave type inverter because load
Table 3 Switching Sequence in counter cannot tolerate the high harmonic content.
5) Ebrahim Babae “Optimal Topologies for Cascaded 16) Ramkumar.S and Kamaraj.V, “A new series parallel
Sub-Multilevel Converters”, Faculty of Electrical and switched multilevel dc-link inverter topology”.
Computer Engineering, University of Tabriz, Tabriz, ELSEVIER, Electrical Power and Energy Systems
Iran. 36(2012)93-99.
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 154