IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO.

1, JANUARY 2015 229

Sliding-Mode-Control-Based Boost Converter

for High-Voltage–Low-Power Applications
Antonio Leon-Masich, Student Member, IEEE, Hugo Valderrama-Blavi, Member, IEEE,
Josep M. Bosque-Moncusí, Student Member, IEEE, Javier Maixé-Altés, Associate Member, IEEE, and
Luis Martínez-Salamero, Member, IEEE

Abstract—This paper presents the analysis and design the boost converter by itself is a poor candidate for high-
of a very high-voltage-gain single-stage boost converter voltage-gain applications because many factors can degrade
operating at the boundary between continuous conduction its efficiency limiting also the converter power rating [7] and
mode (CCM) and discontinuous conduction mode (DCM).
precluding the employ of high duty ratios that can saturate the
The converter is supplied by a 12-V car battery and at-
tains 1200 V with a voltage gain of 100. The use of a pulsewidth modulator (PWM).
hysteretic comparator in the control loop precludes the Among the nonisolated topologies, high-voltage gain can be
risk of modulator saturation and facilitates the operation achieved by connecting several step-up converters in cascade
at the mentioned boundary. Sliding-mode control theory is [8]. The resulting topology can supply high output voltages
applied to analyze the dynamic behavior of the switching with relatively high efficiency and a progressive reduction of
regulator and to establish the system stability conditions.
the duty ratios. The main drawbacks are the stability [9],
The performance of the converter is investigated using sil-
icon carbide (SiC) devices for the power switch realization. the complexity, and the high cost caused by interconnecting
LED-based efficient lighting systems can be a promising different dc–dc converters in cascade, as well as the need of
application of the proposed system. synchronization in all the power switches to avoid beat frequen-
Index Terms—High-voltage gain, hysteresis modulation,
cies. Another alternative is the employ of quadratic or cubic
LED supplies, silicon carbide (SiC) devices, sliding-mode converters that can be derived from the cascade circuits by using
dynamics. a single driven transistor [10] at the expense of incorporating
several additional diodes. At the same time, the single active
I. I NTRODUCTION switch must be designed to block the whole output voltage in
the OFF-state and the entire input current in the ON-state.

C ONVERTERS operating with high-voltage gains are

widely used in many industrial applications, some ex-
amples being high-intensity discharge lamps requiring several
In order to avoid the extreme duty cycles of the converters
without magnetic isolation, another option is using switched-
capacitor converters [11], wherein it is possible to increase the
kilovolts at their start-up [1], front-edge stage circuits for gain by introducing several stages, thus reducing the duty cycle
renewable energy [2], [3], cold cathode fluorescent lamps, and and the devices’ stress. However, the current flowing through
telecommunication applications [4]. the devices increases in the switches’ turn-on impairing the
Voltage step-up converters can be isolated and nonisolated. efficiency due to the conduction loss increment. In this kind
The isolated converters, such as flyback, push–pull, forward, or of converters, increasing the output voltage requires several
tapped boost, can provide high output voltages at the expense switching capacitor stages, which also increases the overall cost
of efficiency degradation provoked by the losses associated and the complexity of the converter and reduces its reliability.
with the leakage inductance, which cause high-voltage stress, An extension of Luo’s converters was reported in [12] by
large switching losses, and serious electromagnetic interference integrating various switched inductor stages [13], thus avoid-
problems [5]. These converters often require active or passive ing high duty cycles. However, the gain of the converter is
snubbers for recycling or dissipate leakage energy [6]. More- not higher than that of quadratic or cubic converters, but the
over, using a transformer, although contributes to the voltage complexity of the circuit and its cost and volume increase.
gain, increases the cost, volume, and losses. Other possibilities are converters with coupled inductors,
There are many options to achieve a high-voltage gain where the switching devices have to block a smaller voltage so
with nonisolated topologies, most of them being derived from that devices with lower ON-resistance can be used, and the prob-
a single-stage boost converter. It is worthy to remark that lem of the reverse recovery peak in the diode can be neglected.
However, the coupled inductor needs a snubber to eliminate the
Manuscript received September 3, 2013; revised February 16, 2014;
voltage peaks generated by the leakage inductance, and this fact
accepted April 12, 2014. Date of publication May 29, 2014; date of tends to increase the losses, cost, and volume of the converter
current version December 19, 2014. This work was supported by the [14]. Some efficiency improvement of these topologies com-
Spanish Ministry of Science and Education under Grant CSD2009-0046 bining coupled inductors with switched capacitors is found in
and Grant DPI2012-31580.
The authors are with the Departament d’Enginyeria Electrònica, Elèc- [15] where the efficiency increment is obtained by mixing the
trica i Automàtica, Universitat Rovira i Virgili, 43007 Tarragona, Spain single-stage boost converter with transformers at the expense of
(e-mail: [email protected]). increasing the complexity of the converter and its control.
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. The goal of this paper is to demonstrate that a high-
Digital Object Identifier 10.1109/TIE.2014.2327004 voltage gain can be achieved in a single boost stage without

0278-0046 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
230 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 1, JANUARY 2015

transformers and to show that the resulting converter can be

competitive in the field of LED-based lighting power supplies.
The proposed converter requires duty cycles near unity; hence,
a PWM approach is disregarded because of the risk of sat-
uration for duty cycles bigger than 0.7. Instead, a hysteresis
modulator with a variable width is employed to regulate the
converter, which operates at the boundary between continuous
conduction mode (CCM) and discontinuous conduction mode
(DCM) in order to minimize the power losses.
The highly nonlinear behavior introduced by the hysteretic
comparator is tackled by means of the sliding-mode control
theory, which provides an averaged dynamic model of the
converter despite the variable switching frequency produced by
the comparator. A subsequent linearization of this model allows
the design of an appropriate compensating network.
From the technological point of view, the extreme conditions
of high-voltage operation are counteracted by the use of silicon
carbide (SiC) power devices, which eventually results in good
global efficiency. The design of a specific driver for a normally
OFF SiC JFET used in the power switch implementation is also
presented.
The remainder of this paper is organized as follows. A brief
review of the state of the art of sliding-mode control in power con-
verters, together with the boost converter analysis under sliding-
mode operation, is presented in Section II. The design of the Fig. 1. (a) Boost converter with parasitic elements. (b) ON-state.
converter with an associated driver for a normally OFF SiC JFET (c) OFF-state.
is given in Section III. The converter operation at the DCM–
of the dynamical behavior of hysteresis-based feedback con-
CCM boundary with high gain is discussed in Section IV.
trolled systems such as self-oscillating power converters [17].
Experimental measurements in the converter supplying a LED
Power converters are variable structure systems whose asso-
spot and resistive loads with SiC devices are reported in
ciated sliding-mode control theory is the natural way to regulate
Section V. Finally, conclusions are presented in Section VI.
them. This is due to the fact that input signals for switching
devices are continuous functions of the converter state, and
the resulting dynamic models are described by differential
II. S LIDING -M ODE C ONTROL
equations with discontinuous right-hand sides. In this context,
Our goal is to design a single boost converter with a high sliding modes can be induced with state trajectories over the
dc gain (around 100) for lighting applications. For this reason, surfaces in the system state that establish the discontinuity of
the converter will have to operate in the DCM–CCM boundary the right-hand sides of the differential equations [18]. More-
to reduce device recovery losses and improve the overall effi- over, since the production of chattering is intrinsic to the
ciency. In addition, it will employ a hysteretic modulator in the nature of switching power converters, first-order sliding-mode
control loop to work with duty cycles near the unity without the controllers [19]–[21] are preferred to high-order sliding-mode
risk of modulator saturation. Furthermore, the converter should controllers [22], which, in turn, are increasingly used in the
be controlled through the inductor current since the current regulation of electrical drives [23]–[25].
dynamic behavior with respect to the control variations is of The circuit description of the converter is depicted in
minimum-phase type. Fig. 1(a), where parasitic resistances in the reactive compo-
When dealing with a hysteretic modulator in a feedback nents, together with an ON-resistance for the transistor, and a
controlled system, there are three possible methods to tackle voltage source for the diode are included in order to study the
the analysis, i.e., describing function, Tsypkin’s method, and influence of the conduction losses in the converter performance.
sliding-mode control. The first two methods are performed in In the DCM–CCM border, the converter has two structural
the frequency domain and exhibit complementary properties. changes within a switching period, i.e., ON-state (see Fig. 1(b))
While the describing function is an analytical approach giving and OFF-state (see Fig. 1(c)), and therefore, it can be repre-
enough insight on the influence of the different parameters in sented by means of two linear vector differential equations
the system self-oscillation, its prediction of limit cycles is in-
accurate. On the contrary, Tsypkin’s method is an accurate nu- ẋ(t) = A1 x(t) + B1 f or u = 1 (ON−state) (1)
merical procedure requiring some complex computations that ẋ(t) = A2 x(t) + B2 f or u = 0 (OFF−state) (2)
cannot give sufficient information on the role of the different
where x(t) is the state vector corresponding to the state vari-
parameters in the system performance. In a clear-cut contrast,
ables of the power stage
sliding-mode control is a time-domain analytical method that
provides not only a good insight but also an accurate prediction x(t) = [iL , vC ]T . (3)
LEON-MASICH et al.: SLIDING-MODE BOOST CONVERTER FOR HIGH-VOLTAGE–LOW-POWER APPLICATIONS 231

Matrices A1 , A2 , B1 , and B2 are given, respectively, by In order to find the equilibrium point of the resulting sliding
 −rL −rON  V  dynamics, we will decompose k(t) in two terms, namely, a
0 S
A1 = L B1 = L (4) positive constant K and a superposed time-varying component
0 − (Ro +rC )C
1
0 k̂(t). We will first assume a switching surface of the type
 r   VS −vD  S(x) = iL − K, which will result in an equilibrium point X ∗
C ·R
− LL − (Ror+r )L − 1
L − (R
rC
+r )L
A2 = C o C
B2 = L . of constant coordinates. The influence of the term k̂(t) will be
Ro
(R +r )C
o C
− (R +r
1
)C o C
0 predicted next in a closed-loop model of the converter dynamics
after linearization around X ∗ by assuming that k̂  K.
(5) The resulting equivalent control for S(x) = iL − K and the
corresponding ideal sliding dynamics are given by (12)–(14),
The control technique applied to the converter requires the use
respectively, as follows:
of a switching surface s(x) to induce sliding motions in the
K·rC ·Ro
converter by forcing the input current to track a slow varying −VS + rL · K + Ro
Ro +rC + vC Ro +rC + vD
signal k(t) ueq = rC ·Ro ·K
(12)
−K · rON + Ro
Ro +rC + vC Ro +rC + vD
s(x) = iL − k(t) (6) iL = K (13)
d vC Ro vC
where k(t) is given by = K · (1 − ueq ) − . (14)
dt C(Ro + rC ) C(Ro + rC )
t
1 Therefore, the coordinates of the equilibrium point X ∗ =
k(t) = (IREF − io (λ)) · d λ = Im (t). (7)
2 [IL∗ VC∗ ]
are given by (15) and (16). (See (16) at the bottom of
−∞
the page.)
IREF is the output current constant reference, iO (t) is the
output current, and Im (t) is the average input current. IL∗ = K. (15)
Introducing the invariance conditions [18] s(x) = 0 and
Assuming now that k(t) is time varying, the corresponding
ds(x)/dt = 0 in (1)–(6) yields the equivalent control ueq (t),
equivalent control will be given by
which is bounded by both maximum and minimum values
dk(t) k(t)·rC ·Ro
dt −VS +rL ·k(t)+ Ro +rC +vC Ro +rC +vD
of u(t) Ro
ueq = . (17)
0 < ueq (t) < 1. (8) −k(t)·rON + rCR·R o ·k(t)
o +rC
+vC RoR+r
o
C
+vD

Moreover, a switching law of the type Therefore, the ideal sliding dynamics can be expressed as (18)
and (19) as follows:
u(t) = 0 if s(x) > 0 (9)
iL (t) = k(t). (18)
u(t) = 1 if s(x) < 0 (10)
Linearizing (19), shown at the bottom of the page, around
will induce a sliding regime on the switching surface ensuring the equilibrium point X ∗ = [IL∗ VC∗ ] leads to the following
the sliding-mode existence conditions because expression:

ds(x) d v̂C d k̂(t)

s(x) < 0. (11) = a · k̂(t) + b · v̂C + c · + d · V̂S (20)
dt dt dt


4·K((−rL −rON )·K +VS )Ro3 +[(rC
2 +(−6·r
ON −4·rL )rC +rON )K +((2·vD +4·VS )·rC −2·vD ·rON )·K +vD ]·Ro
2 2 2 2
VC∗ =
2·Ro

−2·rC (−vC +K ·rON )−((rON +rC )·K +vD )·Ro +rC 2 (−v +K ·r
D ON )
2
+
2·Ro
1
+ [((rON −rC )·K −vD )·Ro −vD ·rC +K ·rON ·rC ] (16)
2·Ro

  
−dk(t) rC ·Ro
d vC Ro · k(t) − vC dt + − rLL − (Ro +rC )L k(t) + − L1 + (Ro +r
rC
C )L
vC + VS −v
L
D
Ro · k(t)
f (x) = = −   (19)
dt C(Ro + rC ) rC ·Ro
rON
L − (Ro +rC )L k(t) − L1 − (Ro +r
rC
C )L
vC − vLD · C · (Ro + rC )
232 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 1, JANUARY 2015

Fig. 4. Power stage scheme.

and the characteristic equation of the system will be given by

Fig. 2. Boost converter with hysteretic control of the input current. ki · c ki · a

s2 + s −b + =0 (27)
Ro Ro

that will correspond to a stable system provided that the follow-

ing condition is satisfied:

2 R o · VS
0 < ki < . (28)
L K
Fig. 3. Dynamic model of the switching regulator depicted in Fig. 2.
Therefore, ki can be found using classical Bode techniques in
(26) or by pole assignment in (27).
where coefficients a, b, c, and d are given by (21)–(24), respec-
tively, for the case of no losses for the sake of simplicity
III. C ONVERTER I MPLEMENTATION
∂f (x) 1 VS
a= = (21)
dk x∗ C Ro · K A. Power Stage
Figs. 4 and 5 illustrate the circuit scheme of power stage and
∂f (x) 2
b= =− (22) sliding-mode controller, respectively.
dvC x∗ Ro · C
With the aim of achieving a single-stage boost converter
with the highest efficiency, the converter has been implemented
∂f (x) L K
c= =− (23) with SiC devices. These devices are increasingly replacing Si
dvy dK(t)
y= dt ,x∗ C R o · VS components in the design of power converters due to their ad-
vantageous thermal and electrical characteristics, which make
∂f (x) 1 K them capable to work at higher voltages and frequencies with
d= =− . (24)
dVS x∗ C R o · VS lower losses than their Si counterparts [26]–[30].
In our case, the power diode is a SiC Schottky noncommer-
Fig. 2 illustrates the block diagram of the boost converter cial device that has been specifically fabricated for our applica-
controlled through the switching surface S(x). It can be ob- tion by the National Center for Research in microelectronics
served that the ideal comparator required by the sliding-mode under the series name ALS11. The power transistor is the
control theory has been implemented by a hysteretic com- normally OFF JFET SJEP12R063 that has required the design
parator based on a flip-flop that activates the switch when the of a specific driver as it is described below in this section.
inductor current is zero and turns off the MOSFET/JFET when The input series inductor of 70 μH has been realized with
the inductor current reaches 2Im . This is equivalent to force the 11 wires of 0.07 mm2 by making 37 turns around the Kool Mμ
average input current Im to take the appropriated value in order 773244-A7 core, which has a relative permeability value of 90.
to fulfill the output requirements. It has to be pointed out that the use of 11 wires instead of 1
Fig. 3 illustrates the closed-loop dynamic model of the intends to reduce the skin effect when the switching frequency
switching regulator depicted in Fig. 2 where the expression of of the converter increases beyond 40 kHz.
H(s) is derived from (20) by assuming that V̂S = 0. Hence, The output capacitor is of ceramic type with a capacity of
v̂C (s) a+c·s 8 μF and an equivalent series resistance of 8 mΩ and a breaking
H(s) = = . (25) voltage of 1.3 kV.
k̂(s) s−b
The input current sensor is made of a surface mount device
The system loop gain can be expressed as resistance of 100 mΩ and 5 W, whereas the output current sen-
sor is an E24 resistor of 10 Ω and 0.25 W. Signals −Ie and Iout
1 ki ki · c s + (a/c) are proportional to inductor current iL and output current io ,
T (s) = H(s) · · = · (26)
Ro s Ro s · (s − b) respectively.
LEON-MASICH et al.: SLIDING-MODE BOOST CONVERTER FOR HIGH-VOLTAGE–LOW-POWER APPLICATIONS 233

Fig. 5. Control implementation schematic circuit.

B. Control Stage
Fig. 5 shows the two main blocks of the sliding-mode
controller, namely, integrator of the output current error and
hysteretic comparator. The integrator has been implemented
with a circuit based on LF347 operational amplifier, whereas
the hysteretic circuit employs two LM319 comparators with
a response time of 80 ns, and a JKMC14027 flip-flop with a
bandwidth of 13 MHz. The inputs of the hysteretic comparator Fig. 6. Typical JFET driver. (a) n-on. (b) n-off.
are k(t) and Ie , which are respectively given by the output of
the integrator and the output of an inverting amplifier based
on LF347. The output of the hysteretic comparator is a digital
signal Q that activates the driver to turn on or turn off the power
transistor. The transistor turn-on corresponds to the high level
of Q, which is the result of a zero input current, whereas the
turn-off is produced by the low level of Q, which is obtained
when k(t) is bigger than 2Im .

C. Driver Implementation
Fig. 7. Implementation of the driver prototype circuit.
The driving circuit of the normally OFF JFET has to provide
a negative voltage to turn off the JFET and a positive voltage to
turn it on.
Although normally ON JFET SiC devices and drivers are
quite common, normally OFF JFETs and MOSFETs are less
available. The ON JFET is a majority carrier device that typi-
cally has normally ON characteristics requiring a negative bias
applied to the gate pinchoff channel, the pinchoff voltage level
being determined by the design of the channel [31]. The OFF
JFET has complementary characteristics, which implies that
different drivers for each type of SiC JFET are needed. In
Fig. 6, the basic circuit differences between normally OFF and
normally ON JFET drivers are shown.
The resulting driver prototype employed in our case for the
SJEP12R063 normally OFF JFET is depicted in Fig. 7. The Fig. 8. Driver prototype.
driver is composed by a simple push–pull output driver, a series
gate resistance RS and a parallel connection of a capacitor C, hysteretic comparator previously described. It can be observed
diode D1 and resistance RP , and a diode D2 . The output of that the driver is realized by two bipolar transistors, i.e., an
the parallel combination is directly connected to the JFET. n-p-n transistor (ZTX 653) with a Vbr of 100 V and a collector
The resulting driver prototype is illustrated in Fig. 8. It has current of 2 A and a p-n-p transistor (ZTX 753) with a Vbr of
to be pointed out that signal Q in Fig. 7 is the output of the 100 V and a collector current of −2 A.
234 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 1, JANUARY 2015

The RS resistor has been realized by means six E24 resistors

of 6.8 Ω in parallel, whereas the RP resistor has been imple-
mented by four E24 resistors of 640 Ω. Diodes D1 and D2
are of Schottky type (SD103-A) of 40 V and 15 A. Finally,
capacitor C has been implemented by a ceramic capacitor of
470 nF and 16 V.

IV. C ONVERTER O PERATION

A. DCM–CCM Boundary Operation
Switching losses can be minimized if the turn-off of the
bipolar diode occurs at zero current, which imposes DCM
operation. However, preserving in DCM the value of the CCM Fig. 9. DC gain of the boost converter for different output loads.
input average current to satisfy the load requirements requires TABLE I
current peaks much higher, thus increasing the RMS value of P OWER S WITCHES
the current in all devices, and therefore, the conduction losses
of the transistor and diode. The deeper the DCM operation is,
the higher the current stress is and therefore the higher the
conduction losses are. Consequently, the DCM–CCM boundary
appears as the working zone that combines the lowest con-
duction losses with minimum switching losses by keeping the
diode turned off at zero current. Fig. 9 shows the graphical representation of the dc gain as a
To calculate the averaged input current Im , the only data function of the duty cycle taking values between 0.980 and 1
required is the switching period TS because assuming a high for different resistive output loads. The rON value of the JFET
duty cycle D, such that 0.99 < D < 1, at the DCM–CCM has been obtained from the corresponding data sheet. It can be
boundary, we obtain observed that the ideal gain 1/(1 − D) constitutes the upper
VS VS bound of the family of curves representing (31).
Im ≈ · D · TS ≈ · TS (29) It can be observed in Fig. 9 that the dc gain increases with
2·L 2·L
the value of the resistive load, and it can be deduced that the
Po η · VS2 · TS maximum gain corresponds to the maximum value of the duty
Im = ⇒ Po = (30)
η · VS 2·L cycle given by (33), shown at the bottom of the page.
From (31) and (33), it can be concluded that very high values
where Po is the output power, and η is the converter efficiency. of dc gain require extreme values of the duty cycle in the re-
Neglecting the efficiency η effect, the input current Im and gion 0.93 < D < 0.9925. These values can be supplied by the
the output power PO are both proportional to the switching hysteresis comparator without a risk of modulator saturation.
period TS and can be controlled by adjusting the value of TS .
It can be observed that, for a constant value of the switching V. E XPERIMENTAL R ESULTS
period, the converter behaves like a loss-free resistor [32]
because the input current Im is also proportional to the supply Table I shows the characteristics of the semiconductor de-
voltage VS . vices described in Section III in terms of blocking voltage for
both the transistor and diode. As regards the power transistor,
the values of ON-resistance, threshold voltage Vth , gate voltage
B. High-Gain Analysis Vg , gate charge Qg , and gate current Ig are also depicted.
Disregarding the voltage drop of the diode vd , because this Information about forward current, on voltage drop, and total
device is only conducting in a negligible OFF interval, the capacitance charge QC of the diode is also given. The experi-
following dc gain is obtained: mental prototype has been supplied with three different voltages
(i.e., 9, 12, and 14 V), and for each input voltage, different
Vo Ro (1 − D) loads have been tested (i.e., 10, 20, 30, 40, 50, and 60 kΩ).
= D(1−D)·Ro ·rC
(31)
VS Ro (1 − D)2 + Ro +rC + rON_EFF + rL The measured parasitic resistances are rL , namely, 140 mΩ <
rL < 155 mΩ for a range of switching frequency between 20
rON_EFF = rON + RSENSE1 . (32) and 40 kHz, and rC = 8 mΩ. Control parameter ki is 102.

√    
Ro2 +2 · Ro · rC − 2 · (Ro +2 · rC ) · Ro · 12 · rL + 12 · rON_EFF +rC · Ro + 12 · rC · (rL +rON_EFF )
dMAX = (33)
Ro · (Ro +2 · rC )
LEON-MASICH et al.: SLIDING-MODE BOOST CONVERTER FOR HIGH-VOLTAGE–LOW-POWER APPLICATIONS 235

Fig. 12. LED-based spotlight and boost converter with SiC devices.

Fig. 10. Efficiency (continuous line) and switching frequency (discon-

tinuous line).

Fig. 13. Converter waveforms for a 320-LED load.

steady-state results are illustrated in Fig. 13, where it can be

seen that the output voltage reaches 956 V (CH.3) for an
input voltage of 12 V (CH.1). This voltage corresponds to the
Fig. 11. Converter waveforms for a resistive load of 60 kΩ. voltage drop produced by the circulation of an output current of
21.6 mA (CH.4) through the 320 LEDs.
A. SiC Diode and SiC JFET
The efficiency curves and the resulting switching frequency B. Driver’s Results
are depicted in Fig. 10. It can be observed that, as the out-
Figs. 14–16 corroborate the correct behavior of the driver
put voltage increases, the switching frequency decreases. In
designed in Section IV by showing the turn-on and turn-off of
addition, it has to be pointed out that below 1000 V in the
the normally OFF JFET. Fig. 14 shows the OFF-state of the JFET
output voltage, the dominant losses are of switching type, the
with an IGS = 0. Next, the JFET is first activated with a gate
conduction losses being preponderant beyond the mentioned
current peak of 600 mA; hence, IGS reaches its final value of
value. Therefore, the converter exhibits a higher efficiency
approximately 10 mA after a short transient. Hence, according
value for the lowest input voltage in all the output voltage range
to the data sheet, the estimated value of rON is 60 mΩ. The
up to 1000 V.
value of the current peak (600 mA) can be observed in detail in
As illustrated in Fig. 11, the output voltage reaches 1.2 kVdc
Fig. 15. Finally, the turn-off transient is illustrated in Fig. 16. It
(CH.3) from a 12-Vdc (CH.1) input supply in the case of a
is shown in the three figures that the gate 1voltage is 3.3 V in
resistive load of 60 kΩ. The input current (CH.2) exhibits a
the ON-state and −15 V in the OFF-state.
switching frequency of 23 kHz in the DCM–CCM boundary.
The average value of the current flowing through the output load
VI. C ONCLUSION
(CH.4) is 20 mA approximately.
The SiC-based converter has been also loaded with a LED The design of a very high-voltage-gain single-stage boost
spot consisting of 320 LEDs connected in series as it is il- converter has been investigated. A voltage gain around 100 has
lustrated in the picture shown in Fig. 12. The corresponding been obtained with duty cycles near 1 without risk of saturation
236 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 1, JANUARY 2015

The system operates at the boundary of CCM and DCM

to make compatible a high output load and a high duty cycle
operation with minimum losses. The experimental results are
in good agreement with the theoretical predictions and show
the expected variation of the switching frequency with the
coordinates of the equilibrium point.
The performance of the converter supplying a LED-based
spotlight has been also studied and shows promising results
for future lighting applications. The converter has been imple-
mented by means of a normally OFF JFET and a Schottky diode,
which has been specifically fabricated for the application. The
use of SiC devices has allowed to yield 1200 V with a dc gain
of 100 and an efficiency value of 83% operating at 24 kHz.

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gration techniques to drive high-intensity discharge metal halide (HID-
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LEON-MASICH et al.: SLIDING-MODE BOOST CONVERTER FOR HIGH-VOLTAGE–LOW-POWER APPLICATIONS 237

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of sliding-mode controllers in DC–DC converters,” IEEE Trans. Ind. Virgili, Tarragona, Spain. During the academic
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DC–DC boost converter via total sliding-mode technique,” IEEE Trans. Systémes, Centre National de la Recherche
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optimization,” IEEE Trans. Ind. Electron., vol. 60, no. 2, pp. 538–545, tively, from the Universitat Rovira i Virgili (URV),
Feb. 2013. Tarragona, Spain, where he is currently working
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electronics for modern wind turbine full scale frequency converter,” IEEE
From 1981 to 1992, he was an Assistant Pro-
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fessor with the Escuela Universitaria de Inge-
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Si—Evaluation of potentials for performance improvement of inverter and
Since 1992, he has been with the Departament
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d’Enginyeria Electrònica, Elèctrica i Automàtica,
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DC–DC converter for high-power low-voltage fuel-cell applications,”
Professor. His research interests are in the field of power electronics for
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automotive applications, resonant converters, and electrical drives.
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Circuits Syst., vol. 37, no. 1, pp. 54–60, Jan. 1990. Ingeniero de Telecomunicación and Doctorate
degrees from the Universitat Politècnica de
Catalunya, Barcelona, Spain, in 1978 and 1984,
respectively.
From 1978 to 1992, he taught courses on
circuit theory, analog electronics, and power
processing at the Escuela Técnica Supe-
rior de Ingeniería de Telecomunicación de
Barcelona, Barcelona. During the academic
Antonio Leon-Masich (S’11) was born in year 1992–1993, he was a Visiting Professor
Lleida, Spain, in 1986. He received the B.S. with the Center for Solid-State Power Conditioning and Control, Depart-
and M.S. degrees in electronics engineering in ment of Electrical and Computer Engineering, Duke University, Durham,
2009 and 2011, respectively, from the Universi- NC, USA. He is currently a Full Professor with the Universitat Rovira
tat Rovira i Virgili, Tarragona, Spain, where he is i Virgili, Tarragona, Spain. During the academic years 2003–2004 and
currently working toward the Ph.D. degree. 2010–2011, he was a Visiting Scholar with the Laboratoire d’Analyse
Since 2009, he has been a member of the et d’Architecture des Systémes, National Centre for Scientific Research
Automatic Control and Industrial Electronics Re- (LAAS-CNRS), Toulouse, France.
search Group (GAEI), Universitat Rovira i Virgili. Prof. Martínez-Salamero was the President of the IEEE Spanish Joint
His research interests are high-gain and high- Chapter of the IEEE Power Electronics and IEEE Industrial Electronics
voltage converters for electronic ballasts using Societies in 2005–2008. He was a Distinguished Lecturer of the IEEE
silicon carbide devices. Circuits and Systems Society in 2001–2002.