30F124 Igbt
30F124 Igbt
30F124 Igbt
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KA2803B — Earth Leakage Detector
January 2014
KA2803B
Earth Leakage Detector
Features Description
Low Power Consumption: 5 mW, 100 V/200 V The KA2803B is designed for use in earth leakage
Built-In Voltage Regulator circuit interrupters, for operation directly off the AC line
in breakers. The input of the differential amplifier is
High-Gain Differential Amplifier connected to the secondary coil of ZCT (Zero Current
0.4 mA Output Current Pulse to Trigger SCRs Transformer). The amplified output of differential
amplifier is integrated at external capacitor to gain
Low External Part Count adequate time delay specified in KSC4613. The level
DIP & SOP Packages, High Packing Density comparator generates a high level when earth leakage
current is greater than the fixed level.
High Noise Immunity, Large Surge Margin
Super Temperature Characteristic of
Input Sensitivity
Wide Operating Temperature Range:
TA = -25°C to +80°C
Operation from 12 V to 20 V Input
8-DIP
Functions
Differential Amplifier
Level Comparator
Latch Circuit
8-SOP
Ordering Information
Application Circuit
Application Information
(Refer to full-wave application circuit in Figure 2) used to protect the earth leakage detector IC
(KA2803B). The range of RP is from several hundred
Figure 2 shows the KA2803B connected in a typical
Ω to several kΩ.
leakage current detector system. The power is applied
to the VCC terminal (Pin 8) directly from the power line. Capacitor C1 is for the noise canceller and a standard
The resistor RS and capacitor CS are chosen so that Pin value of C1 is 0.047 µF. Capacitor C2 is also a noise
8 voltage is at least 12 V. The value of CS is canceller capacitance, but it is not usually used.
recommended above 1 µF.
When high noise is present, a 0.047 µF capacitor may
If the leakage current is at the load, it is detected by the be connected between Pins 6 and 7. The amplified
zero current transformer (ZCT). The output voltage signal finally appears at the Pin 7 with pulse signal
signal of ZCT is amplified by the differential amplifier of through the internal latch circuit of the KA2803B. This
the KA2803B internal circuit and appears as a half-cycle signal drives the gate of the external SCR, which
sine wave signal referred to input signal at the output of energizes the trip coil, which opens the circuit breaker.
the amplifier. The amplifier closed-loop gain is fixed The trip time of the breaker is determined by capacitor
about 1000 times with internal feedback resistor to C3 and the mechanism breaker. This capacitor should
compensate for zero current transformer (ZCT) be selected under 1µF to satisfy the required trip time.
variations. The resistor RL should be selected so that The full-wave bridge supplies power to the KA2803B
the breaker satisfies the required sensing current. The during both the positive and negative half cycles of the
protection resistor RP is not usually used when high line voltage. This allows the hot and neutral lines to be
current is injected at the breaker; this resistor should be interchanged.
Electrical Characteristics
TA = -25°C to +80°C unless otherwise specified.
Test
Symbol Parameter Conditions Min. Typ. Max. Units
Circuit
Figure 12. Output Low Current Figure 13. Differential Input Clamp Voltage
Figure 18. Supply Current Figure 19. Differential Amplifier Output Current
(VR-VI=30 mV, VOD=1.2 V)
Figure 22. Output Low Current Figure 23.VCC Voltage vs. Supply Current 1
Figure 24. Differential Amplifier Output Current 1 Figure 25.Differential Amplifier Output
Figure 28. Output Current Figure 29.VCC Voltage vs. Supply Current 2
Figure 30. Differential Input Clamp Voltage Figure 31.Latch-Off Supply Voltage
A [ ]
.400 10.15
.373 9.46
(.092) [Ø2.337]
B
TOP VIEW TOP VIEW
OPTION 1 OPTION 2
[ ]
.070 1.78
.045 1.14
.310±.010 [7.87±0.25]
.130±.005 [3.3±0.13]
7° TYP .210 MAX
[5.33]
7° TYP
C
.015 MIN
[0.38]
[ ]
.021 0.53
.015 0.37
[ ]
.140 3.55
.125 3.17
.300
[7.62]
.001[.025] C
.100 .430 MAX
[2.54] [10.92]
.060 MAX
NOTES: [1.52]
A. CONFORMS TO JEDEC REGISTRATION MS-001,
VARIATIONS BA
B. CONTROLING DIMENSIONS ARE IN INCHES
-.000[
.010+.005 0.254+0.127
-0.000 ]
REFERENCE DIMENSIONS ARE IN MILLIMETERS
C. DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED
.010 INCHES OR 0.25MM.
D. DOES NOT INCLUDE DAMBAR PROTRUSIONS.
DAMBAR PROTRUSIONS SHALL NOT EXCEED
.010 INCHES OR 0.25MM.
E. DIMENSIONING AND TOLERANCING
PER ASME Y14.5M-1994.
N08EREVG
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
0.65
4.90±0.10 A
(0.635)
8 5
B
1.75
6.00±0.20 5.60
3.90±0.10
PIN ONE 1 4
INDICATOR
1.27
1.27
0.25 C B A LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.175±0.75
0.22±0.30
1.75 MAX C
0.10
0.42±0.09 OPTION A - BEVEL EDGE
(0.86) x 45°
R0.10 GAGE PLANE
OPTION B - NO BEVEL EDGE
R0.10 0.36
NOTES: UNLESS OTHERWISE SPECIFIED
8°
0° A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA.
SEATING PLANE B) ALL DIMENSIONS ARE IN MILLIMETERS.
0.65±0.25 C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
(1.04) D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
DETAIL A E) DRAWING FILENAME: M08Arev15
SCALE: 2:1
F) FAIRCHILD SEMICONDUCTOR.
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Authorized Distributor
Fairchild Semiconductor:
KA2803B KA2803BDTF