TB6504F

TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC

TB6504F
PWM CHOPPER TYPE BIPOLAR STEPPING MOTOR DRIVER

The TB6504F is PWM chopper type sinusoidal micro step bipolar

stepping motor driver.
Sinusoidal micro step operation is accomplished only a clock
signal inputting by means of built−in hard ware.

FEATURES
l 1 chip bipolar sinusoidal micro step stepping motor driver.
l Output Current up to 150 mA
l PWM chopper type.
l Structured by high voltage Bi−CMOS process technology.
l Forward and reverse rotation are available.
l 2, 1−2, W1−2, 2W1−2 phase 1 or 2 clock drives are selectable. Weight : 0.32 g (Typ.)
l Package : SSOP24−P−300−1.00
l Input Pull−Up Resistor equipped with RESET and ENABLE Terminal : R = 200 kΩ (Typ.)
l Output Monitor available with MO.IO(MO)= ±2 mA MAX.
l Reset and Enable are available with RESET and ENABLE.

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BLOCK DIAGRAM

Pull−up Resistance pin (20), (21) : 200 kΩ (Typ.)

pin (6), (18) : Non Connection

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PIN FUNCTION

PIN No. SYMBOL FUNCTIONAL DESCRIPTION

1 CK1 Clock signal input terminal. TRUTH TABLE A

2 M1 Excitation control input.
TRUTH TABLE B
3 M2 Excitation control input.
4 REF IN VNF control input. High Level ; VNF = 0.5 V, Low Level ; VNF = 0.25 V
5 MO Monitor output.
6 NC No connection.
7 VCC Supply voltage terminal for contol circuit.
8 VMB Supply voltage terminal for Motor Drive.
9 φB Output B
10 PG−B Power GND
11 NFB B−ch current detection terminal.
12 φB Output B
13 φA Output A
14 NFA A−ch current detection terminal.
15 PG−A Power GND
16 φA Output A.
17 VMA Supply voltage terminal for Motor Drive.
18 NC No connection.
19 S−GND Signal GND.
20 RESET Reset signal input terminal.
TRUTH TABLE A
21 ENABLE Enable signal input terminal.
22 OSC Sawtooth oscilation terminal.
23 CW / CCW Forward rotation / Reverse rotation input terminal.
TRUTH TABLE A
24 CK2 Clock signal input terminal.

PIN CONNECTION (Top view)

Note: NC : No connection

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TRUTH TABLE A
INPUT
MODE
CK1 CK2 CW / CCW RESET ENABLE

H L H L CW

L L H L INHIBIT

H L H L CCW

L L H L INHIBIT

H H H L CCW

L H H L INHIBIT

H H H L CW

L H H L INHIBIT

X X X L L INITIAL Z : High impedance

X : Don't Care
X X X X H Z

TRUTH TABLE B INITIAL MODE

INPUT MODE
MODE IOUT (A) IOUT (B)
M1 M2 (EXCITATION)

L L 2 Phase 2 Phase 100% −100%

H L 1−2 Phase 1−2 Phase 100% 0%
L H W1−2 Phase W1−2 Phase 100% 0%
H H 2W1−2 Phase 2W1−2 Phase 100% 0%

EXCITATION
2 Phase excitation (M1 : L, M2 : L, CW MODE) 1−2 Phase excitation (M1 : H, M2 : L, CW MODE)

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W1−2 Phase excitation (M1 : L, M2 : H, CW MODE)

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2W1−2 Phase excitation (M1 : H, M2 : H, CW MODE)

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OUTPUT CURRENT VECTOR ORBIT (Normalize to 90° for each one step)

ROTATION ANGLE VECTOR LENGTH

θ
IDEAL TB6504F IDEAL TB6504F
θ0 0° 0° 100 100.00 ―
θ1 11.25° 12.41° 100 102.39 ―
θ2 22.5° 27.78° 100 100.22 ―
θ3 33.75° 34.39° 100 101.80 ―
θ4 45° 45° 100 102.53 141.42
θ5 56.25° 55.61° 100 101.81 ―
θ6 67.5° 65.22° 100 100.22 ―
θ7 78.75° 77.59° 100 102.39 ―
θ8 90° 90° 100 100.00 ―

1−2, W1−2, 2W1−2, Phase 2 Phase

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OUTPUT CIRCUIT

INPUT CIRCUIT
CK1, CK2, CW / CCW, M1, RESET , ENABLE : Terminal OSC : Terminal
M2, REF IN : Terminals

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OSC FREQUENCY CALCULATION
Sawtooth OSC circuit consists of Q1 through Q4 and R1 through R4.
Q2 is turned “off” when VOSC is less than the voltage of 2.5 V + VBE Q2 approximately equal to 2.85 V.
VOSC is increased by COSC charging through R1.
Q3 and Q4 are turned “on” when VOSC becomes 2.85 V (Higher level.)
Lower level of V (22) pin is equal to VBE Q2 + VSAT Q4 approximately equal to 1.4 V.
VOSC is calculated by following equation.
t
V = 5· [ 1 - exp ( - )] ························ (1)
OSC C · R1
OSC
Assuming that VOSC = 1.4 V (t = t1) and = 2.85 V (t = t2)
COSC is external capacitance connected to pin (22) and R1 is on−chip 10 kΩ resistor.
Therefore, OSC frequency is calculated as follows.

t1 = - COSC · R1 · ln ( 1 - 1.4 ) ························ (2)

5

t2 = - COSC · R1 · ln ( 1 -
2.85 ) ························ (3)
5

1 1
f = =
OSC t 2 - t1 COSC ( R1· ln ( 1 -
1.4 ) - R1 · ln ( 1 -
2.85 ) )
5 5

1
= (kHz) (COSC : µ F )
5.15 - COSC

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ENABLE AND RESET FUNCTION AND MO SIGNAL

Fig.1 1−2 Phase drive mode (M1 : H, M2 : L)

ENABLE Signal disables only Output Signal.

Internal logic functions are proceeded by CK signal without regard to ENABLE signal.
Therefore, Output Current is initiated from the proceeded timing point of internal logic circuit after
release of disable mode.
Fig.1 shows the ENABLE functions, when the system is selected in 1−2 Phase drive mode.
As RESET is low, the decoder is initialized and MO is low.
After RESET is high, the motion is resumed from next clock as shown in Fig.2.

Fig.2 1−2 Phase drive mode (M1 : H, M2 : L)

MO (Monitor Output) Signals is used as rotaion and initial signal for stable rotation checking.

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MAXIMUM RATINGS (Ta = 25°C)

CHARACTERISTIC SYMBOL RATING UNIT

VCC 5.5
Supply Voltage VM (opr) VCC − 0.3~10 V

VM (MAX) 18
IO (MAX) 150
Output Current mA
IO ( ΜΟ ) ±2
Input Voltage VIN ~VCC V
0.59 (Note 1)
Power Dissipation PD W
0.83 (Note 2)
Operating Temperature Topr −10~70 °C
Storage Temperature Tstg −55~150 °C
Feed Back Voltage VI 1.0 V

Note 1: No heat sink

Note 2: With heat sink (50 × 50 × 1.6 mm Cu 10%)

RECOMMENDED OPERATING CONDITIONS (Ta = −10~70°C)

TEST
CHARACTERISTIC SYMBOL TEST CONDITION MIN TYP. MAX UNIT
CIRCUIT
Supply Voltage VCC (opr) ― ― 4.5 5.0 5.5 V
Output Voltage VM (opr) ― ― 5.5 ― 8.0 V
Output Current IOUT ― ― ― ― 120 mA
Input Voltage VIN ― ― ― ― VCC V
Clock Frequency fCLOCK ― ― ― ― 5 kHz
OSC Frequency fOSC ― ― 15 ― 80 kHz

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ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, Ta = 25°C, VCC = 5 V, VM = 8 V)
TEST
CHARACTERISTIC SYMBOL TEST CONDITION MIN TYP. MAX UNIT
CIRCUIT
VCC
High VIN (H) 3.5 ―
+0.4
Input Voltage M1, M2, CW / CCW, REF IN V
1 GND
Low VIN (L) ENABLE , CK1, CK2, RESET ― 1.5
−0.4
Input Hysteresis Voltage VH ― 600 ― mV
IIN−1 (H) M1, M2, REF IN, VIN = 5.0 V ― ― 100 nA
ENABLE , VIN = 0 V, RESET
Input Current IIN−1 (L) 1 5 25 50 µA
INTERNAL PULL−UP RESISTOR
IIN−2 (L) SOURCE TYPE, VIN = 0 V ― ― 100 nA
Output Open RESET : H
ICC1 ENABLE : L ― 10 18
(2, 1−2 Phase excitation)
Output Open (W1−2, 2W1−2
Quiescent Current Phase excitation)
2 mA
VCC Terminal ICC2 ― 10 18
RESET : H
ENABLE : L
ICC3 RESET : L, ENABLE : H ― 5 ―
ICC4 RESET : H, ENABLE : H ― 5 ―
REF IN H
High VNF (H) 0.45 0.5 0.55
Comparator RNF = 5 Ω, COSC = 0.0033 µF
3 V
Reference Voltage REF IN L
Low VNF (L) 0.22 0.25 0.28
RNF = 2.5 Ω, COSC = 0.0033 µF
B / A, COSC = 0.0033 µF
Output Differential ∆VO ― −10 ― 10 %
RNF = 2.5 Ω, REF IN = L
VNF (L) / VNF (H)
VNP (H)−VNF (L) ∆VNF ― 43 50 57 %
COSC = 0.0033 µF
Maximum OSC Frequency fOSC (MAX.) ― ― 100 ― ― kHz
Minimum OSC Frequency fOSC (MIN.) ― ― ― ― 10 kHz
OSC Frequency fOSC ― COSC = 0.0033 µF 31 44 70 kHz
VOH (MO) ― IOH = −40 µA 4.5 4.9 VCC
Output Voltage V
VOL (MO) ― IOL = 40 µA GND 0.1 0.5

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OUTPUT BLOCK
TEST
CHARACTERISTIC SYMBOL TEST CONDITION MIN TYP. MAX UNIT
CIRCUIT
Upper Side VSAT U1 ― 0.90 1.25
IOUT = 0.12 A
Output Saturation Lower Side VSAT L1 ― 0.22 0.37
4 V
Voltage Upper Side VSAT U2 ― 0.83 ―
IOUT = 0.06 A
Lower Side VSAT L2 ― 0.12 ―

Diode Forward Upper Side VF U1 ― 1.18 1.8

5 IOUT = 0.12 A V
Voltage Lower Side VF L1 ― 0.92 1.6
ENABLE : “H” Level
IM1 RESET : “L” Level ― ― 50 µA
Output Open
Output Dark Current
(A + B Channels) ENABLE : “L” Level
RESET : “H” Level
IM2 2 ― 8 28
Output Open,
2 Phase excitation mode mA
ENABLE : “L” Level
NF Terminal Current INF RESET : “H” Level 1 2.5 7
Output Open
2W 1−2φ W 1−2φ 1−2φ θ=0 ― 100 ―
2W 1−2φ ― ― θ=1/8 ― 100 ―
2W 1−2φ W 1−2φ ― θ=2/8 86 91 96
REF IN : L
A−B 2W 1−2φ ― ― θ=3/8 RNF = 2.5 Ω 79 84 89
Chop− VECTOR 3
2W 1−2φ W 1−2φ 1−2φ θ=4/8 COSC = 0.0033 µF 67.5 72.5 77.5
ping L = 10 mH/R = 0.5 Ω %
Current 2W 1−2φ ― ― θ=5/8 52.5 57.5 62.5
(Note)
2W 1−2φ W 1−2φ ― θ=6/8 37 42 47
2W 1−2φ ― ― θ=7/8 17 22 27
2 Phase Excitation Mode
― ― ― ― 100 ―
VECTOR

Note: Maximum current (θ = 0) : 100%

2W1−2φ : 2W1, 2 phase excitation mode
W1−2φ : W1, 2 phase excitation mode
1−2φ : 1, 2 phase excitation mode

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TEST
CHARACTERISTIC SYMBOL TEST CONDITION MIN TYP. MAX UNIT
CIRCUIT
2W 1−2φ W 1−2φ 1−2φ θ=0 ― 100 ―
2W 1−2φ ― ― θ=1/8 ― 100 ―
2W 1−2φ W 1−2φ ― θ=2/8 ― 91.2 ―
REF IN : L
A−B 2W 1−2φ ― ― θ=3/8 RNF = 3.3 Ω ― 84.2 ―
Chop− COSC = 0.0033 µF
ping 2W 1−2φ W 1−2φ 1−2φ VECTOR 3 θ=4/8 ― 73.6 ― %
L = 20 mH/R = 60 Ω
Current 2W 1−2φ ― ― θ=5/8 ― 59 ―
(Note)
2W 1−2φ W 1−2φ ― θ=6/8 ― 44.6 ―
2W 1−2φ ― ― θ=7/8 ― 25.6 ―
2 Phase Excitation Mode
― ― 100 ―
VECTOR
∆θ = 0 / 8−1 / 8 ― 0 ―
∆θ = 1 / 8−2 / 8 10 22.5 35
∆θ = 2 / 8−3 / 8 REF IN : L 5 17.5 30
RNF = 2.5 Ω
Feed Back Voltage Step ∆VNF ― ∆θ = 3 / 8−4 / 8 16.25 28.75 41.25 mV
COSC
∆θ = 4 / 8−5 / 8 = 0.0033 µF 25 37.5 50
∆θ = 5 / 8−6 / 8 26.25 38.75 51.25
∆θ = 6 / 8−7 / 8 37.5 50 62.5
tr ― 0.3 ―
RL = 2 Ω, VNF = 0 V, CL = 15 pF
tf ― 2.2 ―
tpLH ― 1.5 ―
CK ~ Output
tpHL ― 2.7 ―
tpLH ― 5.4 ―
Output Tr Switching Characteristics 7 OSC ~ Output µs
tpHL ― 6.3 ―
tpLH ― 2.0 ―
RESET ~ Output
tpHL ― 2.5 ―
tpLH ― 5.0 ―
ENABLE ~ Output
tpHL ― 6.0 ―

Output Leakage Upper Side IOH ― ― 50

6 VM = 18 V µA
Current Upper Side IOL ― ― 50

Note: Maximum current (θ = 0) : 100%

2W1−2φ : 2W1, 2 phase excitation mode
W1−2φ : W1, 2 phase excitation mode
1−2φ : 1, 2 phase excitation mode

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TEST CIRCUIT 1. : VIN (H), (L), IIN (H), (L) TEST CIRCUIT 2. : ICC, IM, INF

TEST CIRCUIT 3. : VNF (H), (L)

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TEST CIRCUIT 4. : VCE (SAT) Upper, Lower

Note: Calibrate Output Current becomes 0.06 A (or 0.12 A) with this resistor.

TEST CIRCUIT 5. : VF−U, VF−L TEST CIRCUIT 6. : IOH, IOL

Note: Not to take a GND with any non−connecting Pins.

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AC ELECTRICAL CHARACTERISTIC, TEST CIRCUIT
CK (OSC)−OUT

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APPLICATION CIRCUIT

Note 1: Schottky diode (U1GWJ49) to be connected additionally between each output (pin 16 / 13 / 12 / 9) and GND
for preventing Punch−through Current.
Note 2: GND pattern to be laid out at one point in order to prevent common impedance.
Note 3: Capasitor for noise suppression to be connected between the Power Supply (VCC, VM) and GND to stabilize
the operation.
Note 4: Utmost care is necessary in the design of the output line, VM and GND line since IC may be destroyed due
to short−circuit between outputs, air contamination fault, or fault by improper grounding.

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PACKAGE DIMENSIONS
SSOP24−P−300−1.00 Unit : mm

Weight : 0.32 g (Typ.)

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RESTRICTIONS ON PRODUCT USE 000707EBA

· TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc..

· The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this
document shall be made at the customer’s own risk.

· The products described in this document are subject to the foreign exchange and foreign trade laws.

· The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other
rights of the third parties which may result from its use. No license is granted by implication or otherwise under
any intellectual property or other rights of TOSHIBA CORPORATION or others.

· The information contained herein is subject to change without notice.

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