FAST PWM MODE

FAST PWM MODE

Ilbay Vicua Alexis Fernando
e-mail: [email protected]

SUMARY: In the following writing is presented or Pre-scaler 10 bits (allows to divide the
described how to work in a timer0 FAST PWM mode by frequency).
introducing timer0 and an example in the AVR and Two sources of interruption: overflow and
PROTEUS software where the brightness control of a equality in comparison (TOV0 and OCF0).
led is made and the speed of a motor applying FAST
PWM for this example. The registers that intervene for the configuration of timer
0 are:
KEY-WORDS: Converter, signals, PWM, timer0.
TCCR0: This record is in charge of setting the
1 INTRODUCTION timer.

With a timer we can make applications such as the

speed control of an engine, the operation of a keyboard,
a scan of 7 segments, obtaining samples through the
Figure 2.- TCCR0
ADC, etc.
The general operation of a timer is to save a
These bits configure the four different working
maximum value in a special storage register to which a
modes of the timer.
counter will arrive, when the value in the counter is equal
to the stored register a comparator can perform the
following actions:
The timer output flag is triggered thus initiating
an interrupt.
We program an event in which on the output pin
the previous level is switched, set low or set
high and thus generate a PWM signal at a
certain frequency. Table 1.- Timer0 Modes

For each working mode these bits configure the

mode of generation of the digital signal but what we are
interested in this research is basically Fast PWM.

Table 2.- Compare Output Mode

Figure 1.- Timer0 Scheme

TIMSK: In this log we enable the way in which the
Among the blocks, we can highlight are the TCCRn interrupt will be generated.
which is the register that configures the timer in its mode
of operation, Tn is where the clock signal is injected for
the external event counter mode, OCn is the pin by
which it is generated the digital signal.
Figure 3.- TIMSK
TIMER0 CHARACTERISTICS
8-bit timer. OCIE0 is the enable of the interrupt by equality in
Counter with a comparison unit. the output comparison and TOIE0 is the enable of the
Counter clear mode in the CTC interrupt by overflow.
comparison (Auto-recharge). TIFR: In this register are the flags of the interrupts.
Phase pulse (PWM) modulator is correct
and glitch-free.
Frequency generator.

1
 FAST PWM MODE
.

same. The work cycle is written to the OCR0 register.

Figure 4.- TIFR

Figure 6.- OCR0
2 FAST PWM MODE
EXAMPLE AVR
The resolution of the timer is 8 bits, so the resolution
of the PWM signal will also be 8 bits, (0 to 255), ie the .INCLUDE "M16DEF.INC"
signal can take 256 values (including 0), in the case of a .EQU OCR_INICIAL=128
Led, 256 levels of brightness, 0 being the brightness .ORG $00
(minimum led off) and 255 the maximum brightness JMP PROGRAMA //Interrupcion
(LED fully lit). If the signal was used to control an engine, Reset
it would have 256 levels of speed. .ORG $02
JMP INTER0 //Interrupcion 0
In this mode, the timer counts from 0 to 255 at a .ORG $04
Ftimer frequency, and at each increment of the timer, the
JMP INTER1 //Interrupcion 1
value of the count is compared to the value of the OCR0
register, which is the value (0 to 255) of our output
PROGRAMA:
Signal, that when the timer value matches the value of LDI R16,HIGH(RAMEND)
the OCR0 register, the OC0 pin changes state (1 or 0) OUT SPH,R16
depending on the desired configuration. When the timer0 LDI R16,LOW(RAMEND)
is overflowed (from 255 to 0), the corresponding OC0 OUT SPL,R16
output is activated again. LDI R16,0B00001000
OUT DDRB,R16 //Habilito
In other words, at the start of the timer, output OC0 is salida OC0
set to 1 (turns on the LED), and at each increment of the LDI R17,OCR_INICIAL
timer compares the OCR0 register, if this register is OUT OCR0,R17 //Coloco la
equal to the timer value, output OC0 goes to 0 (Turns off seal al 50% ciclo de trabajo
the led), and turns it on again until the timer overflows LDI R16,0B01101101
and starts the count again from 0.
OUT TCCR0,R16 //No invertido
This mode allows the generation of a high frequency
OC0 - Fast PWM - CLK/1024
PWM signal with a low square wave precision, Phase LDI R16,0B00001010
Correct PWM mode offers better signal quality but OUT MCUCR,R16 //INT0 e INT1
without working at such high frequencies. Flanco de Bajada
LDI R16,0B11000000
The OCR0 pin associated with the timer0 and which OUT GICR,R16 //INT0 e INT1
is the output of the PWM signal is in the PORTB (PB3). Habilitada
All the pins to be used as PWM must be configured as SEI
output. BUCLE: RJMP BUCLE
INTER0:
CALL RETARDO
CPI R17,0
BREQ Salir0
DEC R17
OUT OCR0,R17
Salir0:
RETI
INTER1:
CALL RETARDO
CPI R17,255
Figure 5.- Pin pwm in PB3 BREQ Salir1
INC R17
As seen in the introduction we can configure our OUT OCR0,R17
ATmega to work as PWM and later we will see an Salir1:
example of how to configure to work as PWM. RETI
RETARDO:
With this we have already configured our PWM, now only LDI R25,31
need to program the duty cycle (Duty Cycle), which for Bucle_Externo:
this example with an LED, means the brightness of the LDI R24,255

2
 FAST PWM MODE
.

Bucle_Interno:
NOP
NOP
NOP
NOP
NOP
DEC R24
BRNE Bucle_Interno
DEC R25
BRNE Bucle_Externo
RET
Figure 9.- Duty Cycle greater than 50%
EXAMPLE PROTEUS

3 CONCLUSIONS

The timer0 has 4 different working modes which are

normal mode, PWM phase correct mode, CTC mode and
FAST PWM mode.

The FAST PWM mode has the feature of working

with 8 bits which tells us that it has 256 values (0-255).

The working settings for the timer0 modes are

made in the TCCR0 register.

Figure 6.- Simulated Circuit 4 REFERENCES

[1] Mikel Etxebarria Isuskiza, Microcontroladores PIC: Teoria y
EXAMPLES AVR AND PROTEUS FUNCTIONING Practica 2011, Creaciones copyright.
[2] Muhamad Ali MAzidi, Sarmad Naimi, and Sepher Naimi, The
The operation of the circuit is that it will vary the pulse AVR microcontroller and embedded system using assembly
width depending on the external interrupts INT0 to raise and C, Pearson.
the PWM and INT1 to lower the PWM.

Figure 7.- Circuit Running

Figure 8.- Duty Cycle less than 50%