PULSE & CIRCUITS LAB STUDENT WORK BOOK

(II B.Tech. ECE- II Semester)

Name_______________________________________Branch_________________
Roll No____________________________________ Section________________
Year /Semester_________ /________ Academic Year_________________

Department of
Electronics & Communication Engineering
2016
1

INDEX

SNO

Name of the Topic

Page No.

Cover Page

Vision & Mission of the Institute

Vision & Mission of the Department

Program Educational Objectives (PEOs)

Program Outcomes (POs) & PSOs

Syllabus

Course Objectives & Course Outcomes

Course mapping with POs

10

Instruction For Students

11

10

Introduction

12

11

Importance of the PDC Laboratory

13

12

List of Experiments

14

1. Cover Page

Name of the Laboratory

: Electronic Circuits & Pulse Circuits (EC&PC)

Subject Code (JNTU)

: A40484

Programme

: UG

Branch: ECE

Year & Semester: II -II

Document Number: SRYS/ECE/

No. of Pages

:71

Prepared by
1) Name

: Dr.T.Ravichandra Babu M.Tech.,Ph.D,PGDESD,MISTE,MIAEng.

Professor

2) Date

: 14/ 12/ 2016

Verified by (HOD)
1) Name

: Sri.B.Srinivas

2) Designation

: HOD-ECE

3) Date

: 15/12/2016

Approved by (IQAC)
1) Name

: Prof.Dr S Syed Basha

2) Designation

: Deputy Director & Director-IQAC

3) Date

:16/12/2016

M.E.Ph.D,MISTE,MIAEng.

2.Vision & Mission of the Institute

1.1.Vision of the Institute:
It fosters ethical social and moral values through holistic learning to groom
young minds into responsible and successful global citizens

1.2.Mission of the Institute:

To strive relentlessly and vigorously to realize the vision by making the best use
of quality infrastructure, resources and experienced, talented and committed faculty

1.3.Quality Policy:
The vision, mission and goals avow the quality policy of Sreyas Institute of
Engineering and Technology.
All the stakeholders are well informed about the quality policy and the goals of the
institution from time to time through various means.
Action plans, policies and programs for gilt-edged advancement, and policy
enforcement are contrived and put into action.
Student centered teaching learning.
Nourishing the habit of research
Augmenting the certitude among students community and creating employment
potential through quality enrichment programs and training.
IQAC of the college determines the quality to be followed for enhancing quality in
every aspect of the college functioning and the committees concerned deploy and
review the same.

3.Vision & Mission of the ECE Department

2.1.Vision of the Department

Striving for global recognition for excellence in Electronics and Communication
Engineering Education, research and development, for the advancement of the society.

2.2.Mission of the Department

1. Providing quality education to the students and enhancing their skills to make them
globally competent Electronics and Communication Engineers.
2. Laboratory Providing state of the art and research facilities with opportunities to
innovate, design, develop and implement new systems and processes.
3. Interact with different industries to integrate R&D activities along with academic
learning such that applying engineering solutions in response to the change requirement
needs of the society and industry.

4.Program Educational Objectives (PEOs) of B.Tech. (ECE) Program

1. Graduates shall apply the fundamental, advanced and contemporary knowledge of

2. Electronics, Communication and allied Engineering, to develop efficient solutions
and systems, to meet the needs of the industries and society.
3. Graduates will get employed or pursue higher studies or research.
4. Graduates will have team spirit, good communication skills and ethics with lifelong
learning attitude.

5. PROGRAM OUTCOMES (POs) of B.Tech.(ECE) Program

Engineering Graduates will be able to:
1. Engineering Knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and
research methods including design of experiments, analysis and interpretation of data, and
synthesis of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modeling to complex engineering
activities with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to
assess societal, health, safety, legal and cultural issues and the consequent responsibilities
relevant to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and
need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or
leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and

write effective reports and design documentation, make effective presentations, and give and
receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to ones own work, as a member
and leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage
in independent and life-long learning in the broadest context of technological change.

5.1.PROGRAM SPECIFIC OUTCOMES (PSOs) of B.Tech.(ECE) Program

1. Proficiency on the contemporary skills towards development of innovative electronics

and communication systems and solutions.
2. Capabilities to participate in the construction of large and complex electronics and/or
communication systems of varying complexity.

6.Syllabus as per JNTUH

(A40484) ELECRONIC CIRCUITS AND PULSE CIRCUITS LAB
II year B.Tech ECE II Sem

L
0

T/P/D C
/3/2

Minimum 8 experiments to be conducted.

Part II: Pulse Circuit Lab
1.

Linear wave Shaping

(a) RC Low pass Circuit for different time constants
(b) RC High pass Circuit for different time constants

2.

Non Linear Wave Shaping

(a) Clippers
(b) Clampers

3.

Comparison Operation of Clampers

4.

Switching characteristics of Transistor

5.

Design a Bistable Multivibrator and draw its waveforms

6.

Design a Monostable Multivibrator and draw its waveforms

7.

Design a Astable Multivibrator and draw its waveforms

8.

Response of Schmitt Trigger Circuit for loop gain less than and
greater than one

9.

UJT Relaxation Oscillator

10.

The output-voltage waveform of Boot Strap Sweep Circuit.

11.

The output-voltage waveform of Miller Sweep circuit.

7. Course Outcomes related to laboratory experiments

S.No

Name of the Experiment

Linear wave shaping

a)RC low pass circuit for different time constants

b)RC high pass circuit for different time constants

Course Outcome
Able to gain expertise in designing of pulse
shaping circuits by analyzing different
characteristics of circuits

Non-linear wave shaping:

a)Transfer characteristics and response of clippers
i)Positive and negative clippers
ii)Clipping at two independent levels

2
b)The steady state out put wave form of clampers for
a square wave input

Able to extend and comprehend the

concepts of circuit modeling to design
linear & non-linear wave shaping and
multi-vibrators

i)Positive and negative clampers

ii)Clamping at reference voltage

Comparison operation of comparators

Able to extend and comprehend the

concepts of circuit modeling to design
linear & non-linear wave shaping and
multi-vibrators

Switching characteristics of transistor

The student will be able to design and

implement analog electronic circuits using
transistors (like BJT, FET, UJT) and diodes.

Design an Astable multivibrators,Monostable and

Bistable multivibrator and draw its waveforms

5
Response of Schmitt trigger circuit for loop gain less
than and greater than one

Boot Strap Sweep Circuit & Miller Circuits

An ability to design, implement and manage

the electronic projects for real world
applications
The students will be able to use design time
base generators using BJTs

8.Course mapping (COs) with POs

POs

10

11

12

Pulse circuits Lab

CO 1: Understand the
Concepts of Linear wave
shaping RC circuits for
Low pass & High Pass

CO 2: Learn various
techniques of Non-linear
wave shaping of RC
Circuits
CO 3: Comparison
operation of comparators

CO 4: Learn various
Switching characteristics of
transistor
CO 5: Design
Multivibrators for various
applications,
synchronization techniques
and sweep circuits
CO 6: Understand the
operation of Boot Strap
Sweep Circuit & Miller
Circuits

1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High)

It there is no correlation, put -

10

9.INSTRUCTIONS
Instruction for students:1.
2.
3.
4.
5.

Do not handle any equipment without reading the instructions /Instruction manuals.
Observe type of sockets of equipment power to avoid mechanical damage.
Do not insert connectors forcefully in the sockets.
Strictly observe the instructions given by the Teacher/ Lab Instructor.
After the experiment is over, the students must hand over the Bread board, Trainer kits,
wires, CRO probes and other components to the lab assistant/teacher.
6. It is mandatory to come to lab in a formal dress (Shirts, Trousers, ID card, and Shoes for
boys). Strictly no Jeans for both Girls and Boys.
7. It is mandatory to come with observation book and lab record in which previous
experiment should be written in Record and the present labs experiment in Observation
book.
8. Observation book of the present lab experiment should be get corrected on the same day
and Record should be corrected on the next scheduled lab session.
9. Mobile Phones should be Switched OFF in the lab session.
10. Students have to come to lab in-time. Late comers are not allowed to enter the lab.
11. Prepare for the viva questions. At the end of the experiment, the lab faculty will ask the
viva questions and marks are allotted accordingly.
12. Bring all the required stationery like graph sheets, pencil & eraser, different color pens
etc. for the lab class.
13. While shorting 2 or more wires for common connections like grounding, do not twist
wires. Use shorting link on the bread board.
Instructions to Laboratory Teachers:1. Observation book and lab records submitted for the lab work are to be checked and
signed before the next lab session.
2. Students should be instructed to switch ON the power supply after the connections are
checked by the lab assistant / teacher.
3. The promptness of submission of records/ observation books should be strictly insisted
by awarding the marks accordingly.
4. Ask viva questions at the end of the experiment.
5. Do not allow students who come late to the lab class.
6. Encourage the students to do the experiments innovatively.

11

10.Introduction
What is Breadboard?
The name of the breadboard comes from the early days of electronics, when people would
exactly drive screws into boards on which they cut board in order to place the components. A
breadboard is made with a plastic material in a rectangular shape with a huge number of tiny
holes. These holes let you simply place an electronic components to build an electronic circuit
which is assembled with various components. The connections on the breadboard are not stable,
so it is very simple to remove a component if you make a wrong connection. Breadboards are
very great for beginners who are new to electronics. By using this, you can make different fun
electronic projects

Working of the Breadboard

The diagram of the breadboard circuit is shown below and the horizontal and vertical
connections of the breadboard are represented by red lines. The upper and lower parts of the
breadboard are equal and have 4-horizontal connecting strips. The middle part of the breadboard
has vertical connecting strips divided by a horizontal channel in the middle. Each connecting
strip is electrically isolated with other strip. The lead of the any component can be plugged into
a hole of the board.

12

11. IMPORTANCE OF PDC LAB

The Pulse and Digital Circuits Lab gives the students the understanding of advanced
digital circuits. The objective of this lab is to make the students learn the concepts of wave
generation & shaping circuits, logic gates and digital circuits and different types of
multivibrators such as Astable , Monostable, and Bistable multivibrators.
Following is the list of experiments that are being carried out in Pulse and Digital Circuits Lab .
o Linear wave shaping.
o Non Linear wave shaping Clippers.
o Non Linear wave shaping Clampers.
o Transistor as a switch.
o Study of Logic Gates & Some applications.
o Study of Flip-Flops & some applications.
o Sampling Gates.
o Astable Multi vibrator.
o Monostable Multi vibrator.
o Bistable Multi vibrator.
o Schmitt Trigger.
o UJT Relaxation Oscillator.
o Bootstrap sweep circuit.

13

12. List of Experiments

S.No

Name of the Experiment

Date

Signature of
the faculty

Remarks

14

Experiment No: 1

Date:

LINEAR WAVE SHAPING

Aim :

a) To study the response of RC Low pass circuit and to determine

rise time for a square wave input for different time constants.
i) RC>>T
ii) RC = T
iii) RC<<T
b) To study the response of RC High pass circuit and to determine
percentage tilt for a square input for different time constants.
i) RC>>T
ii) RC = T
iii) RC<<T.

Components Required:
1. Resistors - 10k, 100 k, 1M
2. Capacitor - 0.01uF
Apparatus Required:
1. Bread Board.
2. CRO
3. Function Generator.
4. Connecting Wires.
Related Work:
Linear Wave Shaping
The process of whereby the form of a non-sinusoidal signal is altered by
transmission through a linear network is called LINEAR WAVE SHAPING.
a) RC Low Pass Circuit :
R

Vi

V0

Figure 1.1: RC Low Pass Circuit.

The circuit passes low frequencies readily but attenuates high frequencies because the
reactance of the capacitor decreases with increasing frequency. At very high frequencies the
capacitor acts as a virtual short circuit and the output falls to zero. This circuit also works as
integrating circuit. A circuit in which the output voltage is proportional to the integral of the
input voltage is known as integrating circuit. The condition for integrating circuit is RC value
must be much greater than the time period of the input wave (RC>>T)
15

Expected Graph:

Figure 1.2 Model Graphs

16

b) RC High Pass Circuit.

Figure: 1.3. RC High Pass Circuit.

The higher frequency components in the input signal appear at the output with less
attenuation than the lower frequency components because the reactance of the capacitor decreases
with increase in frequency. This circuit works as a differential circuit. A circuit in which the
output voltage is proportional to the derivative of the input voltage is known as differential
circuit. The condition for differential circuit is RC value must be much smaller then the time
period of the input wave (RC<<T).
Expected Graphs:

Figure 1.4 Model Graphs

17

Design:
1.
2.
3.
4.
5.
6.
7.

Choose T = 1msec.
Select C = 0.01 F.
For RC = T; select R.
For RC >> T; select R.
For RC << T; select R.
If RC << T, the High pass circuit works as a differentiator.
If RC >> T, the Low pass circuit works as an integrator.

Procedure:
1.
2.
3.
4.
5.
6.
7.

Connect the circuit as shown in the fig 1.1 & 1.3.

Connect the function generator at the input terminals and CRO at the output
terminals of the circuit
Apply a square wave signal of frequency 1KHz at the input. T = 1msec.
Observe the output waveform of the circuit for different time constants.
Calculate the rise time for low pass filter and tilt for high pass filter and compare
with the theoretical values.
For low pass filter select rise time (t r) = 2.2 RC (theoretical). The rise time is
defined as the time taken by the output voltage to rise from 0.1 to 0.9 of its
final value.
% tilt = ( T/2RC ) x, 100 ( theoretical)
% tilt = [ ( V1 V1 ) / ( V / 2 ) ] 100 ( practical)

Result:
1. Rise time for lowpass filter when RC <<T
Theoretical =
Practical =
2. % tilt for highpass filter when RC = T.
Theoretical =
Practical =
Response of RC Low pass circuit is observed and rise time calculated.
Response of RC High pass circuit is observed and percentage tilt is
calculated.

18

VIVA QUESTIONS

1. What is linear wave shaping?

2. What is the function of High pass RC circuit?

3. What is the function of Low pass RC circuit?

4. What is mean by Tilt?

5.

What is mean by Rise Time?

6. What is the condition for perfect differentiation in a High pass RC circuit?

7. What is the condition for perfect integration in a Low pass RC circuit?

WORK SHEET

Theoretical values

Practical values

%tilt P

Rise time tr

Experiment No: 2 A)

Date:

NON LINEAR WAVE SHAPING - CLIPPERS

Aim :

To study the clipping circuits for the different reference voltages and to verify the
responses.

Components Required:
1. Resistors - 1K
2. IN4007 Diode 2Nos.
Apparatus Required :
1.
2.
3.
4.
5.

Bread board.
Function generator
CRO
Power supply 0-30V
Connecting wires.

Related Work:
The non-linear semiconductor diode in combination with resistor can function as clipper
circuit. Energy storage circuit components are not required in the basic process of clipping.
These circuits will select part of an arbitrary waveform which lies above or below some
particular reference voltage level and that selected part of the waveform is used for transmission.
So they are referred as voltage limiters, current limiters, amplitude selectors or slicers.
There are three different types of clipping circuits.
1) Positive Clipping circuit.
2) Negative Clipping.
3) Positive and Negative Clipping (slicer).
In positive clipping circuit positive cycle of Sinusoidal signal is clipped and negative
portion of sinusoidal signal is obtained in the output of reference voltage is added, instead of
complete positive cycle that portion of the positive cycle which is above the reference voltage
value is clipped. In negative clipping circuit instead of positive portion of sinusoidal signal,
negative portion is clipped. In slicer both positive and negative portions of the sinusoidal signal
are clipped.

1K

I. Positive Clipping

Vi

IN 4007

V0

Figure:2 A).1

V
i

V0
V
t

Figure: 2A).2 Input waveform

Figure: 2A).3Output waveform.

Transfer Characteristic Curve:

Figure 2 A).4 : Transfer Characteristic Curve

Vi is a input sinusoidal signal as shown in the figure 2(a) . For positive portion of
the sinusoidal the diode IN4007 gets forward biased. The output voltages in the voltage
across the diode under forward biased which is cut-in-voltage of the diode. Therefore the
positive portion above the cut-in-voltage is clipped or not observed in the output (V0) as
shown in figure 2(b).

II. Positive Clipping with Positive Reference Voltage

1K

IN 4007
Vi

V0
VR
Figure: 2A).5
V0

Vi

VR +
V

t
Figure: 2A).6 Input waveform

t
Figure: 2A).7 Output waveform.

Transfer Characteristic Curve:

Figure: 2A).8 Transfer Characteristic Curve

The input sinusoidal signal (Vi ) in figure 4(a) can make the diode to conduct
when its instantaneous value is greater than VR. Up to that voltage (VR) the diode is
open circuited and the output voltage is same as the input voltage. After that voltage
(VR) the output voltage is VR plus the cut-in-voltage (V ) of the diode as shown in
figure 4(b).

III. Positive Clipping with Negative Reference Voltage

1K

IN 4007

V
i

V0
VR

Figure: 2A).9

V0
Vi

VR
t
Figure: 2A).10 Input waveform

Figure: 2A).11Output waveform.

Transfer Characteristic Curve:

Figure: 2A).12 Transfer Characteristic Curve

In this circuit the diode conducts the output voltage is same as input voltage.
The diode
conducts at a voltage less by VR from cut-in-voltage called as V . For voltage less
than V , the diode is open circuited and output is same as input voltage.

IV Negative Clipping Circuit

1K

Vi

V0

IN 4007

Figure: 2A).13

V
0

V
Figure: 2A).14 Input waveform

Figure: 2A).15 Output waveform.

For this portion of the input sinusoidal signal (Vi), the diode gets reverse
biased and it is open. Then the output voltage is same as input voltage. For the
negative portion of the signal the
diode gets forward biased and the output voltage is the cut-in-voltage (-V ) of the
diode. Then the input sinusoidal variation is not seen in the output. Therefore the
negative portion of the input
sinusoidal signal (Vi) is clipped in the output signal ( V0 ).

Transfer characteristic curve:

Figure: 2A).16 Transfer Characteristic Curve

V. Negative Clipping with Negative Reference Voltage

1K

IN 4007

VR

Figure: 2A).17

Figure: 2A).18 Input waveform

Figure: 2A).19 Output
waveform
In this circuit, the diode gets forward biased for the input sinusoidal voltage is
less than (VR). For input voltage greater than (VR), the diode is non-conducting and
it is open. Then the output voltage is same as input voltage.
Transfer Characteristic

Figure: 2A).20 Transfer Characteristic Curve

VI. Negative Clipping with Positive Reference Voltage

1K

IN 4007

VR

Figure: 2A).21

V
i

V R-

V0

V
t
t
Figure: 2A).22 Input
waveform

Figure: 2A).23 Output waveform.

For input sinusoidal signal voltage less than VR, the diode is shorted and the
output
voltage is fixed ar VR. For input sinusoidal voltage greater than VR the diode is reverse
biased and open circuited. Then the output voltage is same as input voltage.
Transfer Characteristic:

Figure: 2A).24 Transfer Characteristic Curve

VII. Slicer

Figure: 2A).25 Circuit Diagram and Waveform

Transfer Characteristic :

Figure: 2A).26 Transfer Characteristic Curve

Design:
1. For positive clipping at V volts reference select VR = V.
2. For negative clipping at V volts reference select VR = V.
3. For clipping at two independent levels at V1&V2 reference
voltages select VR1 = V1, VR2 = V2 and VR2 > VR1.

Procedure:
1. Connect the circuit as shown in the fig 2 A).1 .
2. Connect the function generator at the input terminals and CRO at
the output terminals of the circuit.
3. Apply a sine wave signal of frequency 1KHz at the input and observe
the output waveforms of the circuits.
4. Repeat the procedure for figures 2 A).5, 2 A).9, 2 A).13, 2 A).17, 2 A).21
and
2 A).25.

Result:
The Clipping circuits for different reference voltages are studied.

VIVA QUESTIONS:

1. What is Non-linear wave shaping?

2. What is the purpose of a clipping circuit?

3. What are the other names of clipping circuits?

4. What are the applications of clipper circuits?

5. What is the effect of clipping on frequency?

10

WORK SHEET

Name of Clipper ckt.

Practical values of clipping

level

Positive peak clipper

+VR+ V =

Negative peak clipper

-VR - V =

Positive Base clipper

+VR - V =

Negative Base clipper

-VR + V =

Theoretical values of
clipping level

Vz =
Clipping on both sides
-Vz =

Input Frequency=

Output Frequency=

11

Experiment No: 2 B)

Date:

NON LINEAR WAVE SHAPING CLAMPERS

Aim : To get positive and negative clamping for sinusoidal and Square wave inputs.
Components Required:
1. Resistors - 1k
2. IN4007 Diode
3. Capacitor -10uF
Apparatus Required:
1.
2.
3.
4.
5.

Bread board
Function generator
CRO
Power supply 0-30V
Connecting Wires.

Related Work:
Clamping Circuit:
A clamping circuit is one that takes an input waveform and provides an output that is
a faithful replica of its shape but has one edge tightly clamped to the zero voltage reference
point.

There are various types of Clamping circuits, which are mentioned below:
1. Positive Clamping Circuit.
2. Negative Clamping Circuit.
3. Positive Clamping with positive reference voltage.
4. Negative Clamping with positive reference voltage.
5. Positive Clamping with negative reference voltage.
6. Negative Clamping with negative reference voltage.

12

Negative Clamping Circuit

VA
+
+

Vi

V0

Figure:2B).1
The input signal is a sinusoidal which begins at t=0. The capacitor C is charged at t = 0.
The waveform across the diode at various instant is studied.
During the first quarter cycle the input signal rises from zero to the maximum value Vm.
The diode being ideal, no forward voltage may appear across it. During this first quarter cycle
the capacitor voltage VA = Vi. The voltage across C rises sinusoidally, the capacitor is charged
through the series combination of the signal source and the diode. Throughout this first quarter
cycle the output V0 has remained zero. At the end of this quarter cycle there exists across the
capacitor a voltage VA = Vm.
After the first quarter cycle, the peak has been passed and the input signal begins to fall,
the voltage VA across the capacitor is no longer able to follow the input voltage. For in order to
do so, it would be required that the capacitor discharge, and because of the diode, such a
discharge is not possible. The capacitor remains charged to the voltage VA = Vm, and, after the
first quarter cycle the output is V0 = Vi Vm. During succeeding cycles the positive excursion of
the signal just barely reaches zero. The diode need never again conduct, and the positive
extremity of the signal has been clamped to zero. The average value of the signal is Vm.

13

Positive Clamping Circuit:

It is also called as negative peak clamper, because this circuit clamps at the
negative peaks of a signal.

Figure 2B).2

Let the input signal be Vi = Vm sint. When Vi goes negative, diode gets forward biased
and conducts. The capacitor charges to voltage Vm, with polarity as shown. Under steady state
condition, the positive clamping circuit is given as,
V0 = Vi - (Vm )

During the negative half cycle of Vi, the diode conducts and C charges to Vm volts, i.e., the
negative peak value. The capacitor cannot discharge since the diode cannot conduct in the
reverse direction. Thus the capacitor acts as a battery of Vm volts and the output voltage is given
by equation.1 above. It is seen for figure 2, that the negative peaks of the input signal are
clamped to zero level. Peak-to-peak amplitude of output voltage 2Vm, which is the same as that
of the input signal

14

.
Negative Clamping with Positive Reference Voltage:

C
D
Vi

V0

V
R

Figure: 2B).3
Since VR is in series with the output of negative clamping circuit, now the average value of the
output becomes (-Vm + V R ).

Similarly, the average of

i) Negative clamping with negative reference voltage is (-Vm + VR ).
ii) Positive clamping is +Vm.

iii) Positive clamping with positive reference voltage is Vm + VR.

iv) Positive clamping with negative reference voltage is Vm - VR.

15

Circuit Diagrams:
1. Positive Clamper camping to 0v:

Figure: 2B).3 Circuit Diagram and waveform

Figure: 2B).4 Response to square waveform

2. Negative Clamper clamping to 0v:

Figure: 2B).5 Circuit Diagram and waveform

Figure: 2B).6 Response to square waveform

17

3. Positive - clamper with reference voltage Vr:

Figure: 2B).7 Circuit Diagram and waveform

Figure: 2B).8 Response to square waveform

18

4. Negative Clamper with reference voltage:

Figure: 2B).9 Circuit Diagram and waveform

Figure: 2B).10 Response to square waveform

19

Procedure:
1. Connect the circuit as shown in the fig 2B).3.
2. Connect the function generator at the input terminals and CRO at
the output terminals of the circuit.
3. Apply a sine wave and square wave signal of frequency 1kHz at the
input and observe the output waveforms of the circuits in CRO.
4. Repeat the above procedure for the different circuit diagram as shown in
the circuit diagrams in figures 2B).5, 2B).7 and 2B).9.

Result: The clamping voltages for positive and negative clamping circuits are noted.

VIVA QUESTIONS:

1. What is clamping circuit?

2. State Clamping Circuit Theorem?

3. What are the applications of a clamper circuit?

4. Explain the operation of positive clamper?

5. Explain the operation of negative clamper?

20

WORK SHEET

Negative Clamper: .

Clamping to 0 Volts

Expression for Vo is Vo = Vin Vc + V = Vin Vm + V

Vin

Vm

Vo

Vo = Vm Vm + V

Formula

= V

Vo = 0 Vm + V
= Vm + V

-Vm

Vo = -Vm Vm + V
= - 2 Vm + V

Theoretical
Value (V)

Practical
Value(V)

21

Negative Clamper: . Clamping to VR Volts

Expression for Vo is Vo = Vin Vc + V + VR = Vin Vm + V +

Vin

Vo
Formula

Vm

Vo = Vm Vm +
V + VR
= V + + VR

Vo = 0 Vm +
V + VR
= Vm + V

-Vm

Vo = -Vm Vm + V +
VR
= - 2 Vm + V+ VR

Theoretical
Value (V)

Practical
Value(V)

22

Positive Clamper: .

Clamping to 0 Volts

Expression for Vo is Vo = Vin Vc + V = Vin (- Vm ) + V

Vin

Vm

Vo

Vo = Vm + Vm + V

Vo = 0 + Vm + V

= 2 Vm + V

= Vm + V

Formula

-Vm

Vo = -Vm + Vm + V
= V

Theoretical
Value

Practical
Value

23

Positive Clamper: . Clamping to VR Volts

Expression for Vo is Vo = Vin Vc + V + VR = Vin (- Vm ) + V + VR

Vin

Vo

Vm

Vo = Vm + Vm +

Formula

V + VR
= 2Vm + V + VR

Vo = 0 + Vm +
V + VR
= Vm + V + VR

-Vm

Vo = -Vm + Vm + V +
VR
= V+ VR

Theoretical
Value

Practical
Value

Input Frequency=

Output Frequency=

24

Date:

Experiment No: 3

COMPARATORS
Aim :

To study the comparator circuits and to verify the responses to the ramp signal.

Components Required:
1. Resistors - 1K
2. IN4007 Diode 2Nos.
Apparatus Required :
1. Bread board.
2. Function generator
3. CRO
4. Power supply 0-30V
5. Connecting wires.

Related Work:
The function of a comparator circuit is totally different from that of clipping circuit. In a clipping
circuit a portion of input waveform is removed and the resulting waveform appears as its output
waveform. In comparator circuit reproduction of a part of a signal waveform is not of any interest. The
clipping circuit may also be used to perform the operation of comparison. A comparator circuit is
shown in fig 3.1 is one that may be used to mark the instant when an arbitrary waveform attains some
reference level.

The input signal is taken as ramp waveform for convenience. The input waveform crosses
the voltage level Vi(t) = VR + V at time t=t1 . The output remains constant at Vo(t) = VR until t=t1
as indicated in fig 3.2. After t= t1 is crossed output waveform Vo(t) rises along with the input signal
Vi(t).

25

Circuit Diagram:

Fig: 3.1 Comparator Circuit

Model Waveforms

Fig 3.2 Input and Output waveforms of the comparator

Procedure:
1. Connect the circuit as shown in the fig 3.1.
2. Apply ramp signal at the input terminal using Miller sweep circuit and
CRO at the output terminals of the circuit.
3. Observe the output waveforms of the circuit.

Result:
The comparator circuit for ramp input is studied.

26

WORK SHEET

27

Date:

Experiment No: 4

TRANSISTOR AS A SWITCH
Aim:
1. To Design Transistor to act as a Switch
2. To verify the operation of transistor as a switch.
Apparatus:
1.
2.
3.
4.
5.
6.
7.

Transistor (BC 107).

Breadboard.
CRO.
Resistors (1K, 6.8K).
DC power supply.
Function Generator.
Connecting wires.

Related Work:
When the I/P voltage Vi is negative or zero, transistor is cut-off and no current flows through Rc
hence V0 = VCC when I/P Voltage Vi jumps to positive voltage, transistor will be driven into
saturation. Then
V0 = Vcc ICRC - VCESat
Circuit diagram:

Figure 4.1 Circuit Diagram

28

Procedure:
1. Connect the circuit as shown in fig 4.1.
2. Apply the Square wave 4 Vp-p frequency of 1 KHz.
3. Observe the waveforms at Collector and Base and plot it.
Precautions:
1. When you are measuring O/P waveform at collector and base, keep the CRO
in DC mode.
2. When you are measuring VBE
position.

Sat,

VCE

Sat

keep volts/div switch at either 0.2 or 0.5

3. When you are applying the square wave see that there is no DC voltage in that.
This can be checked by CRO in either AC or DC mode, there should not be any
jumps/distortion in waveform on the screen.
Expected waveforms:

Figure 4.2 Waveforms

Result:
Transistor as a switch has been designed and O/P waveforms are observed.

VIVA QUESTIONS:

1. Explain the action of transistor as a switch?

2. What do you mean by cut-off, active and saturation regions?

3. Explain the working of LED?

4. How a transistor can be made ON/OFF?

30

WORK SHEET

OBSERVATIONS:

I/P Voltage
(volts)

VCB

VBE

VCE

Transistor
Mode
ON/OFF

Mode of
LED

0 volts

5 volts

31

Experiment No: 5

Date:

BISTABLE MULTIVIBRATOR
Aim:

To design a fixed bias Bistable Multivibrator and to measure the stable state
voltages before and after triggering.

Components Required:
1. Resistors
2. Capacitors.
3. Transistors 2N2369 2
Apparatus:
1. Bread board
2. Power supply 0-30V
3. CRO
4. Connecting wires
Related Work:
A bistable multivibrator has two stable output states. It can remain indefinitely in any one
of the two stable states, and it can be induced to make an abrupt transition to the other stable
state by means of suitable external excitation. It would remain indefinitely in this stable state,
until it is again induced to switch into the original stable state by external triggering.
Bistable multivibrators are also termed as Binarys or Flip-flops. A binary is sometimes
referred to as Eccles-Jordan Circuit.
+VCC

I1
RC1

I2
R

RC2

D
A

Q1

B
Q2

R
R2

-VBB
Figure5.1

32

Principle of Operation of bistable multivibrator:

Consider the circuit as shown in the figure 5.1. The transistor Q1 and Q2 are n-p-n
transistors. They are coupled to each other as shown in figure 1. It is evident that the output of
each transistor is coupled to the input of the other transistor. Since the transistors are identical,
there quiescent currents would be the same, unless the loop gain is greater than unity. When I1
increases slightly, the voltage drop across the collector resistance RC1 increases. Since VCC is
fixed, the voltage of point C decreases. This has the effect of decreasing the base current of Q2.
This, in turn, decreases the collector current of Q2 viz. I2 decreases, the voltage drop I2RC2
decreases. Hence the voltage of point D increases.

Due to increase of VD, the base current of Q1 increases. This increases the collector
current of Q1 viz I1. Thus I1 further increases. I1RC1 drop further increases, VC further decreases,
the base current of Q2 further decreases, with the result that I2 further decreases. Thus it can
easily seen that if the collector current I1 increases even marginally, I2 would go on progressively
decreasing and as a result, I1 would progressively increase. Eventually I2 would become
practically zero, cutting off the transistor Q2, at the same time transistor Q1 would conduct
heavily with the result that it would be driven into saturation. Thus Q2 becomes OFF and Q1
becomes ON. It can similarly be shown that if I2 increases even marginally similar sequence of
operation would result and ultimately Q2 would be ON and Q1 OFF. Thus when Q1 is ON, Q2 is
OFF and when Q1 is OFF Q2 is ON.

33

Circuit Diagram:

Figure 5.2 Practical Circuit Diagram

Procedure:
1. Connect the circuit as shown in fig 5.2.
2. Observe the waveforms at VBE1, VBE2, VCE1, VCE2
3. Observe which transistor is in ON state and which transistor is in OFF state.
4. Apply ve triggering at the base of the ON transistor and observe the voltages
VC1, VC2, VB1, and VB2.

5. Apply + ve triggering at the base of the OFF transistor and observe the
Voltages VC1, VC2, VB1, VB2.

34

Expected Waveforms:
Vc1

Vc2

Vb1

Vb2

Figure 5.3 Waveforms

Result:
Bistable multivibrator is designed and its performance is tested.
WORK SHEET

35

Experiment No: 6

Date:

ASTABLE MULTIVIBRATOR
Aim : To design and test performance of an Astable Multivibrator to generate clock
pulse for a given frequency.
Components Required:
1. Resistors
2. Capacitors 0.1 f - 2
3. Transistors 2N2369 2
Apparatus :
1.
2.
3.
4.

CRO
Power supply 0-30V
Bread board
Connecting wires

Related Work:
An Astable multivibrator has two quasi-stable states, and it keeps on switching between
these two states, by itself, No external triggering signal is needed. The astable multivibrator
cannot remain indefinitely in any of these two states. The two amplifiers of an astable
multivibrator are regeneratively cross-coupled by capacitor.
Principle:
A collector-coupled astable multivibrator using n-p-n transistor is shown in fig 5.1. The
working of an astable multivibrator can be studied with respect to the fig 5.1.
VCC 12V

RC1

R2

R1

RC2

D
C2

2N2369

C1
Q2

Q1
A

2N2369

Figure:6.1

36

Let it be assumed that the multivibrator is already in action and is oscillating i.e.,
switching between the two states. Let it be further assumed that at the instant considered, Q2 is
ON and Q1 is OFF.
i) Since Q2 is ON, capacitor C2 charges through resistor RC1. The voltage across C2 is VCC.
ii) Capacitor C1discharges through resistor R1, the voltage across C1 when it is about to start
discharging is VCC.(Capacitor C1 gets charged to VCC when Q1 is ON).
As capacitor C1 discharges more and more, the potential of point A becomes more and
more positive (or less and less negative), and eventually V A becomes equal to V , the cut in
voltage of Q1. For VA > V, transistor Q1 starts conducting. When Q1 is ON Q2 becomes OFF.
Similar operations repeat when Q1 becomes ON and Q2 becomes OFF.
Thus with Q1 ON and Q2 OFF, capacitor C1 charges through resistor RC2 and capacitor
C2 discharges through resistor R2. As capacitor C2 discharges more and more , it is seen that the
potential of point B becomes less and less negative (or more and more positive), and eventually
VB becomes equal to V, the cut in voltage of Q2. when VB > V, transistor Q2 starts
conducting. When Q2 becomes On, Q 1 becomes OFF.
It is thus seen that the circuit keeps on switching continuously between the two quasistable states and once in operation, no external triggering is needed. Square wave voltages are
generated at the collector terminals of Q1 and Q2 i.e., at points C and D.
Circuit Diagram:
VCC
12V

Rc1
2.2k
C1
0.047F

R1
15k

R2
15k
C2

Rc2
2.2k

0.047F

Q1

Q2

BC107BP

BC107BP

Figure 6.2 Practical Circuit Diagram

37

Procedure:
1. Connect the circuit as shown in fig 6.2.
2. Observe the waveforms at VBE1, VBE2, VCE1, VCE2 and find frequency.
3. Vary C from 0.01 to 0.001F and measure the frequency at each step.
4. Keep the DC- AC control of the Oscilloscope in DC mode.
Expected Waveforms:
Q1 OFF, Q2 ON

Q 1 OFF, Q 2 ON

VCC
Q1 ON, Q2 OFF

Q1 ON, Q2 OFF

VC1

VCE (SAT)

t
VCC

VC2

VCE (SAT)

VB1

VB2

I.R C

Figure 6.3

Result: Astable multivibrator is designed and its performance is tested.

TON =

TOFF =

T(TON + TOFF) =

38

WORK SHEET

39

Experiment No: 7

Date:

MONOSTABLE MULTIVIBRATOR
Aim :

To design and test performance of a monostable multivibrator to generate

clock pulse for a given frequency. And obtain the waveforms.

Components Required:
1. Resistors as per the circuit.
2. Capacitors as per the circuit..
3. Transistors 2N2369 2
Apparatus Required:
1.
2.
3.
4.

CRO
Power supply 0-30V
Bread board
Connecting wires

Circuit Diagram:
VCC
10V

R3
1.5k
Trigger
signal

C2
1F

Rc1
2.2k
C1

D1

R1
68k

Rc2
2.2k
R2

1N4007G
Q1

1F

1k

BC107BP

Q2
BC107BP

Figure 7.1 Practical Circuit Diagram

40

Related Work:
A monostable multivibrator has only one stable state, the other state being quasistable. Normally the multivibrator is in the stable state, and when an external triggering pulse is
applied, it switches from the stable to the quasi-stable state. It remains in the quasi-stable state
for a short duration, but automatically reverts i.e. switches back to its original stable state,
without any triggering pulse.
Principle of operation:
A collector-coupled Monostable multivibrator of the two transistors Q1 and Q2, Q1 is
normally OFF and Q2 is Normally ON. Resistor R1 and R2 are connected to the normally OFF
transistor, and the capacitor C is connected to the normally ON transistor.
It is seen from the circuit of the monostable multivibrator that, under normal conditions,
the supply voltage VCC provides enough base drive to the transistor Q 2 through resistor R, with
the result that Q2 goes into saturation. With Q2 ON, Q1 goes OFF, as already studied in the
context of binary operation.
With Q2 ON and Q1 OFF, the capacitor finds a charging path. The voltage across the
capacitor is VCC with polarity. It is obvious that in the stable state of the multivibrator, Q2 is ON
and Q1 is OFF. If the negative triggering pulse is applied to the collector of Q1, it is transmitted
to the base of Q2 through the capacitor, and hence makes the base of Q2 negative. Immediately Q
2 goes OFF and Q1 becomes ON. However, this is only a quasi-stable state as is obvious form the
following observation. With Q1 ON and Q2 OFF, the capacitor C finds a discharging path. As the
capacitor discharges, it is seen that the potential at the base of the transistor Q2 becomes less and
less negative, and after a time, we have VB = V, the cut-in-voltage of Q2. As soon as VB crosses
the level of V, Q2 starts conducting and gets saturated. When Q2 becomes ON, Q 1 becomes
OFF. Thus the original stable state of the multivibrator is restored. [ In quasi-stable state: Q1 is
ON and Q2 is OFF]
The interval during which the quasi-stable state of the multivibrator persists i.e., Q2
remains OFF is dependent upon the rate at which the capacitor C discharges. This duration of the
quasi-stable state is termed as delay time or pulse width or gate time. It is denoted as T. The
wave forms of the voltage at base of the transistor Q2 and C (Collector of Q1)
Procedure:
1. Connect the circuit as shown in fig 7.1.
2. With the help of a triggering circuit and using the condition T (trig) T(Quasi) a pulse
waveform is generated.
3. The output of the triggering circuit is connected to the base of the off transistor.
4. The Off transistor goes into ON state.
5. Observe the waveforms at VBE1, VBE2, VCE1, VCE2
6. Keep the DC- AC control of the Oscilloscope in DC mode.

41

Expected Waveforms:
Q2 OFF, Q 1 ON

VC2

VCC

Q1 OFF, Q2 ON

VCE (SAT)

Q2 ON, Q1 OFF

t
V
VB2

t
I.R C

VCC
VCE (SAT)

VC1

V
VB1

Figure 7.3

Result: Monostable multivibrator is designed and studied

TON =

TOFF =

Total T (TON + TOFF) =

WORK SHEET
.

42

Experiment No: 8

Date:

SCHMITT TRIGGER
AIM:

To design and analyze Schmitt trigger and to observe the waveforms.

Components Required:
1. Resistors as per the circuit.
2. Transistors 2N2369 2
APPARATUS:
1.
2.
3.
4.

CRO
Power supply 0-30V
Bread board
Connecting wires

Related Work:
The most important application of Schmitt Trigger circuit are amplitude comparator
and squaring circuit are amplitude comparator and squaring circuit. The circuit is used to
obtain a square waveform from any arbitrary input waveform. The loop gain is to be less than
unity.
If Q2 is conducting there will be voltage drop across RZ which will elevate the emitter
of Q1. Consequently if V is small enough in voltage, Q1 will be cut-off with Q1 conducting, the
circuit amplifies and since the gain is positive, the output to rise, V2 continues to fall and Z2
continues to rise. Therefore a value of V will be reached where Q2 is turned OFF. At the point
the output no longer responds to the input.
Here the input signal is arbitrary except that it has large enough excursion to carry
input beyond the limits of hysteresis range, VH = (V1 V2).The output is a square wave whose
amplitude is independent of the amplitude of the input.
Circuit Diagram:
VCC
12V

C1
1k

R6

0.022F
R2

R4
1k

R3
820

1.2k
C2

R5

Q1

Q2
BC107BP

100F

V1

2 Vpk
1kHz
0

BC107BP

820
R8
1k

0/p
R7
150

R1
10k

Figure 8.1 Practical Circuit Diagram

43

Procedure:
1. Connect the circuit as shown in fig 8.1.
2. Apply VCC of 12V and an input frequency of 1KHz with an amplitude more than the
designed UTP.
3. Now note down the output wave forms
4. Observe that the output comes to ON state when input exceeds UTP and it comes to
OFF state when input comes below LTP
5. Observe the waveforms at VC1, VC2, VB2 and VE and plot graphs.
6. Keep the DC- AC control of the Oscilloscope in DC mode.
Model Graphs:
Input sin wave
VMAX>UTP
UTP

LTP

Schmitt Trigger
Output
Vc2

Vc1

Vb2

Figure 8.2 Waveforms

Result:

Schmitt Trigger circuit is designed and studied.

44

WORK SHEET

45

Experiment No: 9

Date:

UJT RELAXATION OSCILLATOR

Aim:
a. To observe the sweep time of the relaxation oscillator, to compare
frequency of oscillator theoretically and practically
b. To calculate the slope error, transmission error and displacement error
Equipment and components required:
1.UJT
2.Resistors
3. Capacitor
4. Regulated power supply
5. C.R.O.
6. Connecting wires

2N2646-1No
1K, 2.2K,100 K
0.1uf

Related Work:
The Uni junction transistor (UJT) has two doped regions with three external leads. It
has one emitter and two bases. The emitter is heavily doped having many holes. The n-region
is lightly doped. For this reason, the resistance between the bases is relatively high, typically
5K to 10K when the emitter is open. This is called Inter base Resistance RBB.
UJT relaxation oscillator come under non sinusoidal oscillator. It is a example of non
feedback type of oscillator. A relaxation circuit term is employed to any circuit in which
timing intervals are determined by exponentially charging and discharging .A charged
capacitor functions like a stiff spring. A discharging capacitor is analogous to a relaxing
spring.

46

Circuit diagram:

Figure 9.1 Circuit Diagram

Procedure:
1. Connect the circuit as shown in the circuit diagram in fig 9.1.
2. Observe the sweep time
3. Calculate sweep time and restoration time.
4. Calculate and compare the frequencies of oscillations theoretically and practically.

47

Model Waveforms:

Figure : 9.2 Waveforms

Result:
Required waveform is obtained and slope error, transmission error and displacement error are
also calculated.

WORK SHEET

48

Experiment No: 10

Date:

BOOTSTRAP SWEEP CIRCUIT

Aim: To design a Bootstrap sweep circuit and to generate a linear ramp generator.
Equipment and components required:
1.Transistor
2.Resistors
3.Capacitor
4. Diode
5. BNC adapters
6. Regulated power supply
7. C.R.O.
8. Function generator
9. Connecting wires

BC547-2 Nos
100K-1 No,10K-2 Nos
10Kpf-2 Nos,0.1uf-1 No
1N4007-1 No

Related Work:
The basic principle involved in the bootstrap circuit is the generator voltage is
assumed to be equal to the Vc so far the amplifier input voltage Vi is equal to Vo
i.e.,(Vo=Vi) and output will be linear if the amplifier gain is unity. So in this way, the
voltage V rises by its own bootstraps, hence we get the linear bootstrap sweep.
Circuit diagram:

Figure 10.1 BOOTSTRAP SWEEP CIRCUIT

49

Procedure:
1. Connect the circuit diagram as shown in above fig 10.1.
2. Apply Vcc = 15v, square wave input of Vp-p = 10volts,10KHz frequency.
3. Apply pulse to the base of Q1 and observe the output waveform.
4. Vary the pulse width of input pulse and observe the output.
Model Waveforms:

Figure 10.2 Model Graph

Result: Output waveform of ramp is obtained and sweep speed is calculated.

WORK SHEET

50

Experiment No: 11

Date:

MILLER SWEEP CIRCUIT

Aim: To design and study a Miller sweep circuit and to measure the sweep and slope error.
Equipment and components required:
1.Transistor
SL100 - 2 Nos
2.Resistors
2.2K-2 Nos
3.Capacitor
Decade box
4. C.R.O.
5. Patch cords and connecting wires
Related Work:
Transistor Q1 acts as a switch and transistor Q2 is a common - emitter amplifier. i.e. a high gain
amplifier. Consider the case when Q1 is ON and Q2 is OFF. At this condition, the voltage across
the capacitor C and the output voltage V0 is equal to Vcc.
When a negative pulse is applied to the base of Q1, the emitter - base junction of Q1 is
reverse biased and hence Q1 is turned OFF. Thus, the collector voltage (Vc1) of Q1 increases
which increases the bias to Q2 and as a result Q2 is turned ON. Since Q2 conducts, Vout begins to
decrease. Because the capacitor is coupled to the base of transistor Q2, the rate of decrease of
output voltage is controlled by rate of discharge of capacitor. The time constant of the discharge is
given by td = RC2C.
As the value of time constant is very large, the discharge current practically remains
constant. Hence, the run down of the collector voltage is linear. When the input pulse is removed,
Q1 turns ON and Q2 turns OFF. The capacitor charges quickly to +Vcc through Rc with the time
constant t =R C.
Circuit diagram:
VCC
12V

R3
2.2k

R2
2.2k
C1

Q1

10F

Q2

R1
10k
BD139

BD139

Output

Input

Fig 11.1 Miller Sweep Circuit

51

Procedure:
1. Switch ON the experiment kit.
2. Verify square wave generator output. Keep the frequency adjust potentiometer in its
minimum position.
3. Connect the square wave generator output to the input of the Miller sweep generator circuit
and observe the same square wave on the 1st channel of dual trace CRO.
4. Observe the output of the Miller sweep circuit on 2nd channel.
5. Connect a Decade capacitance box across the capacitor C.
6. Vary the value of capacitor in steps from 100pf to 10f and see the output variations
according to the capacitor variation.
7. Compare the output and input waveforms.
Model Waveforms:

Fig 11.2: Model waveforms

Result: Output waveform of ramp is obtained and sweep speed is calculated.

WORK SHEET

52