Edc Lab Observation Gpcet (2016-17)

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G.

PULLAIAH COLLEGE OF ENGINEERING & TECHNOLOGY


DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

LAB OBSERVATION
ELECTRONIC DEVICES AND CIRCUITS LABORATORY

R15 REGULATION
Prepared by

Mr.T.TIRUPAL, M.Tech., (Ph.D)


Associate Professor, ECE Dept., GPCET, Kurnool

Ms.M.JAYALAKSHMI, M.Tech
Associate Professor, ECE Dept., RCEW, Kurnool

DEPARTMENT OF

ELECTRONICS AND COMMUNICATION ENGINEERING

G. Pullaiah College of Engineering & Technology::Kurnool


(Approved by AICTE, New Delhi, Recognized by UGC under 2 (f) & 12 (B),
Permanently Affiliated to JNTUA, Ananthapuramu)
An ISO 9001:2008 Certified Institution

Nandikotkur Road, Kurnool 518002


Andhra Pradesh, India.
www.gpcet.ac.in
Dept., of ECE, GPCET, Kurnool

Dept., of ECE, GPCET, Kurnool

Vision

Institute
Mission

Vision
Department

Mission

To prepare professionally superior and ethically strong


global manpower in technology and management to serve
the nation and the world in the 21st century
To strive hard in training the students with the current
technology and motivate them to take up research problems
and innovations associated with personality development
programs to meet the challenges in this competitive world in
an efficient manner
To impart quality technical education and molding
electronics and communication engineers with professional
competence, ethics and global outlook by building strong
teaching and research environment
To train Electronics & Communication Engineering
graduates to meet future global challenges.
To motivate the students to take up research leading to
multidisciplinary innovative projects.
To produce future leaders with cohesive teamwork in
electronics engineering applications.
To flair entrepreneurial skill amongst students for overall
societal upliftment.

PROGRAMME EDUCATIONAL OBJECTIVES (PEOs):


PEO-1 Apply the principles of basic engineering sciences in performing professional tasks in
Electronics and Communication Engineering and to develop awareness on societal concerns.
PEO-2 Demonstrate problem-solving abilities that permit to contribute in a variety of signal
processing, design of circuitry and academic careers.
PEO-3 Thrive in diverse, global, and multidisciplinary environments with team spirit for
successful completion and management of electronic projects.
PEO-4 Participate in lifelong-learning activities to enhance professional and ethical
development.
PROGRAMME OUTCOMES (POs):
Engineering Graduates will be able to:
PO1 Engineering knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals and an engineering specialization to the solution of complex engineering
problems.
PO2 Problem Analysis: Identify, formulate, review research literature and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences and engineering sciences.
PO3 Design/ Development of solutions: Design solutions for complex engineering problems
and design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, the cultural, society and environmental
considerations.
PO4 Conduct investigations of complex problems: Use research-based knowledge and
research methods including design of experiments, analysis and interpretation of data and
synthesis of the information to provide valid conclusions.

Dept., of ECE, GPCET, Kurnool

PO5 Modern tool usage: Create, select and apply appropriate techniques, resources, modern
engineering and IT tools including prediction and modelling to complex engineering activities
with an understanding of the limitations.
PO6 The engineer and society: Apply reasoning informed by the contextual knowledge to
assess societal, health, safety, legal and cultural issues and the consequent responsibilities
relevant to the professional engineering practice.
PO7 Environment and Sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and
need for sustainable development.
PO8 Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
PO9 Individual and team work: Function effectively as an individual, and as a member or
leader in diverse teams and in multidisciplinary settings.
PO10 Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and
write effective reports and design documentation, make effective presentations, and give and
receive clear instructions.
PO11 Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to ones own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
PO12 Life-long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of technological change.
PROGAMME SPECIFIC OUTCOMES (PSOs):
Engineering Graduates will be able to:
PSO-1: Apply the principles of Electronics, Analog and Digital Systems in the potential fields of
Consumer Electronics, Medical and Defence.
PSO-2: Get profound knowledge in Communications, Signal and Image Processing along with
programming & simulation tools for research advancement.
PSO-3: Apply the programming concepts of VLSI, Microprocessors, Microcontrollers, and
Embedded Systems in Real Time applications.
PSO-4: Communicate effectively in verbal, written form and group related activities with
ethical and social responsibility.
COURSE OUTCOMES (COs):
At the end of the course, the student will be able to

C207.1
C207.2
C207.3
C207.4
C207.5
C207.6

ELECTRONIC DEVICES AND CIRCUITS LABORATORY


Find the cut-in voltage, static and dynamic resistances from V-I characteristics
of PN junction diode and Zener diode.
Compute the ripple content present in half wave and full wave rectifiers with
and without filters.
Compare and contrast the volt-ampere characteristics of BJT, UJT & SCR.
Describe the current flow in Field Effect Transistor.
Analyze the description of CRO and Function generator panels.
Evaluate the Input, output resistance and bandwidth of BJT & FET Amplifiers.

Dept., of ECE, GPCET, Kurnool

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPUR


II B.Tech. I-Sem (ECE)

L
C
4
2
(15A04305) ELECTRONIC DEVICES AND CIRCUITS LABORATORY
Objectives:

This Lab provides the students to get an electrical model for various semiconductor
devices. Students can find and plot V_I characteristics of all semiconductor devices.
Student learns the practical applications of the devices. They can learn and implement
the concept of the feedback and frequency response of the small signal amplifier

Outcomes:

Students able to learn electrical model for various semiconductor devices and learns the
practical applications of the semiconductor devices

PART A: Electronic Workshop Practice


1.
Identification, Specifications, Testing of R, L, C Components (Colour Codes),
Potentiometers, Coils, Gang Condensers, Relays, Bread Boards.
2.

Identification, Specifications and Testing of active devices, Diodes, BJTs,


JFETs, LEDs, LCDs, SCR, UJT.

3.

Soldering Practice- Simple circuits using active and passive components.

4.

Study and operation of Ammeters, Voltmeters, Transformers, Analog and


Digital Multimeter, Function Generator, Regulated Power Supply and CRO.

PART B: List of Experiments


(For Laboratory Examination-Minimum of Ten Experiments)
1. P-N Junction Diode Characteristics
Part A: Germanium Diode (Forward bias & Reverse bias)
Part B: Silicon Diode (Forward bias only)
2. Zener Diode Characteristics
Part A: V-I Characteristics
Part B: Zener Diode act as a Voltage Regulator
3. Rectifiers (without and with c-filter)
Part A: Half-wave Rectifier
Part B: Full-wave Rectifier
4. BJT Characteristics(CE Configuration)
Part A: Input Characteristics
Part B: Output Characteristics
5. FET Characteristics(CS Configuration)
Part A: Drain (Output) Characteristics
Part B: Transfer Characteristics
Dept., of ECE, GPCET, Kurnool

6. SCR Characteristics
7. UJT Characteristics
8. Transistor Biasing
9. CRO Operation and its Measurements
10. BJT-CE Amplifier
11. Emitter Follower-CC Amplifier
12. FET-CS Amplifier
PART C: Equipment required for Laboratory
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.

Regulated Power supplies


Analog/Digital Storage Oscilloscopes
Analog/Digital Function Generators
Digital Multimeters
Decade Rsistance Boxes/Rheostats
Decade Capacitance Boxes
Ammeters (Analog or Digital)
Voltmeters (Analog or Digital)
Active & Passive Electronic Components
Bread Boards
Connecting Wires
CRO Probes etc.

Dept., of ECE, GPCET, Kurnool

G.PULLAIAH COLLEGE OF ENGINEERING & TECHNOLOGY::KURNOOL


LIST OF EXPERIMENTS

ELECTRONIC DEVICES AND CIRCUITS LABORATORY


PART A: Electronic Workshop Practice
PART B:
1. P-N Junction Diode Characteristics
Part A: Germanium Diode (Forward bias & Reverse bias)
Part B: Silicon Diode (Forward bias only)
2. Zener diode characteristics
Part A: V-I Characteristics
Part B: Zener Diode act as a Voltage Regulator
3. Rectifiers (without and with C-filter)
Part A: Half-wave Rectifier
Part B: Full-wave Rectifier
4. BJT characteristics (CE Configuration)
Part A: Input characteristics
Part B: Output characteristics
5. FET characteristics (CS Configuration)
Part A: Drain (output) characteristics
Part B: Transfer characteristics
6. SCR Characteristics
7. UJT characteristics
8. Transistor Biasing
9. CRO Operation and its Measurements
10. BJT-CE Amplifier
11. Emitter Follower-CC Amplifier
12. FET-CS Amplifier

Dept., of ECE, GPCET, Kurnool

CIRCUIT DIAGRAM:
FORWARD BIAS CIRCUIT:

Fig (1 )

Tabular Column:
Forw ard bias:
S . N o.

G E RM ANI U M
V F (V )

I F (m A)

S I LI CO N
V F (V )

I F (m A)

1.
2.
3.
4.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.

Dept., of ECE, GPCET, Kurnool

Exp no:

Date:

P-N JUNCTION DIODE CHARACTERISTICS


Aim:
A . T o p lo t t h e V o lt Am p e re ch a ra ct e rist ics of Ge rm an ium Dio d e in
Fo rwa r d & Re ve rs e b ia s co nd it io n . A lso f in d t he cut -in vo lt a ge ,
st a t ic an d d yn a m ic re sist a n ce s f rom th e gra p h .
B . T o p lo t t h e V o lt A mp e re ch a ra cte rist ics of S ilicon Dio d e in
Fo rwa rd b ia s co nd it io n . A lso f in d th e cu t -in vo lt a ge , st a t ic a nd
d yn a m ic re sist an ce s f rom t he gra p h .

Apparatus:
1 . Re gu la t e d P o we r su p p ly
0 30 V , 1 A
2 . Dio d e s
1 N4 0 07

1 No

0A79

1 No

3 . Re sist a n ce

1 K

1 No

4 . A mm e te r s

(0 20 m A )

1 No

(0 20 0 A )

1 No

(0 1 V )

1 No

(0 20 V )

1 No

1 No

5 . V o lt me t e r

6 . B re a d b o a rd
7 . Co n n e ct in g wire s

Procedure:
Forw ard Bias:
1 . Co n n e ct t h e circu it a s p e r t h e circu it d ia gra m sh o wn i n Fig (1 ) f o r
b o t h G e rm a n ium an d S ilico n .
2 . V a ry t h e re gu la t ed p o we r su p p ly ( RP S ) in su ch a wa y t h a t t h e
re a d in gs in vo lt me t e r (V f ) va rie s inst e p s of 0 .1 V , u p t o 0 .4 V f o r
G e rm an iu m a nd up t o 0 . 7 V f o r S ilico n f o r e a ch vo lt me t e r re ad in g,
n o t e d o wn t he amm e te r re a d in g (I f ).
3 . T ab u la te th e va lu es of f o rwa rd vo lt a g e (V f ) an d f o rwa rd cu rre n t (I f ).
4 . P lo t t he gra p h b e twe e n V F an d I F .
5 . Fro m th e gra ph f in d th e cu t -in vo lta ge , st at ic f o rwa rd r e sist an ce
RF

a n d d yn a m ic f o rwa rd re sist a n ce rF

Dept., of ECE, GPCET, Kurnool

V V2 V1

.
I
I 2 I1

CIRCUIT DIAGRAM:
REVERSE BIAS:

Fig (2 )

Tabular Column:
G E RM ANI U M

S . N o.
V R (V )

I R ( A)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.

Dept., of ECE, GPCET, Kurnool

10

Reverse Bias:
1 . Co n n e ct t he circu it a s p e r t he circu it d ia gra m sh o wn in Fig (2 ) f o r
G e rm an ium .
2 . V a ry t h e re gu la te d p o we r su pp ly in su ch a wa y t h a t th e re a d in gs in
vo lt m e t e r (V r ) va rie s in st e p s o f 1 V, u p to 2 0 V f o r G e rm a n iu m a nd
f o r e a ch vo lt m et e r re a d in g, no t e d o wn t he amm e te r re ad in gs (I r ).
3 . T ab u la te th e va lu es of re ve rse vo lt a ge (V r ) a n d re ve rse cu rre n t (I r ).
4 . P lo t t he gra p h b e twe e n V r a nd I r .
5 . Fro m t he gra p h f in d t he st a t ic re ve rse r e sist a n ce Rr V a nd
I
d yn a m ic re ve rse r e sist a n ce ,

rR

V V2 V1

.
I
I 2 I1

Precautions:
1 . Do n t give vo lt a ge t o t he circu it be yo n d p re scribe d ran ge .
2 . Do n t sho rt circu it t h e o u tp u t t e rm ina l of po we r su p p ly .
3 . Ca re f u lly co n n e ct m e te r t e rm in a ls (+ a n d ).
4 . Ca re f u lly co n n e ct P N d io de t e rm in a ls ( a n o de an d ca t ho d e ).

Model Graph:

Dept., of ECE, GPCET, Kurnool

11

CALCULATIONS:

GERM ANIUM
Forw ard Bias
RF

rF

V =

V V2 V1 =

I
I 2 I1

SILICON
Forw ard Bias
RF

rF

V =

V V2 V1 =

I
I 2 I1

RE V E RS E BI AS

Rr

V =

rR

V V2 V1

=
I
I 2 I1

Dept., of ECE, GPCET, Kurnool

12

Result:
V o lt Am p e re c hara ct e rist ics of G e rm a n iu m a nd S ilicon sem ico nd u cto r
d io d e s in f o rwa rd a n d re ve rse b ia s co n d it ion s a re p lo tte d an d f o un d
Cu t -in vo lt a ge f o r G e rm an ium , V =
Cu t -in vo lt a ge f o r S ilico n , V =
S t a t ic Fo rwa rd Resist a n ce of Ge rman iu m ,

RF =

Dyn a m ic Fo rwa rd Re sist a n ce of G e rm a n iu m, r F =


S t a t ic Re ve rse Resist a n ce of Ge rman iu m ,

Rr =

Dyn a m ic Re ve rse Re sist a n ce of G e rm a n iu m, r R =


S t a t ic Fo rwa rd Resist a n ce of S ilicon,

RF =

Dyn a m ic Fo rwa rd Re sist a n ce of S ilico n ,

rF =

PRECAUTIONS:
1.
2.
3.

Check the wires for continuity before use.


Keep the power supply at Zero volts before Start.
All the contacts must be intact.

VIVA QUESTIONS:
1.
2.
3.
4.
5.
6.
7.
8.
9.

Draw the circuit symbol of the Diode?


Draw ideal Diode Volt Ampere Characteristics?
What is Cut-in Voltage?
What are Static and Dynamic Resistances?
Explain the working of a Diode as a switch
What is space charge region?
What is Diffusion Capacitance?
What are Minority and Majority carriers in P type and in N type materials?
What is the current equation of the Diode?

Dept., of ECE, GPCET, Kurnool

13

CIRCUIT DIAGRAM :
FORWARD BI AS

Tabular Column:
S.NO

V F (V)

I F (mA)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.

Dept., of ECE, GPCET, Kurnool

14

Exp no:

Date:

ZENER DIODE CHARACTERISTICS


Aim:
A . T o P lo t t he V o lt A m pe re ch a ra cte rist ics of a Ze n e r d io d e a nd
f ind th e B re a k do wn V o lta ge of Ze n e r Dio d e .
B . T o p lo t th e L o ad ch a ra ct e rist ics of a Ze n e r d iod e (Zene r d io d e
a s a Vo lt a ge Re gula t o r) .

Apparatus :
1 . Re gu la t e d P o w e r su p p ly 0 30 V , 1 A
2 . Ze n e r Dio de

B ZX6 . 2 V (o r) B ZX8 . 2 V

1 No

3 . A mm e te r

0 20 mA

1 No

4 . V o lt me t e r

0 1 V

1 No

0 10 V

1 No

1K

1 No

6 . De ca d e Re sist a n ce B o x (DRB )

1 No

7 . B re a d B o a rd

1 No

5 . Re sist o r

8 . Co n n e ct in g wire s

Procedure:
Forw ard Bias:
1 . Co n n e ct t he circu it a s pe r t h e circu it d ia gra m sho wn in Fig (1 ).
2 . V a ry t h e re gu la t ed p o we r su p p ly ( RP S ) in su ch a wa y t h a t t h e
re a d in gs in vo lt m et e r (V f ) va rie s in st e p s of 0 .1 V up t o 0 . 8 V an d f o r
e a ch vo lt me t e r read in g, n o te do wn t he am me t e r rea d in g (I f ).
3 . T ab u la te th e va lu es of f o rwa rd vo lt a g e (V f ) an d f o rwa rd cu rre n t (I f ).
4 . P lo t t he gra p h b e twe e n V F an d I F .

Dept., of ECE, GPCET, Kurnool

15

REVER SE BI AS

Fig (2 )

Tabular Column:
S.No.

VR (Volts)

IR (mA)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.

Dept., of ECE, GPCET, Kurnool

16

Reverse Bias:
1 . Co n n e ct t he circu it a s pe r t h e circu it d ia gra m sho wn in Fig (2 )
2 . V a ry t h e p o we r sup p ly vo lt a ge in su ch a wa y t h a t t he re a d in gs of
vo lt m e t e r (V z ) a re t a ke n in st e p s of 0. 5 V u p t o B re a kdo wn
vo lt a ge a n d n o te d o wn t h e co rresp o nd in g A mm et er (I z ) a n d
V o lt me t e r (V z ) Re ad in gs.
3 . O n ce b re a k d o wn o ccu rs V Z rem a in s f a irly co n st a nt e ve n th ou gh
I Z in cre a se s.
4 . P lo t t he gra p h b e twe e n V z a n d I z .
5 . Fin d t h e Zen e r Bre a kd o wn vo lt a ge f rom t he gra p h by drawing a
tangent on the reverse Bias Characteristics of the Zener Diode starting from the
Knee and touching most of the points of the curve. The point where the tangent
intersects the X-axis is the Zener Breakdown Voltage.

Load Characteristics (Zener diode as a Voltage Regulator):


1 . Co n n e ct t he circu it a s pe r t h e circu it d ia gra m sho wn in Fig (3 ).
2 . K e e p t h e re sist a nce in DRB a t su ch a m a xim u m va lu e t ha t th e
Ze n e r d io d e b re a ks d o wn a n d cu rre nt b e co me s ze ro .
3 . De cre a se th e loa d re sist a n ce a nd no t e do wn t h e co rre sp on d in g
lo a d vo lt a ge (V L o r V z ) a n d lo a d cu rre n t (I L o r I z ) a n d ta b u lat e the
re a d in gs.
PRECAUTIONS:
1.
2.
3.

Check the wires for continuity before use.


Keep the power supply at Zero volts before Start
All the contacts must be intact

VIVA QUESTIONS:
1.
2.
3.
4.
5.
6.
7.
8.
9.

Draw the circuit symbol of the Zener Diode


What is meant by Zener break down?
What are the different types of break downs?
What is the difference between Avalanche and Zener break down?
In a lightly doped and heavily doped diode which type of break down occurs?
What are the applications of Zener diode?
Explain operation of Zener diode as Voltage Regulator?
What is the difference between normal PN diode and Zener diode?
What is a Regulation?

Dept., of ECE, GPCET, Kurnool

17

Load characteristics (Zener diode as a Voltage Regulator)


Circuit diagram:

Fig (3)
Tabular Column:
S . N o.

R L (K )

V L (V ol ts )

I L (m A)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

Dept., of ECE, GPCET, Kurnool

18

MODEL GRAPH:
V-I Characteristics

Load Characteristics

Result:
V o lt A m pe re a nd L o a d Re gu la t io n Ch a ra ct e rist ics of Ze n e r Dio d e a re
p lo t t ed a n d Ze ne r B re a k Do wn V o l ta ge is f ou nd f rom t h e gra p h wh ich
is V Z =

Dept., of ECE, GPCET, Kurnool

19

PART-A: CIRCUIT DIAGRAM for Half-Wave Rectifier without filter:

Fig (1 )

Tabular Column:
No Load DC Voltage, VNL =

S.No.

Load
Resistance
RL ()

1.

100

2.

200

3.

300

4.

400

5.

500

6.

600

7.

700

8.

800

9.

900

10.

1000

Output DC
Current
Idc (mA)

Dept., of ECE, GPCET, Kurnool

Output DC
Voltage
Vdc (V)

Ripple
Voltage
Vac (V)

Ripple
Factor
r = Vac/Vdc

% of regulation =
[(vNL VFL)/VFL] x 100

20

Exp no:

Date:

RECTIFIERS (without and with C-filter)


Aim:
A. To Find the Ripple factor and Percentage of Regulation of a Half Wave Rectifier
without and with Filter.
B. To Find the Ripple factor and Percentage of Regulation of a Full Wave Rectifier
without and with Filter.

Apparatus:
1. Step down transformer 230V/50 Hz: (9-0-9) V

1 No

2. Diodes

2 No

1 No

1 No

5. Digital Multimeter (DMM)

1 No

6. Capacitors for (Half Wave Rectifier) 47 F

1 No

for (Full Wave Rectifier) 100 F

1 No

1 No

1N4007

3. DRB (Decade Resistance Box)


(0 200 mA)

4. Ammeter

7. Bread Board
8. Connecting wires

Procedure:
1. Connect the circuit as per the circuit diagram shown in Figs (1).
2. Note down the No Load DC Voltage VNL from multimeter when Idc = 0 i.e.,
excluding load resistance RL (DRB) from circuit.
3. Keep the load resistance RL (DRB) at a maximum value.
4. Decrease the load resistance from maximum to minimum value in steps and
note down the corresponding ammeter Idc and voltmeter Vdc, Vac readings in
multimeter.
5. Calculate the ripple factor ( r), r

RMS valuesof AC component Vac

Averagevalue
Vdc

6. Calculate the Percentage of Regulation = ( V N L V F L ) / V F L X 1 0 0


7. Draw the following graphs
i.

Idc vs Vdc

ii.

Idc vs Ripple Factor (r)

iii.

Idc vs Percentage of Regulation.

8. Repeat the above procedure for fig (2) using with filter.
Dept., of ECE, GPCET, Kurnool

21

CIRCUIT DIAGRAM for half-wave rectifier with filter

Fig (2)

Tabular Column:
No Load DC Voltage, VNL =

S.No.

Load
Resist
ance
RL ()

1.

100

2.

200

3.

300

4.

400

5.

500

6.

600

7.

700

8.

800

9.

900

10.

1000

Output
DC
Current
Idc (mA)

Output
DC
Voltage
Vdc (V)

Dept., of ECE, GPCET, Kurnool

Ripple
Voltage
Vac (V)

Ripple
Factor
r = Vac/Vdc

% of Regulation =
[(VNL VFL)/VFL] X 100

1
2 3 f RL C

22

MO DE L W AV E FO RMS O F H ALF -W AV E RE CTI FI E R :

MO DE L G R AP HS FO R HW R W I THOUT FI LTE R :

MODEL WAVEFORMS FOR HWR WITH FILTER:

MODEL GRAPHS FOR WITH FILTER:

Dept., of ECE, GPCET, Kurnool

23

Dept., of ECE, GPCET, Kurnool

24

Result:
Ripple factor and Percentage of Regulation of a Half Wave Rectifier without and with
Filter are found.
Ripple Factor without filter =
Ripple Factor with filter

Percentage of Regulation without filter

Percentage of Regulation with filter

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start.
3. All the contacts must be intact.
VIVA QUESTIONS:
1.
2.
3.
4.
5.
6.

What is a rectifier?
How Diode acts as a rectifier?
What is the significance of PIV? What is the condition imposed on PIV?
Draw the o/p wave form of HWR without filter?
Draw the o/p wave form of HWR with filter?
What is meant by ripple factor? For a good filter whether ripple factor should
be high or low?
7. What happens to the o/p wave form if we increase the capacitor value?

Dept., of ECE, GPCET, Kurnool

25

PART-B: CIRCUIT DIAGRAM for Full-wave Rectifier without Filter:

Fig ( 1 )

Tabular Column:
No load D.C Volt age, V N L =
Load
S.No. Resistance
RL ()
1.

100

2.

200

3.

300

4.

400

5.

500

6.

600

7.

700

8.

800

9.

900

10.

1000

Output
DC
Current
Idc (mA)

Dept., of ECE, GPCET, Kurnool

Output
Ripple
DC
Voltage
Voltage
Vac (V)
Vdc (V)

Ripple
Factor
r = Vac/Vdc

% of Regulation =
[(VNL VFL)/VFL] X 100

26

Procedure:
1. Connect the circuit as per the circuit diagram shown in Figs (1).
2. Note down the No Load DC Voltage VNL from multimeter when Idc = 0 i.e.,
excluding load resistance RL (DRB) from circuit.
3. Keep the load resistance RL (DRB) at a maximum value.
4. Decrease the load resistance from maximum to minimum value in steps and
note down the corresponding ammeter Idc and voltmeter Vdc, Vac readings in
multimeter.
5. Calculate the ripple factor ( r), r

RMS valuesof AC component Vac

Averagevalue
Vdc

6. Calculate the Percentage of Regulation = ( V N L V F L ) / V F L X 1 0 0


7. Draw the following graphs
iv.

Idc vs Vdc

v.

Idc vs Ripple Factor (r)

vi.

Idc vs Percentage of Regulation.

8. Repeat the above procedure for fig (2) using with filter.

Dept., of ECE, GPCET, Kurnool

27

CIRCUIT DIAGRAM for Full Wave Rectifier With Filter:

Fig (2)

Tabular Column:
No load D.C Volt age, V N L =

S.No.

Load
Resist
ance
RL ()

1.

100

2.

200

3.

300

4.

400

5.

500

6.

600

7.

700

8.

800

9.

900

10.

1000

Output
DC
Current
Idc (mA)

Output
DC
Voltage
Vdc (V)

Ripple
Voltage
Vac (V)

Dept., of ECE, GPCET, Kurnool

Ripple
Factor
r = Vac/Vdc

% of Regulation =
[(VNL VFL)/VFL] X 100

1
4 3 f RL C

28

MODEL WAVEFORMS FOR FWR WITHOUT FILTER:

MO DE L G R AP H F O R FW R WI THO UT FI LTE R

MO DE L W AV E FO RMS FO R FW R :

MODEL GRAPHS FOR FWR WITH FILTER:

Dept., of ECE, GPCET, Kurnool

29

Dept., of ECE, GPCET, Kurnool

30

Result:
Ripple factor and Percentage of Regulation of a Full Wave Rectifier without and with
Filter is found.
Ripple Factor without filter =
Ripple Factor with filter

Percentage of Regulation without filter

Percentage of Regulation with filter

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start.
3. All the contacts must be intact.
VIVA QUESTIONS:
1.
2.
3.
4.
5.

What is a full wave rectifier?


What is the significance of PIV requirement of Diode in full-wave rectifier?
Compare capacitor filter with an inductor filter?
Draw the o/p wave form of FWR without filter?
What is meant by ripple factor? What happens to the ripple factor if we
insert the filter?
6. What happens to the o/p wave form if we increase the capacitor value?
7. What is the theoretical maximum value of ripple factor for a full wave
rectifier?

Dept., of ECE, GPCET, Kurnool

31

CIRCUIT DIAGRAM :
Input Characteristics:

Fig (1 )

TABULAR COLUMN:
S.NO

VCE = 0 V
V B E (V)

1.

I B (A)

VCE = 2 V
V B E (V)

I B (A)

( A)

2.
3.
4.
5.
6.
7.
8.
9.
10.

Dept., of ECE, GPCET, Kurnool

32

Exp no:

Date:

BJT Characteristics (CE Configuration)


Aim:
A . T o p lo t t he i np u t ch a ra cte rist ics of t ra n sisto r c o nne ct e d in
Co mm o n Em it t e r (CE ) c o nf igu ra t io n.
B . T o p lo t t he o u t put ch a ra ct e rist ics of t ran sist o r c on ne ct e d in
Co mm o n Em it t e r (CE ) c o nf igu ra t io n.

Apparatus:
1 . Re gu la t e d P o we r su p p ly 0 30 V
2 . T ra n sisto r
B C1 0 7

3 . Re sist a n ce
1K

5 60

4 . V o lt me t e rs
01V

0 20 V

5 . A mm e te rs
0 20 mA

0 20 0 A
6 . B re a d B o a rd

7 . Co n n e ct in g wire s

1
1
1
1
1
1
1
1

No
No
No
No
No
No
No
No

Procedure:
P ART A: Input characteristics:
1 . Co n n e ct t he cir cu it a s pe r t h e circu it d ia gra m sho wn in Fig (1 )
2 . S e t V C E = 0 V b y ad ju st in g V C C .
3 . V a ry t h e in pu t vo lt a ge V B B a nd no t e th e re ad in gs of I B an d V B E .
4 . Re p e at t he se co n d st e p f o r V C E = 2V .
5 . P lo t t h e inp u t cha ra ct e rist ics V B E vs I B for constant values of

VCE = 0V and 2V.

Dept., of ECE, GPCET, Kurnool

33

Output characteristics:

Fig ( 2 )

TABULAR COLUMN:
S.No

IB = 10 A
V C E (V )

I C (m A )

IB = 20A
V C E (V )

I C (m A )

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.

Dept., of ECE, GPCET, Kurnool

34

P ART B: Output cha ract eristi cs:

1 . Co n n e ct t he circu it a s pe r t h e circu it d ia gra m sho wn in f ig (2 ) .


2 . S e t I B = 10 A b y a d ju st in g V B B .
3 . V a ry t h e sup p ly vo lt a ge V C C an d n o te t h e rea d in gs of I C and V C E .
4 . Re p e at t he ab o ve p ro ce du re f o r I B = 2 0 A .
5 . P lo t t he ou t pu t cha ra ct e rist ics V C E vs I C for constant val ues of I B .

Dept., of ECE, GPCET, Kurnool

35

Model graph:
Input ch aract eri stics:

Output c harac te ristics:

Dept., of ECE, GPCET, Kurnool

36

Result:
T he I np u t a nd O ut p u t ch a ra cte rist ics of CE co nf igu rat io n of a give n
t ra n sist o r a re p lo tte d .

Precautions:
1. Dont short circuit the output terminal
2. Dont give the voltage to the circuit beyond the prescribed range
3. Carefully vary the power supply
4. Carefully connect the transistor terminals
VIVA QUESTIONS:
1. Expand Transistor?
2. Draw the symbols of PNP and NPN transistors.
3. What is the arrow head in the symbol of transistor represents.
4. List some advantages of transistor.
5. Define transistor in terms of size and doping concentration.
6. What is bipolar in bipolar junction transistor (BJT).
7. Name four regions where transistor is to be operated.
8. How transistor acts like a switch.
9. How transistor acts like an amplifier.
10. Define early effect (or) Base-width modulation.
11. Define Punch through (or) reach through.

Dept., of ECE, GPCET, Kurnool

37

Circuit diagram :

Fi g ( 1 )

Tabular column:
Drain (Output) characteristics:
S.No.

VGS = 0 V
V D S (V)
I D (mA)

VGS = 1V
V D S (V)
I D (mA)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.

Dept., of ECE, GPCET, Kurnool

38

Exp no:

Date:

FET Characteristics (CS Configuration)


Aim:
A . T o p lo t Dra in (O u tp u t ) cha ra ct e rist ics of F ie ld Ef f e ct T ra n sistor
co n ne ct e d in Comm o n S o u rce co nf igu ra t io n a nd t o f in d Dra in
re sist a n ce ( r d ).
B. To

p lo t

T ra n sf e r

co n ne ct e d

in

ch a ra cte rist ics

Co mm on

S ou rce

of

F ie ld

Ef f e ct

co nf igu ra t io n

a nd

T ra n sistor
to

f ind

T ra n sco n du ct an ce ( g m ) a n d A mp lif icat io n f a ct o r ( ).

Apparatus:
1 . Re gu la t e d P o we r su p p ly
0 30 V
2 . FE T
B FW 11

3 . Re sist a n ce
22K

1 K

4 . V o lt me t e r s
(0 20 ) V

(0 30 ) V

5 . A mm e te r
(0 20 ) mA

6 . B re a d B o a rd

7 . Co n n e ct in g wire s

1
1
1
1
1
1
1

No
No
No
No
No
No
No

Procedure :
P ART - A: Dr ain ( Output) charact eristics:
1 . Co n n e ct t he circu it a s pe r t h e circu it d i a gra m sho wn in Fig (1 ).
2 . S e t V G S = 0 V b y a d ju st in g V G G . V a ry t h e su p p ly vo lt a ge V D D a n d
n o t e t he re ad in gs of I D an d V D S .
3 . Re p e at t he se co n d st e p f o r V G S = 1V .
4 . P lo t t h e ou t pu t cha ra ct e rist ics V D S vs I D f o r co n sta n t V a lu e s of
V G S = 0V an d 1 V.
5 . Fin d Dra in R e sist an ce , rd VDS VGS cons tan t .
I D

Dept., of ECE, GPCET, Kurnool

39

Transfer characteristics:
S.No

V D S = 2V
V G S (V )

I D (m A )

V D S = 4V
V G S (V )

I D (m A )

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.

Dept., of ECE, GPCET, Kurnool

40

P ART -B: Transfer characteristics:


1 . Co n n e ct t he circu it a s pe r t h e circu it d ia gra m sho wn in Fig ( 1 )
2 . S e t V D S = 2 V b y a d ju st in g V D D . V a ry t h e in p ut vo lt a ge V G G a nd
n o t e t he re ad in gs of I D a n d V G S .
3 . Re p e at t he se co n d st e p f o r V D S = 4V .
4 . P lo t t h e t ran sf e r ch a ra ct e rist ic s V G S vs I D f o r co n sta n t va lu e s of
V D S = 2 V a nd 4V .
6 . Fin d t he T ra n sc o nd u ct an ce , g m I D VDS cons tan t and
VGS
Amplification Factor,

Dept., of ECE, GPCET, Kurnool

VDS
VGS

I D cons tan t

41

Model graphs:
Output (or ) drai n chara cteris tics

Dept., of ECE, GPCET, Kurnool

Tr ansfer characteristic s

42

Result:
Dra in (O u t p ut ) a nd T ran sf e r cha ra ct e rist ics of F ie ld Ef f e ct T ran sist o r
Co n n e ct e d in Comm o n S ou rce conf igu ra t io n a re p lo t t ed a n d f ou n d
T ra n s Co n du ct an ce , g m =
Dra in Re sist a n ce ,
rd =
A m p lif icat io n Fa cto r, =

Precautions:
1.
2.
3.
4.

Dont short circuit the output terminal


Dont give the voltage to the circuit beyond the prescribed range
Carefully vary the power supply
Carefully connect the FET terminals

V I V A Q UE S TI O NS :
1.
2.
3.
4.
5.
6.
7.
8.

Dif f e ren t ia te B JT an d FET .


Na m e t h e cla ssif ica t io n of FET s
Dra w t h e sym b o ls of p -cha n ne l an d n -ch a n ne l FET s.
Ho w FE T a ct s like a V V R (Vo lt a ge Varia b le Re sist o r).
De f in e p in ch -of f vo lt a ge .
De f in e Sh o ckle ys e qu a t io n .
E xp a n d MO S FET.
Dif f e ren t ia te Dep let io n an d E n ha n cem e nt MO S FET s.

Dept., of ECE, GPCET, Kurnool

43

CIRCUIT DIAGRAM:

Tabular Column:
S.No

IG = 0
VAK(V)
IAK(mA)

IG = 5mA
VAK(V)
IAK(mA)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.

Dept., of ECE, GPCET, Kurnool

44

Exp no:

Date:

SCR Characteristics
Ai m : To plot the volt-ampere characteristics of Silicon Controlled Rectifier (SCR).
Apparatus:
1.
2.
3.
4.
5.
6.
7.

Regulated Power Supply (0-30) V


DC Ammeter
(0-200)mA
DC Voltmeter (0-20)V
SCR
TYN612N
Resistors
20K, 10K
Bread Board
Connecting Wires

1 No
2 No
1No
1 No
1 No
1 No

Procedure:
1. Connect the circuit as shown in the figure.
2. Keep the gate open IG = 0 mA and increase RPS starting from 0V until the
current IAK begins to rise and the voltage VAK suddenly drops to a low value.
3. Note the readings of IAK and VAK just before and immediately after the firing
of the SCR.
4. Repeat the steps 2 and 3 for values of IG = 5mA.
5. Tabulate the readings in the table.
6. Draw the graph between IAK and VAK taking VAK on x-axis and IAK on y-axis.

RESULT:
Volt-ampere characteristics of Silicon Controlled Rectifier (SCR) are plotted.

Viva Questions:
1.
2.
3.
4.
5.
6.
7.

Draw the symbol of SCR?


What are the applications of SCR?
What is holding current?
What is Latch current?
How many numbers of junctions are involved in SCR?
What is the function of gate in SCR?
When gate is open, what happens when anode voltage is increased?

Dept., of ECE, GPCET, Kurnool

45

CIRCUIT DIAGRAM:

Fig (1)
Tabular Column:
S.No

VBB = 5V
V B E (V )

I E (m A )

V B B = 1 0V
V B E (V )

I E (m A )

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.

Dept., of ECE, GPCET, Kurnool

46

Exp no:

Date:

UJT Characteristics
Aim:
To plot the volt-ampere characteristics of Uni Junction Transistor (UJT).
Apparatus:
1 . Re gu la t e d P o we r su p p ly
0 30 V
2 . UJT
2 N2 6 46

3 . Re sist a n ce
1K

4 . V o lt me t e rs
(0 20 ) V

5 . A mm e te r
(0 20 ) mA

6 . B re a d B o a rd

7 . Co n n e ct in g wire s

1
1
2
1
1

No
No
No
No
No

Procedure:
1 . Co n n e ct t he circu it a s pe r t h e circu it d ia gra m sho wn in Fig (1 ).
2 . S e t V B B = 5 V b y a d ju st in g RP S . V a ry t h e su p p ly vo lt a ge V E E a n d
n o t e t he re ad in gs of I E an d V B E .
3 . Re p e at t he se co n d st e p f o r V B B = 10 V.
4 . P lo t t he vo lt -a m pere ch a ra cte rist ics f o r V B E vs I E t a kin g V B E o n ya xis a n d I E on x-a xis f o r co n sta n t V a lu e s of V B B = 5 V and 1 0V .

Dept., of ECE, GPCET, Kurnool

47

Model Graph:

Dept., of ECE, GPCET, Kurnool

48

RESULT:
Volt-ampere characteristics of Uni Junction Transistor (UJT) are plotted.

Viva Questions:
1. Draw the symbol of UJT.
2. Differentiate UJT, BJT and FET.
3. Define intrinsic standoff ratio.
4. Name some applications of UJT.

Dept., of ECE, GPCET, Kurnool

49

CIRCUIT DIAGRAM FOR SELF BIAS CIRCUIT:

DESIGN PROCEDURE:
S = 25, Vcc = 12 V, Rc = 4.7K, VBE = 0.7V, RE = 1K
Find hfe () of the transistor
RB = R1R2 / (R1+R2)
S = (1+) / (1+RE / (RE + RB))
VB = VCCR2 / (R1 +R2)
VB = IBRB+ VBE + (1+) IB RE
ICQ =

VCC = ICRC +VCEQ + (1+) IB RE


TABULAR COLUMN:

R1

R2

100K

10K

1K

10K

Dept., of ECE, GPCET, Kurnool

VB (V)

IB (A)

ICQ (mA)

VCEQ

OUTPUT
(Without & With
Distortion)

50

Exp no:

Date:

TRANSISTOR BIASING
Aim:
Design a Self-bias circuit for the given specifications. Find the quiescent point (Operating
Point) values of ICq and VCEq from the experiment and to find the maximum signal handling
capability of the Amplifier.
APPARATUS:
S.No

Name

1
2
3

Dual Regulated D.C Power supply


Transistor
Capacitors

4
5
6
7

Multimeter
Function Generator
Bread Board and connecting wires
CRO

Range/Value

030 Volts
BC107
50f
10f
(0 1MHz)
20MHz

Quantity

1
1
2
1
1
1
1 Set
1

PROCEDURE:
1. Connect the circuit as per the circuit diagram. Apply Vcc of 12 Volts DC.
2. Apply 1V, 1 KHz signal from the Signal Generator to the input of the circuit and
observe the ouput on CRO for given values of resistors (R 1 & R2).
RESULT:
Self-bias circuit is designed for the given specifications.

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start
3. All the contacts must be intact

Viva Questions:
1.
2.
3.
4.

Define Biasing.
What is the need of biasing?
What are different types of biasing?
Define Stability factor.

Dept., of ECE, GPCET, Kurnool

51

FRONT PANEL OF CRO

Dept., of ECE, GPCET, Kurnool

52

Exp no:

Date:

CRO Operation and its Measurements


Aim:
To observe front panel control knobs and to find amplitude, time period and frequency
for given waveforms.

APPARATUS:
CRO
Function generator
Probes

PROCEDURE:
1. Understand the significance of each and every knob on the CRO.
2. From the given function generator feed in a sinusoidal wave and adjust the time

base knob and the amplitude knob to observe the waveform as a function of time.
3. Measure the time period and amplitude (peak to peak) of the signal. Find the

frequency and verify if the same frequency is given from the function generator.
4. Observe two waveforms simultaneously on the two channels of a CRO.
5. Repeat the above steps for pulse and triangular waveforms.
6. Report the readings and the waveforms taken.

Dept., of ECE, GPCET, Kurnool

53

CALCULATIONS:
Amplitude, A = no. of vertical divisions x Volts/div
Time period, T = no. of horizontal divisions x Time/div
Frequency, F = (1/T) Hz

Dept., of ECE, GPCET, Kurnool

54

RESULT:
Front panel control knobs of CRO are studied and observed and found amplitude, time
period and frequency for given waveforms.

VIVA Questions:
1.
2.
3.
4.

How do you measure frequency using the CRO?


Can you measure signal phase using the CRO?
How many channels are there in a CRO?
Can you measure DC voltage using a CRO?

Dept., of ECE, GPCET, Kurnool

55

Circuit Diagram:

Fig (1)

Tabular Column:
Input ac Voltage, Vi =
S.NO

Frequ

Output

Voltage

Gain (dB)

ency

Voltage

Gain

20

(Hz)

V0

(AV ) = V0/VI

log10|AV|

S.NO

Freque

Output

Voltage

Gain (dB)

ncy

Voltage

Gain

20

(Hz)

(V0)(mV)

(AV ) = V0/VI

log10|AV|

1.

50

11.

30K

2.

100

12.

50K

3.

300

13.

80K

4.

500

14.

100K

5.

800

15.

200K

6.

1K

16.

500K

7.

3K

17.

800K

8.

5K

18.

1M

9.

8K

19.

3M

10.

10K

20.

5M

Dept., of ECE, GPCET, Kurnool

56

Exp no:

Date:

BJT - CE Amplifier
Aim:
1. To plot the frequency response of a Common Emitter Amplifier and to find the
bandwidth.
2. To find the voltage gain, input and output resistance from frequency response
curve.

Apparatus:
1.
2.
3.
4.
5.

Regulated Power supply


CRO
Function Generator
Transistor
BC107
Resistors
1k
10k
100k
4.7k
6. Capacitors
10 F
100 F
7. Pot Resistance
8. Bread board
9. Probes
10. Connecting wires

(0-30V), 1A

1 No

1 No

1 No

2 No

2 No

1 No

1 No

1 No

1 No

1 No

1 No

Procedure:
Frequency Response:
1. Connect the circuit as per the circuit diagram shown in fig (1).
2. Set an ac signal of peak to peak voltage Vs = 20 mv in function generator and
apply it to circuit as input.
3. Note down the input voltage Vi in CRO keeping probes after Rs resistance.
4. Now vary the input frequency from 50 Hz to 1 MHz and note down the
amplitude of output ac signal of the amplifier using CRO.
5. Draw the frequency response curve taking Frequency on X-axis and Gain in
dB on Y-axis and calculate the bandwidth from the graph by drawing a
horizontal line at -3dB from maximum value of Av.
Input Resistance:
1. Connect the pot resistance in series across the input terminals and keep it at
zero resistance positon as shown in the fig (2).
2. Set input ac voltage at any constant value in mid band region and measure
the input voltage in CRO called Vimax.
3. Vary the pot resistance at the input until Vimax becomes half of maximum input
voltage.
4. Disconnect the pot resistance and measure the resistance which is input
resistance of amplifier.

Dept., of ECE, GPCET, Kurnool

57

Input Resistance circuit diagram:

Fig (2)
Output Resistance circuit diagram:

Fig (3)

Frequency Response:

Calculations:
Voltage gain (Av) = Vo/Vi

Input resistance (Ri) =


Band width (BW) = f2 f1

Output Resistance R0 =

Dept., of ECE, GPCET, Kurnool

58

Output Resistance:
1. Connect the pot resistance across the output terminals shown in fig (3) and
keep it at zero resistance positon.
2. Set input ac voltage at any constant value in mid band region and measure
the output voltage in CRO called Vomax.
3. Vary the pot resistance at the output until V0max becomes half of maximum
output voltage.
4. Disconnect the pot resistance and measure the resistance which is output
resistance of amplifier.

Precautions:
1.
2.
3.

Avoid loose connections


Carefully note the readings from CRO without parallax error.
Carefully connect the transistor terminals.

Result:
Frequency Response of Common Emitter Amplifier is plotted and found
Voltage gain
AV =
Input resistance
Ri =
Output resistance Ro =
Bandwidth
BW =
VIVA QUESTIONS:
1. What is the phase difference between input and output waveforms of CE
amplifier?
2. What type of biasing is used in the given circuit?
3. If the given transistor is replaced by P-N-P Can we get the output or not?
4. What is the effect of emitter bypass capacitor on frequency response?
5. What is the effect of coupling capacitor?
6. What is the region of transistor so that it operates as an amplifier?
7. Draw the h-parameter model of CE amplifier.

Dept., of ECE, GPCET, Kurnool

59

Circuit Diagram:

Fig (1)

Tabular Column:
Input ac voltage, Vi =
S.NO

Frequ

Output

Voltage

Gain (dB)

ency

Voltage

Gain

20

(Hz)

V0 (mV)

(AV ) = V0/VI

log10|AV|

S.NO

Freque

Output

Voltage

Gain (dB)

ncy

Voltage

Gain

20

(Hz)

(V0)(mV)

(AV ) = V0/VI

log10|AV|

1.

50

11.

30K

2.

100

12.

50K

3.

300

13.

80K

4.

500

14.

100K

5.

800

15.

200K

6.

1K

16.

500K

7.

3K

17.

800K

8.

5K

18.

1M

9.

8K

19.

3M

10.

10K

20.

5M

Dept., of ECE, GPCET, Kurnool

60

Exp no:

Date:

EMITTER FOLLOWER-CC Amplifier


Aim :
1. To plot the frequency response of a Common Collector (CC) Amplifier.
2. To find the input and output resistance of CC amplifier using frequency
response curve.

Apparatus:
1.
2.
3.
4.
5.

Regulated Power supply


CRO
Function Generator
Transistor
BC107
Resistors
1k
10k
100k
6. Capacitors
10 F
7. Pot Resistance
8. Bread board
9. Probes
10. Connecting wires
Procedure :

(0-30V)

1 No

1 No

1 No

2 No

2 No

1 No

2 No

1 No

1 No

Frequency Response:
1. Connect the circuit as per the circuit diagram shown in fig (1).
2. Set an ac signal of peak to peak voltage Vs = 20 mv in function generator and
apply it to circuit as input.
3. Note down the input voltage Vi in CRO keeping probes after Rs resistance.
4. Now vary the input frequency from 50 Hz to 1 MHz and note down the
amplitude of output ac signal of the amplifier using CRO.
5. Draw the frequency response curve taking Frequency on X-axis and Gain in
dB on Y-axis.
Input Resistance:
1. Connect the pot resistance in series across the input terminals and keep it at
zero resistance positon as shown in the fig (2).
2. Set input ac voltage at any constant value in mid band region and measure
the input voltage in CRO called Vimax.
3. Vary the pot resistance at the input until Vimax becomes half of maximum input
voltage.
4. Disconnect the pot resistance and measure the resistance which is input
resistance of amplifier.

Dept., of ECE, GPCET, Kurnool

61

Input Resistance circuit diagram:

Fig (2)
Output Resistance circuit diagram:

Fig (3)

Frequenc y response:

Calculations:

Input resistance, Ri =

Output Resistance, R0 =

Dept., of ECE, GPCET, Kurnool

62

Output Resistance:
1. Connect the pot resistance across the output terminals shown in fig (3) and
keep it at zero resistance positon.
2. Set input ac voltage at any constant value in mid band region and measure
the output voltage in CRO called Vomax.
3. Vary the pot resistance at the output until V0max becomes half of maximum
output voltage.
4. Disconnect the pot resistance and measure the resistance which is output
resistance of amplifier.

Precautions:
1. Avoid loose connections
2. Carefully note the readings from CRO without parallax error.
3. Carefully connect the transistor terminals

Result:
Frequency Response of Common Emitter Amplifier is plotted and found
Input resistance
Ri =
Output resistance Ro =

Viva Questions:
1.
2.
3.
4.
5.
6.
7.

What is the other name of cc amplifier


Why it is called emitter follower
What is efficeincy of CC amplifier
What is the current gain of CC amplifier
What is the voltage gain of CC amplifier
What is the input resistance of CC amplifier
What is the out put resistance of CC amplifier

Dept., of ECE, GPCET, Kurnool

63

CIRCUIT DIAGRAM:

Fig (1)

TABULAR COLUMN:
Input ac voltage, Vi =
S.NO

Frequ

Output

Voltage

Gain (dB)

ency

Voltage

Gain

20

(Hz)

V0 (V)

(AV ) = V0/VI

log10|AV|

S.NO

Freque

Output

Voltage

Gain (dB)

ncy

Voltage

Gain

20

(Hz)

(V0)(mV)

(AV ) = V0/VI

log10|AV|

1.

50

11.

30K

2.

100

12.

50K

3.

300

13.

80K

4.

500

14.

100K

5.

800

15.

200K

6.

1K

16.

500K

7.

3K

17.

800K

8.

5K

18.

1M

9.

8K

19.

3M

10.

10K

20.

5M

Dept., of ECE, GPCET, Kurnool

64

Exp no:

Date:

FET-CS Amplifier
Aim :
1. To plot the frequency response of a Common Source (CS) Amplifier and to
find the bandwidth.
2. To find the input and output resistance of CS amplifier from frequency
response curve.

Apparatus:
1.
2.
3.
4.
5.

Regulated Power supply


CRO
Function Generator
Transistor
BFW11
Resistors
1M
6.8k
6. Capacitors
10 F
100 F
7. Pot Resistance
8. Bread board
9. Probes
10. Connecting wires
Procedure :

(0-30V)

1 No

1 No

1 No

1 No

2 No

2 No

1 No

1 No

1 No

Frequency Response:
1. Connect the circuit as per the circuit diagram shown in fig (1).
2. Set an ac signal of peak to peak voltage Vs = 20 mv in function generator and
apply it to circuit as input.
3. Note down the input voltage Vi in CRO keeping probes after Rs resistance.
4. Now vary the input frequency from 50 Hz to 1 MHz and note down the
amplitude of output ac signal of the amplifier using CRO.
5. Draw the frequency response curve taking Frequency on X-axis and Gain in
dB on Y-axis on a semilog graph and calculate the bandwidth from the graph
by drawing a horizontal line at -3dB from maximum value of Av.
Input Resistance:
1. Connect the pot resistance in series across the input terminals and keep it at
zero resistance positon as shown in the fig (2).
2. Set input ac voltage at any constant value in mid band region and measure
the input voltage in CRO called Vimax.
3. Vary the pot resistance at the input until Vimax becomes half of maximum input
voltage.
4. Disconnect the pot resistance and measure the resistance which is input
resistance of amplifier.

Dept., of ECE, GPCET, Kurnool

65

Input Resistance circuit diagram:

Fig (2)
Output Resistance circuit diagram:

Fig (3)

Frequency Response:

Calculations:
Voltage gain (Av) =Vo/Vi =
Input resistance (Ri) =
Band width (BW) = f2 f1 =
Output Resistance R0 =

Dept., of ECE, GPCET, Kurnool

66

Output Resistance:
1. Connect the pot resistance across the output terminals shown in fig (3) and
keep it at zero resistance positon.
2. Set input ac voltage at any constant value in mid band region and measure
the output voltage in CRO called Vomax.
3. Vary the pot resistance at the output until V0max becomes half of maximum
output voltage.
4. Disconnect the pot resistance and measure the resistance which is output
resistance of amplifier.

Precautions:
1. Avoid loose connections
2. Carefully note the readings from CRO without parallax error.
3. Carefully connect the transistor terminals

Result:
Frequency Response of Common Source Amplifier is plotted and found
Voltage gain (Av) =
Input resistance (Ri) =
Band width (BW) =
Output Resistance R0 =
Viva Questions:
1.
2.
3.
4.

What are advantages of CS configuration?


What are the applications of CS amplifier?
Compare BJT and JFET.
Why there is 1800 phase shift in CS amplifier.

Dept., of ECE, GPCET, Kurnool

67

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