Simulation Modelling Practice and Theory 14 (2006) 989999

www.elsevier.com/locate/simpat

Inter-line dynamic voltage restorer control

using a novel optimum energy consumption strategy
M.R. Banaei
a

a,*

, S.H. Hosseini b, G.B. Gharehpetian

Electrical Engineering Department, Faculty of Engineering, Azarbaijan University of Tarbiat Moallem, Tabriz, Iran
b
Center of Excellence for Mechatronics, University of Tabriz, Tabriz, Iran
c
Electrical Engineering Department, Amirkabir University of Technology, Tehran, Iran
Received 18 August 2004; received in revised form 30 January 2006; accepted 14 February 2006
Available online 24 July 2006

Abstract
To restore the load voltage, Dynamic Voltage Restorer (DVR), which is installed between the supply and a sensitive
load, should inject voltage and active power from DVR to the distribution system during voltage sag. Due to the energy
storage capacity limitation of DC link, it is necessary to minimize energy injection from DVR.
The techniques of the supply voltage sag compensation in a distribution feeder are reviewed in this paper. Then a new
device which is named Inter-line Dynamic Voltage Restorer (IDVR) is discussed. This device consists of two conventional
DVRs which are installed in two dierent distribution feeders and the DC link capacitor. DVR which is installed in LV
feeder operates in voltage sag compensation mode. A novel control technique minimizes the energy ow from DC link
capacitor to this feeder. The DVR, which is installed in MV feeder, controls the voltage of DC link capacitor. The proposed device and its new control strategy have been modeled and simulated by PSCAD/EMTDC. The results verify
the eectiveness of IDVR and the suggested control method.
2006 Elsevier B.V. All rights reserved.
Keywords: Power quality; Dynamic voltage restorer; Control strategies; Active power minimization

1. Introduction
One of the most important power quality issues is voltage sag because the increasing usage of voltage sensitivity devices has made industrials processes more susceptible to supply voltage sags [1]. Voltage sag may
cause tripping and shutdown of sensitive and industrial equipments and miss-operation of ASD (Adjustable
Speed Drive) systems. Voltage sags of down to 70% are much more common than complete outages [2].
Dynamic voltage restorer (DVR) with energy storage can be used to correct the voltage sags [36]. A DVR
is basically a controlled voltage source installed between the supply and a critical and sensitive load. It injects
a voltage to the distribution system in order to compensate any disturbance aecting the load voltage. The
compensation capacity of a particular DVR depends on the maximum voltage injection ability and the real
*

Corresponding author. Tel.: +98 914 3134864; fax: +98 411 3300819.
E-mail addresses: [email protected], [email protected] (M.R. Banaei).

1569-190X/$ - see front matter 2006 Elsevier B.V. All rights reserved.
doi:10.1016/j.simpat.2006.06.001

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Fig. 1. (a) Power circuit of DVR in distribution system and (b) three phase four-wire DVR.

power, which can be supplied by the DVR because when DVR restorers voltage disturbances, active power
should be injected from DVR to the distribution system. DVR could maintain load voltage unchanged during
any kind of faults, if the capability of energy storage of DVR were innite [3]. Energy storage devices, such as
batteries or Super-conducting Magnetic Energy Storage Systems (SMES) are required to provide this active
power. Considering the energy limitations of these devices, it is necessary to minimize energy injection.
Power circuit of a DVR in a distribution system is shown in Fig. 1(a). The main function of a DVR is the
protection of sensitive loads from voltage sags coming from network. Therefore, the DVR is located on
approach of sensitive loads. If a fault occurs on other feeders, DVR inserts series voltage, Vdvr and compensates load voltage to pre fault value. Distribution systems commonly use a deltastar or a starstar transformer. If deltastar transformer is used in distribution system, zero-sequence voltages will not propagate
through the transformer when earth faults occur on the higher voltage level. Therefore, restoration of positive
sequence and compensation of negative sequence voltage are necessary. As shown in Fig. 1(b) the main elements of the three-phase four-wire DVR are the energy storage system, the voltage source converter, the
LC lter and the coupling transformer. The AC side of converter is connected to the line through a LC lter.
Due to switching, the high order harmonics of converter must be removed by small high pass lters (represented by Ls, Cs in Fig. 1(b)). The Sinusoidal Pulse Width Modulation (SPWM) technique is commonly used
to control forced-commutated converters. This method has been used in this paper too.
The inter-line dynamic voltage restorer (IDVR) is similar to the inter-line power ow controller (IPFC)
which should be used in transmission system. In this device several DVRs protecting sensitive loads in dierent
distribution systems share a common DC link energy storage [7]. In the simplest case, we consider two dierent
voltage distribution system protected by two DVR. Low voltage (6.6 kV) DVR operates in voltage sag mitigation mode and uses the suggested minimal energy control method of the paper to inject minimum active power
from DC link capacitor. In the same time medium voltage (20 kV) DVR keeps the voltage of DC link capacitor
constant in order to control the active power ow from distribution system to DC link capacitor.
2. Conventional control strategies for DVR
Several control techniques have been proposed for voltage sag compensation such as pre-sag method [5], inphase method [5] and minimal energy control [3].

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It must be said that the characteristics of the sensitive load determine the control method and the compensation strategy for the DVR. For example, the linear loads are not sensitive to phase angle jump and only
magnitude of voltage is dominant. The control techniques should consider the limitations of the DVR such
as the voltage injection capability (converter and transformer rating) and energy storage system limitation.
The second limitation means that the minimization of exchanged active power from common DC link to
the distribution system must be considered.
2.1. Pre-sag compensation strategy
The most of nonlinear loads such as thyristor-controlled loads, which use the supply voltage angle as a set
point, are sensitive to phase jumps. To overcome this problem, this technique compensates the dierence
between the sagged and the pre-sag voltages by restoring the instantaneous voltages to the same phase and
magnitude as the nominal pre-sag voltages. The disadvantage is the capacity limitation of energy storage
device for the injection of active power. Fig. 2 shows the phasor diagram of the pre-sag compensation strategy.
In this diagram the subscript i has been used for the ith phase. Vs1i, VL1i, Vdvr1i, IL1i, U1 and Bi represent the
left hand side voltage of DVR, the load voltage, the DVR injected voltage, the load current , load power angle
and the phase angle of ith phase, respectively.
When a fault occurs in other lines of Fig. 1(a), the left hand side voltage of DVR, Vs1i drops and the DVR
injects a series voltage, Vdvr1i through the transformer as
V dvr1i V L1i  V s1i ;

i 1; 2; 3

2.2. In-phase compensation

In this control strategy the restored voltage, Vdvr1i, is in-phase with the left hand side voltage of DVR, Vs1i,
regardless of the load current and the pre-fault voltage. The phasor diagram of this case is shown in Fig. 3.
Assuming VL1i,pu = 1, Vdvr1i,pu can be obtained from
V dvr1;pu 1  V s1;pu

The advantage of this method is injection of voltage with minimum magnitude. Therefore, for a given load
current and voltage sag the apparent power of DVR is minimized. The injected active power from energy storage to load for balanced sag is determined by the following equation:
P dvr1 3V L1  V s1  I L1  cosU1

Fig. 2. Phasor diagram of pre-sag control.

Fig. 3. Phasor diagram of in-phase control strategy.

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Fig. 4. Phasor diagram of minimal energy control.

2.3. Minimal energy strategy

For a given load and a balanced sag if voltage phasor, Vdvr1, is perpendicular to the load current, IL1, then
the active power injection is not required to restore the voltage by the DVR [3]. Fig. 4 shows the phasor diagram for this control strategy. In this diagram, d, a are the angle of VL1 and Vdvr1, respectively. In this case, a
can be obtained from
a

p
 U1 d
2

and the d is calculated as follows:

d U1  cos1

V L1 : cosU1
V s1

If the supply voltage parameters satisfy the following condition then the d can be determined.
V L1  cosU1 6 V s1

Inequality (6) means that the level of voltage sag is shallow sag. Therefore, injected active power of DVR is
equal to zero and the optimum a is obtained from (4). If inequality (6) is not satised then level of voltage sag
will be deep sag and active injected power is not equal to zero.
2.4. Suggested control strategy
As mentioned earlier, for shallow sag injected power, Pdvr is zero. However, for deep sag Pdvr1 is not zero.
Considering Fig. 4, for a given Vs1 and load current (e.g., cos U1 = 0.8 and IL1,pu = 1) increase of d (for
VL1,pu = 1) results increase of Vdvr1 (i.e., both magnitude and phase angle). As a result, the injected active
power, Pdvr1, can be easily determined for each Vs1 and known load. Considering these points the relationship
between, Pdvr1, and the injected voltage, Vdvr1 is determined and illustrated in Fig. 5(a). The parameter of this
curve is a balanced three-phase voltage sag, Vsag,pu, for a known load (e.g. here cos U1 = 0.8 and IL1,pu = 1). It
is obvious that for a 0.2 pu voltage sag the minimum value of Pdvr1 can be equal to zero. While, for the shallow
sag (less than 0.2 pu) minimum value of Pdvr1 is negative and for deep sags (more than 0.2 pu) minimum value
of Pdvr1 is positive.
In the in-phase compensation strategy the apparent power of DVR is small and injected active power of
DVR is considerable. But in the minimal energy strategy injected active power is minimum and the apparent
power of DVR is considerable.
In this paper, the proposed strategy is the minimization of the injected active power for dierent sags. For
example, for a DVR with a apparent power of 0.6 pu and constant load of IL1,pu = 1 and cos U1 = 0.8, the
injected voltage must be equal to 0.6 pu. Now using the Fig. 5(a), it is possible to determine the minimum
of Pdvr1 if Vdvr1=0.6 pu and Vsag,pu is between 0.05 pu and 0.3 pu. The result of calculations are given in
Fig. 5(b). In this gure, it is obvious that the negative value of minimum injected active power is assumed

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Fig. 5. (a) Injected active OWC1 vs. injected voltage and (b) minimum injected active power vs. voltage sag (apparent power of
DVRO.6 pu).

to be zero and the positive value of minimum injected active power can be approximated using a curve tting
as follows:
P dvr1;pu V sag;pu  0:2

It must be said that the negative Pdvr1 gives no economical advantage because DVR requires additional storage facility for power absorption [3]. As a result, this control strategy, as shown in Fig. 6, makes Pdvr1 zero
during shallow sag. But for deep sag and using Fig. 5(b), this method can control and minimize the Pdvr1
of DVR for a given apparent power. The voltage sags considered earlier were balance three-phase. For unbalance voltage sages, the three-phase instantaneous values of Vs1, i.e., (Vs1a,Vs1b and Vs1c) generate negative and
positive sequence voltages.
The synchronous dq reference frame algorithm is applied to extract the reference voltage for the DVR i.e.,
Vdvr1a,ref, Vdvr1b,ref and Vdvr1c,ref from the measured Vs1 (or Vs1a, Vs1b and Vs1c) as shown in Fig. 6.

Fig. 6. The suggested control strategy for DVR.

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For the unbalance Vs1, which contain negative sequence components, the transformation to the dq-axes
results in [8]
2
3
2
3 2
3 2
3 2
3
r V s1a
V s1d
V s1d;dc
V s1d;ac
V s1d
2 6
6
7
7 6
7 6
7 6
7
8
T 4 V s1b 5; 4
4
5
54
54
5
3
V s1q
V s1q
V s1q;dc
V s1q;ac
V s1c
where T is

T

cosxt cosxt  2p=3

cosxt 2p=3

sinxt  2p=3

sinxt 2p=3

sinxt


9

The fundamental frequency components of Vs1 are transformed into Vs1d,dc,Vs1q,dc (DC quantities) and negative sequence components are converted to AC components, Vs1d,ac and Vs1q,ac.
As shown in Fig. 6 the high pass lter (HPF) has been used to block DC quantities and the dierence
between the per unit magnitude of load voltage, VL1,pu has been calculated by (10) and the output of PI controller is added to the d-axis AC component of voltage.
q
V L1;pu V 2L1d V 2L1q =V bas1
10
In this equationVL1d and VL1q are dq components of load voltage and Vbas1 is base voltage.
In the case of full compensation of load voltage for a unbalance voltage sag, DVR injects DC component of
active power Pdvr1,dc which restores fundamental components of voltage sag and in the same time injects AC
component of active power, Pdvr1,ac which restores negative sequence components of voltage sag.
The DC component of active power, Pdvr1,dc can be calculated as follows:
P dvr1;dc V dvr1d;dc i1d V dvr1q;dc i1q

11

where Vdvr1d,dc and Vdvr1q,dc are

V dvr1d;dc V L1d  V s1d;dc

12

V dvr1q;dc V L1q  V s1q;dc

The per unit magnitude of fundamental components of voltage sags, Vs1,pu can be obtained by the following equation:
q
V s1;pu V 2s1d;dc V 2s1q;dc =V bas1
13
As shown in Fig. 6, the per unit magnitude of fundamental components of voltage sag, Vsag,pu, has been
applied to nonlinear function, shown in Fig. 5(b) and the output of nonlinear function is the reference DC
component of injected active power, Pdvr1,dc,ref.
The dierence between reference values, Pdvr1,dc,ref and the feedback value, Pdvr1,dc passes through the PI
controller and the output of the PI controller is added to the q axis AC component of Vs1.
Fig. 7 shows the inner loop controller of the gate pulse generator for this DVR.

Fig. 7. The gate pulses generator for DVR.

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3. Inter-line dynamic voltage restorer (IDVR)

The equivalent circuit on the left hand side of DVR shown in Fig. 1(a) can be presented by thevenin voltage
source, Vth1and thevenin impedance, Zth1, as shown in Fig. 8.
When a fault occurs in other lines, the left hand side voltage of DVR, i.e., Vs1 drops and the DVR injects a
series voltage, Vdvr1 through the transformer. The active power ow is from energy storage to the distribution
system.
In the general form inter-line dynamic voltage restorer uses several DVRs in dierent distribution feeders
and all DVRs have a common DC voltage link. An IDVR with two DVRs is shown in Fig. 9.
The voltages of feeder 1 and 2 are 6.6 kV and 20 kV, respectively. A voltage sag in feeder 1 may not be
sensed in feeder 2 and therefore they can be supposed as two independent distribution feeders [7]. In this case
the active power ow is from common DC link to one feeder and the other DVR which is in normal condition
injects active power from the other feeder to the common DC link.
Assume that the voltage sag is in the feeder 1 and to restore the voltage, the DVR1 must inject the active
power, Pdvr1. The other DVR, i.e. DVR2 must inject the active power, Pdvr2 from feeder 2 to the system. In
this case we have
P dvr2 P dvr1 P loss

14

where Ploss is the power losses of two converters. The load 2 (in feeder 2) is not sensitive to the voltage phase
angle. The control strategy of DVR2 is active power injection to the common DC link and in the same time,
load voltage magnitude compensation at VL2,pu = 1, as shown in Fig. 10.
In this gure Vs2, VL2, Vdvr2, IL2, U2 and c represent the left hand side voltage of DVR2, the load 2 voltage,
the DVR2 injected voltage, the load 2 current, load 2 power angle and power injected phase angle respectively.
The harmonics of common DC link voltage are neglected. As a result the harmonics of feeder 2 can be
neglected too.

Fig. 8. Equivalent circuit of power system.

Fig. 9. The simplest IDVR with two converter.

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Fig. 10. Phasor diagram of DVR2.

The DVR2 injected active power can be controlled by DC link voltage control at a constant value, i.e.
Vc = cte. As shown in Fig. 11, Pdvr2 can be controlled by comparing Vc and the reference DC link voltage Vcref
and applying voltage error to the PI controller.
The synchronous dq reference frame algorithm is applied to extract the reference voltage for the DVR2
i.e., (Vdvr2a,ref,Vdvr2b,ref and Vdvr2c,ref) from the measured Vl2 (or Vl2a, Vl2b and Vl2c) as shown in Fig. 11.
The dierence between the load 2 voltage magnitude, VL2,pu which can be calculated by (15) and the reference load voltage, VL2,pu,ref, which is normally 1pu, passes through the PI controller and the output of
the PI controller is added to the d-axis AC component of voltage.
q
V L2;pu V 2L2d V 2L2q =V bas2
15

Fig. 11. The IDVR with two converter.

Table 1
System parameters
Parameter

Value

Load 1 voltage
Load 1, 2 apparent power
Load 1, 2 power factor
Load 2 voltage
Base power
Common DC link voltage
Common DC link capacitor
Ls1, Ls2
Rs1, Rs2
Cs1, Cs2

6.6 kV
250 kV A
0.8
20 kV
250 kV A
20 kV
14,000 lF
5 mH
0.07 X
50 lF

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Fig. 12. (a) Left hand side voltage of DVR1, Vs1, (b) DVR1 injected voltage, Vdvrl, (c) Load 1 voltage, VL1, (d) Load 2 voltage, VL2, (e)
DC component of DVR1 injected active power Pdvrl, (f) common DC link voltage for balance deep sag (t = 0.1 till t = 0.2) and shallow sag
(t = 0.25 till t = 3.5).

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DVR2 injected active power is obtained from

P dvr2 3V s2 I L2 cosU2  c  3V L2 I L2 cosU2

16

The per unit value of DVR2 injected active power can be rewritten in the following form:
P dvr2;pu cosU2  c  cosU2

17

If the power factor and apparent power of both feeders were the same then from (14) and (17) c can be
obtained as follows:
c U2  cos1 P dvr1;pu P loss;pu cosU2 

18

Using (14) and (18) in case of cmax = U2 the maximum of DVR2 injected active power can be obtained from
P dvr2;pu; max 1  cosU2

19

4. Simulation results
To verify the eciency of suggested control strategy for the IDVR system shown in Fig. 9 simulations carried out by the PSCAD/EMTDC [9].
The system parameters are listed in Table 1.
It is assumed that the voltage magnitude of the load bus in feeder 1, 2 must be set at 1 pu during the voltage
sag conditions in feeder 1. The results of the most important simulations are presented in Fig. 12.
Left hand side voltage of DVR1, injected voltage of DVR1, load 1 voltage, load 2 voltage, injected active
power of DVR2 and common DC-link voltage have been shown in Fig. 12(a)(f), respectively. Considering
(7), (14) and (19), the maximum balanced voltage sag which can be mitigated by DVR1 is 0.36 pu in minimum
active power control mode.
Left hand side voltage of DVR1, injected voltage of DVR1, load 1 voltage, load 2 voltage, injected active
power of DVR1 and common DC-link voltage have been shown in Fig. 12(a)(f), respectively for balanced
three phase fault.
Fig. 12(a) shows that 0.3 pu deep voltage sag has occurred from t = 0.1 till t = 0.2 and 0.2 pu shallow sag
has occured from t = 0.25 till t = 0.35. In this case minimum component of DVR1 injected active power for
deep sag is 25 kW or 0.1 pu and for the shallow sag 0 kW, respectively.
These simulation results indicate that based on the suggested control strategy, DVR1 consumes zero active
power during shallow sag and minimizes active power injection during deep sag. DVR2 active power injection
is controlled by keeping constant the common DC link voltage with a good dynamic response and in the same
time the DVR1 injected voltage is equal or less than 0.6 pu (according to Fig. 5(a)). The magnitude of loads
voltage in the both feeders is set to 1 pu.
5. Conclusion
In order to compensate voltage sag it is possible to use dynamic voltage restorer (DVR) in distribution system for a sensitive load. Due to the limit of energy storage capacity of DC link, it is necessary to minimize
energy injection from DVR. In this paper the control strategies for the compensation of the supply voltage
sag is reviewed presented. In addition, a new concept of restoration strategy is proposed to inject minimum
energy for unbalance sags. This control strategy has been applied to an inter-line dynamic voltage Restorer
(IDVR) which consists of two DVRs with a common DC link capacitor. Simulation results indicate that
the DVR1 consumes zero active power during shallow sag and minimizes the active power injection during
deep sag. In the same time the other DVR injects energy to common DC-link by keeping the voltage of common DC-link constant. The results verify the capability of proposed control strategy.
References
[1] S.S. Choi, B.H. Li, D.M. Vilathgamuwa, Design and analysis of the inverter-side lter used the dynamic voltage restorer, IEEE
Transactions on Power Delivery 17 (3) (2002).

M.R. Banaei et al. / Simulation Modelling Practice and Theory 14 (2006) 989999

999

[2] X. Lei, D. Retzmann, M. Weinhold, Improvement of power quality with advanced power electronic equipment, in: Electric Utility
Deregulation and Restructuring and Power Technologies, 47 April, IEEE (2000).
[3] Il-Yop Chung, Dong-Jun Won, Sang-Young Park, Seung-Il Moon, Jong-Keun Park, The DC link energy control method in dynamic
voltage restorer system, Electrical Power and Energy Systems 25 (2003) 525531.
[4] Hongfa Ding, Shuangyan Shu, Xianzhong Duan, Gao Jun, A novel dynamic voltage restorer and its unbalanced control strategy based
on space vector PWM, Electrical Power and Energy Systems 24 (2002) 693699.
[5] V.K. Ramachandaramurthy, C. Fitzer, A. Arulampalam, C. Zhan, M. Barnes, N. Jenkins, Control of a battery supported dynamic
voltage restorer, IEE Proc.-Gener. Transm. Distrib 149 (5) (2002).
[6] Changjiang Zhan, Atputharajah Arulampalam, Nicholas Jenkins, Four-wire dynamic voltage restorer based on a three-dimensional
voltage space vector PWM algorithm, IEEE Transactions on Power Electronics 18 (4) (2003).
[7] H.M. Wijekoon, D.M. Vilathgamuwa, S.S. Choi, Interline dynamic voltage restorer: an economical way to improve interline power
quality, IEE Proceedings C Generation Transmission and Distribution 150 (5) (2003).
[8] Jianjun Gu, Dianguo Xu, Hankui Liu, Maozhong Gong, Unied power quality conditioner (UPQC): the principle, control and
application, in: Power Conversion Conference, PCC-Osaka, IEEE 1 (2002) 8085.
[9] Manitoba HVDC Research Center, PSCAD/EMTDC: Electromagnetic transients program including dc systems, 1994.