X T P

1
Pin A1 Corner
Pin A1 is identified by lower left corner
with respect to the text.
XT = Data Code
L M 7 8 L 0 5 , L M 7 8 L 0 9 , L M 7 8 L 1 2 , L M 7 8 L 1 5 , L M 7 8 L 6 2 , L M 7 8 L 8 2
www.ti.com SNVS754J J ANUARY 2000 REVISED DECEMBER 2013
L M 7 8 L X X S e r ie s 3 - T e r min a l P os itiv e R e g u l a tor s
Che ck for S a mpl e s : L M 7 8 L 0 5 , L M 7 8 L 0 9 , L M 7 8 L 1 2 , L M 7 8 L 1 5 , L M 7 8 L 6 2 , L M 7 8 L 8 2
1 FEAT UR ES DES CR IP T ION
The LM78LXX series of three terminal positive
2 L M 7 8 L 0 5 in DS BGA P a cka g e
regulators is available with several fixed output
Ou tpu t Vol ta g e T ol e r a n ce s of 5 % Ov e r the
voltages making them useful in a wide range of
T e mpe r a tu r e R a n g e
applications. When used as a zener diode/resistor
Ou tpu t Cu r r e n t of 1 0 0 mA combination replacement, the LM78LXX usually
results in an effective output impedance improvement
In te r n a l T he r ma l Ov e r l oa d P r ote ction
of two orders of magnitude, and lower quiescent
Ou tpu t T r a n s is tor S a fe Ar e a P r ote ction
current. These regulators can provide local on card
In te r n a l S hor t Cir cu it Cu r r e n t L imit
regulation, eliminating the distribution problems
associated with single point regulation. The voltages
Av a il a bl e in T O- 9 2 a n d S OIC- 8 L ow P r ofil e
available allow the LM78LXX to be used in logic
P a cka g e s
systems, instrumentation, HiFi, and other solid state
No Exte r n a l Compon e n ts
electronic equipment.
Ou tpu t Vol ta g e s of 5 .0 V, 6 .2 V, 8 .2 V, 9 .0 V, 1 2 V,
1 5 V
S e e AN- 1 1 1 2 (S NVA0 0 9 ) for DS BGA
Con s ide r a tion s
Con n e ction Dia g r a m
Fig u r e 1 . S OIC- 8 (D) Fig u r e 2 . 8 - Bu mp DS BGA
(T op Vie w, Na r r ow Body) (T op Vie w, Bu mp S ide Down )
. .
Fig u r e 3 . T O- 9 2 P a cka g e (L P ) Fig u r e 4. DS BGA M a r kin g Or ie n ta tion
(Bottom Vie w) (T op Vie w)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright 20002013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
L M 7 8 L 0 5 , L M 7 8 L 0 9 , L M 7 8 L 1 2 , L M 7 8 L 1 5 , L M 7 8 L 6 2 , L M 7 8 L 8 2
SNVS754J J ANUARY 2000 REVISED DECEMBER 2013 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DES CR IP T ION (CONT INUED)
The LM78LXX is available in the plastic TO-92 (LP) package, the SOIC-8 (D) package and a chip sized package
(8-Bump DSBGA) using TI's DSBGA package technology. With adequate heat sinking the regulator can deliver
100mA output current. Current limiting is included to limit the peak output current to a safe value. Safe area
protection for the output transistors is provided to limit internal power dissipation. If internal power dissipation
becomes too high for the heat sinking provided, the thermal shutdown circuit takes over preventing the IC from
overheating.
Abs ol u te M a ximu m R a tin g s
(1 ) (2 )
Power Dissipation
(3)
Internally Limited
Input Voltage 35V
Storage Temperature 65C to +150C
ESD Susceptibility
(4)
1kV
Operating J unction Temperature
LM78LxxACZ, TO-92 0C to 125C
LM78LxxACM, SOIC-8 0C to 125C
LM78LxxAIM, SOIC-8 -40C to 125C
LM78LxxIBPX, DSBGA 40C to 85C
LM78LxxITP, Thin DSBGA 40C to 85C
Soldering Information
Infrared or Convection (20 sec.) 235C
Wave Soldering (10 sec.) 260C (lead time)
(1) Absolute MaximumRatings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device outside of its stated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) Typical thermal resistance values for the packages are:
L P Package:
J C
=60 C/W, =
J A
=230 C/W
D Package:
J A
=180 C/W
DS BGA Package:
J A
=230.9C/W
(4) Human body model, 1.5 k in series with 100pF.
L M 7 8 L X X El e ctr ica l Cha r a cte r is tics L M 7 8 L 0 5 AC / L M 7 8 L 0 5 AI / L M 7 8 L 0 5 I
Limits in standard typeface are for T
J
=25C, Bol d type fa ce a ppl ie s ov e r the e n tir e ope r a tin g te mpe r a tu r e r a n g e of the
in dica te d pa cka g e . Limits are ensured by production testing or correlation techniques using standard Statistical Quality
Control (SQC) methods. Unless otherwise specified: I
O
=40mA, C
I
=0.33F, C
O
=0.1F.
Unless otherwise specified, V
IN
=10V
S ymbol P a r a me te r Con dition s M in T yp M a x Un its
V
O
Output Voltage 4.8 5 5.2
7V V
IN
20V
1mA I
O
40mA 4.7 5 5 .2 5
V
(1)
1mA I
O
70mA
4.7 5 5 .2 5
(1)
V
O
Line Regulation 7V V
IN
20V 18 75
8V V
IN
20V 10 54
mV
V
O
Load Regulation 1mA I
O
100mA 20 60
1mA I
O
40mA 5 30
(1) Power dissipation 0.75W.
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L M 7 8 L 0 5 , L M 7 8 L 0 9 , L M 7 8 L 1 2 , L M 7 8 L 1 5 , L M 7 8 L 6 2 , L M 7 8 L 8 2
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L M 7 8 L X X El e ctr ica l Cha r a cte r is tics L M 7 8 L 0 5 AC / L M 7 8 L 0 5 AI / L M 7 8 L 0 5 I (con tin u e d)
Limits in standard typeface are for T
J
=25C, Bol d type fa ce a ppl ie s ov e r the e n tir e ope r a tin g te mpe r a tu r e r a n g e of the
in dica te d pa cka g e . Limits are ensured by production testing or correlation techniques using standard Statistical Quality
Control (SQC) methods. Unless otherwise specified: I
O
=40mA, C
I
=0.33F, C
O
=0.1F.
Unless otherwise specified, V
IN
=10V
S ymbol P a r a me te r Con dition s M in T yp M a x Un its
I
Q
Quiescent Current 3 5
I
Q
Quiescent Current Change 8V V
IN
20V 1 .0 mA
1mA I
O
40mA 0 .1
V
n
Output Noise Voltage f =10 Hz to 100 kHz
(2)
40 V
V
IN
/V
OUT
Ripple Rejection f =120 Hz
47 62 dB
8V V
IN
16V
I
PK
Peak Output Current 140 mA
V
O
/T Average Output Voltage Tempco I
O
=5mA 0.65 mV/C
V
IN
(Min) MinimumValue of Input Voltage
6.7 7 V
Required to Maintain Line Regulation

J A
Thermal Resistance
230.9 C/W
(8-Bump micro SMD)
(2) Recommended minimumload capacitance of 0.01F to limit high frequency noise.
L M 7 8 L X X El e ctr ica l Cha r a cte r is tics L M 7 8 L 6 2 AC
Unless otherwise specified, V
IN
=12V
S ymbol P a r a me te r Con dition s M in T yp M a x Un its
V
O
Output Voltage 5.95 6.2 6.45
8.5V V
IN
20V
1mA I
O
40mA 5 .9 6 .5
V
(1)
1mA I
O
70mA
5 .9 6 .5
(1)
V
O
Line Regulation 8.5V V
IN
20V 65 175
9V V
IN
20V 55 125
mV
V
O
Load Regulation 1mA I
O
100mA 13 80
1mA I
O
40mA 6 40
I
Q
Quiescent Current 2 5.5
I
Q
Quiescent Current Change 8V V
IN
20V 1 .5 mA
1mA I
O
40mA 0 .1
V
n
Output Noise Voltage f =10 Hz to 100 kHz
50 V
(2)
V
IN
/V
OUT
Ripple Rejection f =120 Hz
40 46 dB
10V V
IN
20V
I
PK
Peak Output Current 140 mA
V
O
/T Average Output Voltage Tempco I
O
=5mA 0.75 mV/C
V
IN
(Min) MinimumValue of Input Voltage
7.9 V
Required to Maintain Line Regulation
(1) Power dissipation 0.75W.
(2) Recommended minimumload capacitance of 0.01F to limit high frequency noise.
Copyright 20002013, Texas Instruments Incorporated Submit Documentation Feedback 3
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SNVS754J J ANUARY 2000 REVISED DECEMBER 2013 www.ti.com
L M 7 8 L X X El e ctr ica l Cha r a cte r is tics L M 7 8 L 8 2 AC
Unless otherwise specified, V
IN
=14V
S ymbol P a r a me te r Con dition s M in T yp M a x Un its
V
O
Output Voltage 7.87 8.2 8.53
11V V
IN
23V
1mA I
O
40mA 7 .8 8 .6
V
(1)
1mA I
O
70mA
7 .8 8 .6
(1)
V
O
Line Regulation 11V V
IN
23V 80 175
12V V
IN
23V 70 125
mV
V
O
Load Regulation 1mA I
O
100mA 15 80
1mA I
O
40mA 8 40
I
Q
Quiescent Current 2 5.5
I
Q
Quiescent Current Change 12V V
IN
23V 1 .5 mA
1mA I
O
40mA 0 .1
V
n
Output Noise Voltage f =10 Hz to 100 kHz
60 V
(2)
V
IN
/V
OUT
Ripple Rejection f =120 Hz
39 45 dB
12V V
IN
22V
I
PK
Peak Output Current 140 mA
V
O
/T Average Output Voltage Tempco I
O
=5mA 0.8 mV/C
V
IN
(Min) MinimumValue of Input Voltage
9.9 V
Required to Maintain Line Regulation
(1) Power dissipation 0.75W.
(2) Recommended minimumload capacitance of 0.01F to limit high frequency noise.
L M 7 8 L X X El e ctr ica l Cha r a cte r is tics L M 7 8 L 0 9 AC / L M 7 8 L 0 9 I
Unless otherwise specified, V
IN
=15V
S ymbol P a r a me te r Con dition s M in T yp M a x Un its
V
O
Output Voltage 8.64 9.0 9.36
11.5V V
IN
24V
1mA I
O
40mA 8 .5 5 9 .45
V
(1)
1mA I
O
70mA
8 .5 5 9 .45
(1)
V
O
Line Regulation 11.5V V
IN
24V 100 200
13V V
IN
24V 90 150
mV
V
O
Load Regulation 1mA I
O
100mA 20 90
1mA I
O
40mA 10 45
I
Q
Quiescent Current 2 5.5
I
Q
Quiescent Current Change 11.5V V
IN
24V 1 .5 mA
1mA I
O
40mA 0 .1
V
n
Output Noise Voltage 70 V
Ripple Rejection f =120 Hz
V
IN
/V
OUT
38 44 dB
15V V
IN
25V
I
PK
Peak Output Current 140 mA
V
O
/T Average Output Voltage Tempco I
O
=5mA 0.9 mV/C
V
IN
(Min) MinimumValue of Input Voltage
10.7 V
Required to Maintain Line Regulation
(1) Power dissipation 0.75W.
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Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62 LM78L82
L M 7 8 L 0 5 , L M 7 8 L 0 9 , L M 7 8 L 1 2 , L M 7 8 L 1 5 , L M 7 8 L 6 2 , L M 7 8 L 8 2
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L M 7 8 L X X El e ctr ica l Cha r a cte r is tics L M 7 8 L 1 2 AC
Unless otherwise specified, V
IN
=19V
S ymbol P a r a me te r Con dition s M in T yp M a x Un its
V
O
Output Voltage 11.5 12 12.5
14.5V V
IN
27V
1mA I
O
40mA 1 1 .4 1 2 .6
V
(1)
1mA I
O
70mA
1 1 .4 1 2 .6
(1)
V
O
Line Regulation 14.5V V
IN
27V 30 180
16V V
IN
27V 20 110
mV
V
O
Load Regulation 1mA I
O
100mA 30 100
1mA I
O
40mA 10 50
I
Q
Quiescent Current 3 5
I
Q
Quiescent Current Change 16V V
IN
27V 1 mA
1mA I
O
40mA 0 .1
V
n
Output Noise Voltage 80 V
V
IN
/V
OUT
Ripple Rejection f =120 Hz
40 54 dB
15V V
IN
25
I
PK
Peak Output Current 140 mA
V
O
/T Average Output Voltage Tempco I
O
=5mA 1.0 mV/C
V
IN
(Min) MinimumValue of Input Voltage
13.7 14.5 V
Required to Maintain Line Regulation
(1) Power dissipation 0.75W.
L M 7 8 L X X El e ctr ica l Cha r a cte r is tics L M 7 8 L 1 5 AC
Unless otherwise specified, V
IN
=23V
S ymbol P a r a me te r Con dition s M in T yp M a x Un its
V
O
Output Voltage 14.4 15.0 15.6
17.5V V
IN
30V
1mA I
O
40mA 1 4.2 5 1 5 .7 5
V
(1)
1mA I
O
70mA
1 4.2 5 1 5 .7 5
(1)
V
O
Line Regulation 17.5V V
IN
30V 37 250
20V V
IN
30V 25 140
mV
V
O
Load Regulation 1mA I
O
100mA 35 150
1mA I
O
40mA 12 75
I
Q
Quiescent Current 3 5
I
Q
Quiescent Current Change 20V V
IN
30V 1 mA
1mA I
O
40mA 0 .1
V
n
Output Noise Voltage 90 V
V
IN
/V
OUT
Ripple Rejection f =120 Hz
37 51 dB
18.5V V
IN
28.5V
I
PK
Peak Output Current 140 mA
V
O
/T Average Output Voltage Tempco I
O
=5mA 1.3 mV/C
V
IN
(Min) MinimumValue of Input Voltage
16.7 17.5 V
Required to Maintain Line Regulation
(1) Power dissipation 0.75W.
Copyright 20002013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62 LM78L82
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SNVS754J J ANUARY 2000 REVISED DECEMBER 2013 www.ti.com
T ypica l P e r for ma n ce Cha r a cte r is tics
M a ximu m Av e r a g e P owe r Dis s ipa tion (L P P a cka g e ) P e a k Ou tpu t Cu r r e n t
Fig u r e 5 . Fig u r e 6 .
Dr opou t Vol ta g e R ippl e R e je ction
Fig u r e 7 . Fig u r e 8 .
Ou tpu t Impe da n ce Qu ie s ce n t Cu r r e n t
Fig u r e 9 . Fig u r e 1 0 .
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T ypica l P e r for ma n ce Cha r a cte r is tics (con tin u e d)
Qu ie s ce n t Cu r r e n t
Fig u r e 1 1 .
Copyright 20002013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62 LM78L82
L M 7 8 L 0 5 , L M 7 8 L 0 9 , L M 7 8 L 1 2 , L M 7 8 L 1 5 , L M 7 8 L 6 2 , L M 7 8 L 8 2
SNVS754J J ANUARY 2000 REVISED DECEMBER 2013 www.ti.com
EQUIVAL ENT CIR CUIT
Fig u r e 1 2 . L M 7 8 L X X
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L M 7 8 L 0 5 , L M 7 8 L 0 9 , L M 7 8 L 1 2 , L M 7 8 L 1 5 , L M 7 8 L 6 2 , L M 7 8 L 8 2
www.ti.com SNVS754J J ANUARY 2000 REVISED DECEMBER 2013
T ypica l Appl ica tion s
*Required if the regulator is located more than 3 fromthe power supply filter.
**See
(1)
in the electrical characteristics table.
Fig u r e 1 3 . Fixe d Ou tpu t R e g u l a tor
V
OUT
=5V +(5V/R1 +I
Q
) R2
5V/R1 >3 I
Q
, load regulation (L
r
) [(R1 +R2)/R1] (L
r
of LM78L05)
Fig u r e 1 4. Adju s ta bl e Ou tpu t R e g u l a tor
I
OUT
=(V
OUT
/R1) +I
Q
>I
Q
=1.5mA over line and load changes
Fig u r e 1 5 . Cu r r e n t R e g u l a tor
(1) Recommended minimumload capacitance of 0.01F to limit high frequency noise.
Copyright 20002013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62 LM78L82
L M 7 8 L 0 5 , L M 7 8 L 0 9 , L M 7 8 L 1 2 , L M 7 8 L 1 5 , L M 7 8 L 6 2 , L M 7 8 L 8 2
SNVS754J J ANUARY 2000 REVISED DECEMBER 2013 www.ti.com
*Solid tantalum.
**Heat sink Q1.
***Optional: Improves ripple rejection and transient response.
Load Regulation: 0.6%0 I
L
250mA pulsed with t
ON
=50ms.
Fig u r e 1 6 . 5 V, 5 0 0 mA R e g u l a tor with S hor t Cir cu it P r ote ction
*Solid tantalum.
Fig u r e 1 7 . 1 5 V, 1 0 0 mA Du a l P owe r S u ppl y
*Solid tantalum.
V
OUT
=V
G
+5V, R1 =(V
IN
/I
Q LM78L05
)
V
OUT
=5V (R2/R4) for (R2 +R3) =(R4 +R5)
A 0.5V output will correspond to (R2/R4) =0.1 (R3/R4) =0.9
Fig u r e 1 8 . Va r ia bl e Ou tpu t R e g u l a tor 0 .5 V- 1 8 V
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R EVIS ION HIS T OR Y
Cha n g e s fr om R e v is ion I (Apr il 2 0 1 3 ) to R e v is ion J P a g e
added the AI suffix ................................................................................................................................................................ 2
added the AI suffix ................................................................................................................................................................ 3
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PACKAGE OPTION ADDENDUM
www.ti.com 17-May-2014
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (C) Device Marking
(4/5)
Samples
LM78L05ACM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM78L
05ACM
LM78L05ACM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br)
CU SN Level-1-260C-UNLIM -40 to 85 LM78L
05ACM
LM78L05ACMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM78L
05ACM
LM78L05ACMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br)
SN | CU SN Level-1-260C-UNLIM -40 to 85 LM78L
05ACM
LM78L05ACZ/LFT1 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type LM78L
05ACZ
LM78L05ACZ/LFT3 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type LM78L
05ACZ
LM78L05ACZ/LFT4 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type LM78L
05ACZ
LM78L05ACZ/LFT7 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type LM78L
05ACZ
LM78L05ACZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br)
CU SN N / A for Pkg Type -40 to 85 LM78L
05ACZ
LM78L05AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br)
SN | CU SN Level-1-260C-UNLIM LM78L
05AM
LM78L05AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br)
SN | CU SN Level-1-260C-UNLIM LM78L
05AM
LM78L05ITP/NOPB ACTIVE DSBGA YPB 8 250 Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM P
03
LM78L05ITPX/NOPB ACTIVE DSBGA YPB 8 3000 Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM P
03
LM78L09ITPX/NOPB ACTIVE DSBGA YPB 8 3000 Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM P
02
LM78L12ACM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM78L
12ACM
LM78L12ACM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br)
CU SN Level-1-260C-UNLIM -40 to 85 LM78L
12ACM
LM78L12ACMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM78L
12ACM
PACKAGE OPTION ADDENDUM
www.ti.com 17-May-2014
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (C) Device Marking
(4/5)
Samples
LM78L12ACMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br)
SN | CU SN Level-1-260C-UNLIM -40 to 85 LM78L
12ACM
LM78L12ACZ/LFT3 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type LM78L
12ACZ
LM78L12ACZ/LFT4 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type LM78L
12ACZ
LM78L12ACZ/LFT7 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type LM78L
12ACZ
LM78L12ACZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type -40 to 85 LM78L
12ACZ
LM78L15ACM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM78L
15ACM
LM78L15ACM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br)
CU SN Level-1-260C-UNLIM -40 to 85 LM78L
15ACM
LM78L15ACMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM78L
15ACM
LM78L15ACMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br)
SN | CU SN Level-1-260C-UNLIM -40 to 85 LM78L
15ACM
LM78L15ACZ/LFT4 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type LM78L
15ACZ
LM78L15ACZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type -40 to 85 LM78L
15ACZ
LM78L62ACZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br)
SN | CU SN N / A for Pkg Type -40 to 85 LM78L
62ACZ

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PACKAGE OPTION ADDENDUM
www.ti.com 17-May-2014
Addendum-Page 3
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
LM78L05ACMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L05ACMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L05AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L05ITP/NOPB DSBGA YPB 8 250 178.0 8.4 1.5 1.5 0.66 4.0 8.0 Q1
LM78L05ITPX/NOPB DSBGA YPB 8 3000 178.0 8.4 1.5 1.5 0.66 4.0 8.0 Q1
LM78L09ITPX/NOPB DSBGA YPB 8 3000 178.0 8.4 1.5 1.5 0.66 4.0 8.0 Q1
LM78L12ACMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L12ACMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L15ACMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L15ACMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 13-Dec-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM78L05ACMX SOIC D 8 2500 367.0 367.0 35.0
LM78L05ACMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM78L05AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM78L05ITP/NOPB DSBGA YPB 8 250 210.0 185.0 35.0
LM78L05ITPX/NOPB DSBGA YPB 8 3000 210.0 185.0 35.0
LM78L09ITPX/NOPB DSBGA YPB 8 3000 210.0 185.0 35.0
LM78L12ACMX SOIC D 8 2500 367.0 367.0 35.0
LM78L12ACMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM78L15ACMX SOIC D 8 2500 367.0 367.0 35.0
LM78L15ACMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 13-Dec-2013
Pack Materials-Page 2
MECHANICAL DATA
YPB0008
www.ti.com
TPA08XXX (Rev A)
0.50.045
D
E
4215100/A 12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
D: Max =
E: Max =
1.337 mm, Min =
1.337 mm, Min =
1.276 mm
1.276 mm
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