TL084CN Amplificador Operacional

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SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

D Low Power Consumption D High Input Impedance . . . JFET-Input Stage


D Wide Common-Mode and Differential D Latch-Up-Free Operation
Voltage Ranges D High Slew Rate . . . 13 V/µs Typ
D Low Input Bias and Offset Currents D Common-Mode Input Voltage Range
D Output Short-Circuit Protection Includes VCC+
D Low Total Harmonic
Distortion . . . 0.003% Typ

description/ordering information
The TL08x JFET-input operational amplifier family is designed to offer a wider selection than any previously
developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates
well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature
high slew rates, low input bias and offset currents, and low offset-voltage temperature coefficient. Offset
adjustment and external compensation options are available within the TL08x family.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from −40°C to 85°C. The Q-suffix devices are characterized for operation from −40°C to 125°C.
The M-suffix devices are characterized for operation over the full military temperature range of −55°C to 125°C.

ORDERING INFORMATION
VIOmax ORDERABLE TOP-SIDE
TJ PACKAGE†
AT 255C PART NUMBER MARKING
Tube of 50 TL081CP TL081CP
PDIP (P)
Tube of 50 TL082CP TL082CP
PDIP (N) Tube of 25 TL084CN TL084CN
Tube of 75 TL081CD
TL081C
Reel of 2500 TL081CDR
Tube of 75 TL082CD
SOIC (D) TL082C
Reel of 2500 TL082CDR
Tube of 50 TL084CD
0°C to 70°C 15 mV TL084C
Reel of 2500 TL084CDR
Reel of 2000 TL081CPSR T081
SOP (PS)
Reel of 2000 TL082CPSR T082
SOP (NS) Reel of 2000 TL084CNSR TL084
Tube of 150 TL082CPW
T082
Reel of 2000 TL082CPWR
TSSOP (PW)
Tube of 90 TL084CPW
T084
Reel of 2000 TL084CPWR
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

  ! " #$%! "  &$'(#! )!%* Copyright  2004, Texas Instruments Incorporated
)$#!" # ! "&%##!" &% !+% !%"  %," "!$%!"  &)$#!" #&(! !  0101 (( &%!%" % !%"!%)
"!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% $(%"" !+%-"% !%)*  (( !+% &)$#!" &)$#!
!%"!/  (( &%!%"* &#%""/ )%" ! %#%""(. #($)% !%"!/  (( &%!%"*

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1


        

 
 

     
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

description/ordering information (continued)

ORDERING INFORMATION
VIOmax ORDERABLE TOP-SIDE
TJ PACKAGE†
AT 255C PART NUMBER MARKING
Tube of 50 TL081ACP TL081ACP
PDIP (P)
Tube of 50 TL082ACP TL082ACP
PDIP (N) Tube of 25 TL084ACN TL084ACN
Tube of 75 TL081ACD
081AC
Reel of 2500 TL081ACDR
6 mV Tube of 75 TL082ACD
SOIC (D) 082AC
Reel of 2500 TL082ACDR
Tube of 50 TL084ACD
TL084AC
Reel of 2500 TL084ACDR
SOP (PS) Reel of 2000 TL082ACPSR T082A
0°C to 70°C
SOP (NS) Reel of 2000 TL084ACNSR TL084A
Tube of 50 TL081BCP TL081BCP
PDIP (P)
Tube of 50 TL082BCP TL082BCP
PDIP (N) Tube of 25 TL084BCN TL084BCN
Tube of 75 TL081BCD
081BC
3 mV Reel of 2500 TL081BCDR
Tube of 75 TL082BCD
SOIC (D) 082BC
Reel of 2500 TL082BCDR
Tube of 50 TL084BCD
TL084BC
Reel of 2500 TL084BCDR
Tube of 50 TL081IP TL081IP
PDIP (P)
Tube of 50 TL082IP TL082IP
PDIP (N) Tube of 25 TL084IN TL081IN
Tube of 75 TL081ID
TL081I
Reel of 2500 TL081IDR
−40°C to 85°C 6 mV
Tube of 75 TL082ID
SOIC (D) TL082I
Reel of 2500 TL082IDR
Tube of 50 TL084ID
TL084I
Reel of 2500 TL084IDR
TSSOP (PW) Reel of 2000 TL082IPWR Z082
Tube of 50 TL084QD
−40°C to 125°C 9 mV SOIC (D) TL084QD
Reel of 2500 TL084QDR
CDIP (J) Tube of 25 TL084MJ TL084MJ
9 mV
LCCC (FK) Reel of 55 TL084FK TL084FK
−55°C to 125°C
CDIP (JG) Tube of 50 TL082MJG TL082MJG
6 mV
LCCC (FK) Tube of 55 TL082MFK TL082MFK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


        

 
 

     
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

TL081, TL081A, TL081B TL082, TL082A, TL082B TL084, TL084A, TL084B


D, P, OR PS PACKAGE D, JG, P, PS, OR PW PACKAGE D, J, N, NS, OR PW PACKAGE
(TOP VIEW) (TOP VIEW) (TOP VIEW)

OFFSET N1 1 8 NC 1OUT 1 8 VCC +


1OUT 1 14 4OUT
IN − 2 7 VCC + 1IN − 2 7 2OUT
1IN − 2 13 4IN −
IN + 3 6 OUT 1IN + 3 6 2IN −
1IN + 3 12 4IN +
VCC − 4 5 OFFSET N2 VCC − 4 5 2IN +
VCC + 4 11 VCC −
2IN + 5 10 3IN +
NC − No internal connection 2IN − 6 9 3IN −
2OUT 7 8 3OUT

TL082M . . . FK PACKAGE TL084M . . . FK PACKAGE


(TOP VIEW) (TOP VIEW)
VCC+
1OUT

1OUT

4OUT
1IN −

4IN −
NC

NC

NC

NC
3 2 1 20 19 3 2 1 20 19
NC 4 18 NC 1IN + 4 18 4IN +
1IN − 5 17 2OUT NC 5 17 NC
NC 6 16 NC VCC + 6 16 VCC −
1IN + 7 15 2IN − NC 7 15 NC
NC 8 14 NC 2IN + 8 14 3IN +
9 10 11 12 13 9 10 11 12 13
2IN +
NC

NC

NC

2IN −

3IN −
2OUT
NC
3OUT
VCC −

NC − No internal connection NC − No internal connection

symbols
TL081 TL082 (EACH AMPLIFIER)
TL084 (EACH AMPLIFIER)
OFFSET N1

IN + + IN + +
OUT OUT
IN − − IN − −

OFFSET N2

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SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

schematic (each amplifier)


VCC +

IN +

64 Ω
IN −
OUT
128 Ω

64 Ω

C1

1080 Ω 1080 Ω

VCC −

OFFSET N1 OFFSET N2

TL081 Only

Component values shown are nominal.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


        

 
 

     
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
TL08_C
TL08_AC TL08_I TL084Q TL08_M UNIT
TL08_BC
Supply voltage, VCC + (see Note 1) 18 18 18 18 V
Supply voltage VCC − (see Note 1) −18 −18 −18 −18 V
Differential input voltage, VID (see Note 2) ± 30 ± 30 ± 30 ± 30 V
Input voltage, VI (see Notes 1 and 3) ± 15 ± 15 ± 15 ± 15 V
Duration of output short circuit (see Note 4) Unlimited Unlimited Unlimited Unlimited
Continuous total power dissipation See Dissipation Rating Table
Operating free-air temperature range, TA 0 to 70 − 40 to 85 − 40 to 125 − 55 to 125 °C
D package (8-pin) 97 97
D package (14-pin) 86 86
N package (14-pin) 76 76
Package thermal impedance, θJA NS package (14-pin) 80
°C/W
(see Notes 5 and 6) P package (8-pin) 85 85
PS package (8-pin) 95 95
PW package (8-pin) 149
PW package (14-pin) 113 113
Operating virtual junction temperature 150 150 150 150 °C
Case temperature for 60 seconds, TC FK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case
J or JG package 300 °C
for 60 seconds
Storage temperature range, Tstg − 65 to 150 − 65 to 150 − 65 to 150 − 65 to 150 °C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC + and VCC − .
2. Differential voltages are at IN+ with respect to IN −.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
6. The package thermal impedance is calculated in accordance with JESD 51-7.

DISSIPATION RATING TABLE


TA ≤ 25°C DERATING DERATE TA = 70°C TA = 85°C TA = 125°C
PACKAGE
POWER RATING FACTOR ABOVE TA POWER RATING POWER RATING POWER RATING
D (14 pin) 680 mW 7.6 mW/°C 60°C 604 mW 490 mW 186 mW
FK 680 mW 11.0 mW/°C 88°C 680 mW 680 mW 273 mW
J 680 mW 11.0 mW/° C 88°C 680 mW 680 mW 273 mW
JG 680 mW 8.4 mW/°C 69°C 672 mW 546 mW 210 mW

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6
electrical characteristics, VCC± = ±15 V (unless otherwise noted)
TL081C TL081AC TLO81BC TL081I
TL082C TL082AC TL082BC TL082I
PARAMETER TEST CONDITIONS TA† TL084C TL084AC TL084BC TL084I UNIT

MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX
25°C 3 15 3 6 2 3 3 6
VIO Input offset voltage VO = 0 RS = 50 Ω mV
Full range 20 7.5 5 9
Temperature
α VIO coefficient of input VO = 0 RS = 50 Ω Full range 18 18 18 18 µV/°C
offset voltage

2
2


25°C 5 200 5 100 5 100 5 100 pA


IIO Input offset current ‡ VO = 0
Full range 2 2 2 10 nA
25°C 30 400 30 200 30 200 30 200 pA
IIB Input bias current ‡ VO = 0
Full range 10 7 7 20 nA
−12 −12 −12 −12
Common-mode input
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

VICR 25°C ± 11 to ± 11 to ± 11 to ± 11 to V
voltage range
15 15 15 15
RL = 10 kΩ 25°C ± 12 ± 13.5 ± 12 ± 13.5 ± 12 ± 13.5 ± 12 ± 13.5
32 2  

Maximum peak
VOM RL ≥ 10 kΩ ± 12 ± 12 ± 12 ± 12 V
output voltage swing Full range
RL ≥ 2 kΩ ± 10 ± 12 ± 10 ± 12 ± 10 ± 12 ± 10 ± 12
222 2 2 

Large-signal VO = ± 10 V, RL ≥ 2 kΩ 25°C 25 200 50 200 50 200 50 200


AVD differential voltage V/mV
amplification VO = ± 10 V, RL ≥ 2 kΩ Full range 15 25 25 25
B1 Unity-gain bandwidth 25°C 3 3 3 3 MHz
ri Input resistance 25°C 1012 1012 1012 1012 Ω

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Common-mode VIC = VICRmin,
CMRR 25°C 70 86 75 86 75 86 75 86 dB
rejection ratio VO = 0, RS = 50 Ω
Supply-voltage
VCC = ± 15 V to ± 9 V,
kSVR rejection ratio 25°C 70 86 80 86 80 86 80 86 dB
VO = 0, RS = 50 Ω
(∆ VCC± /∆ VIO)
Supply current
ICC VO = 0, No load 25°C 1.4 2.8 1.4 2.8 1.4 2.8 1.4 2.8 mA
(per amplifier)
VO1/ VO2 Crosstalk attenuation AVD = 100 25°C 120 120 120 120 dB
† All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. Full range for TA is 0°C to 70°C for TL08_C, TL08_AC,
TL08_BC and − 40°C to 85°C for TL08_I.
‡ Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 17. Pulse techniques must be used
that maintain the junction temperature as close to the ambient temperature as possible.
        

 
 

     
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

electrical characteristics, VCC ± = ± 15 V (unless otherwise noted)


TL081M, TL082M TL084Q, TL084M
PARAMETER TEST CONDITIONS† TA UNIT
MIN TYP MAX MIN TYP MAX
25°C 3 6 3 9
VIO Input offset voltage VO = 0, RS = 50 Ω mV
Full range 9 15
Temperature
αVIO coefficient of input VO = 0 RS = 50 Ω Full range 18 18 µV/°C
offset voltage
25°C 5 100 5 100 pA
IIO Input offset current‡ VO = 0
125°C 20 20 nA
25°C 30 200 30 200 pA
IIB Input bias current‡ VO = 0
125°C 50 50 nA
− 12 − 12
Common-mode input
VICR 25°C ± 11 to ± 11 to V
voltage range
15 15
RL = 10 kΩ 25°C ± 12 ± 13.5 ± 12 ± 13.5
Maximum peak
VOM RL ≥ 10 kΩ ± 12 ± 12 V
output voltage swing Full range
RL ≥ 2 kΩ ± 10 ± 12 ± 10 ± 12
Large-signal VO = ± 10 V, RL ≥ 2 kΩ 25°C 25 200 25 200
AVD differential voltage V/mV
amplification VO = ± 10 V, RL ≥ 2 kΩ Full range 15 15
B1 Unity-gain bandwidth 25°C 3 3 MHz
ri Input resistance 25°C 1012 1012 Ω
Common-mode VIC = VICRmin,
CMRR 25°C 80 86 80 86 dB
rejection ratio VO = 0, RS = 50 Ω
Supply-voltage
VCC = ± 15 V to ± 9 V,
kSVR rejection ratio 25°C 80 86 80 86 dB
VO = 0, RS = 50 Ω
(∆VCC ± /∆VIO)
Supply current
ICC VO = 0, No load 25°C 1.4 2.8 1.4 2.8 mA
(per amplifier)
VO1/ VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB
† All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified.
‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in
Figure 17. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as possible.

operating characteristics, VCC± = ± 15 V, TA = 25°C (unless otherwise noted)


PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 8∗ 13
SR Slew rate at unity gain VI = 10 V, RL = 2 kΩ, CL = 100 pF, V/µs
5∗
TA = − 55
55°CC to 125
125°C,
C, See Figure 1
tr Rise time 0.05 µs
VI = 20 mV, RL = 2 kΩ, CL = 100 pF, See Figure 1
Overshoot factor 20 %

Equivalent input noise f = 1 kHz 18 nV/√Hz


Vn voltage RS = 20 Ω
f = 10 Hz to 10 kHz 4 µV
Equivalent input noise
In current RS = 20 Ω, f = 1 kHz 0.01 pA/√Hz

VIrms = 6 V, AVD = 1, RS ≤ 1 kΩ, RL ≥ 2 kΩ,


THD Total harmonic distortion f = 1 kHz 0.003 %

∗On products compliant to MIL-PRF-38535, this parameter is not production tested.

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SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

operating characteristics, VCC± = ± 15 V, TA = 25°C


PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SR Slew rate at unity gain VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 8 13 V/ µs
tr Rise time 0.05 µs
VI = 20 mV, RL = 2 kΩ, CL = 100 pF, See Figure 1
Overshoot factor 20 %
f = 1 kHz 18 nV/√Hz
Vn Equivalent input noise voltage RS = 20 Ω
f = 10 Hz to 10 kHz 4 µV
In Equivalent input noise current RS = 20 Ω, f = 1 kHz 0.01 pA/√Hz
VIrms = 6 V, AVD = 1, RS ≤ 1 kΩ, RL ≥ 2 kΩ,
THD Total harmonic distortion f = 1 kHz 0.003 %

PARAMETER MEASUREMENT INFORMATION

10 kΩ

OUT 1 kΩ

VI + VI
OUT
CL = 100 pF RL = 2 kΩ +
RL CL = 100 pF

Figure 1 Figure 2

100 kΩ
− TL081
IN −
C2
OUT
+
C1 500 pF IN + N2
N1


IN − N1 100 kΩ
OUT
+
1.5 kΩ

VCC −

Figure 3 Figure 4

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


        

 
 

     
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS

Table of Graphs
FIGURE
vs Frequency 5, 6, 7
vs Free-air temperature 8
VOM Maximum peak output voltage
vs Load resistance 9
vs Supply voltage 10
vs Free-air temperature 11
Large-signal differential voltage amplification
AVD vs Frequency 12
Differential voltage amplification vs Frequency with feed-forward compensation 13
PD Total power dissipation vs Free-air temperature 14
vs Free-air temperature 15
ICC Supply current
vs Supply voltage 16
IIB Input bias current vs Free-air temperature 17
Large-signal pulse response vs Time 18
VO Output voltage vs Elapsed time 19
CMRR Common-mode rejection ratio vs Free-air temperature 20
Vn Equivalent input noise voltage vs Frequency 21
THD Total harmonic distortion vs Frequency 22

MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE


vs vs
FREQUENCY FREQUENCY
± 15 ± 15
VCC ± = ± 15 V RL = 10 kΩ RL = 2 kΩ
TA = 25°C
VOM − Maximum Peak Output Voltage − V

TA = 25°C
VOM − Maximum Peak Output Voltage − V

± 12.5 See Figure 2 VCC ± = ± 15 V


± 12.5 See Figure 2

± 10 ± 10
VCC ± = ± 10 V
VCC ± = ± 10 V
± 7.5 ± 7.5

±5 VCC ± = ± 5 V ±5
VCC ± = ± 5 V

± 2.5 ± 2.5

0 0
100 1k 10 k 100 k 1M 10 M 100 1k 10 k 100 k 1M 10 M
f − Frequency − Hz f − Frequency − Hz

Figure 5 Figure 6

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SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS†

MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE


vs vs

ÎÎÎÎ
FREQUENCY FREE-AIR TEMPERATURE
± 15

ÎÎÎÎ
± 15
RL = 10 kW
VCC ± = ± 15 V

VOM − Maximum Peak Output Voltage − V


VOM − Maximum Peak Output Voltage − V

TA = 25°C RL = 2 kΩ
± 12.5

ÎÎÎÎ
See Figure 2 ± 12.5
RL = 2 kW
± 10 ± 10
TA = − 55°C

± 7.5 ± 7.5

TA = 125°C
±5 ±5

± 2.5 ± 2.5
VCC ± = ± 15 V
See Figure 2
0 0
10 k 40 k 100 k 400 k 1M 4M 10 M − 75 − 50 − 25 0 25 50 75 100 125
f − Frequency − Hz TA − Free-Air Temperature − °C

Figure 7 Figure 8

MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE


vs vs
LOAD RESISTANCE SUPPLY VOLTAGE
± 15 ± 15
VCC ± = ± 15 V RL = 10 kΩ
VOM − Maximum Peak Output Voltage − V

VOM − Maximum Peak Output Voltage − V

TA = 25°C TA = 25°C
± 12.5 See Figure 2 ± 12.5

± 10 ± 10

± 7.5 ± 7.5

±5 ±5

± 2.5 ± 2.5

0 0
0.1 0.2 0.4 0.7 1 2 4 7 10 0 2 4 6 8 10 12 14 16
RL − Load Resistance − kΩ | VCC ± | − Supply Voltage − V

Figure 9 Figure 10

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


        

 
 

     
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS†
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
1000
700
400
AVD − Large-Signal Differential
Voltage Amplification − V/mV 200

100
70
40

20

10
7
4 VCC ± = ± 15 V
VO = ± 10 V
2
RL = 2 kΩ
1
−75 −50 −25 0 25 50 75 100 125
TA − Free-Air Temperature − °C

Figure 11
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREQUENCY
106
VCC ± = ± 5 V to ± 15 V
RL = 10 kΩ
105 TA = 25°C
AVD − Large-Signal Differential
Voltage Amplification − V/mV

104 0°
Differential Voltage
Amplification
Phase Shift

(left scale)
103 45 °

102 90 °

Phase Shift
101 (right scale) 135 °

1 180 °
1 10 100 1k 10 k 100 k 1M 10 M
f − Frequency − Hz

Figure 12

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS†

DIFFERENTIAL VOLTAGE AMPLIFICATION TOTAL POWER DISSIPATION


vs vs
FREQUENCY WITH FEED-FORWARD COMPENSATION FREE-AIR TEMPERATURE
106 250
VCC ± = ± 15 V
VCC ± = ± 15 V
AVD − Differential Voltage Amplification − V/mV

225 No Signal
C2 = 3 pF No Load
105
TA = 25°C 200

PD − Total Power Dissipation − mW


See Figure 3
175
104 TL084, TL085
150

103 125

100
TL082, TL083
102
75
TL081
50
10
25

1 0
100 1k 10 k 100 k 1M 10 M −75 −50 −25 0 25 50 75 100 125
f − Frequency With Feed-Forward Compensation − Hz TA − Free-Air Temperature − °C

Figure 13 Figure 14

SUPPLY CURRENT PER AMPLIFIER SUPPLY CURRENT


vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE
2.0 2.0
VCC ± = ± 15 V
1.8 TA = 25°C
No Signal 1.8
No Signal
No Load
1.6 1.6 No Load
I CC ± − Supply Current − mA

I CC ± − Supply Current − mA

1.4 1.4

1.2 1.2

1.0 1.0

0.8 0.8

0.6 0.6

0.4 0.4

0.2 0.2

0 0
−75 −50 −25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16
TA − Free-Air Temperature − °C | VCC ± | − Supply Voltage − V

Figure 15 Figure 16

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS†

INPUT BIAS CURRENT


vs VOLTAGE-FOLLOWER
FREE-AIR TEMPERATURE LARGE-SIGNAL PULSE RESPONSE
100 6
VCC ± = ± 15 V
V CC ± = ± 15 V RL = 2 k Ω
CL = 100 pF
4 TA = 25°C

Input and Output Voltages − V


I IB − Input Bias Current − nA

10 Output
2

1 0

−2

0.1 Input

−4

0.01 −6
− 50 − 25 0 25 50 75 100 125 0 0.5 1 1.5 2 2.5 3 3.5
TA − Free-Air Temperature − °C t − Time − µ s

Figure 17 Figure 18

OUTPUT VOLTAGE COMMON-MODE REJECTION RATIO


vs vs
ELAPSED TIME FREE-AIR TEMPERATURE
28 89
VCC ± = ± 15 V
CMRR − Common-Mode Rejection Ratio − dB

24 RL = 10 kΩ
88
20
VO − Output Voltage − mV

87
16
VCC ± = ± 15 V
RL = 2 k Ω
12 CL = 100 pF 86
TA = 25°C
8 See Figure 1
85
4

84
0

−4 83
0 0.2 0.4 0.6 0.8 1.0 1.2 − 75 − 50 − 25 0 25 50 75 100 125
t − Elapsed Time − µ s TA − Free-Air Temperature − °C

Figure 19 Figure 20

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS†

EQUIVALENT INPUT NOISE VOLTAGE TOTAL HARMONIC DISTORTION


vs vs
FREQUENCY FREQUENCY
50 1
VCC ± = ± 15 V
Vn − Equilvalent Input Noise Voltage − nV/ Hz

VCC ± = ± 15 V
AVD = 10 AVD = 1
0.4
RS = 20 Ω VI(RMS) = 6 V

THD − Total Harmonic Distortion − %


40 TA = 25°C TA = 25°C

0.1
30
0.04

20
0.01

10 0.004

0 0.001
10 40 100 400 1 k 4 k 10 k 40 k 100 k 10 400 1k 4k 10 k 40 k 100 k
f − Frequency − Hz f − Frequency − Hz

Figure 21 Figure 22
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

APPLICATION INFORMATION

RF = 100 kΩ
VCC +

15 V
3.3 kΩ R1 R2 TL081
Output +
− Input Output
TL081 C3 VCC −
CF = 3.3 µF
+
1 kΩ
−15 V
R3 R1 = R2 = 2(R3) = 1.5 MΩ
3.3 kΩ C1 C2
C1 = C2 = C3 = 110 pF
9.1 kΩ 2
1 1
f= fo = = 1 kHz
2π RF CF 2π R1 C1

Figure 23 Figure 24

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


        

 
 

     
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

APPLICATION INFORMATION

VCC +
1 MΩ −

TL084 Output A
VCC + +
+
1 µF TL084
− VCC +
Input −

TL084 Output B
100 kΩ 100 kΩ +
VCC +
100 kΩ
VCC +
100 µF 100 kΩ −

TL084 Output C
+

Figure 25. Audio-Distribution Amplifier

6 sin ωt 1N4148
− 15 V
18 pF 18 kΩ
1 kΩ (see Note A)
18 pF

VCC +

VCC+
1/2 88.4 kΩ −
TL082 1/2
6 cos ωt
+
88.4 kΩ TL082
VCC − +
18 pF VCC − 1 kΩ

15 V
1N4148 18 kΩ
88.4 kΩ (see Note A)

NOTE A: These resistor values may be adjusted for a symmetrical output.

Figure 26. 100-KHz Quadrature Oscillator

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15


        

 
 

     
SLOS081G − FEBRUARY 1977 − REVISED SEPTEMBER 2004

APPLICATION INFORMATION

16 kΩ 16 kΩ
220 pF 220 pF

43 kΩ 30 kΩ 43 kΩ 30 kΩ

43 kΩ VCC + VCC +
220 pF VCC + 220 pF VCC +
Input −
43 kΩ

43 kΩ
1/4 − 43 kΩ 1/4 −
TL084
+ 1/4 +TL084 1/4 Output
TL084
+ TL084
+ B
1.5 kΩ VCC − 1.5 kΩ VCC −
VCC − VCC −

Output A
Output A Output B

2 kHz/div 2 kHz/div
Second-Order Bandpass Filter Cascaded Bandpass Filter
fo = 100 kHz, Q = 30, GAIN = 4 fo = 100 kHz, Q = 69, GAIN = 16

Figure 27. Positive-Feedback Bandpass Filter

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


PACKAGE OPTION ADDENDUM
www.ti.com 18-Feb-2005

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
5962-9851501Q2A ACTIVE LCCC FK 20 1 None POST-PLATE Level-NC-NC-NC
5962-9851501QPA ACTIVE CDIP JG 8 1 None A42 SNPB Level-NC-NC-NC
5962-9851503Q2A ACTIVE LCCC FK 20 1 None POST-PLATE Level-NC-NC-NC
5962-9851503QCA ACTIVE CDIP J 14 1 None A42 SNPB Level-NC-NC-NC
TL081ACD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081ACDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081ACJG OBSOLETE CDIP JG 8 None Call TI Call TI
TL081ACP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL081BCD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081BCDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081BCP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL081CD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081CDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081CP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL081CPSR ACTIVE SO PS 8 2000 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081CPWLE OBSOLETE TSSOP PW 8 None Call TI Call TI
TL081ID ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081IDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL081IP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL081MFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TL081MJG OBSOLETE CDIP JG 8 None Call TI Call TI
TL081MJGB OBSOLETE CDIP JG 8 None Call TI Call TI
TL082ACD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL082ACDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL082ACP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL082ACPSR ACTIVE SO PS 8 2000 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL082BCD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL082BCDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL082BCP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC

Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 18-Feb-2005

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
(RoHS)
TL082CD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL082CDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL082CJG OBSOLETE CDIP JG 8 None Call TI Call TI
TL082CP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL082CPSR ACTIVE SO PS 8 2000 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL082CPW ACTIVE TSSOP PW 8 150 Pb-Free CU NIPDAU Level-1-250C-UNLIM
(RoHS)
TL082CPWLE OBSOLETE TSSOP PW 8 None Call TI Call TI
TL082CPWR ACTIVE TSSOP PW 8 2000 Pb-Free CU NIPDAU Level-1-250C-UNLIM
(RoHS)
TL082ID ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL082IDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL082IJG OBSOLETE CDIP JG 8 None Call TI Call TI
TL082IP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL082IPWR ACTIVE TSSOP PW 8 2000 Pb-Free CU NIPDAU Level-1-250C-UNLIM
(RoHS)
TL082MFK OBSOLETE LCCC FK 20 None Call TI Call TI
TL082MFKB ACTIVE LCCC FK 20 1 None POST-PLATE Level-NC-NC-NC
TL082MJG ACTIVE CDIP JG 8 1 None A42 SNPB Level-NC-NC-NC
TL082MJGB ACTIVE CDIP JG 8 1 None A42 SNPB Level-NC-NC-NC
TL084ACD ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL084ACDR ACTIVE SOIC D 14 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL084ACN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL084ACNSR ACTIVE SO NS 14 2000 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL084BCD ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL084BCDR ACTIVE SOIC D 14 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL084BCN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL084CD ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL084CDR ACTIVE SOIC D 14 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL084CJ OBSOLETE CDIP J 14 None Call TI Call TI
TL084CN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL084CNSLE OBSOLETE SO NS 14 None Call TI Call TI

Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 18-Feb-2005

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
TL084CNSR ACTIVE SO NS 14 2000 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL084CPW ACTIVE TSSOP PW 14 90 Pb-Free CU NIPDAU Level-1-250C-UNLIM
(RoHS)
TL084CPWLE OBSOLETE TSSOP PW 14 None Call TI Call TI
TL084CPWR ACTIVE TSSOP PW 14 2000 Pb-Free CU NIPDAU Level-1-250C-UNLIM
(RoHS)
TL084ID ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL084IDR ACTIVE SOIC D 14 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL084IJ OBSOLETE CDIP J 14 None Call TI Call TI
TL084IN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL084MFK ACTIVE LCCC FK 20 1 None POST-PLATE Level-NC-NC-NC
TL084MFKB ACTIVE LCCC FK 20 1 None POST-PLATE Level-NC-NC-NC
TL084MJ ACTIVE CDIP J 14 1 None A42 SNPB Level-NC-NC-NC
TL084MJB ACTIVE CDIP J 14 1 None A42 SNPB Level-NC-NC-NC
TL084QD ACTIVE SOIC D 14 50 None CU NIPDAU Level-1-220C-UNLIM
TL084QDR ACTIVE SOIC D 14 2500 None CU NIPDAU Level-1-220C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 3
MECHANICAL DATA

MCER001A – JANUARY 1995 – REVISED JANUARY 1997

JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE

0.400 (10,16)
0.355 (9,00)

8 5

0.280 (7,11)
0.245 (6,22)

1 4
0.065 (1,65)
0.045 (1,14)

0.063 (1,60) 0.310 (7,87)


0.020 (0,51) MIN
0.015 (0,38) 0.290 (7,37)

0.200 (5,08) MAX


Seating Plane

0.130 (3,30) MIN

0.023 (0,58)
0°–15°
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)

4040107/C 08/96

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER


28 TERMINAL SHOWN

NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX

0.342 0.358 0.307 0.358


19 11 20
(8,69) (9,09) (7,80) (9,09)
20 10 0.442 0.458 0.406 0.458
28
(11,23) (11,63) (10,31) (11,63)
21 9
B SQ 0.640 0.660 0.495 0.560
22 8 44
(16,26) (16,76) (12,58) (14,22)
A SQ
23 7 0.739 0.761 0.495 0.560
52
(18,78) (19,32) (12,58) (14,22)
24 6
0.938 0.962 0.850 0.858
68
(23,83) (24,43) (21,6) (21,8)
25 5
1.141 1.165 1.047 1.063
84
(28,99) (29,59) (26,6) (27,0)
26 27 28 1 2 3 4

0.020 (0,51) 0.080 (2,03)


0.010 (0,25) 0.064 (1,63)

0.020 (0,51)
0.010 (0,25)

0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)

0.028 (0,71) 0.045 (1,14)


0.022 (0,54) 0.035 (0,89)
0.050 (1,27)

4040140 / D 10/96

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE

0.400 (10,60)
0.355 (9,02)
8 5

0.260 (6,60)
0.240 (6,10)

1 4
0.070 (1,78) MAX

0.325 (8,26)
0.020 (0,51) MIN
0.300 (7,62)

0.015 (0,38)

Gage Plane
0.200 (5,08) MAX
Seating Plane

0.125 (3,18) MIN 0.010 (0,25) NOM

0.100 (2,54) 0.430 (10,92)


MAX
0.021 (0,53)
0.010 (0,25) M
0.015 (0,38)

4040082/D 05/98

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE


14 PINS SHOWN

0,30
0,65 0,10 M
0,19
14 8

0,15 NOM
4,50 6,60
4,30 6,20

Gage Plane

0,25
1 7
0°– 8°
A 0,75
0,50

Seating Plane

1,20 MAX 0,15 0,10


0,05

PINS **
8 14 16 20 24 28
DIM

A MAX 3,10 5,10 5,10 6,60 7,90 9,80

A MIN 2,90 4,90 4,90 6,40 7,70 9,60

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.


B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


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