Rework Procedura e Curve
Rework Procedura e Curve
Rework Procedura e Curve
Introduction
This technical note provides general guidelines for a solder reflow and rework process for Lattice surface mount products. The data used in this document is based on IPC/JEDEC standards. Each board has its own profile which depends upon the reflow equipment used and the board design. The PCB must be individually characterized to find the reliable profile. This document covers SnPb, Pb-Free and Halogen-Free processes.
Reflow
Use caution when profiling to insure the maximum temperature difference between components is less than 10C (7C within an individual component). Forced convection reflow with nitrogen is preferred (with maximum oxygen content of 50-75 PPM).
Inspection
Pre-reflow: Use visual inspection to verify solder paste dispense location and quantity. Pick and place: Use machine vision as necessary to ensure proper component placement. Post reflow: Use electrical testing to verify solder joint formation (100% post-reflow visual inspection is not recommended).
Cleaning Recommendations
After solder reflow, printed circuit boards should be thoroughly cleaned and dried using standard cleaning equipment. Final rinse should be warm DI water (50 to 75C) with resistivity of 0.2 Meg Ohms/cm or greater. After cleaning, boards should be baked for a minimum of 1 hour at 125C to evaporate residual moisture.
Rework Recommendations
Removal and replacement of SMT packages on printed circuit boards is fairly straightforward. However, reattachment or touch-up of SMT packages that have already been soldered to the board is not practical in most cases. A few important criteria should be considered when choosing a rework system: Minimize the change in temperature across the solder joint array to promote good solder joint formation, minimize intermetallic growth, improve solderability and minimize component warpage. Minimize die temperature to prevent die delamination and wire bond failure. Minimize board temperature adjacent to the rework site to reduce intermetallic growth, prevent secondary reflow, and prevent possible component delamination. For boards with no internal ground plane, apply localized heat to the SMT package. When the solder is molten, remove package using appropriate vacuum tool. While the board is still hot, remove excess solder from the site using a vacuum desoldering system or a soldering iron and solder wicking material. Use care to avoid damaging the solder pads or the surrounding solder mask. For PCBs with internal ground plane(s), preheat the entire board to at least 80C before removing the SMT packages.
2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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tn1076_02.7
BGA Reballing
BGA reballing is not recommended. Reballed BGA packages will void the original Lattice specifications.
Note: Package volume excludes external terminals (balls, bumps, lands, leads) and non-integral heat sinks.
Table 2 shows the peak reflow temperature for Lattice devices by package type and size. Table 2. Peak Reflow Temperature (TP) by Package Type and Size
SnPb Package Package Type Number of Leads/Balls 49 caBGA 100 256 332 56 64 csBGA 100 132 144 328 ucBGA 64 132 1020 fcBGA 1152 1704 4 225 4 245 3 Not Available Not Available 3 260 3 Not Available 240 3 260 Not Available 240 3 240 3 3 Moisture Sensitivity Level Peak Reflow Temp. (+0/-5C) Pb-Free / Halogen-Free Package (RoHS Compliant) Moisture Sensitivity Level Peak Reflow Temp. (+0/-5C)
Pb-Free / Halogen-Free Package (RoHS Compliant) Moisture Sensitivity Level 3 Not Available 3 Not Available 3 Not Available 250 250 Peak Reflow Temp. (+0/-5C) 260
225
250
Not Available
Temperature (C)
TL TSMAX tL Ramp-down
TSMIN
tS
25C
Preheat
Reflow
Cool Down
Time (Seconds)
Revision History
Date April 2008 June 2009 Version 02.2 02.3 Previous Lattice releases. Updated Peak Reflow Temperature (TP) by Package Type and Size table. Updated QFN information in Peak Reflow Temperature (TP) by Package Type and Size, SnPb Packages table. Updated QFN information in Peak Reflow Temperature (TP) by Package Type and Size, Pb-Free Packages table. Updated for Halogen-free package support. Updated document to include 25 WLCSP package. Updated document with new corporate logo. Updated document to include the 328-ball csBGA package. Change Summary