Abstract This paper deals with an analysis, modeling and

control of a two level 48-pulse voltage source converter for High

Voltage DC (HVDC) system. A set of two-level 6-pulse voltage
source converters (VSCs) is used to form a 48-pulse converter
operated at fundamental frequency switching (FFS). The
performance of the VSC system is improved in terms of reduced
harmonics level at FFS and THD (Total Harmonic Distribution)
of voltage and current is achieved within the IEEE 519 standard.
The performance of the VSC is studied in terms of required
reactive power compensation, improved power factor and
reduced harmonics distortion. Simulation results are presented
for the designed two level multipulse converter to demonstrate its
capability. The control algorithm is disused in detail for
operating the converter at fundamental frequency switching.
Index Terms Two-Level Voltage Source Converter, HVDC
Systems, Multipulse, Fundamental Frequency Switching,
Harmonics,
I. INTRODUCTION
VDC schemes employing line-commutated, current
source converter using thyristors have been widely used
in power transmission. The control schemes for such systems
are well established and operating successfully all over the
world [1]. Voltage Source Converter (VSC) based HVDC
systems using self commutated device technology has
attracted increasing attention and a number of installations are
now in operation all over the world transmitting more than
70,000 MW power [1]. One of the principle advantages of
VSC HVDC system is that no external voltage source required
for commutation. It can independently control the reactive
power flow at each AC network, and reactive power control is
independent of the active power control. These features make
the VSC based HVDC system attractive for connection of
weak AC systems, island networks and renewable sources to a
main grid [2]. A VSC based HVDC system uses a basic three
phase 6-pulse voltage source converter bridge as its main unit.
This VSC bridge is forced to operate at very high switching
frequency in order to minimize the effect of harmonics in the
system. Therefore, VSC in HVDC system has high power loss
and high cost compared to conventional HVDC system [3]-
[4].
HVDC conversion is implemented mostly by monopolar or
bipolar configurations of 12-pulse series connected thyristor

The authors are with Department of Electrical Engineering, Indian Institute of
Technology, Delhi, New Delhi, 110016, India. (e-mail:
[email protected],[email protected],
[email protected]).
converters. In such case the resulting high contents of 12-
pulse converter related harmonics can couple into nearby
telephone lines and cause noise in the communication
network. This may also cause mal-function of protective
relaying and circuit breakers [5]. To avoid such undesirable
harmonic effects, tuned passive filters have been employed on
the AC side of the converter. To reduce the harmonic
distortion in VSC based HVDC systems without using
conventional filters, there are three feasible solutions. These
are through the use of multi-pulse converter, the multi-level
converter, and the pulse width modulation (PWM) technique.
The PWM converter should switch many times within one
power cycle to synthesize its output waveform, therefore its
switching loss is reasonably high, and this greatly limits its
development in high power applications. Magnetic coupled
multipulse converter has two or more bridges and develops
the staircase voltage waveform by varying transformer turns
ratio with zigzag connections [5].
In these multipulse converter circuits the converter bridges
are operated at fundamental frequency switching (FFS) thus
reduce the switching losses substantially. Pulse number can be
increased in multiples of six, and an increase in every six
pulse VSC reduces the harmonics in the system
proportionally. The THD of stepped voltage of two level
multipulse VSC converters are given in Table I. From this
table, it is clear that VSC only with pulse number 48 qualified
the IEEE standard 519, where the THD is less than 5%. A 48-
pulse voltage source converter is already reported for
STATCOM applications [7]. This paper proposes a 48-pulse
voltage source converter (VSC) for HVDC system. The
reason for choosing 48-pulse operation in this work is that a
48-pulse voltage source converter will give THD within IEEE
519 standard compared to other pulse number such as 30 and
36 as shown in Table I.
TABLE I
STANDARD VOLTAGE THD OF TWO-LEVEL MULTIPULSE CONVERTERS
The control of proposed 48-pulse voltage source converter is
demonstrated and validated for HVDC system. The results
show a substantial reduction in voltage and current harmonics
and THD is well controlled within the limit of IEEE 519
standard. This 48-pulse voltage source converter is
demonstrated a potential candidate for high power and high
voltage AC-DC conversion with minimum switching losses
and reduced voltage and current THDs.
H
Pulse
number
6 12 18 24 30 36 42 48 96
% VSC
voltage
THD
30.9 15.2 10.1 7.5 6.1 5.4 4.3 3.75 1.8
A Two-Level, 48-Pulse Voltage Source Converter
for HVDC Systems
D. Madhan Mohan, Bhim Singh and B. K. Panigrahi
Fifteenth National Power Systems Conference (NPSC), IIT Bombay, December 2008
49
II. CONVERTER SYSTEMCONFIGURATION
Fig. 1 shows the circuit configuration of a 48-pulse voltage
source converter based back-to-back HVDC system. Eight
two-level converters are used in this configuration. In this
work the rectifier operation is simulated by considering
resistance as an equivalent of an inverter. These converters are
connected in parallel at the dc side. The HVDC system is
rated for 100 MW with an each unit of 12.5 MW. It uses
common dc link capacitors. Total of (8X6) 48 solid state
switching devices are used on each side converter system. The
DC link voltage can be selected according the system
configuration by appropriate turns ratio of the converter
transformer. For back-to-back HVDC system it can be
designed low DC link voltage. The HVDC system is modeled
as eight units of 6- pulse converters that are connected in
parallel with appropriate phase shift to achieve the 48 pulse
converter operation. Each 6-pulse converter uses a set of
Y/ZZ transformers connection for phase shift. The
transformers are designed to give a phase shift of 7.5
between two adjacent 6-pulse converters. The phase shift
value is chosen in such a way to have an identical transformer
design. This reduces the magnetic losses in transformers.
Transformers secondary windings are connected in Y
configuration. The primary windings of these transformers are
connected in series and these consist of zigzag connections.
The zigzag connection is used as a phase shifting winding and
gives the phase shift of 7.5 between the two adjacent 6- pulse
converters. Appropriate phase shift is also introduced in the
gate pulses of an individual converter signal [8]. The net 48-
pulse converter AC output voltage is given by
v (t) =8{V sin(t +30) +V sin(47t +150) +
ab48 ab1 ab47
V sin(49t +210) +V sin(95t +330) +......} (1)
ab49 ab95
This converter behaves as a 48-pulse converter where the
minimum harmonics are of the order 47
th
and 49
th
. This
converter generates an almost equivalent to sinusoidal
waveform consisting of stepped waveform equivalent to a 48-
pulse converter and THD of voltage and current is well
maintained within IEEE 519 standard and qualify for the
application in HVDC system without using PWM technique
where the switching loss is quite high. The synthesis of
sinusoidal waveform using the stepped waveform is shown in
Fig. 2. The system parameters used for the simulation are
given in Appendix.
III. CONTROL ALGORITHM
The objective of the control algorithm of VSC is to maintain
the DC voltage at the given reference value and to control the
active power flow from AC grid to DC side, along with
supplying required reactive power to the AC mains. A set of
capacitors is used at the DC bus to support the DC bus voltage
at the required value to make the real power balance between
the two sides of the converter, which is most important for the
successful operation of the VSC based HVDC system. The
stored energy in the capacitors reduces or increases if the
active power is not balanced between two sides of converter
stations. It consists of two controllers, one is the DC voltage
controller and other one is the current controller [9].
Fig. 1 A 48-Pulse voltage source converter based HVDC system
configuration
Fig. 2 Synthesis of Stepped AC voltage waveform of 48-pulse VSC.
A. DC Voltage Controller
The DC voltage control is shown in shown in Fig. 3a in which
reference currents (i
d
*, i
q
*) are achieved by the DC voltage
Fifteenth National Power Systems Conference (NPSC), IIT Bombay, December 2008
50
controller from the reference real power and reference DC
voltage as given below [10]
i
*
d
= (P*/V
s
) + K
V
(V
*
dc
- V
dc
) (2)
i
*
q
= (Q*/3V
s
) (3)
where P
*
is the reference real power to be transmitted from
one side to another side, K
V
is proportional gain constant, V
s
is
rms supply voltage, and V
*
dc
is reference DC voltage. The
reference value of the reactive current (I
q
) is supplied directly
to the inner current loops and is regulated equal to zero in this
study. The first term in (2) decides the power flow in the
system and second term achieves DC voltage regulation by
means of controlling the additional amount of active power
flowing from AC side to DC side. When V
dc
is lower than the
V
*
dc,
then i
*
d
is increased as shown in (2), so that a small
amount of additional active power flows into the DC link
capacitor through rectifier, thus V
dc
rises up to V
*
dc
. When V
dc
is higher than the V
*
dc,
then i
*
d
is decreased so that an amount
of active power flows into the DC link capacitor is reduced,
thus V
dc
is lowered to V
*
dc
.
Fig.3a DC voltage controller
B. Decoupled Current controller
The decoupled current controller shown in shown in Fig. 3b.
The output of the DC voltage controller is fed to the current
controller. The voltage and current relation of the converter is
given by
1
1 1
1
( )
a a a
b b b
c c c
v v i
d
v v R L i
dt
v v i
( ( (
( ( (
= +
( ( (
( ( (

(4)
Three phase to two phase transformation can be applied to (4)
as
d 1
1 1
1 1
1
1 1
1
v

d d
q q q
i v
d w L
R L
dt
d
R L
w L
i v v
dt
( (
(
+
( (
(
=
( (
(
+
( ( (


(5)
Here v
1d
, v
1q
are the d-axis and q-axis components of v
1
, while
i
d
, and i
q
are the d-axis and q-axis components of i
s
. v
d
is the
d-axis component of v
s
whereas v
q
is always zero because the
supply voltage vector is aligned with the d-axis. The
instantaneous active power P, and the reactive power Q are
drawn from the utility grid as
P = v
d.
i
d
+ v
q.
i
q
(6)
Q = v
d.
i
q
- v
q.
i
d
(7)
The control of i
d
and i
q
decides P and Q independently. This
decoupled current control is applied to the system in order to
achieve an independent control of i
d
and i
q
. The AC voltage
commands in the d and q axes, are as v
d
*, and v
q
*. The inner
current controller includes a feedback PI-controller. The
reference currents (i
d
*, i
q
*) from dc voltage controller are
given as inputs to the current controller, and these provide
reference voltages (v
d
*, v
q
*). The operation of the current
controller can be explained by using (8) and (9) as
v
d
*
=v
d
(R.i
d
+eL.i
q
){K
p1
(i
d
*-i
d
)+K
I1
)(i
d
*-i
d
)dt} (8)
v
q
*
=v
q
(R.i
q
+eL.i
d
){K
p2
(i
d
*-i
d
)+K
I2
)(i
d
*-i
d
)dt} (9)
Fig.3b Decoupled Current controller
where K
p1
and K
p2
are proportional gain, K
I1
and K
I2
are
integral gain, i
d
, v
d
and v
q
are d-q values of supply voltage v
s,
and i
d
, i
q
are d-q values of the supply current (i
s
).
Here i
d
* and i
q
* are the current commands in the d and q axes.
The first and second terms of the right hand side cancel the
steady state voltage appearing across the AC-link inductor L
1
.
The third term constitutes feedback control loops of the
currents i
d
and i
q
. The phase shift is calculated by using the
(10) as
*
-1
* tan
*
v
q
v
d
o =
| |
|
|
\ .
(10)
where o* is the angle at which the converter devices are gated.
It is the phase shift angle from the fundamental supply
voltage.
IV. MATLABBASED SIMULATION
The proposed two-level 48-pulse converter is simulated in the
MATLAB environment with Simulink and Power System
Block set (PSB) toolboxes. Fig. 4a shows the MATLAB
model of two-level 48-pulse converter and Fig. 4b shows the
transformer and converter connection to realize 48-pulse
converter model. In this model, eight two-level GTO VSC
bridges are used and connected in parallel in the DC side. The
control algorithm is implemented using Simulink blocks.
Three phase supply of 33kV, 50 Hz is connected to the
converter through an interfacing reactance with a value of 0.2
pu.
Fifteenth National Power Systems Conference (NPSC), IIT Bombay, December 2008
51
Fig. 4a MATLAB model of two-level, 48-pulse VSC system
Fig. 4b MATLAB model of two-level, 48-pulse voltage source converter and
transformer
The primary windings of the transformer are connected in
series therefore, the total supply voltage is shared equally by
eight series connected primary windings of the transformer.
Three phase AC input is fed to the bridge through an interface
reactance. The voltages at the two side of the reactance and
the voltages at the two sides of the transformer are measured
as supply and converter voltages. A DC capacitance is used to
store energy at the DC bus.
V.RESULTS AND DISCUSSION
The steady state performance and dynamic behavior of the
proposed two level, 48-pulse voltage source converter are
simulated to demonstrate its capability. Fig.5 shows the steady
state behavior of modeled converter system. In this figure, it
shows the nature of the supply voltage (v
abc
), ac mains current
(I
abc
), voltage (v
pri
) and current (I
pri
) at the primary side of the
converter transformer and voltage (v
sec
) at the input of the
converter, real power (P) drawn from supply, reactive power
demand (Q), DC voltage (V
dc
), an angle delta (o) for required
power flow and DC power (P
dc
) during steady state is shown
to demonstrate its behavior. The reference power command is
set at 100 MW throughout the steady state operation. The
phase voltage and phase current are in phase with each other
as the reactive power is maintained to zero. Fig. 5 also shows
the voltage and current at supply side, at the primary side of
the converter transformer and at the input of the converter.
Voltages reflected at the input of the converter due to
switching operation are square wave in nature according to the
switching pattern of the converter.
All the secondary voltages are added up and reflected voltage
on the primary side of the transformer is a 48-pulse converter
stepped voltage waveform almost equivalent to sinusoidal
waveform. This voltage becomes smooth at the supply side
due to the addition of phase shifted voltages. Harmonics
spectra of a 48-pulse converter voltage waveform at the
primary winding of the transformer are shown in Fig. 7, which
is very close to sinusoidal waveform made up of stepped
waveform with a THD of 2.9% only. The THD of converter
voltage observed here for 48-pulse operation is much less than
the value shown in the Table I, this is because of the value of
interface reactance. The AC current is equally shared by the
number of converters as they are identical in nature. Fig. 6
shows the dynamic behavior of the converter system, where
the dynamic condition is introduced in the system by changing
the power flow. Initial reference power is set at 75 MW and
at 1 s, the reference active power is increased to 100 MW. The
controller responds immediately for the change in the system
condition to bring back the system DC voltage to its reference
value. The change in power flow is accompanied by changing
the angle delta (o) and keeping all other parameters of the
system remain unchanged. In Fig. 7 it may be observed that
the THD of voltage is as 0.01% and THD of current is found
as low as 0.43%, at 100 % active power. This shows that the
converter results in low THD in current below the IEEE
standard 519 [6]. This makes the supply voltage and current
Fifteenth National Power Systems Conference (NPSC), IIT Bombay, December 2008
52
almost free from harmonics. Various harmonics spectrum
shown in Fig. 7 is observed during steady state condition and
at full load power.
Fig. 5 Steady state performance of proposed 48-pulse voltage source converter
(a)
Fig. 6 Dynamic performance of proposed 48-pulse voltage source converter
(b)
Fifteenth National Power Systems Conference (NPSC), IIT Bombay, December 2008
53
(c)
Fig. 7 Waveforms and harmonic spectra of 48-pulse covnerter (a) supply
voltage (b) supply current (c) converter voltage
VI. CONCLUSION
A 48-pulse two-level voltage source converter has been
designed, modeled and controlled for back-to-back HVDC
system. The transformer connections with appropriate phase
shift have been used to realize a 48-pulse converter along with
a control scheme using a set of two level six pulse converters.
The operation of the designed converter configuration has
been simulated and tested in steady sate and transient
conditions which have demonstrated the quite satisfactory
converter operation. The characteristic harmonics of the
system has also improved by the proposed converter
configuration.
REFERENCES
[1] J. Arrillaga, Y. H. Liu and N. R. Waston, Flexible Power Transmission,
The HVDC Options, John Wiley & Sons, Ltd, Chichester, UK, 2007.
[2] Gunnar Asplund Kjell Eriksson and kjell Svensson, DC Transmission
based on Voltage Source Converter, in Proc. of CIGRE SC14
Colloquium in South Africa 1997, pp.1-8.
[3] Y. H. Liu R. H. Zhang, J. Arrillaga and N. R. Watson, An Overview of
Self-Commutating Converters and their Application in Transmission and
Distribution, in Conf. IEEE/PES Trans. and Distr.Conf. & Exhibition,
Asia and Pacific Dalian, China 2005.
[4] B. R. Anderson, L. Xu, P. Horton and P. Cartwright, Topology for VSC
Transmission, IEE Power Engineering Journal, vol.16, no.3, pp142-
150, June 2002.
[5] G. D. Breuer and R. L. Hauth, HVDCs Increasing Poppularity, IEEE
Potentials, pp.18-21, May 1988.
[6] IEEE Standard 519-1992, IEEE Recommended Practices and
Requirements for Harmonic Control in Electrical Power Systems, IEEE
Inc., New York, 1993.
[7] M.S. EL-Moursi and A. M. Sharaf, Novel controllers for the 48-pulse
VSC STATCOM and SSSC for voltage regulation and reactive power
compensation, IEEE Trans. on Power Systems, vol.20, no.4, pp.1985-
1997, Nov-2005.
[8] Zhengping Xi and S. Bhattacharya, Magnetic Saturation in
Transformers used for a 48-pulse Voltage-Source Converter based
STATCOM under Line to Line System Faults, in. Prof of IEEE Power
Electronics Specialists Conference, 2007, PESC 2007, IEEE, 17-21 June
2007, pp.24502456.
[9] Makoto Hagiwara, Hideaki Fujita and H. Akagi, Performance of a Self-
Commutated BTB HVDC Link System under a Single-Line to-Ground
Fault Condition, IEEE Trans. on Power Electronics, vol.18. no.1,
pp.278-285. Jan-2003.
[10] Makoto Hagiwara and Hirofumi Akagi, An Approach to Regulating the
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D. Madhan Mohan (M08) was born in Kancheepuram, Tamil
Nadu, India in 1980. He received his diploma in Electrical and
Electronics Engg from Bhakvatsalam Polytechnic, Kanchipuram in
1998, Bachelor degree in Electrical and Electronics Engg from
Madras University in 2001, and Masters in Power Systems Engg
from Anna University in 2004. He has worked as a Lecturer in RMD
Engineering College, Chennai. Presently he is pursuing his Ph.D in
Department of Electrical Engg, Indian Institute of Technology Delhi.
His field of interest includes power electronics, power quality,
HVDC and FACTS.
Bhim Singh (SM99) was born in Rahamapur (UP), India, in 1956.
He received the B.E (Electrical) degree from the University of
Roorkee, Roorkee, India, in 1977 and the M.Tech and Ph.D. degree
from the Indian Institute of Technology (IIT) Delhi, New Delhi,
India, in 1979 and 1983, respectively. In 1983, he joined the
Department of Electrical Engineering, University of Roorkee, as a
Lecturer, and in 1988 became a Reader. In December 1990, he joined
the Department of Electrical Engineering, IIT Delhi, as an Assistant
Professor. He became an Associate Professor in 1994 and Professor
in 1997. His area of interest includes power electronics, electrical
machines and drives, active filters, FACTS, HVDC and power
quality. Prof. Singh is a fellow of Indian National Academy of
Engineering (INAE), the Institution of Engineers (India) (IE (I)), and
the Institution of Electronics and Telecommunication Engineers
(IETE), a life member of the Indian Society for Technical Education
(ISTE), the System Society of India (SSI), and the National
Institution of Quality and Reliability (NIQR) and Senior Member of
Institute of Electrical and Electronics Engineers (IEEE).
B. K. Panigrahi (SM06) is an Assistant Professor with the
Department of Electrical Engineering, Indian Institute of Technology
(IIT), New Delhi. Prior to joining IIT Delhi, he was a Lecturer at the
University College of Engineering, Burla, Sambalpur, Orissa, for 13
years. His research interests are in the areas of intelligent control of
FACTS devices, application of advanced DSP techniques for power
quality assessment, and application of soft computing techniques to
power system operation and control.
Fifteenth National Power Systems Conference (NPSC), IIT Bombay, December 2008
54