Measurement of Single Event Effects in the 87C51 Microcontroller

zyxwvu zyxwvu zyxwvu zyxwvuts zyxwvuts MEASUREMENT OF SINGLE EVENT EFFECTS IN THE 87C51MICROCONTROLLER * Dennis L.Oberg, Member. IEEE, Jerry L.Wert, Eugene Nonnand, Joseph D.Ness, peter P.Majewski, and Richard A. Kennemd Boeing Defense & Space Group Seattle, WA 98124-2499 zyxwvutsr zyxwvu zyxwvuts zyxwvu zyxwvu zyxwv This lessens the relative impact of register upsets, which Koga stated may "overestimatethe device upset rate by as much as an order of magnitode". Here, the predominance of RAM over registers allowed for useful &vice upset estimation. Abstract This reportpresents the results of Single Event Effect (SEE) cham%htion testing of the Intel 87C51FC microcontroller for use in Space Station Freedom (SSF). The 87C51FC exhibited4 types of SEE:RAM upset and three types of system errors, i.e., reset, latchup, and power cycle (a condition not correctable by the onboard watchdog timer). ~emicrocontrollercrosssectionsandresponseratesfor these single event effects were determined. Rehinary testing of the 87C51FC was carried using the University of Washiogton Tandem Van de Graaff. (Reference [101gives a brief description of the Eacility and procedures used there.) mere,upset and latchup were observed as well as several new effects descrii in this report. I. Introduction Further testing was conducted at three separate facilities: a) the 88-inch cyclotron at the L a m c e Berkeley Laboratory (LEiL) for the heavy-ion tests,b) the Harvard Cyclotron Laboratary (Ha for )protons with energies of up to 148 MeV,c) the Tri-University Meson Facility 0 for, protons with eneqies of 200 MeV and 500 MeV. Space Station Freedom had intended to use the 87C51FC "controller extensively in the Data Management System and other subsystems. In view of the demonstrated susceptibility of similar Intel "pmessors, (e.g., the 80386 [l] and the 8OC186 [2]) the 87C5lFC was identified early as a prime candidate for SEE testing. As a part of Boeing's overall task,we conducted single event effects tests on the 87C51FC microcontroller to determine the cross section and response rate for SEE,such as upset and latchup. The same basic experimental apparatus was used for all tests and the tested parts were exposed to heavy-ion beams and beams of energetic protons. The response rates of the microcontroller were calculated using the galactic cosmic ray (GCR) and trapped proton environments defined for SSF [3]. Data were also taken for the 87C51FB microcontroller. These SEE data are not presented here but are available in the fullreport [4]. The Intel 87C51FC is a highly integrated 8-bit CHMOS III-E microcontroller based on the Intel MCS-51 architecture and is optimized for control applications. The FC version has 32K-bytes of onchip EPROM. It has 256 bytes of onchip RAM. The upper 128bytes occupy aparalleladdress space to the SpecialFunction Registers. Additional featms of the microcontroller, common to both versions, include: a) four 8bit bidirectional parallel ports, b) three 16-bit timer/counters, c) programmable counter array, d) fullduplexprogrammable serial port, e) intermpt structure, and f) power-saving modes. 2. Test Environmentsand Dosimetry A. SEE testing of microprocessorshas been carried out extensively over the yeam [5-9]. Koga [71 dehed seveml scenarios for microprocessortests. This research described in this paper used a technique that may be roughly classified as the "Self-testing Single Computer Method". One of the relevant diBerences between the 87C51 and a microprocessor is the large amount of on-board RAM in the microcontroller. m88-inchevclotron Tests at the LBL 88-inch cyclotron used the "Aerospace Cocldail" [7,11]. This CO1lSiSted of four different heavy ions (Kr, Ne, AI,N), all with an energy per nucleon of 4.5 MeV/amu (atomicmass unit). In addition, the cyclotron was retuned to provide nitrogen ions at a higher energy (7.9 Mev/amu)for a lower LET (linear energy transfer). The Boeing SEE test chambex was attached directly to the beamline and contained the device under test @UT) mounted on atest circuit cad. 'Ihe card and DUT were installed on an 0-7803-1906-0/94$04.0001994IEEE 43 zyxwvutsrqponm zyxwvuts zyxwvu zyxwvu zyxwvut zyxwvutsrq zyxwv zyxwvuts zyxwvuts zyxw apparatus that allowed rotation of the card and DUT with respect to the beam line. Tests were conducted at multiple angles to obtain bez adjustment of LET. To a 6rst approximation, effective W increases with increasing angle as given in equation 1. (Exposure a! angle also modifies the effective incident flueace). C. . . n-Uniy&y Meson Tests at TRIUMF used proton beams of 200 MeV and 500 MeV. The microcontrollers were exposed to fluences ranging between lElO to 5E10 p/cm2during the runs. The beam was collimated using a series of collimators arranged to provide a 2.5 x 5.0 cm aperture. This allowed beam illumination of the DUT and not the supporting devices on the test circuit card. A small scintillator was used to scan the beam and determine beam unifodty (down less than 20% at the edge). 3. Test Approach The ion exposure environments and the corresponding linear energy transfer values are listed in table 1. Ion Kr Energy MeV Flux LET rvkval%ng R(si)cLm Ioaslan*/sec 380 Table 1Heavy Ion Beam 38.5 46 2E2 2.8 2.0 150 2E4 2E4 m a and ranges l l ~ for c The temperature of the DUT within the test chamber was controlled and monitored using a Boeing designed system including electrical heating elements and temperature sensors that wexe attached to the DUT using thermal grease. On-line dosimetry for each run was based on the reading of a PIN diode located just upstream of the DUT location. The use of a PIN diode for on-line flux monitoring of heavy-ion beams is a common technique, previously described in refmnce [121. The beam flux was adjusted with attenuators to achieve one or two upsets per time frame (see section 4.A for a description of time frames). Heavy-ion fluxes were variable, typical values being given in table 1. Testsat the W a r d cyclotron used proton beams of five Werent energies: 20,40,70,110,and 148 MeV. The m i m n t r o l l m were exposed to fluences ranging between lElO to E10 p/cm2during the runs. The cyclotron produces protons of 160MeV. Protons of lower energy were obtained by means of Lucite and lead degraders that also served to spread the beam. The HCL has developed an absolute dosimeter for its proton radiation therapy work [13,14]and this was used for t h m tests. Beam size and uniformity were determined with exposures of Polaroid film and were observed to vary no more than 10% across the exposure area as definedby a collimator. Microcontroller upsets are expected to fall under two general categories: data upsets and functional upsets. Data upsets are upsets that occur in RAM, counters, or shift registers, and certain SFR’s, which can be detected by the mimontroller executing a test program and which are reset under test program control. Functional upsets are upsets of internal nodes, such as the program counter 0, special function registers (SFR’s),program status register (PSR),or the program stack, which may affectprogram sequence. Functional upsets wexe usually more deleterious and required an extemal reset of the microcontroller to restm operation. ?he intent of the test program was to exercise and check for the proper operation of the majority of the chip functions in such a manner as to measure the sensitivityof the devices to SEE. The test program was designed to initialize the test sample upon start-up or reset, and to continuously test the contents of intemal storage registers and RAM. The p g r a m provided status signals to extemal instrumentation, which indicated device status and general failuremodes. The intemal storage structures, which wexe tested for data upsets, included: direct RAM,64 bytes; indirect RAM, 128 bytes; serial-port shiftregisters, 16 bytes; and special function registers, 150bits. Since the microcontroller is in essence a complex state machine, certain internal storage nodes could not be tested explicitly. An upset in these areas could only be inferred from extemally observable anomalous behavior, such as halting the program execution, program “run-away”,or other behavior inconsistent with proper program execution. These conditions are described as latchup, power cycle or m e t (lockup or runaway) depending on their effect and how proper microcontroller recoveay was achieved. Detection of these conditions is d e s c r i i below. Data upsets were disregarded when reset or latchup conditions were detected. The test program was constructed as a continuously repting loop. On each pass the following chip areas and functions were examined: a) directly addressableRAM (DRAM), b) indirectly addressableRAM 0, 44 zyxwvutsrqpon zyxwvutsr zyxwvutsrq zyxwvuts zyxwvut zyxwvu zyxwvutsrq zyxwvu zyxwvu zyxwvuts and power cycling Circuitry), which monitored the supply current ( I d drawn by the "controller and cycled power to the circuit when latchup was &tected. This testaid had been designed and developed to compare the supply current (nominally 20 mA) witb a preselected trip level (50 mA), generate a signal to be recoded as a count in the latchup scalar when Im exceeds the trip level, and cycle power to the circuit so that proper operationis ltmned. c) UART operation, d) the maprity of the SFR's, which control the hardware operational states. Port 1on the mirocontroller was used as the interfkce with external instrumentation to provide status and e m information. The port lines wexe defined as follows: System-Boot (which was pulsed once as the device was reset); Loop_Start (which was pulsed at the start of each loop iteration, indicating proper operation); Direct-RAM-Error, Indirectm-Error, and SFR-Emr (these w<re pulsed once for each failing byte in the tested areaof the corresponding areas). RAM upset data,such as address and register contents, were also captured using a logic analyzer. 4. TesrResults A. P a t a ~ Single event effect testing of random access memories is usually straight forwad. A preselected pattern is recorded into the RAM that is periodicauy compared with the initial pattem as the device is exposed to abeam of ions to detect any upsets. Upsets may be counted with no regard for spurious events other than latchup so that the data resulting from these tests can be directly intexpreted. RAM, Serial port registers, and SFR were each tested with individual procedures. In this test approach all unused, contiguous memory blocks were filled with NOP's ending in a jump-to-self instruction. Ifa device upset were to occur which resulted in the program counter entering this unused space, control would eventually come to the jump-to-self instruction. After a maximum of 20 ms the external watch dog timer would initiate a reset, starting the program over. The procedm for taking upset data with the 87C51FC mirocontrolleris very Merent from such simple RAM'S. Fit,the "controller has many different upset mechanisms, all of which must be taken into considemtion and counted. Second, the microwntroller may generate a large number of spurious upsets caused by internal system upsets and these must not be counted with RAM upsets. Third, the microcontroller may stop functioning and require rebooting by a watchdog timer. During system reboot, spurious upsets were disegarded. Control and monitoring of the microcontroller during test was accomplished with circuits on a test card, a latchup aid/power supply, and external test instrumentation. An Intel 87C51 evaluation board [15] was also used. During nonnal microcontroller execution, the test program operated as a continuous loop, testing RAM and various internal nodes, and issuing a re-initialization signal to the "watchdog timer" (WD"') once every loop. (Koga, et al, [7] also used a WDT in their testing.) If no upsets were detected, a WDT re-initialization signal was generated by the test program before the program loop execution timer @LET) timed out (approximately 20 ms). Time-out of this timer was indicative of anomalous program operation. Additional failure modes were also discovered during the course of testing. It was determined that the watchdog timer &uit was not always able to reset the microcontroller. To alleviate this,occmnce of a second, consecutive, watchdog time-out caused the power to the microcontroller to be cycled. These events were accumulated in a scalar as "power cycle" counts. Single event latchup events were detected by the increase in power supply current that they induced. The DUT power was cycled to " x t the latchup condition and the number of these events was couoted separately. The WDT circuit consisted of threetimers and a DUT power control circuit. The timers were: 1) the PLET, 2)a reset pulsewidth timer, and 3) a powerdown interval timer. When the PLET timed out, a signal was sent to the reset pulse-width timer and the microcontroller was reset (warm boot). ThisoperationalsoreinitializedthePLFJT. Ifthe microcontroller did not respond appropriately to the reset signal within a second time-out period, a power cycling sequence was initiated (cold boot). The power cycling circuitry removed power from the test device for approximately 10 ms. External scalars totaled the number of resetsand the number of power cycling occurrences. Upsets in the IRAM and DRAM segments of the microcontroller memory were detected by the running program and indicated by toggling discrete lines b m the microcontroller. These were accumulated by scalarsalong with other signals b m the system, described elsewhere. Diagnostic information (time and beam fluence) was recorded on other scalars. The data acquired in the scalars was read by a computer at fixed time intervals. The scalars were then automatically reset and restarted. The advantage of this approach was that confined spurious counts to one "frame" of The mimntroller is also susceptible to single event induced latchup. Latchup conditions were detected with the Boeing designed latchup test aid (power supply, comparator, 45 zyxwv zyxwvu zyxwvuts zyxwvutsrq zyxwvutsrqpo zyxwvut . . variability was seen. Such data was then summed for such subsets to reduce the Statistical e". d a t a a n d a V 0 i d e d " m t q the entire data set. At LBL, the datarates weae high enough that data was taken every StXOlUL *at HCLdTRIUMFtheUpSetSoccunedleSS ffequedy, sothe data frame was 10 seconds long. zyxwvu zyxwvutsrqp zyxwvut The results of heavy-ion testing are discussed for each observed effect in the following sections. The accumnlateddata sets are quik voluminous. Each of the :ItwasseenthattheIRAMandDRAM u)oaamoreruns consistedof up to 2oodataframesof 10 bit cross sections for single event upset are essentially scalar valutsof 7 digits each. Each frame of data was identical, so only IRAM data is presented in figure 1. This analyzedby a set of automated qmakhef macros and summed as desctibedbelow for eachdif€mnteffect. was not unexpected since the IRAM and DRAM are composed of the same kind of RAM cell. Latchnn: W E latchup events were detected by a current monitor after which DUT power was cycled to remove the latch condition. All data frameswere counted toward the latchup total. The cross section was then just the total number of latchup events divided by the total fluence (corrected for angle and calibration factor). As expected, a latchup condition caused all of the other systems to generate spnrious counts. power Ch& A power cycle was defined as a condition not reset by a watchdog timer reset. It was detected by two sequentid WDT time-outs. This situation was recovered by cycling the power to the DUT. All data frames that do not include latchup events were summed for power cycle data and flue-. Power cycle also caused the remaining signals to generate spurious counts. System reset was defmed as a condition causing the watchdog timer to time-out and generate a resetheboot signal. All data framesthat do not include power cycle or latchup events were summed for system reset and fluence. System reset caused the remaining (RAM) signals to generate spurious counts. All data frames that do not include system reset, power cycle or latchup were summedfor IRAM and DRAM data and fluence. (In some instances, a large number of RAM upsets occurred in a single "valid" frame, these were presumed to be caused by "spill-ovef from adjacent frame resets,latchup or other cause, and were not counted.) IRAM data was taken from upsets in 128 bytes (10% bits). DRAM data was taken from upsets in 64bytes (512bits). The RAM bit upset cross sections (number of upsets divided by effective total fluence) were obtained by dividing the cross section by the number of bits. 1 m m*Lvh" - lm - plsure 1 Average IRAM C"Sectbn. Bit- QOU rectimfar 87CSlEC "IRAM" YQUU LET. Data ~ I C sbownfor2voltager (4V & 6V). It can be seen that the RAM upset cross section for the 4 volt bias condition is usually worst case, as expected. At low LET values, the diffemce between 4 and 6 volts can be more than an order of magnitude. At higher LETSthe difference is less. The device upset cross section is application dependent and is here defined as worst case, where all bits of IRAM,DRAM, SFR's. and other internal registers add up to approximately 2300 bits. A logic analyzer was used to record data to investigate the distribution of over RAM address space, the occurrencesof multiple bit errors, and the characteristics of m r transitions. Histograms of memory mrs showed no apparent trend, the ernlr distribution seemed to be random over the address mnge. Error data was also analyzed to determine the number of multiple bit errors within a single word and to determine a pieference of low-high or high-low transitions. Fbr the logic analyzer errors that were processed, the percentage of multiple bit e m was seen to be approximately 2%. High-to-low error transitions showed a pronounced preference (accountingfor 75% of the RAM zyxwvutsr Data:The plotted data was obtained by summing subsetsof data. Many independent valiables were tested for effect ie., bias voltage, DUT tempemure, device type (FB or Ec), and device serial number. Some variables were seen to be important for some effects: voltage and temperaane on latchup [lll, and voltage on upset, for instance. However little variation was seen far &er variables and effects, such as temperature on upset. In addition, little device-todevice 46 -1. Limited data was taken far the special functionregisters (SFR's). The data is similar to the RAM data and so is not presented zyxwvutsr zyxwvuts zyxwvutsr zyxwvutsrqpo zyxwvuts zyxwvut zyxwvuts zyxwvu Thedevicecrosssectionfok"system lock@ext" is shown in figure 2. It can be seen that the shape of the cnws-section CIWe is similar to chat for RAM upset. Theratiooft o * m is plotted in figm 3. It can be seen that the ratio is nearly independent of LETatavalueofabout100RAMbitsperdeviceItset.This leadsus to p " e that the cause of system Itset is a subset 0fRAMupsets. plossibleddatesforinducingresetare upsets ofthe programmunter mother qism(SFR's) or upsetsofdatastonzdintheprogram"stack".Amugh calculation ofthe number of such bits was done and seen to be close to what was o;twervad.It is expcctedthatthisvalueis veryapplicationdependent. Apgramthatusesalarge amount of "stack",for instance, would likely have a higher reset ratio. I -1pEAWpu at 50 mA, a threshold of 30 mA. Tbe detection threshold is indicated in the fqure andit canbe seen that we detect appximately9o%dalllatchllpevents(withsubsrantial variability). The ranaining 10%of s u b - M l & undetected npsesS were rprobably the high LEI'"power cycle" events describedbelow. I H w -: The single event latchup data is shown in figure 4. It can be seen that the &volt data at high temperature is wurst case,as was expected [l11. 1 7 The dewice current was monitored during irradiation to -ton ions and collected fur successive latchup events. Latchup current was recorded each time there was a change. Two diffemt tests were conducted. In figure5, the individual current increasesm depicted in histogramfashion (as was also done by LaBel, et al[9]). The normal operating current was 20 mA and our latchup detection circuit triggered 47 zyxwv The cross section for "power cycle" events is shown in figure 6. In this figurethe caption "No Events" indicates the detection limit for the fluenceof the run (i.e., l/fluence). The high cross section for the 6-V high-LET data power Cy& zyxwvutsrqponm zyxwvuts zyxwvut zyxwvuts zyxwvutsrq zyxwvuts suggests a latchup related effect. Indeed,the cross section is appmximately what one would expect from undetezted ]atchap (seediscussionof latchup above). D. figure 7 also showsa curve that is fit to 4.5-volt data points. The 2-parameter Bendel model [20] has been suggested for proton SEU cross sections and is given by: protoncnwSsectionResults The low LE;T threshold seen in heavy-ion tests indicated that the 87C51FC would atso be upset by trapped protons [16,171. proton SEU tests were thus conducted on the 87C51FC microcontroller at both HCL and TRIUMF. zyxwvut Upsets were encounted in all of the proton SEU runs but proton-induced latchup was not. The fact that no latchup was measured is consistent with the findings of other workers. Earlier this year researchers at JPL [18] and ESA [191 reportedon proton-induced latchup measurements. In both c ~ s e sthe susceptible parts had a heavy-ion LET latchup threshold of approximately 3 MeV-cm2hg. Since our LBL tests on the 87C51FC microcontroller indicate a LEIT latchup threshold of greater than 10h4eV-cm2/mgthat is considerably higher than 3 MeV-cm2/mg,it is not all surprising that no proton-induced latchup was recorded. In g a d , we saw little variation in the number of upsets for the two temperannes (as was also the case for the heavy ion data). A parameter that was varied and which did cause a variation in the upset response was the bias voltage. The nominal bias voltage for the microamtrolleris 5 volts. During the HCL tests,runs with 148-MeV protons were made with the bias voltage ai 4 5 volts and 55 volts. As expected, the upset cross section at the lower voltage was greater, in this case about 3096,than at the higher voltage. The TRIUMFtests wefe conducted at 5 volts and 4 volts with the 500MeV beam and only 4 volts with the 200-MeVbeam. "he combined upset cross section with 500-MeVprotons is approximately 2.5 times larger at 4 volts than it is at 5 volts. To utilize all the proton SEU data, we have adjusted the data up or down to a bias voltage of 4.5 volts as shown in figure 7. Total dose effects were seen in the HCL andTRIUMF proton tests. The effects were small and were included in the ("=Y E-A) where: E = proton energy A = 1.5 B/A = 0.953 The agreement between the data points and the fit is adequate. However, while the Bendel model expects the upset cross section to decrease at low energies, our data indicates no fall-off. The 20 MeV data point has a large energy uncertainty,however, since more degraders were used to achieve this low energy. zyxwvuts zyxwvutsrqpon Rate predictions for heavy-ion SEE (for the worst case operation) were made for the failure modes for the 87C51FC microcontroller. These were performed in accordance with procedures found in =ferences [3] and [4] and used the galactic heavy-ion spectrum appropriate for the SSF orbit. Results are given in table 2. I I Environment NIA 3.8E-3 25 3.2E-3 Mean Time to Failure analysis. Upset (Days) 'Reset ptchup I 320 1 260 1 140 630 Yq Table 2. Ratea for upset, me4 pod latchup for the 87c51Fc P m lpcm - m 'he "reset" or "lockup" failure rate can be obtained by multiplying the bit upset rate by 100. It must be emphasized that this is very application dependent. The failure rate due to "powercycle" was always less than the latchup rateand may be an artifact of the test technique. 48 zyxwvutsr zyxwvuts zyxwvutsrq zyxwvutsr zyxwvu zyxwvutsrqp zyxwvutsr statistically signifbut and relatively few upsets were due to LETS andenergieswhertthedatais statistically marginal. The proton upset cross section allows us to calculate the rate of upset induced in the 87a1 microcmmllerbythe trapped protons in the Space Station orbit. Using the two-parameter Bendel fit and the differential proton flux [3], the upset rate is also given in table 2. zyxwvutsr &a&yityA&i& G. It is of interest to see to what extent our data is "complete" in LET or proton energy coverage. A sensitivityfunction can supply this information. The sensitivity function is simply the cross section times the appropriate spectrum plotted against LET or energy. (For a logarithmic X-axis, the sensitivity data is multiplied by the X-value.) This was done for heavy-ion data and is plotted in figure 8 for SEU and figure 9 for SEL. Proton RAM upset data is plotted in figure 10. It can be seen that all of the latchups resulted from ions at an LET where the data is good. The upset sensitivity is peaked between 2 and 4 MeV-cm2/mg;however, the worst case error is acceptable. ILY L zyxwvu zyxwvutsrq 5. sumntmy Data upset, lockupheset, and latchup ratepredictions based on Space Station Freedom radiation envirOnmentsand on test data for the 87C51FC mimntrollm are summarized in table 2. The upset rates are seen to be dominated by the proton environment. These heavy-ion and proton SEE rates were found to be nonnegligible for use in many SSF systems. Boeing chose to complete development and initiateproduction of a SEEhardened [21] version of the microcontroller that is expected to be used inmany of these systems. 8 I m -1 REFERENCES m - 1. Scott, TM."SingleEvan Tat Method and T a t Resub for Intel's80386", Figure 8 SEU Scositlvity. The wonu cane heavy ion bappset cros~ld o n is ploaedtowith the sensitivity fuactionforthe "Dent at low ecuth IBMRewa89-PN6-005. 1989. OrW 2 W ~ R I C , S W ~ Q € L R . ~ E ~ ~''SingleEvcatEffedr ~,LD., R e p o r t f o r t h e h t d M 8 O C 1 8 6 ~ f . J R ~ o d o b e r 1992. 3. "Space Station Ionizing RdLtimh i s i o n md suscqrtibilltyRaphemcats for Ionizing Radiation Ebvinumd crmaatibility". 1991, o n d " S p a c e S t a t i m F l * ~ h ~ EffCctrTeJtand Analysis T e c h a i ~ " , 1991. w= - 4. TJ. Baker, R B;rllu4RA.I(anard,J C Lambert.P.Majewski. J. Nas, E. Normend. DL. Obq. O.A. Pary,JL Wat, "87C51Micnxonlmllcr Siagle - E v u ~ t U p u l T a t R q ~ o r t " , & &october1992. ~ ~ 5. Oucnzcr, CS.,Qmpbcll,AB.,md shpiro,P.,"SingleEvmt Upus in NMOS Micmpmxsron",IEEETrens.Nucl. Sa.. NS-28,3955(1981). 6. S h p h , P.,Cmpbcll, AB.. ptanen.EL.and Myea. LT.,"protonInduced Single EMlt upetr in NMOS Mi-n". IEEE T m .Nucl. Sci., NS-29,2072(1982). 7. Koga, R.Kobimki, W.A..Mum, M.T., and Haonq W.A., "iques of MicFoprocesrorTariDg and SEU-Ratcprediction", IEEE T r m . Nucf. Sci., NS- 32,4219 (1985). 'Ihis sensitivity analysis establish good confidence in the calculation of upset and latchup rates since most of the upsets and latchups were due to LETS and energies where the data is 8. Nichols, D.K. Cas.J.R., Smith. LS.. Rax,B., H"x,M.,and Wmon, i c Event Upsetchractauah ' 'OnofTwo h & m p " r Tcdmologi~".IEEETronr.Nucl. Sei., NS-35,1619(1988). K,"FbU Tempetatrue S 49 zyxwvuts zyxwvutsr zyxwvutsr zyxwvutsr zyxwvutsrq zyxwvutsr ACKNOFYLEDGMENlS Tbe Boeing team gratefully acknowledges the assistance of the following individuals and staffs that allowed US to complete these irradiation studies: Richard McDonald zyxwvutsrq (LawreaceBerkeleyLabaratary),EthaoCasio(Harvard Cyclotron), David A. Hutcheon m, and William Weitlamp (University of Washington). We also wish to ahowledge the efforts of Joe Suade and Mark Henning (Boeing). 50