Hybrid modulator for power converters in parallel topology

Hybrid Modulator for power converters in parallel topology J. Mon, D. González, J. Balcells, J. Gago, P. Bogónez Departament d’Enginyeria Electrònica, Universitat Politècnica de Catalunya. Campus de Terrassa. 08222 Terrassa, Spain. [email protected] Abstract — This paper presents a new mixed modulator that combines interleaving and spread-spectrum techniques in order to achieve the lowest level of conducted EMI generation. This modulator is addressed to power converters in parallel arrangement. The practical details of the hybrid modulator and controller implementation on a FPGA are explained. The characteristics of such modulator in terms of EMI reduction and converter performance are theoretically explored and experimentally validated in a four channel parallel buck converter operating in closed loop. Keywords — Interleaving, frequency modulation, EMI, EMC. I. INTRODUCTION Switched power converters are operated with constant switching frequency under hard switching regime using Pulse Width Modulation. In a general way, the modulator is the block that generates the switching patterns from the control signal generated by the converter controller. Therefore, it is the block responsible of the main source of EMI. Since switching frequency modulation (SFM) was introduced as EMI reduction technique in switched power converters a lot of works have been published developing this idea [1–11]. At present, it is a well established technique and a worthy alternative to the traditional filtering methods such as the bulky EMI filters or snubber networks in terms of attenuation, cost and simplicity of application. In part due to increase of using programmable logic devices in order to implement digital control systems [11, 13], SFM-modulators are digitally implemented on a field programmable gate array (FPGA) [10, 11] or complex programmable logic device (CPLD) [14]. They have been applied to several applications such as home cooking appliance [10] or high performance power supply [14]. However, the application of SFM techniques in distributed or modular power systems made up of several power converters has not been deeply studied yet. On the other hand, some recent works address the implementation of multiphase digital modulators in order to apply interleaving in parallel multiconverter arrangement, [15, 16]. However, the combined application of interleaving and SFM techniques is an open research field. This paper presents a new mixed modulator that combines interleaving and spread-spectrum techniques specially intended for conducted EMI suppression. It should be mentioned that this mixed modulator could be applied not only to DC/DC converters but to all kind of multiconverters arrangements. A thorough description of interleaving can be found in [17- 19]. This paper is organized as follows. First of all, Section II presents the theoretical development of the three hybrid modulations that have been considered. Section III describes the practical implementation used to validate theoretical developments. Section IV summarizes main results that validate the proposed approach. Finally, conclusions are outlined in Section V. II. HYBRID MODULATOR THEORY Spread Spectrum Modulation in single converter consists of modulating the switching period around a central value, Tc, according to a given modulation profile. In order to combine the interleaving and spread spectrum modulation in multiconverter arrangement there are several possibilities. Fig. 1 illustrates switching patterns of a multichannel hybrid modulator when the periodic modulation profile is used, where i notes each channel (i = 1, 2, ..., N), αi is the delay among switching patterns, qi(t), and εk,i is the pulse position delay inside the kth switching cycle. Each switching pattern contains L switching cycles (1). Notice that each switching pattern has a period equal to the period of the modulation profile, T m. T (1) L = m , L int eger > 0 Tc Fig. 1. Generic frequency-modulated switching patterns. Table I summarizes the modulation characteristics of the three modulation considered in this paper: Constant Delay Tm with switching Frequency Modulation (CDFM-Tm), Constant Delay Tc with switching Frequency Modulation (CDFM-Tc) and Variable Delay with switching Frequency Modulation (VDFM). In all cases, a modulation on the switching period is introduced according to a triangular modulation profile. On the other hand, the value of the duty cycle, Dc, is always established by the controller. TABLE I CHARACTERISTICS OF DIFFERENT MODULATIONS Modulations εk,i Tk,i τk,i αi CDFM-Tm 0 ∀i,k Tc+ΔTk ∀i Dc·Tk ∀i Tm ( i −1) N CDFM-Tc 0 ∀i,k Tc+ΔTk ∀i Dc·Tk ∀i Tc ( i −1 ) N VDFM Tk,i ( i −1) N Tc+ΔTk ∀i Dc·Tk ∀i 0 ∀i In order to evaluate the attenuation provided by the proposed modulations, a time domain description of the switching pattern, qi(t), must be determined. Considering that a switching pattern has a period equal to the modulation profile period, Tm, the time domain expression of each of them, qi(t), can be written as (2) qi ( t ) = ∞ ∑ Ci ,n e − j 2πnt Tm ∞ = Ci ,0 + 2∑ Ci ,n e − j 2πnt Tm (2) n =1 n=−∞ where Ci,n are the Fourier coefficients calculated according to (3) Ci ,n = L × ∑e 1 Tm Tm ∫0 qi ( t ) e − j 2πnt Tm dt − j 2πn (ε k ,i + H k ,i ) Tm k =1 1 − e   = A e j 2πn − j 2πnτ k ,i Tm − j 2πnα i Tm (3)     where A is the amplitude of each pattern, qi(t), and Hk,i is the starting time of the kth switching cycle of each pattern. Finally, the equivalent source of noise, s(t), in a multiconverter arrangement with N channels is determined by the addition of each particular pattern, qi(t), according to (4). A. Constant Delay Tm with switching Frequency Modulation (CDFM-Tm) The interleaving effect is obtained by introducing a delay αi among the N switching patterns, which is determined according to the modulation profile, Tm. Considering the values of Table I, the equivalent source of noise in frequency domain, SCDFM−Tm (w), can be expressed by (5) ∞   N A S CDFM −Tm ( w ) = F ∑ q i ( t ) = NADc ∂(w) + ∑  j n π n =1    i =1  − j 2πn  L − j 2πnDcTk   1−  − j 2πnH k  ×  e− j 2πn  ∑ e Tm 1 − e Tm  ∂(w − nwm )  k =1     1 − e N  (5) = NADc ∂(w) + N E CDFM −Tm (w) ∞  − j 2πnDcTk   A L  − j 2πnH k   × ∑  ∑ e Tm 1 − e Tm  ∂(w − nwm ) n =1  jπn k =1     where wm is corresponds to the modulation profile frequency (6). wm = 2πf m = 2π Tm (6) Notice that the absolute value of ECDFM-Tm (w) takes the values given by (7): 0 n = hN ECDFM −Tm ( w ) =  1 n ≠ hN h = 0,1,2, ,∞ (7) Figure 2 illustrates the CDFM-Tm effect. This modulation leads to energy spreading of original harmonics in sidebands. This spectrum contains components at frequencies nNfm only instead of nfm if pure modulation (without interleaving) were applied [4]. For this reason, there are no components at frequencies fc, 3fc and 5fc in the resulting spectrum shown in Fig. 2. N s( t ) = ∑ qi ( t ) (4) i =1 The modulation parameters shown in Table II were used to compare effects of the proposed modulations. A triangular modulation profile was used in all cases and A was set equal to 1. Modulations No modulation CDFM-Tm CDFM-Tc VDFM TABLE II MODULATION PARAMETERS fc Δfc fm [kHz] [kHz] [kHz] 0 0 300 60 10 Fig. 2. CDFM-Tm vs. Non modulated. Dc [%] N 13.5 4 B. Constant Delay Tc with switching Frequency Modulation (CDFM-Tc) In this modulation, the delay αi among the switching patterns is calculated from the central value of switching cycle, Tc. The equivalent source of noise in frequency domain, SCDFM−Tc (w), is expressed by (8). ∞  N  A S CDFM −Tc ( w ) = F ∑ qi ( t ) = NADc ∂(w) + ∑  π j n n =1   i =1  − j 2πn    − j 2πnDcTk   1 − L  L  − j 2πnH k   e  ∂ (w − nwm ) × Tm 1 − e Tm  − j 2πn  ∑ e     (8) 1 − e NL  k =1   = NADc ∂ (w) + N ECDFM −Tc (w) ∞  − j 2πnDcTk   A L  − j 2πnH k   × ∑  ∑ e Tm 1 − e Tm  ∂ (w − nwm )   n =1  jπn k =1   Fig. 5 VDFM vs. Non modulated The term ECDFM-Tc(w) provides a energy spread effect that is illustrated in Fig. 3. From Fig. 3 harmonic cancellation is noticed at frequencies nfc except those multiple of Nfc. In comparison to CDFM-Tm, an additional attenuation is observed for all frequencies except those multiple of Nfc. Therefore, a better performance than CDFM-Tm is expected. Figure 4 shows the resulting spectrum of CDFM-Tc. Figure 5 illustrates the VDFM effect. The resulting spectrum contains only harmonics of Nfc, which energy is spread in sidebands. Separation between sidebands is fm. VDFM provides the best results in terms of attenuation. The resulting spectrum of VDFM is equivalent to a single converter operated at Nfc with spread spectrum frequency modulation. III. HYBRID MODULATOR IMPLEMENTATION The hybrid modulator and the digital control loop were implemented on a Spartan-3 FPGA board from Xilinx. Figure 6 shows the block diagram of an n-channels hybrid modulator. The input signal of the hybrid modulator is the numerical value of the duty cycle, d, that comes from the converter controller module. Output signals PWMi goes to the driver of each switching device. This mixed modulator can generate the three above mentioned modulations presented in Section II. Fig. 3. Envelope of ECDFM-Tc(w). Fig. 4. CDFM-Tc vs. Non modulated. C. Variable Delay with switching Frequency Modulation (VDFM) In VDFM there is any delay among switching patterns (αi =0). In this case, a delay on each particular switching cycle, εk,i, is introduced according to Table I. The equivalent noise pattern in frequency domain, SVDFM (ω), is expressed by (9). ∞   N A SVDFM ( w ) = F ∑ qi ( t ) = NADc ∂(w) + ∑  j n π n =1    i =1 − j 2πnTk    − j 2πnH k  1 − e Tm × ∑ e Tm  − j 2πnT k =1   1 − NT k m e   L    − j 2πnDcTk     1 − e Tm ∂(w − nwm )       (9) Fig. 6. Block diagram of Hybrid-Modulator. Each particular channel consists of two modules, Switching Frequency Modulator, (SFMi), and Digital Pulse Width Modulator, (DPWMi). This structure is repeated to obtain a multichannel structure. The module SFM generates the modulation on the switching period and the duty cycle. From these values, module DPWM finally generates the pulse trains for the drivers of the switching devices. The module Gen_Enable manages all the channels of the mixed modulator by generating the delay among the switching pattern of each channel and their enable signals as well. A. Gen_Enable The basic structure in order to apply a shift delay, αi, among PWMi signals is based in a shift register [18, 19]. However, this approach presents two drawbacks. First, all PWMi signals have the same switching period. On the other hand, this structure does not allow to introduce delays in the pulse position in each switching cycle, εk,i. Figure 7 shows the proposed structure in order to apply a shift delay, αi. It is based on the counter-comparator architecture. These delays are obtained by introducing variable shift delays among the enable signals for each channel, En_PWMi. This implementation allows having different switching periods for each particular channel. required by the modulations presented in Section II. This has been done by varying the amplitude of a sawtooth signal, as it illustrated in Fig. 9 where the output signal of the module are shown. The value of data_CMPR adjusts the duty cycle and Data_PR adjusts the instantaneous switching periods, Tk,i. The Tc signal is used to synchronize the update of Data_CMPR and Data_PR signals at the beginning of each switching cycle. Notice that Data_CMPR is scaled in each switching cycle in order to keep constant the ratio between its value and the varying Data_PR. This results in a correct generation of the duty cycle value that is set by the converter controller on each switching cycle. There are two memory blocks, MEM_CMPR and MEM_PR, that contains Data_CMPR scaling values and Tk,i values, respectively. The value required for Data_CMPR scaling for the current switching period is contained in CMPR_aux signal. Their values are calculated off-line according to (10) and stored in the MEM_CMPR memory block. Regarding MEM_PR memory block, it contains the number of clock cycles required to generate each instantaneous switching periods, Tk,i. They are calculated off-line according to (11). Tk,i (10) CMPR_aux = , k = 1,2,..., L min{Tk,i } Data_PR = Tk,i , k = 1,2 ,..., L Tclk (11) Fig. 7. Block diagram of Gen_Enable. B. SFM SFM module, which block diagram is shown in Fig. 8, is intended to modulate the instantaneous switching period, Tk,i, of each switching pattern, as it is The block Control Unit (CU) is a finite state machine that generates all control signals necessary for accessing MEM_CMPR and MEM_PR memory blocks. In the particular case of modulation VDFM, only the initial pulse position delay for each channel, ε1,i, is introduced by the Gen_Enable module as a delay between PWM patterns. However, the following pulse position delays are introduced by the SFMi modules by modifying the instantaneous switching period of each channel, according to (12). This approach is illustrated by Fig. 10. Tk′,i = Tk ,1 + ε k +1,i − ε k ,i = Tk ,1 + − Tk +1,i N ( i − 1) Tk ,i ( i − 1 ), k = 1,2,..., L − 1 N TL′ ,i = TL ,i + ε 1,i − ε L ,i = = TL ,i + Fig. 8. Block diagram of SFM. T1,i N ( i − 1) − TL ,i N ( i − 1 ), k = L Fig. 10. PWM signals used by VDFM. Fig. 9. Spread Spectrum PWM. (12) IV. EXPERIMENTAL RESULTS The hybrid modulator described in Section III has been validated in a four channel parallel buck converter. Figure 11 shows the block diagram of the experimental plant. The operating conditions of multichannel buck converter are summarized in Table III. modulation profile, Vm(t), with a modulation frequency fm=10 kHz and a maximum frequency deviation Δfc=60 kHz. The fm parameter has been chosen considering the Resolution Bandwidth (RBW) of the EMI receptor [4]. (a) Fig. 11. Block diagram of multichannel buck converter. TABLE III MAIN FEATURES OF MULTICHANNEL BUCK CONVERTER Input Voltage Output Voltage Power Switching Frequency 12 VDC 1.5 VDC 4W 300 kHz The digital PID compensator have been implemented according to (13), where d[n] is the duty cycle, e[n] is the error signal and k0, k1 and k2 are the discrete compensator coefficients. d[ n] = d [ n − 1] + k 0 e[ n ] + k1e[ n − 1] + k 2 e[ n − 2 ] (13) (b) Fig. 12 EMI measurement set-up. (a) Block diagram. (b) Full view set-up. Figure 13 shows the spectrum obtained when the converters were operated at constant frequency. Figures 14, 15 and 16 show the spectrum corresponding to the three proposed modulations. The parameters of the voltage PWM controller are summarized in Table IV. The value of Tsample is recalculated on each switching cycle of channel 1. In our application its values range from 2.77 µs up to 4.16 µs. TABLE IV PARAMETERS OF THE VOLTAGE PWM CONTROLLER K0 0.1094 K1 -0.0938 K2 0.0156 In order to evaluate the modulation schemes presented in Section II, the conducted disturbances up to 30 MHz and output voltage ripple are presented. Measurements of conducted disturbances were carried out using a compliant Line Impedance Stabilization Network (LISN) as show in Fig. 12. The experimental results have been obtained for a central switching frequency fc=300 kHz, a triangular Fig. 13 Conducted noise without frequency modulation. range (up to the 4th harmonic) the cancelation effect is clearly noticed. For higher frequencies, the combination of cancelation and energy spread effects provides an attenuation of almost 15 dB in all frequency range. Techniques based on spread spectrum can lead to undesired side effects on the converter performance. It has been demonstrated that power efficiency is not clearly affected [6]. The most noticeable effect will appear as an increase of the output voltage ripple [9]. The output voltage ripple without modulation neither interleaving is 18.4 mV. Figures 17 and 18 compare the output voltage ripple in all cases considered. The modulation frequency, fm, is clearly reflected in the output voltage when CDFM-Tc or VDFM are applied. This effect is less noticeable in CDFM-Tm due to the delay introduced among switching patterns. Fig. 14 Conducted noise of CDFM-Tm. Fig. 15 Conducted noise of CDFM-Tc. Fig. 17 Output voltage ripple comparison: No modulation and CDFM-Tm (Upper trace: no modulated ; lower trace: CDFM-Tm). Fig. 16 Conducted noise of VDFM. Fig. 18 Output voltage ripple comparison: CDFM-Tc and VDFM (Upper trace: CDFM-Tc ; lower trace: VDFM). As it has been demonstrated in Section II, the CDFM-Tc and VDFM provide the best attenuation. The harmonic cancelation effect of CDFM-Tc that is predicted in Fig. 3 is clearly noticeable in Fig. 15. The best attenuation is given by VDFM. In the low frequency V. CONCLUSION In this paper a hybrid modulator intended to suppress the source of noise inherent to the operation of switched power converters is presented. This hybrid modulator implements three combinations of interleaving and spread spectrum. The attenuation provided by such modulators were theoretically explored and practically validated in a four channels buck converter in parallel arrangement and operated in closed loop. EMI attenuation obtained with these techniques was measured on the full bandwidth of conducted disturbances. As a reference to evaluate attenuation, converters were operated at constant frequency and without interleaving. Special attention has been paid to the influence of such techniques on the output voltage ripple of the converter. The VDFM is the technique that provides the best trade-off between attenuation and converter performance degradation in terms of output voltage ripple. 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