Papers by Jordi Carrabina
System on Chip Design Languages, 2002
Este artículo muestra una metodología de diseño y prototipado rápido orientada al desarrollo de s... more Este artículo muestra una metodología de diseño y prototipado rápido orientada al desarrollo de sistemas empotrados que incluyan un interfaz con dispositivos externos de una cierta complejidad. Partiendo de un driver Linux se realiza un mapeo sobre una arquitectura basada en un procesador integrado dentro de un SoC. La elección de la partición Hw/Sw y de ciertos parámetros de la arquitectura se determina por las especificaciones requeridas en términos de coste en área/recursos, prestaciones y tiempo de diseño.
High-performance computing are based more and more in heterogeneous architectures and GPGPUs have... more High-performance computing are based more and more in heterogeneous architectures and GPGPUs have become one of the main integrated blocks in these, as the recently emerged Mali GPU in embedded systems or the NVIDIA GPUs in HPC servers. In both GPGPUs, programming could become a hurdle that can limit their adoption, since the programmer has to learn the hardware capabilities and the language to work with these. We present OMP2HMPP, a tool that, automatically trans-lates a high-level C source code(OpenMP) code into HMPP. The generated version rarely will differs from a hand-coded HMPP version, and will provide an important speedup, near 113%, that could be later improved by hand-coded CUDA. The generated code could be transported either to HPC servers and to embedded GPUs, due to the commonalities between them.
Lecture Notes in Computer Science, 1993
This paper describes the construction of a system that recognizes vehicle license numbers using f... more This paper describes the construction of a system that recognizes vehicle license numbers using feed forward neural networks, once they have been extracted using classical methods. The system has been trained and tested on real-world data. In order to reduce the total amount of ...
Lecture Notes in Computer Science, 1991
In this paper, we study the alternatives for the implementation of any topology through a fully c... more In this paper, we study the alternatives for the implementation of any topology through a fully connected neural network. This strategy is based in the fact that, by the moment, most of the programmable FLSI neural networks implement this topology although associated computations ...
ABSTRACT We introduce a learning algorithm for feed-forward neural networks with synapses which c... more ABSTRACT We introduce a learning algorithm for feed-forward neural networks with synapses which can only take a discrete number of values. Taking into account the inherent limitations associated to these networks, we think that the performance of the method is quite efficient as we have shown through some simple results. The main novelty with respect to other discrete learning techniques is a different strategy in the search for solutions. Generalizations to any arbitrary distribution of discrete weights are straightforward.
Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, 2005
Users expect future handheld devices to provide extended multimedia functionality and have long b... more Users expect future handheld devices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and power consumption and forces designers to optimize all parts of their platform. It is therefore important to identify the power bottlenecks considering the platform as a whole. In this paper we present an overall power assessment of a realistic heterogeneous network on chip platform including processors, network and data/instruction memory hierarchy, running a video processing chain from camera to display. The power breakdown identifies the main bottlenecks in the memory hierarchy and the foreground memory, and shows that global interconnect is not that critical for a well-optimized mapping.
IECON Proceedings (Industrial Electronics Conference), 2010
Abstract Multimedia embedded systems require high performance specific computation to process the... more Abstract Multimedia embedded systems require high performance specific computation to process the large among of data that characterizes the multimedia domain at low energy consumption due to battery life. Different optimizations at different levels can considerably improve performance and energy consumption and, after that, the address generation becomes the new performance bottleneck. This paper shows a custom-configurable address generation unit design which extends an application specific instruction set processor ( ...
ABSTRACT Rules for geometric design and compensation aim to guarantee that layout representations... more ABSTRACT Rules for geometric design and compensation aim to guarantee that layout representations match final printed patterns within an accepted tolerance for a desired process yield. The more conservative the rules, the better the yield. Therefore, for a given process and after an experimental extraction of the required process parameters, it is possible to derive minimum design rules that characterize the technological process to a point where, without necessarily having an in-depth knowledge of the process and materials involved; design engineers can address physical design in order to develop devices and systems. In this article, a methodology for the extraction and characterization of inkjet geometric design rules and the application of compensation techniques to permit the inkjet manufacturing of reliable and precise designs is proposed as a first step towards separating design from digital fabrication, in a similar way to what has already occurred in silicon microelectronics technology.
SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, 2011
Nowadays industrial monoprocessor and multiprocessor systems make use of hardware floating-point ... more Nowadays industrial monoprocessor and multiprocessor systems make use of hardware floating-point units (FPUs) to provide software acceleration and better precision due to the necessity to compute complex software applications. This paper presents the design of an IEEE-754 compliant FPU, targeted to be used with ARM Cortex-M1 processor on FPGA SoCs. We face the design of an AMBA-based decoupled FPU in order to avoid changing of the Cortex-M1 ARMv6-M architecture and the ARM compiler, but as well to eventually share it among different processors in our Cortex-M1 MPSoC design. Our HW-SW implementation can be easily integrated to enable hardwareassisted floating-point operations transparently from the software application.
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2012
Emergency units typically operate under extremely harsh conditions and could benefit from new tec... more Emergency units typically operate under extremely harsh conditions and could benefit from new technologies to perform at their highest potential and provide and ideal test case to push wereable computing to its limits. In this paper we present our work on smart textiles and wearable devices for firefighters. The objective of our work is to create an smart t-shirt capable of measuring the rate and thermal stress state which the user is subject to. For that, several sensors monitor different parameters and send the information, via bluetooth low ...
2012 15th International Symposium on Antenna Technology and Applied Electromagnetics, ANTEM 2012, 2012
Abstract The emergence of wearable intelligent textile systems with sensors and actuators nodes a... more Abstract The emergence of wearable intelligent textile systems with sensors and actuators nodes are integrated into user clothes. Emergency units can benefit from new technologies to improve their performance and security conditions when working exposed to risk situations. In firefighters case is a the system Bluetooth Low Energy (BLE) at 2.4 GHz with a watch to show the thermal stress and, in case of exceed healthy level will trigger an alarm to warn the user. In this scenario the design and study of the working conditions of an ...
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Papers by Jordi Carrabina