In the textbook I'm reading, it states that
If the interrupt is of a lower/equal priority to the current process then the current process continues If it is of a higher priority the CPU finishes its current Fetch-Decode-Execute cycle. The contents of the CPU’s registers are copied to a st...
In short, the CPU reacts instantly to the interrupt and either ignores/defers it or waits until the current cycle is completed before processing it.
I don't know if this is just a simplification, but this doesn't seem right...
I thought interrupts were pushed into a buffer, while the CPU is running, and after every cycle, the buffer was checked by the CPU. This makes more sense, and seems more plausible, but also contradicts the previous explanation.
Does the CPU physically get interrupted by the interrupt, or does it briefly check the buffer after every cycle?
I don't know much of the terminology, besides "an interrupt service routine."
Edit: Is it a mixture of both? The highlighted explanation references a process, which I realise could encompass many CPU cycles, which are ended in the check of the buffer. If the precedence is higher, the process is popped out, for the ISR.