Adc F04
Adc F04
Adc F04
Mechatronics - Fall 04
Contents
What is ADC ? Types of ADCs HC11 & ADC
What is ADC ?
What is ADC ? Types of ADCs HC11 & ADC
Definition
Most signals we want to process are analog i.e.: they are continuous and can take an inifinity of values
x(t)
Definition
Digital systems require discrete digital data ADC converts an analog information into a digital information
Analog
Digital
Digital System
Examples of use
Voltmeter
What is ADC ? Types of ADCs HC11 & ADC
7.77 V
Voice
Conversion process
3 steps: Sampling Quantification Coding These operations are all performed in a same element: the A to D Converter
Ts
Ts
xq(t)
N-1 N-2
Q
2 1 0
Vr
Ts
Accuracy
The accuracy of an ADC can be improved by increasing: The sampling rate (Ts) The resolution (Q)
Accuracy
xq(t) Q
Ts
HC11 & ADC
Higher Resolution
Ts
Sampling rate
Nyquist-Shannon theorem: Minimum sampling rate should be at least twice the highest data frequency of the analog signal fs>2*fmax
Sampling rate
Analog signals are composed of an infinity of harmonics
What is ADC ? Types of ADCs HC11 & ADC
Need to limit the frequency band to its useful part Use of an analog filter
Analog Filter
Analog
Analog
ADC
Digital
In practice: fs (35)*ffilter
Example
8 bits converter: n=8 Range of conversion: Vr=5V
What is ADC ? Types of ADCs HC11 & ADC
Sampling time: Ts=1ms Number of possible states: N=28=256 Resolution: Q= Vr/N=19.5 mV Analog Filter: ffilter fs/5 = 200 Hz 5 255
Gain f
0 Analog
0 Digital
Types of ADCs
What is ADC ? Types of ADCs HC11 & ADC
Flash ADC Sigma-delta ADC Dual slope converter Successive approximation converter
Flash ADC
parallel A/D Uses a series of comparators Each comparator compares Vin to a different reference voltage, starting w/ Vref = 1/2 lsb
Flash ADC
If
Output
Flash ADC
Disadvantages Needs many parts (255 comparators for 8-bit ADC) Lower resolution Expensive Large power consumption
SigmaSigma-Delta ADC
Integrator
Vin
What is ADC ? Types of ADCs HC11 & ADC
+ -
1-bit DAC
+ -
Oversampler
Oversampled input signal goes in the integrator Output of integration is compared to GND Iterates to produce a serial bitstream Output is serial bit stream with # of 1s proportional to Vin
SigmaSigma-Delta ADC
Advantages
What is ADC ? Types of ADCs HC11 & ADC
tmeas
The sampled signal charges a capacitor for a fixed amount of time By integrating over time, noise integrates out of the conversion. Then the ADC discharges the capacitor at a fixed rate while a counter counts the ADC's output bits. A longer discharge time results in a higher count.
Advantages
What is ADC ? Types of ADCs HC11 & ADC
Disadvantages
Slow High precision external components required to achieve accuracy
Input signal is averaged Greater noise immunity than other ADC types High accuracy
Successive Approximation
Is Vin > ADC range? + SAR 1000 0000 0100 DAC Out
Sets MSB Converts MSB to analog using DAC Compares guess to input Set bit Test next bit
VIN
Successive Approximation
Advantages
What is ADC ? Types of ADCs HC11 & ADC
Disadvantages
Higher resolution successive approximation ADCs will be slower Speed limited ~5Msps
Capable of high speed Medium accuracy compared to other ADC types Good tradeoff between speed and cost
Speed (relative) Cost (relative) Slow Very Fast Medium Fast Slow Med High Low Low
Structure of the acquisition ADCTL Register Option Register Data conversion Acquistion
8-bits CAPACITIVE DAC WITH SAMPLE AND HOLD SUCCESSIVE APPROXIMATION REGISTER AND CONTROL
ANALOG MUX
VRH
AN1 PE2 AN2 PE3 AN3 PE4 AN4 PE5 AN5 PE6
VRL
CA CB CC CD MULT SCAN
CCF
ADR1
ADR2
ADR3
ADR4
P 64 M68HC11 Family Data Sheet
Port E (analog input) Analog Multiplexer Result Register Interface ADR1 - result 1 ADR2 - result 2 ADR3 - result 3 ADR4 - result 4
A/D Converter
ADCTL Register
ADCTL ($1030)
Reset to:
CCF
0
0
0
SCAN MULT CD
u u u
CC CB
u u
CA
u
ADCTL Register
ADR# Behavior
Single Channel (MULT = 0) Single Conversion (SCAN = 0) Continuous Conversion (SCAN = 1)
One channel converted 4 times consecutively. The results are stored in ADR1-ADR4 One channel is continuously converted. ADR1ADR4 overwritten
Single Channel
7
What is ADC ? Types of ADCs HC11 & ADC
PORT E ADR1 Result1 Result Register Interface ADR2 Result2 ADR3 Result3 ADR4 Result4
A/D Converter
Multiple Channels
7
What is ADC ? Types of ADCs HC11 & ADC
PORT E ADR1 Result1 Result Register Interface ADR2 Result2 ADR3 Result3 ADR4 Result4
A/D Converter
ADCTL Register
Conversion Sequence E Clock cycles:
What is ADC ? Types of ADCs HC11 & ADC
1st, ADR1 0
2nd, ADR2 32
3rd, ADR3 64
4th, ADR4 96
ADCTL Register
A/D Result Registers (ADR1 ADR4):
What is ADC ? Types of ADCs HC11 & ADC
ADCTL Register
A/D Channel Assignment
CD 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 CC 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 CB 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 CA 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Channel Signal Mult =1, ADR If PE0 ADR1 PE1 ADR2 PE2 ADR3 PE3 ADR4 PE4 ADR1 PE5 ADR2 PE6 ADR3 PE7 ADR4 Reserved ADR1 Reserved ADR2 Reserved ADR3 Reserved ADR4 VH ADR1 VL ADR2 1/2 VH ADR3 Reserved ADR4
P447 Reference Manual
ADCTL Register
ADR# Behavior
What is ADC ? Types of ADCs HC11 & ADC
Option Register
Options Register ($1039)
ADPU CSEL IRQE DLY CME CR1 CR0
Bit:
ADPU = A/D power up CSEL = Clock Select IRQE = Config. IRQ DLY = Enable start-up delay
CME = Clock Monitor Bit 2 = not implemented CR1 = COP Timer Rate CR2 = COP Timer Rate
Option Register
ADPU - A/D Charge Pump
0: Turn off the A/D 1: Turn on the A/D (by enabling the charge pump) Note: Wait at least 100 microseconds before using the A/D (This is 200 cycles at a 2MHz E-clock)
DLY Delay
0 = No delay is used and MCU resumes within approx. 4 cycles. 1 = 4000 E clock cycle delay imposed to allow crystal stabilization
Data conversion
Bit 7 6 5 4 3 2 1 Bit 0
% (1)
50%
25%
12.5%
6.25%
3.12%
1.56%
0.78%
0.39%
2.500
1.250
0.625
0.3125
0.1562
0.0781
0.0391
0.0195
1.65
0.825*
0.4125
0.2063
0.1031
0.0516
0.0258
0.0129
v 2 1
v 2 2
v 2 3
v 2 4
v 2 5 v 2 6 v 2 7
v 2 8
Data conversion
MAX : .1111 1111 = .FF16 = 0.9960937510 = 99.6093 % Resolution : .0000 0001 = .0116 = 0.0039062510 = 0.3906 % MIN : .0000 0000 = 016 = 010=0 %
Data conversion
Acquisition
OPTION ($1039) ADPU CSEL IREQ DLY CME ADCTL ($1030) CCF 0 SCAN MULT CD 0 CR1 CR2 CA CC CB
LOOP
WAIT
EQU $1039 EQU $1030 EQU $1031 $1040 ADPU=1,CSEL=0 LDAA #$80 STAA OPTION LDY #$411A NOP Delay for charge pump to stabilize 100s NOP NOP DEY BNE LOOP LDAA #$00 SCAN=0,MULT=0,CHAN GRP=00 STAA ADCTL LDX #ADCTL Wait until CCF or bit 7=1 BRCLR 0,X #$80 WAIT LDAA ADR1 Read and store result PSHA JSR $4000 SWI END
Acquisition
Subroutine output to the screen the decimal equivalence of the stack : ORG PULY PULB CLRA LDX IDIV STAB XGDX LDX IDIV STAB XGDX TBA $4000 JSR LDAA JSR LDAA JSR PSHY RTS $FFB5 $0001 $FFB5 $0000 $FFB5
Subroutines Outrhlf, convert to ASCII Number and output to screen first the hundreds number, the tens and then units number
First Integer Division Store remainder of the first division Second Integer Division Store result to ACCA and remainder to memory of the second division
(NOTE: Remember that ACCA is the high byte of ACCD and ACCB is the low byte of ACCD. Return address used for JSR and RTS is stored in INDEX Y in the subroutine)
A number between 000 and 255 will be print on the screen. If it is 255 -> 100 % 000 -> 0 %
Questions ?