United Arab Emirates University College of Information Technology
United Arab Emirates University College of Information Technology
United Arab Emirates University College of Information Technology
Claude Khoury
[email protected]
Room#:3117
Open the ISE webpack tool
Open the ISE webpack tool by double
clicking on the webpack project
navigator icon on your computer screen
desktop
Or from windows start menu,
• Programs
• Xilinx webpak4.2
• WebPack Project Navigator
Source Panel: it shows all
source files associated
with the current design
HDL editor
window, when
Process Panel: All entering a
processes that are circuit using
available to run on a VHDL the
selected source file source code
will appear in
this window
Console Window:
Displays the status
messages such as error
messages
Creating New Project
• First we create a folder for our
labs, let’s call it mylabs
• We go to hard drive C then
double click on the folder named
xilinx_webpak inside this folder
we create our folder mylabs
Creating a Schematic for a
Given Design
• In this lab we illustrate different
examples about how to create and save
many schematic designs using ISE
webpack.
• We also will see how can we create
macros, which means, build our circuit
(or circuits) and use it later in a bigger
designs.
Open Webpack Project Navigator “double click on its icon
on your desktop”
Click on File menu then New Project a dialog box like this will appear
• Project name: ITBP205
• Project location: C:\xilinx_webpack\mylabs
• Device family: we choose from the drop down
menu Spartan2 “ depends on the device we
are targeting”
• Device: from the drop down menu we choose
xc2s50-5tq144 for our particular device
• Design Flow: XST VHDL which is the Xilinx
synthesizer
• Click ok
Right click on the device name then choose New Source
We highlight Schematic
File name : example1
Location: C:\xilinx_webpack\mylabs
Click Next , your screen should look like this
In the next screen click Finish
Finally, once you click finish, the schematic editor will
open automatically
Let’s implement the following circuit given by the Boolean expression
Y= (A+B) (B+C)
(A+B) (B+C)
A+B
A
B
B+C
C
Locating and choosing our gates
For our design here we need 2 OR2 gates, 1 AND2
gate, 1 inverter and 4 input/output ports.
On the right hand side from the ECS editor we see
two navigation panes, the upper one is called
Categories and the lower one is called Symbols.
In the categories pane we highlight the category
Logic, in turn in the lower pane, which is called
Symbols we see all logic elements available in
our tools, we locate our wanted element/gate
and drag it to our work space in the middle
screen.
Locating and choosing our gates
We have 2 ways to get the gate/element
Symbols