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    Analog and Digital VLSI Design: Lecture 12: Combinational Circuit Design

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    Yash Gupta
    This document summarizes a lecture on combinational circuit design. It discusses pull down networks and identifying outputs, static complementary CMOS design using PMOS transistors for pull up and NMOS for pull down, issues with using the wrong transistor types for an AND gate, how pass transistor logic works using NMOS to pass a logic 0 and PMOS to pass a logic 1, implementing an AND gate with this method, and using pass transistor logic to create a MUX gate. It also notes that finding voltages at all nodes is needed to fully analyze these circuits.

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    Analog and Digital VLSI Design: Lecture 12: Combinational Circuit Design

    Uploaded by

    Yash Gupta
    9 views10 pages
    This document summarizes a lecture on combinational circuit design. It discusses pull down networks and identifying outputs, static complementary CMOS design using PMOS transistors for pull up and NMOS for pull down, issues with using the wrong transistor types for an AND gate, how pass transistor logic works using NMOS to pass a logic 0 and PMOS to pass a logic 1, implementing an AND gate with this method, and using pass transistor logic to create a MUX gate. It also notes that finding voltages at all nodes is needed to fully analyze these circuits.

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    Lect 12.pptx

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    This document summarizes a lecture on combinational circuit design. It discusses pull down networks and identifying outputs, static complementary CMOS design using PMOS transistors for pull up and NMOS for pull down, issues with using the wrong transistor types for an AND gate, how pass transistor logic works using NMOS to pass a logic 0 and PMOS to pass a logic 1, implementing an AND gate with this method, and using pass transistor logic to create a MUX gate. It also notes that finding voltages at all nodes is needed to fully analyze these circuits.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    9 views10 pages

    Analog and Digital VLSI Design: Lecture 12: Combinational Circuit Design

    Uploaded by

    Yash Gupta
    This document summarizes a lecture on combinational circuit design. It discusses pull down networks and identifying outputs, static complementary CMOS design using PMOS transistors for pull up and NMOS for pull down, issues with using the wrong transistor types for an AND gate, how pass transistor logic works using NMOS to pass a logic 0 and PMOS to pass a logic 1, implementing an AND gate with this method, and using pass transistor logic to create a MUX gate. It also notes that finding voltages at all nodes is needed to fully analyze these circuits.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    of 10

    Analog and Digital VLSI Design

    EEE F313/INSTR F313

    Lecture 12: Combinational Circuit Design


    Combinational Circuit Design
    Design Pull down network and identify Y

    A B

    C D
    E

    Y
    Combinational Circuit Design
    Static Complementary CMOS

    VDD PMOS transistors only for Pull Up

    In1
    In2 PUN

    InN
    F(In1,In2,InN)
    In1
    In2 PDN

    InN
    NMOS transistors only for pull Down

    WHY ????
    Combinational Circuit Design
    AND Gate

    B A B F
    0 0 0
    A
    0 1 0
    1 0 0
    1 1 1
    A B

    NMOS for Pull Up

    PMOS for Pull Down


    What could be the problem Here ??
    Combinational Circuit Design
    Pass Transistor Logic
    VDD VDD
    PUN
    D
    VDD

    0 VDD S 0 VDD-Vtn
    VGS
    CL CL

    PDN VDD 0 VDD |Vtp|


    VGS
    D CL S CL
    VDD

    S D
    Combinational Circuit Design
    NMOS passes GOOD Logic 0

    PMOS passes GOOD Logic 1


    Combinational Circuit Design
    AND Gate

    A B

    AB
    AB

    B
    Pass Transistor Logic

    S S
    S

    I1 I1
    o/p o/p
    I0 I0

    MUX Gate
    Limitation
    Find Voltages at all the Nodes
    Thank You

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