Introduction To The Atmel Atmega32

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Introduction to the Atmel

Atmega32

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Inside an IC package

CS-280 2
Dr. Mark L. Hornick
Inside an IC package

CS-280 3
Dr. Mark L. Hornick
Atmel Atmega32
 Central Processing Unit
 Arithmetic Logic Unit (ALU)
performs the actual arithmetic,
logical, and bit-functions
 Memory – SRAM, EEPROM,
Flash
 Clock circuit – internal/external
 I/O – Input/Output; video, serial,
parallel, USB, SCSI, etc.

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Programs are
stored here

Temporary
data is stored
here

Permanent
data is stored
here
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3 Separate on-chip memories
1. 2KB SRAM
 For temporary data storage
 Memory is lost when power is shut off (volatile)
 Fast read and write

2. 1KB EEPROM
 For persistent data storage
 Memory contents are retained when power is off (non-volatile)
 Fast read; slow write
 Can write individual bytes

3. 32KB Flash Program Memory


 Used to store program code
 Memory contents retained when power is off (non-volatile)
 Fast to read; slow to write
 Can only write entire “blocks” of memory at a time
 organized in 16-bit words (16KWords)

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Flash Program Memory layout
Reset and interrupt vector section  There are 32KB of program
42 words (84 bytes)
$002A
memory (Flash memory)
 Organized as 16K 2-byte words
 Because program instructions are
either 2 or 4 bytes long

 Each word (not byte) in memory


has a unique address
 Beginning address $0000
 Ending address $3FFF

 Some memory is reserved or


$3C00 protected
 First 42 words (reserved)
1024 words (2048 bytes)
 Last 1024 words (protected)

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Registers are special-purpose memory
 There are relatively few
registers
 Directly accessed by the
CPU/ALU (very fast R/W)
 Registers are used to
contain:
 address of the next
instruction to fetch from
program memory
 machine instruction to be
executed
 “input” data to be operated
upon by the ALU
 “output” data resulting from
an ALU operation
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General Purpose Registers
 There are 32 8-bit GP registers
R0-R31
 Used as accumulators – for most
math and logic

 X, Y, Z are 16-bit registers that


overlap R26-R31
 Used as address pointers
 Or to contain larger values (>255)

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Special-purpose Registers

 Stack pointer (SP, 16-bit)


 Stores return address of subroutine/interrupt calls
 Storing temporary data
and local variables

 Program counter (PC, 16-bit)


 Holds address of next program instruction to be executed
 Automatically incremented when the ALU executes an
instruction

 Status Register (SREG, 8-bit)


 Contains information of result of most recent ALU operation

 …and many more


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An Assembler converts human-readable
instructions into machine-executable opcodes
that are stored in Program Memory

Consider the assembly language instruction


add rD, rS
 add is a reserved assembly language instruction
mnemonic
 rS and rD are operands that refer to source and
destination registers
 This instruction adds the contents of register rS to register
rD
 Example: Substitute any actual register (R0-R31) for rS and
rD:
add r20, r5
 case is not important; the instruction can also be written as
ADD R20, R5

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Let’s consider the case of how one
particular instruction is represented as
a machine-executable instruction
Example: ADD R20, R5
 A 16-bit machine instruction is generated for this particular case
 Machine instructions consist of an numeric opcode and operands
 The opcode in this case is 000011 (3)
 Each register operand is represented by 5 bits
 5 bits are required to represent all possible register values from 0-31
 ddddd represent the 5 bits that represent the destination register value (20)
 rrrrr represent the 5 bits that represent the source register value (5)

0000 11rd dddd rrrr

add r20, r5 is assembled to: Note: The bits ddddd


and rrrrr are “split” in
0000 1101 0100 0101 this instruction

This 16-bit binary word is expressed in hexadecimal as 0x0d45


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The machine-instruction is executed
by the central processing unit
 The instruction indicated by the
Program Counter is fetched from
program memory and placed in
the Instruction Register
 The opcode and operands within
the instruction are extracted by the
Instruction Decoder
 The control lines from the I.D.
activate the particular circuitry
within the ALU that is capable of
processing that particular opcode

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Instruction execution sequence

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