Introduction To The Atmel Atmega32
Introduction To The Atmel Atmega32
Introduction To The Atmel Atmega32
Atmega32
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Inside an IC package
CS-280 2
Dr. Mark L. Hornick
Inside an IC package
CS-280 3
Dr. Mark L. Hornick
Atmel Atmega32
Central Processing Unit
Arithmetic Logic Unit (ALU)
performs the actual arithmetic,
logical, and bit-functions
Memory – SRAM, EEPROM,
Flash
Clock circuit – internal/external
I/O – Input/Output; video, serial,
parallel, USB, SCSI, etc.
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Programs are
stored here
Temporary
data is stored
here
Permanent
data is stored
here
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3 Separate on-chip memories
1. 2KB SRAM
For temporary data storage
Memory is lost when power is shut off (volatile)
Fast read and write
2. 1KB EEPROM
For persistent data storage
Memory contents are retained when power is off (non-volatile)
Fast read; slow write
Can write individual bytes
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Flash Program Memory layout
Reset and interrupt vector section There are 32KB of program
42 words (84 bytes)
$002A
memory (Flash memory)
Organized as 16K 2-byte words
Because program instructions are
either 2 or 4 bytes long
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Registers are special-purpose memory
There are relatively few
registers
Directly accessed by the
CPU/ALU (very fast R/W)
Registers are used to
contain:
address of the next
instruction to fetch from
program memory
machine instruction to be
executed
“input” data to be operated
upon by the ALU
“output” data resulting from
an ALU operation
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General Purpose Registers
There are 32 8-bit GP registers
R0-R31
Used as accumulators – for most
math and logic
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Special-purpose Registers
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Let’s consider the case of how one
particular instruction is represented as
a machine-executable instruction
Example: ADD R20, R5
A 16-bit machine instruction is generated for this particular case
Machine instructions consist of an numeric opcode and operands
The opcode in this case is 000011 (3)
Each register operand is represented by 5 bits
5 bits are required to represent all possible register values from 0-31
ddddd represent the 5 bits that represent the destination register value (20)
rrrrr represent the 5 bits that represent the source register value (5)
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Instruction execution sequence
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