Silicon Controlled Rectifier
Silicon Controlled Rectifier
Silicon Controlled Rectifier
Thyristors.
One of the first developments was the publication of the P-N-P-N
SCRs) have come a long way from this modest beginning and now
high power light triggered thyristors with blocking voltage in excess
of 6kv and continuous current rating in excess of 4kA are available.
They have reigned supreme for two entire decades in the history
of power electronics.
Along the way a large number of other devices with broad
Depletion layer spreads mainly into the lightly doped n- region, (As
in the case of power diodes and transistors) .
The outer n+ layers are formed with doping levels higher then both
the p type layers.
The top p layer acts as the Anode terminal while the bottom n+
layers acts as the Cathode.
When the device is forward biased (with gate open) ie. With anodecathode voltage positive, it can be seen that junctions J1 and J3 are
forward biased and J2 is reverse biased.
The SCR blocks forward voltages.
As long as VAK is small Ico is very low and both 1 & 2 are much lower than
unity.
Under this condition large anode current starts flowing, restricted only by the
external load resistance.
The Col - Base junctions of both Q1 & Q2 become forward biased and the total
voltage drop across the device settles down to approximately equivalent to a
diode drop.
IK = IA + I G
The junction J3 has a very low reverse break down voltage since
both the n+ and p regions on either side of this junction are heavily
doped.
collectors interchanged.
However, the reverse 1 & 2 being significantly
With the gate open or shorted to the cathode, the device is OFF
and no current flows from anode to cathode, except for a very low
leakage current.
Once the device is ON, gate looses complete control and device
cannot be turned OFF from the gate.
The SCR can be switched off only if the anode current is brought
below the holding current value for that SCR.
The static output i-v characteristics of a thyristor depends strongly on the junction
temperature
There are also minimum limits of Vg (Vgmin) and Ig (Igmin) for reliable
turn on of the thyristor.
A gate non triggering voltage (Vng) is also specified by the
manufacturers of thyristors.
All spurious noise signals should be less than this voltage Vng in order
to prevent unwanted turn on of the thyristor.
should be used.
For TON less than 100 s the relationship should be maintained is:
The gate cathode junction also has a maximum reverse (i.e, gate
negative with respect to the cathode) voltage specification.
If there is a possibility of the reverse gate cathode voltage
exceeding this limit a reverse voltage protection using diode as
should be used.
A thyristor has a maximum average gate power dissipation limit of 0.2 watts. It is
triggered with pulsed gate current at a pulse frequency of 10 KHZ and duly ratio of
0.4. Assuming the gate cathode voltage drop to be 1 volt. Find out the allowable
peak gate current magnitude.
On period of the gate current pulse is
Ther efore, pulsed gate power dissipation limit Pgm can be used.
cycles.
After Turn ON, the gate pulse must be maintained until the
anode current reaches this level.
Otherwise, upon removal of gate pulse, the device will turn off.
The anode current must be reduced below this value to turn off
the thyristor.
= 9.99mA
Since the calculated circuit current value is less than the given latching current
value of the SCR, it will not get fired.
If the latching current in the circuit shown below is 4 mA, obtain the
minimum width of the gating pulse required to properly turn-on the
SCR.
di
The circuit equation is, V = L
dt
The minimum width of the gating pulse required to properly turn-on the SCR is 4 us.
The current wave form is assumed to be half cycle sine wave (or
square wave) at power frequency.
All spurious noise voltage in the gate drive circuit must be below
this level.
Maximum reverse voltage that can appear between the gate and
the cathode terminals without damaging the junction.
Example:
A thyristor has a maximum average current rating 1200 Amps for a
conduction angle of 180. Find the corresponding rating for = 60.
Assume the current waveforms to be half cycle sine wave.
The form factor of half cycle sine waves for a conduction angle is given by
Since RMS current rating should not be exceeded for any firing angle, (RMS value
gives power loss, I2rms * R),
Average Current at 60o = IRMS / (FF at 60o)
,
Delay time (td) , Rise time (tr) and Spread time (tp)
The waveforms of the gate current (ig), anode current (iA) and anode
cathode voltage (VAK) in an expanded time scale during Turn on.
(The reference circuit and the associated waveforms are shown in the
inset.)
The total switching period being much smaller compared to the cycle
time, iA and VAK before and after switching will appear flat in the
expanded view.
Transition time is called the thyristor Turn ON time and can be divided
into three separate intervals
For a resistive load, rise time is the time taken by the anode
current to rise from 10% of its final value to 90% of its final value.
At the same time the voltage VAK falls from 90% of its initial value
to 10% of its initial value.
For inductive load the voltage falls faster than the current.
the device.
dt
of 20-200 A/s.
di A
dt
is in the range
Once the thyristor is on, and its anode current is above the latching
current level, the gate loses control.
The turn off time tq of a thyristor is defined as the time between the
instant anode current becomes zero and the instant the thyristor
regains forward blocking capability.
During turn off time, excess minority carriers from all the four
layers of the thyristor must be removed.
The variation of anode current and anode cathode voltage with time during turn off operation on
an expanded scale.
The anode current becomes zero at time t1 and starts growing in the
negative direction with the same Adidt till time t2.
This negative current removes excess carriers from junctions J1 & J3.
Total charge removed from the junctions between t1 & t3 is called the
reverse recovery charge (Qrr).
di
dt
This voltage must be limited below the VRRM rating of the device.
Up to time t2 the voltage across the device (VAK) does not change
substantially from its on state value.
However, after the reverse recovery time, the thyristor regains reverse
blocking capacity and VAK starts following supply voltage vi.
At the end of the reverse recovery period (trr) trapped charges still exist
at the junction J2 which prevents the device from blocking forward
voltage just after trr.
The time interval tq = trr + tgr is called device turn off time of the
thyristor.
No forward voltage should appear across the device before the time tq to avoid its
inadvertent turn on.
A circuit designer must provide a time interval circuit turn off time tc (tc > tq)
during which a reverse voltage is applied across the device.
The reverse recovery charge Qrr is a function of the peak forward current before
di
turn off and its rate of decrease A .
dt
di
Manufacturers usually provide plots of Qrr as a function of A for different
dt
values of peak forward current.
They also provide the value of the reverse recovery current Irr for a given IA and
di A
.
dt
Alternatively Irr can be evaluated from the given Qrr characteristics following
similar relationships as in the case of a diode.
As in the case of a diode the relative magnitudes of the time intervals t1 - t2 and
t2 - t3 depends on the construction of the thyristor.
In normal recovery converter grade thyristor they are almost equal for a
specified forward current and reverse recovery current.
This helps reduce the total turn off time tq of the thyristor (and hence allow them
to operate at higher switching frequency).
However, large voltage spike due to this snappy recovery will appear across the
device after the device turns off.
Typical turn off times of converter and inverter grade thyristors are in the range
of 50-100 s and 5-50 s respectively.
For maximum utilization of the device capacity it is important that each device
in this series parallel combination share the blocking voltage and on state current
equally.
For a firing angle , the forward bias voltage across the thyristor just before
turn on is
VON = 2 Vi Sin
; Vi = RMS value of supply voltage.
Current after the thyristor turns ON for a resistive load is
ION = VON / R= 2 (Vi /R) Sin
Neglecting delay and spread time and assuming linear variation of voltage
and current during turn on, expression for instantaneous values during turn
on are:
VON
Vak
ia
0
ION
tON
Total switching
energy loss
during turn ON
EON occurs once every cycle. If the supply frequency is f then average turn on power
loss is given by.
(ii) If the firing angle is the thyristor conducts for - angle. Instantaneous current
through the device during this period is
Unlike a thyristor which conducts only in one direction (from anode to cathode) a
triac can conduct in both directions.
Thus a triac is similar to two back to back (anti parallel) connected thyristosr but
with only three terminals.
The gate looses control over conduction once the triac is turned on.
The triac turns off only when the current through the main terminals become
zero.
Therefore, a triac can be categorized as a minority carrier, and bidirectional semi-
controlled device.
They are extensively used in residential lamp dimmers, heater control and for
speed control of small single phase series and induction motors.
As the Triac can conduct in both the directions the terms anode and
cathode are not used for Triacs.
The three terminals are marked as MT1 (Main Terminal 1), MT2 (Main
Terminal 2) and the gate by G.
The gate terminal is near MT1 and is connected to both N3 and P2 regions
by metallic contact.
Similarly MT1 is connected to N2 and P2 regions while MT2 is connected
to N4 and P1 regions.
Note the
N3-P2-N1-P1 SCR
and
N4-P1-N1-P2 SCR. :
Two SCRs connected
anti-parallel.
The triggering sensitivity is highest with the combinations 1 and 3 and are
generally used.
However, for bidirectional control and uniforms gate trigger mode
sometimes trigger modes 2 and 3 are used.
Trigger mode 4 is usually avoided.
Mode 1
Mode 3 .
In trigger mode-1 the gate current flows mainly through the P2 N2 junction like an
ordinary thyristor.
When the gate current has injected sufficient charge into P2 layer the triac starts
conducting through the P1 N1 P2 N2 layers like an ordinary thyristor.
In the trigger mode-3 the gate current Ig forward biases the P2 P3 junction and a large
number of electrons are introduced in the P2 region by N3. Finally the structure P2 N1
P1 N4 turns on completely.
With no signal to the gate the triac will block both half cycle of the
applied ac voltage provided its peak value is lower than the break over
voltage (VBO) of the device.
However, in a triac the two conducting paths (from MT1 to MT2 or from
MT1 to MT1) interact with each other in the structure of the triac.
At present triacs with voltage and current ratings of 1200V and 300A
(rms) are available.
Curves relating the device dissipation and RMS on state current are also
provided for different conduction angles.
At the current zero instant (when the triac turns off) a reverse voltage
will appear across the triac since the supply voltage is negative at that
instant.
To ensure clean turn ON the trigger signal must rise rapidly to provide
the necessary charge.
This results in a decrease in the voltage drop across the diode with
increasing voltage.
The diode remains in its conduction state until the current through it
drops below what is termed the holding current, which is normally
designated by the letters IH.
Below the holding current, the DIAC reverts to its high-resistance (nonconducting) state.
Its behaviour is bi-directional and therefore its operation occurs on both
halves of an alternating cycle.
In the three layer structure the switching occurs when the junction
that is reverse biased experiences reverse breakdown.
The three layer version of the device is the more common and can
have a break-over voltage of around 30 V.
dv/dt Triggering :
dC j
dQ d
dV
ic
(C jV ) C j
V
dt dt
dt
dt
ic C j
dV
dt
Gate Triggering
This is the most commonly used method for triggering SCRs.
Three types of signals can be used for this purpose. They are
either d.c. signals, pulse signals or ac signals.
One drawback of this scheme is that both the power and control
circuits are d.c. and there is no isolation between the two.
This scheme provides the proper isolation between the power and
the control circuits.
However, the gate drive is maintained for one half cycle after the
device is turned ON, and a reverse voltage is applied between the
gate and the cathode during the negative half cycle.
Ref.: M D Singh - PE
Natural Commutation
Forced Commutation
In case of d.c. circuits, for switching off the thyristors, the forward
current should be forced to be zero by means of some external
circuits.
(l) The load curr nt IL flows through the path Edc + - T - RL Edc (-), and
(2) Commutating current Ic.
The moment thyristor T is turned ON, capacitor C starts
discharging through the path C+ - L - T- C-. When the capacitor
C becomes completely discharged, it starts getting charged with
reverse polarity.
Circuit Operation:
(a) Mode 0: [Initial-state of circuit]:
Initially, both the thyristors are OFF. Therefore, the states of
the devices are T1 is OFF, T2 is OFF, and EC1 = 0
(b) Mode 1:
Load current IL
Edc+ - R2 - C+ - C- -T1 - EdcCapacitor C will get charged by the supply voltage Edc with the
polarity shown.
Load current IL
Edc+ - R2 - C+ - C- -T1 - EdcCapacitor C will get charged by the supply voltage Edc with the
polarity shown.
Mode 2:
Charging of capacitor C now takes place through the load and its
polarity becomes reverse. Therefore, charging path of capacitor
C becomes
Edc+ - R1 - C+ - C- - T2(a-k) - EdcHence, at the end of Mode 2, the states of the devices are
T1 is OFF, T2 is ON,
Ec1 = - Edc
Mode 3:
toff = 0.6931 R1 C
Obtain minimum toff
from data sheet. For a
given load R1, C can
be obtained.
Also,
T1 is OFF ; T2 is OFF; Ec = 0
Mode 1:
This is due to the fact that, as the voltage across the capacitor
increases, the current through the thyristor T2 decreases since
capacitor C and thyristor T2 form the series circuit.
Mode 2:
C+ - T1 - L - D - C
Mode 3:
T1 is OFF, T2 is ON
The basic requirements for the successful firing of a thyristor are that
the current
supplied to the gate should:
(i) be of adequate amplitude and sufficiently short rise time.
(ii) be of adequate duration.
(iii) occur at a time when the main circuit conditions are favourable to
conduction.