74HC_HCT147_CNV

INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT147
10-to-4 line priority encoder
Product specification December 1990
File under Integrated Circuits, IC06
Philips Semiconductors Product specification
10-to-4 line priority encoder 74HC/HCT147
FEATURES GENERAL DESCRIPTION

• Encodes 10-line decimal to 4-line BCD The 74HC/HCT147 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
• Useful for 10-position switch encoding
(LSTTL). They are specified in compliance with JEDEC
• Used in code converters and generators standard no. 7A.
• Output capability: standard The 74HC/HCT147 9-input priority encoders accept data
from nine active LOW inputs (A0 to A8) and provide a
• ICC category: MSI
binary representation on the four active LOW outputs
(Y0 to Y3). A priority is assigned to each input so that when
two or more inputs are simultaneously active, the input
with the highest priority is represented on the output, with
input line A8 having the highest priority.
The devices provide the 10-line to 4-line priority encoding
function by use of the implied decimal “zero”. The “zero” is
encoded when all nine data inputs are HIGH, forcing all
four outputs HIGH.
QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL PARAMETER CONDITIONS UNIT
HC HCT
tPHL/ tPLH propagation delay An to Yn CL = 15 pF; VCC = 5 V 15 17 ns
CI input capacitance 3.5 3.5 pF
CPD power dissipation capacitance per package notes 1 and 2 30 33 pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990 2
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION

8 GND ground (0 V)
9, 7, 6, 14 Y0 to Y3 BCD address outputs (active LOW)
11, 12, 13, 1, 2, 3, 4, 5, 10 A0 to A8 decimal data inputs (active LOW)
15 n.c. not connected
16 VCC positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990 3
Fig.4 Functional diagram.
FUNCTION TABLE
INPUTS OUTPUTS
A0 A1 A2 A3 A4 A5 A6 A7 A8 Y3 Y2 Y1 Y0
H H H H H H H H H H H H H
X X X X X X X X L L H H L
X X X X X X X L H L H H H
X X X X X X L H H H L L L
X X X X X L H H H H L L H
X X X X L H H H H H L H L
X X X L H H H H H H L H H
X X L H H H H H H H H L L
X L H H H H H H H H H L H
L H H H H H H H H H H H L
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
December 1990 4
Fig.5 Logic diagram.
December 1990 5
DC CHARACTERISTICS FOR 74HC

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC

GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C) TEST CONDITIONS

74HC
SYMBOL PARAMETER UNIT VCC WAVEFORMS
+25 −40 to +85 −40 to +125
(V)
min. typ. max. min. max. min. max.
50 160 200 240 2.0
propagation delay
tPHL/ tPLH 18 32 40 48 ns 4.5 Fig.6
An to Yn
14 27 34 41 6.0
19 75 95 110 2.0
output transition
tTHL/ tTLH 7 15 19 22 ns 4.5 Fig.6
time
6 6 16 19 6.0
December 1990 6
DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types

The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT

A3, A4, A7, A8 1.50
A5, A6, A0, A1, A2 1.10
AC CHARACTERISTICS FOR 74HCT

GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C) TEST CONDITIONS

74HCT
SYMBOL PARAMETER UNIT VCC WAVEFORMS
+25 −40 to +85 −40 to +125
(V)
min. typ. max. min. max. min. max.
propagation delay
tPHL/ tPLH 20 35 44 53 ns 4.5 Fig.6
An to Yn
output transition
tTHL/ tTLH 7 15 19 22 ns 4.5 Fig.6
time
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6 Waveforms showing the decimal data inputs (An) to output (Yn) propagation delays and the output
transition times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990 7

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INTEGRATED CIRCUITS

• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

10-to-4 line priority encoder 74HC/HCT147

FEATURES GENERAL DESCRIPTION

QUICK REFERENCE DATA

10-to-4 line priority encoder 74HC/HCT147

PIN NO. SYMBOL NAME AND FUNCTION

Fig.1 Pin configuration. Fig.2 Logic symbol.

Fig.3 IEC logic symbol.

10-to-4 line priority encoder 74HC/HCT147

Fig.4 Functional diagram.

10-to-4 line priority encoder 74HC/HCT147

Fig.5 Logic diagram.

10-to-4 line priority encoder 74HC/HCT147

DC CHARACTERISTICS FOR 74HC

AC CHARACTERISTICS FOR 74HC

Tamb (°C) TEST CONDITIONS

10-to-4 line priority encoder 74HC/HCT147

DC CHARACTERISTICS FOR 74HCT

Note to HCT types

INPUT UNIT LOAD COEFFICIENT

AC CHARACTERISTICS FOR 74HCT

Tamb (°C) TEST CONDITIONS

(1) HC : VM = 50%; VI = GND to VCC.

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