Issue 1 • Winter-2010

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WINTER 2010
VOL. 2 • NO. 1
www.ieee.org/sscs-news
FEATURES
14 Rent’s Rule: A Family Memoir
E.F. Rent’s son on the genesis of his father’s
famous algorithm and the man behind it.
By Thomas Michael Rent
21 Interconnect Research Influenced

How E.F. Rent’s decades-old rule and its implications
for chip wire lengths have guided the last ten years ABOUT THIS IMAGE:
When did Ed Rent work on
of interconnect research. this machine? See p. 14 for
By Dirk Stroobandt the answer.
28 The Legendary IBM 1401

Data Processing System
The development of the most popular
computer of the 1960s and the story of its
restoration at age 50.
By Robert Garner and Frederick (Rick) Dill
40 Memorandum to: File, Subject:

Microminiature Packaging—Logic Block COLUMNS/
to Pin Ratio, November 28, 1960 DEPARTMENTS
By E.F. Rent
3 CONTRIBUTORS
42 Memorandum to: File, Subject: 4 EDITOR’S NOTE
Microminiature Packaging—Logic Block 5 LETTERS

to Pin Ratio, December 12, 1960 6 PRESIDENT’S CORNER
By E.F. Rent 7 FROM THE EXECUTIVE
DIRECTOR
8 ASSOCIATE EDITORS’
VIEW
13 GUEST EDITORIAL
45 PEOPLE
62 CHAPTERS
70 SOCIETY NEWS
72 IEEE NEWS
74 CONFERENCE REPORTS
76 CALENDAR
80 FOOTER
Digital Object Identifier 10.1109/MSSC.2009.935236
IEEE SOLID-STATE CIRCUITS MAGAZINE W I N T E R 2 0 10 1

Administrator, Katherine Olstein Terms to 31 Dec. 2012
IEEE SOLID-STATE IEEE SSCS, 445 Hoes Lane Kerry Bernstein, John J. Corcoran,
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Region 8 Representative
Mary Y. Lanzerotti Tohru Furuyama, fulfilling term
[email protected] SSC ADMINISTRATIVE COMMITTEE
of Jan Sevenhans
President, Bernhard Boser
TECHNOLOGY EDITOR University of California, Berkeley, USA Region 10 Representatives
Richard C. Jaeger C.K. Wang
[email protected] Vice-President, Rakesh Kumar
Technology Connexions, Poway, Chairs of Standing Committees
TUTORIALS EDITOR California, USA Awards—John J. Corcoran
Rakesh Kumar Secretary, Bruce Hecht, Analog Devices, Chapters—Jan Van der Spiegel
[email protected] Boston, Massachusetts, USA Education—C.K. Ken Yang
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[email protected]
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CIRCUITS SOCIETY Terri S. Fiez, Tadahiro Kuroda,
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SCOPE: Each issue of IEEE Solid-State Circuits Magazine is envisioned as a self-contained

resource for fundamental theories and practical advances within the field of integrated cir-
cuits (ICs). Written at a tutorial level and in a narrative style, the magazine features articles
by leaders from industry, academia and government explaining historical milestones, current
trends and future developments.
CONTACT INFORMATION: See the “Contact Us” page on SSCS Web site: http://ewh.ieee.
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IEEE Solid-State Circuits Magazine (ISSN 1943-0582) is published quarterly by The Institute
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PHOTO COURTESY OF THE RENT FAMILY
York, NY 10016-5997, USA +1 212 419 7900. Responsibility for the contents rests upon the
authors and not upon the IEEE, the Society, or its members. The magazine is a membership
benefit of the IEEE Solid-State Circuits Society, and subscriptions are included in Society fee.
Replacement copies for members are available for $20 (one copy only). Nonmembers can pur-
chase individual copies for $138.00. Nonmember subscription prices are available on request.
Copyright and Reprint Permissions: Abstracting is permitted with credit to the source. Librar-
ies are permitted to photocopy beyond the limits of the U.S. Copyright law for private use of
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the per-copy fee indicated in the code is paid through the Copyright Clearance Center, 222
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paid at New York, NY, and at additional mailing offices. Postmaster: Send address changes to
IEEE Solid-Sate Circuits Magazine, IEEE, 445 Hoes Lane, Piscataway, NJ 08854 USA. Canadian ABOUT THE COVER:
GST #125634188 PRINTED IN USA Mr. E.F. Rent.
2 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE

CONTRIBUTORS
CHARLES E. BRANS- from helping his father repair radios signed the Xerox STAR
COMB spent nearly and TVs in the 1960s and 1970s and Professional Work-
12 years doing vol- taught his father how to program in station, including
unteer work for BASIC on a small PC that he built by its first commercial
North Carolina State hand in 1978. Ethernet (10-mb/s). At
University. In recog- Sun Microsystems he
nition of this, he was awarded the DIRK STROOBANDT managed full-custom microproces-
Watauga Medal, the highest honor currently leads the sors including UltraSPARC-I, SIC, and
for volunteer work at North Carolina Hardware and Em- Java-oriented engineering teams.
State University. bedded Systems re-
search group at Ghent RICK DILL had a long
THOMAS MICHAEL University, a group of and interesting career in
RENT, the third son of ten people with interests in semiau- IBM (mostly research)
five of Edward Fran- tomatic hardware design methodolo- highlighted by coin-
cis Rent and Mad- gies and tools, run-time-reconfigurable venting the injection
elyn Joan Rent, is a hardware and applications, and recon- laser, pioneering mod-
retired electrical engi- figurable multiprocessor networks. eling of photolithography, leading IBM
neer living in Lakeville, Minnesota. He efforts in information display, and
learned a great deal about electronics ROBERT GARNER, currently with IBM, toward the end, creating process tech-
started his Silicon Valley career at Xerox nologies for magnetic recording heads
Digital Object Identifier 10.1109/MSSC.2009.935488 System Development where he code- at nanometer dimensions.
50TH ANNIVERSARY OF THE IBM 1401

ROBERT GARNER
ROBERT GARNER
(a) (b)
These photographs show original members of the 1401 engineering, marketing, and support teams attended the “50th anniversary
of the IBM 1401” event at the Computer History Museum on 9–10 November 2009. Pictured in the Museum’s 1401 restoration room
in front of the 1401 that was procured from Germany are (from left) (a) Jim Ingram, 1401 engineering manager; Francis Underwood,
1401 architect; Charles Branscomb, 1401 program manager; and Sheldon Jacobs, 1401 market planner and (b) George Ahearn, Earl
Bloom, Jim Ingram, John Pokoski, Jan Barris, Francis Underwood, Jud McCarthy, Charles Branscomb, and Sheldon Jacobs.

CONTRIBUTORS
CHARLES E. BRANS- from helping his father repair radios signed the Xerox STAR
COMB spent nearly and TVs in the 1960s and 1970s and Professional Work-
12 years doing vol- taught his father how to program in station, including
unteer work for BASIC on a small PC that he built by its first commercial
North Carolina State hand in 1978. Ethernet (10-mb/s). At
University. In recog- Sun Microsystems he
nition of this, he was awarded the DIRK STROOBANDT managed full-custom microproces-
Watauga Medal, the highest honor currently leads the sors including UltraSPARC-I, SIC, and
for volunteer work at North Carolina Hardware and Em- Java-oriented engineering teams.
State University. bedded Systems re-
search group at Ghent RICK DILL had a long
THOMAS MICHAEL University, a group of and interesting career in
RENT, the third son of ten people with interests in semiau- IBM (mostly research)
five of Edward Fran- tomatic hardware design methodolo- highlighted by coin-
cis Rent and Mad- gies and tools, run-time-reconfigurable venting the injection
elyn Joan Rent, is a hardware and applications, and recon- laser, pioneering mod-
retired electrical engi- figurable multiprocessor networks. eling of photolithography, leading IBM
neer living in Lakeville, Minnesota. He efforts in information display, and
learned a great deal about electronics ROBERT GARNER, currently with IBM, toward the end, creating process tech-
started his Silicon Valley career at Xerox nologies for magnetic recording heads
Digital Object Identifier 10.1109/MSSC.2009.935488 System Development where he code- at nanometer dimensions.
50TH ANNIVERSARY OF THE IBM 1401

ROBERT GARNER
ROBERT GARNER
(a) (b)
These photographs show original members of the 1401 engineering, marketing, and support teams attended the “50th anniversary
of the IBM 1401” event at the Computer History Museum on 9–10 November 2009. Pictured in the Museum’s 1401 restoration room
in front of the 1401 that was procured from Germany are (from left) (a) Jim Ingram, 1401 engineering manager; Francis Underwood,
1401 architect; Charles Branscomb, 1401 program manager; and Sheldon Jacobs, 1401 market planner and (b) George Ahearn, Earl
Bloom, Jim Ingram, John Pokoski, Jan Barris, Francis Underwood, Jud McCarthy, Charles Branscomb, and Sheldon Jacobs.

EDITOR’S NOTE
Mary Lanzerotti
In This Issue
W
Welcome to the winter 2010 issue of
IEEE Solid-State Circuits Magazine!
This edition marks the beginning
of our second year. We are grateful
for your support. Thank you very
self-contained issues, with original
sources and new contributions by ex-
perts describing the current state of
affairs in technology in view of the
influence of the original papers and/
diction (SLIP) Conference, focuses on
Rent’s rule in his article “Interconnect
Research Influenced: How E. F. Rent’s
decades-old rule and its implications
for chip wire lengths have guided the
much for reading the magazine or patents. last ten years of inter-
and for sending your comments in In this issue, we are de- connect research.”
In this issue, we are
letters to the editor. lighted to feature Rent’s Robert Garner, who
delighted to feature
We wish to acknowledge the sup- rule and the 1401 com- coordinated the resto-
Rent’s rule and the
port and initiatives of Executive puter, with original ar- ration of an IBM 1401
1401 computer, with
Director Anne O’Neill, SSCS Technol- ticles by Mr. Rent’s son, computer at the Com-
original articles
ogy Editor Dick Jaeger, SSCS Tutori- Tom Rent, Prof. Dirk puter History Museum
by Mr. Rent’s son,
als Editor Rakesh Kumar, Associate Stroobandt of the Uni- in California for the 50th
Tom Rent, Prof. Dirk
Editors Tony Harker, Tom Lee, and versity of Ghent, Rob- Anniversary celebration
Stroobandt, Robert
Pengfei Zhang, and News and SSCS ert Garner of IBM Al- of the 1401, in November
Garner, and Rick Dill.
Managing Editor Katherine Olstein. maden, and Rick Dill, 2009, has coauthored an
We also thank all of our authors who a former president article with Rick Dill titled,
have published in the newsletter and of the IEEE Electron Devices Society and “The Legendary IBM 1401 Data Pro-
magazine during the past years. a member of the National Academy of cessing System.”
The continuing goal of IEEE Solid- Engineering. Thank you for reading IEEE Solid-
State Circuits Magazine staff and Tom Rent’s article is titled “Rent’s State Circuits Magazine. Please send
contributors is to create a series of Rule: A Family Memoir.” your comments and feedback to me
Prof. Stroobandt, who is the founder at [email protected].
Digital Object Identifier 10.1109/MSSC.2009.935257 of the System-Level Interconnect Pre-

LET TERS
W
We want to hear from you. Send your A First-Class Magazine people, happenings,
views about the magazine, about the As a professional engi- As someone who’s and research in our
Society, or on issues affecting our neer working in Silicon always interested field. I was especially
profession to the editor in chief. Let- Valley and a long-time in reading about delighted to read in
ters may be edited for publication. IEEE Member, I have the history of tech- the summer 2009 issue
long enjoyed reading nology and the on multiflow VLIW
Outstanding Winter Issue IEEE Solid-State Cir- people involved, it microprocessor original
Thanks so much for locating and cuits Magazine, which was enlightening work. I found it inter-
sending me a replacement copy of the provides an excel- to hear about the esting to learn about
winter 2009 IEEE Solid-State Circuits lent venue to pro- development of the the breakthrough work
Magazine. During a recent move, my mote our field and Intel 4004 from the they achieved. I can relate
original copy went missing. I know our achievements, perspective of those directly to the profes-
it’s available electronically via IEEE allow members to directly involved. sional design that I did on
Xplore, but that issue is one I wanted connect with fel- Intel microprocessor.
to keep in its original hardcopy form, low IC designers, and enriches Thank you for a first-class magazine.
in part because it is the first issue of our network.
IEEE Solid-State Circuits Magazine as The magazine also is well written, —James Chan
a magazine rather than a newsletter, filled with interesting stories about
but primarily for the content.
As someone who’s always inter-
ested in reading about the history of
technology and the people involved, it
was enlightening to hear about the de-
velopment of the Intel 4004 from the
perspective of those directly involved
(Hoff, Mazor, Faggin, and Shima). Fur-
ther, including the articles about the
MCS4, the conference paper reprints,
and the newly written retrospectives
(by Lee, Naffziger, and Ratner) lend a
very nice sense of context (then and
now) to the achievements.
Finally, the composition aspects
(artwork and arrangement of articles)
of the issue were outstanding, and re-
ally enhance the reader’s enjoyment
of the text.
Keep up the good work!
—Jim O’Reilly

PRESIDENT’S CORNER
Bernhard E. Boser
Be in the Driver’s Seat!
P
Physicists including Newton, Einstein,
or Max Plank have left their unique
marks that will forever be tied to their
names. Electronics also has leaders,
and this magazine chronicled many
with escalating costs for new fabs
could bring an end to Moore’s law re-
gardless of technical feasibility.
It is again in the hands of our
community to prevent this from
today, transforming the lives of peo-
ple all over the world. Can we apply
similar technology, for example, to
health care? Affordable and easy to
use point-of-care medical diagnos-
of their contributions. But unlike the happening. Parallel processing results tic devices would not only give us
quantum leaps in the sciences, prog- in improved performance indepen- powerful weapons against possible
ress in electronics follows a very pre- dent of clock frequency. New devices pandemics such as the H1N1 virus
dictable and steady path enabled by with reduced leakage prom- but might also save
the collective contributions from a ise to overcome the power millions of lives each
The IEEE Solid-State
large community of engineers. density problem which year from diseases
Circuits Society fos-
Over more than four decades al- keeps us from increasing such as tuberculosis,
ters this community
ready, Moore’s law accurately predicts circuit speed. malaria, or cholera.
with conferences and
the evolution of our field, enabled by With time, new ap- Tackling these prob-
publications that
the concerted effort of thousands of plications will play an lems requires a concert-
provide a platform
engineers regularly overcoming tech- ever-more important ed effort by thousands
for exchanging and
nical challenges that seemed insur- role as drivers for pro- of engineers working
debating new ideas.
mountable. The result has been sus- gress, along with tech- diligently towards a com-
tained exponential growth over more nology advances. Many mon goal, a skill our com-
than four decades. outstanding problems are clearly with- munity has refined in more than
Today Moore’s law faces a new in the cap abilities of current tech- four decades. The IEEE Solid-State
challenge, and it is not technical. Al- nology and promise growth regard- Circuits Society fosters this com-
though transistor density keeps dou- less of transistor density. Enormous munity with conferences and publi-
bling every two years, the resulting challenges lie ahead of us, for example cations that provide a platform for
performance gains grow at a slower in the energy sector, and electronics exchanging and debating new ideas.
pace. The most visible example is mi- is bound to play a significant role in I look forward to hearing from you at
crocomputers, whose clock rate has their solution. these conferences or reading about
virtually stopped increasing, remov- Perhaps the biggest opportunities your ideas in our publications. Your
ing a compelling reason for regular lie in applying our solutions to prob- participation in the community is
upgrades. Reduced growth combined lems outside the world of electronics what drives the future of our field.
and communication altogether. Four Be in the driver’s seat!
Digital Object Identifier 10.1109/MSSC.2009.935262 billion cellular phones are in use

FROM TH E EXECUTIVE DIRECTOR
Anne O’Neill
The IC World Is Not Flat: Embrace the Spike
G
Get together to get smarter. “Ideas
flow more freely, are honed more
sharply, and put into practice more
quickly when large numbers of in-
novators, implementers, and finan-
powerful productivity advan-
tages, economies of scale, and
knowledge spillovers that such
density brings. . . . In terms of
sheer economic horsepower
7–11 February in San Francisco, there
will be the densest cluster of IC de-
sign talent in the world. Attending
ISSCC is still the best way to learn
from your own design community:
cial backers are in constant contact and cutting-edge innovation, to hear the questions of others who
with each other, both in and out of surprisingly few regions mat- haven’t yet reported their work un-
the office.” These creative people ter in today’s global economy. derway; to hear the answers that
are the pump of urban health. This Readers of IEEE Solid-State Circuits have become clearer to the research-
quote from Richard Florida, who is Society (SSCS) literature can probably ers, since they first wrote up their
currently at the University of Toron- name more than half of these creative manuscript for the conference. We
to, may seem to us an obvious ob- centers from memory by learn from each other
servation. Florida has spent decades recalling the locations of and feed the growth
using social and economic data the authors they read. Urban areas where of innovation.
from international organizations to This is small comfort our talent has pooled The next best thing
verify this. for those seeking new are still destinations to being there will be
Florida refutes the idea The World positions while the IC for expanding corpo- reading about it on
Is Flat, the title of a book written by R&D industry is con- rations and nurtur- IEEE Xplore. The ISSCC
New York Times reporter Thomas solidating. Consumer ing start-ups. 2010 leadership prom-
L. Friedman. Florida assembles the and institutional en- ises prompt delivery of
data to show a few concentrated thusiasm for our prod- its files to Xplore. They
regions dominate “in terms of both ucts somehow isn’t registering in will be posted just before the month
sheer economic horsepower and job security for some of SSCS world- of April. But besides the time delay,
cutting-edge innovation.” In the in- class talent. But urban areas where Xplore won’t have the question and
troduction (“The World Is Spikey”) to our talent has pooled are still desti- answer sessions, the hallway conver-
his book The Flight of the Creative nations for expanding corporations sations, the faces of authors in dialog.
Class, Florida contradicts Friedman’s and nurturing start-ups. In a smart Be drawn by the talent and get con-
myth of the level playing field: world, the money follows the talent. nected in San Francisco.
Creative people and their A useful corollary to Florida’s geo- To read more, visit www.creative
companies cluster because of the graphical-based principle is a time- class.com and www.isscc.org.
based one. At the International Solid-
Digital Object Identifier 10.1109/MSSC.2009.935353 State Circuits Conference (ISSCC) on

A SSOC IATE EDITORS’ VIEW
Tony Harker
Inner Space—The New Innovation Driver
W
We have all heard of the consumer
products spawned from the race into
space. How many of us coveted our
pens that could write upside down
and in zero gravity? While the march
ranging from advanced high-end
scanning systems down to simple
blood pressure monitors. All of
these systems need to be reliable. It
goes without saying that highly inte-
from Loughborough University in
the U.K.). But perhaps more impor-
tantly, he can draw upon a vast range
of experience within his team to find
solutions to complex problems.
of space-based innovation continues grated systems, in particular those Crucially, the analog systems
at a pace, there is a new frontier operating inside the human body, group has a combined experience
much closer to home that is also by their very nature need to be ex- of around 80+ years in circuit and
driving engineers to develop novel tremely reliable and very robust. IC design ranging from ex-watch
and highly engineered solutions. This in turn drives the design cycle circuit designers to people with
These, in turn, are likely to spawn aggressively to produce parts that more recent radio-frequency iden-
future advances in consumer devices can maintain operation over long tification (RFID) circuits under their
as the drive towards lower power periods, work within hostile envi- belts. Additionally, there is sig-
devices and more efficient systems ronments, and operate with mini- nificant printed circuit board (PCB)
continues to gather momentum. mal intervention. development resource that is funda-
The medical market has devel- There are many companies and mental to the design methodology
oped enormously over the past few research institutes operating in the as described later. This wide expe-
decades. Advances in areas such as medical market throughout the rience pool is ideally suited to the
medical imaging, through use of world. The United Kingdom is seen challenges offered by the medical
techniques such as advanced digital by many as a recognized center of devices market.
signal processing (DSP) techniques, excellence in medical science. This Perhaps not surprisingly, the
are evident throughout the spectrum coupled with long-founded exper- major drivers for circuit design in
of diagnostics. In addition, the ad- tise in circuit design makes it an this market are no different from
vent of low-power, highly integrated ideal candidate to exploit the new any other—power, performance,
systems, MEMS and RF technology innovation driver—inner space. and cost. Where this market diverg-
coupled with advances in battery Based in east England, Cambridge es from others is the prominence
performance has opened up remote Consultants has a long history of attached to power. Parallel mar-
monitoring, diagnostics, and inter- product design and consultancy. kets such as consumer electronics
vention techniques to levels previ- From its early beginnings as a Cam- tend to migrate towards digital for
ously unheard of. The market drivers bridge University spin out in 1960, very valid reasons. Digital solu-
for these is very apparent. The de- Cambridge Consultants now employs tions tend to use less silicon area,
veloped world has an inherently age- more than 300 people and has con- allow more flexibility and thus
ing and growing population. This centrated its business around four lend themselves to platform or
population is, on the whole, served main streams including wireless, multiuse applications. The analog
by stretched traditional medical re- products and systems, consulting, blocks in such systems are often
sources. This combination is fuel- and medical technology. constrained towards high-perform-
ling a market for advanced systems The medical technology division ance analog-to-digital converters/
to deliver cost effective and efficient also houses the analogue systems digital-to-analog converters. Im-
“point of care“ solutions. group headed by Dr. Matthew Hayes. plantable medical systems, on the
Medical systems can mean many Dr. Hayes has over ten years of post- other hand, tend to employ more
different things to different people doctoral experience in analogue bespoke approaches, simply to get
circuit design to back up his Ph.D. the best possible power utiliza-
Digital Object Identifier 10.1109/MSSC.2009.935255 (which he gained in optoelectronics tion for any given application. It is

easy to understand the rationale
behind this when considering im-
plantable medical systems as the
target. Clearly, any system needs to 16 MB
be as energy efficient as possible. Address Map ROM
Changing batteries is complicated, RAM
or Flash
costly, and inherently risky where 24
16
invasive surgery is involved.
Address
Read
Write
Custom
The drive towards low-power Data Analogue
systems has many facets. Typical- Circuits
ly, systems will have at least one MMU
processor, associated RAM, and of XAP5
course, interface circuitry. Chosen Clocks, Resets,
Controls etc.
technologies tend to be at the ma-
xSIF IRQ 32 Custom
ture end of today’s technology spec-
4 SIF IVC Digital
trum typically being realized in 350 Circuits
nm down to 180 nm with the latter
considered as the current “sweet iSIF Optional Master Processor or
spot.” Such relatively large effective Hardware State Machine
transistor lengths mean that inte-
grated RAM is limited by available
die area. This in turn has meant that
low-power CPUs such as Cambridge’s
XAP series have evolved to become Cambridge Consultants XAP5 processor and its integration interfaces are optimized for code
very highly code efficient and ide- density. (Used with permission from Cambridge Consultants.)
ally suited to medical systems. In-
terestingly, one of the major issues subthreshold region for the majority area usually avoided if at all possible
within deep submicron design, i.e., of time, which in turn means that any by traditional designers. Further-
the effects of dynamic leakage in cause and effect responses are likely more, due to the extreme nature of
embedded RAM, is not seen as a to be exponential in nature. Perfor- the design specifications, circuits at
major problem. This is partially due mance in such regions has never 350 nm can exhibit problems only re-
to the chosen silicon technology but been a strong point in standard CMOS cently seen as being important in sub
also due to relatively low change fre- transistor models and as such is an 90-nm systems. Intrachip variability
quencies of the bits inherent from
the code efficiency within the proc-
essors. Simply speaking, the RAM is
predominantly static, bits change
relatively infrequently, and there-
fore dynamic leakage is minimal.
The analog interfaces and con-
trols offer their own challenges to
the design teams. Wide operating
voltages in the region of 3 V down-
wards combined with threshold volt-
ages in the region of 700–800 mV
can cause operating headroom prob-
lems in circuits at the lower end of
the voltage spectrum. Furthermore,
the use of dc to dc converters at the
higher end is avoided due the inher-
ent current drawn by the regulators
themselves. By their very nature, the
circuits being developed are using
components that are working at the
edge of their associated operation. Example of a discrete emulation board used to verify system functionality and enable code
Transistors can typically be in the codevelopment. (Used with permission from Cambridge Consultants.)

in areas such as threshold ematics. In other words, the
and resistance mismatches, engineer’s basic tool kit.
parasitics, and other associ- At this end of the design
ated effects can affect circuit spectrum, experience is
performance drastically. clearly a huge asset to any
Leading edge medical circuit design team. This inevita-
design is relatively immature bly raises the question of
when compared to consumer or hiring and training. Cam-
mainstream wireless systems. bridge Consultants actively
As such, medical systems can encourages preuniversity
(and often do) include novel engagement through their
architectures and methods technology scholarship sys-
to get the very best perform- tem. This is designed to at-
ance from a given specifi- tract aspiring engineers into
cation. By inference, many commercial design through
designs are bespoke and the internships and has been in-
multiple reuse of IP is limited strumental in repeat engage-
to a very small platform of Silicon area for a typical mixed-signal SoC is dominated by ments and indeed master’s
the RAM and logic. (Used with permission from Cambridge
linked systems. By using and Ph.D. studies while em-
Consultants.)
this approach, Cambridge ployed full time. As in most
can drive individual designs to the In situ testing is clearly difficult other design groups, peer training
absolute minimum power and optimum due to the environment and the and mentoring are used extensively
performance while also not compro- inherent associated risks. Physiologi- to bolster a good grounding in basic
mising by using “off the shelf” intellec- cal systems such as the endocrine engineering mathematics and phys-
tual property. network can have relatively high ics. The ISO 13485 peer reviews de-
While this approach lends itself latency compared to the central ner- scribed earlier also act as a catalyst
very well to innovation at the circuit vous system. This then offers the for knowledge transfer between so-
level, it also provides challenges test engineers a challenge in ensur- called “pillars of wisdom” and less-
to the design framework. Circuits ing system level performance prior experienced staff members. In this
are regularly emulated at a very de- to end device manufacture. Again, way, the group maintains a high
tailed level using PCB and discrete the emulation PCB comes into its own level of inherent engineering abil-
devices down to L, C, and R tran- here and is able to augment system- ity and thus ensures that it has the
sistors and op amps prior to mask- level simulation approaching real resources in place to meet the mar-
making. The reasons for this are time performance for the processors. ket needs.
threefold. In the first case, the emu- For the analog engineers, any test or The drive towards more complex
lators allow a “looks like” system to monitor nodes mean extra current. and widely used point of care and
be prepared to fully test interfaces, The use of very high impedance repli- implantable medical systems will
system blocks and critical circuitry. cating buffers for probing is therefore continue to drive aggressive speci-
Second (but equally as important), vital to ensure the power budget is fications. This in turn will stimulate
a well-designed emulation platform not compromised. innovation in the systems world
allows concurrent software develop- Medical systems design is rigor- and, in particular, the mixed signal
ment. Third, the target specification ously policed by ISO 13485, which end of the spectrum. Inner space is
can be tested. Designs fail or require is a comprehensive system for the arguably the new proving ground for
mid term rework due to incorrect or management, design, and manu- next generation consumer devices
ambiguous starting specifications. facture of such devices. At Cam- where power saving and harvest-
By using a sophisticated emulator, bridge Consultants, this translates ing are of paramount importance.
the development groups get to per- to regular, detailed peer reviews, The next decade should prove to be
form a “3608” appraisal of the start- quality audits, and formal reports. very interesting!
ing criteria and therefore are able Indeed, it is not uncommon for en-
to flush out any ambiguities prior gineers to back up standard design Acknowledgment
to hitting the commit button. Emu- practice with supplemental paper- This column was prepared with
lation at this complexity therefore based analysis that helps to miti- the help of Dr. Matthew Hayes, who
provides a high level of confidence gate associated risks. To paraphrase leads a team focused on mixed-sig-
in the overall system performance, Dr. Hayes, ...they don’t trust the mod- nal IC design for medical applica-
function, and specification prior to els or the simulators. In a lot of cases tions at Cambridge Consultants in
cutting the masks. it boils down to physics and math- the United Kingdom.

Managing with a Book Club
Nudge, But Not Push—An Untold Method of Team Building
Pengfei Zhang
I
It was a Saturday in late October
2009. I was on a business trip in Tai-
pei and had to stay over the week-
end. A few local friends decided to
take me hiking on the scenic Tianmu
could have the luxury to do it too,” I
said. Already working long hours, I
doubted people at a startup company
like ours could possibly be intrigued
by the idea of a company book club.
sions. Needless to say, brainstorm-
ing with his lieutenants during book
readings enriches his thoughts and
helps it to further develop them into
more systematic theories.”
Gudao (Ancient Tianmu Trail), locat- “It is fun. More importantly, it is Chen was referring to Ming-kai
ed in the Shilin District and bordering a fun way of effective team build- Tsai, the legendary founder and chair
an area best known as an enclave for ing. It could very well be worth the of MTK. Tsai founded MTK in 1990
Taiwan’s expatriate community. The precious time even at a startup,” and in 2008 launched a revolution in
Tianmu Trail is also known as Shu- Frank affirmed. “For any organiza- China’s mobile handset industry, help-
iguan Trail (Water Pipe Trail) since a tion to be effective in the long run, ing made-in-China cell phones narrow
big water pipe lies along most part it is essential for the team to have the gap with international brands. His
of the trail. The water pipe is part viewpoints that do not diverge too “disruptive innovation” theory on
of a waterway system built during much on almost anything. Simi- business management inspired peo-
the Japanese occupation of Taiwan. lar views and opinions establish a ple in and outside of MTK to expand
Today, the pipe supplies 19,000 tons backdrop for the more visible per- their imagination.
of water per day to residents. formance the organization puts on. The idea of a book club reminds
Fall is perhaps the best time in The backdrop is the unique culture me of the “politics study” we used to
Taipei, and hiking is little more than that differentiates one organization have in schools, factories, and gov-
an easy walk. As we strode into the from others. And the book club is ernment offices in mainland China
woods, Frank Ho, managing director a subtle venue for all team mem- more than 30 years ago. Every Fri-
of the WK Technology Fund, broke the bers to subconsciously negotiate a day afternoon, people were divided
silence and said, “You know what, we common ground on how the world into groups to read propaganda ma-
had a very enjoyable session at our should be viewed, in addition to the terials or Chairman Mao Tse-Tung’s
company book club last week.” WK knowledge acquired and accumulat- writings. This tradition apparently
Technology Fund is a venture capi- ed through continuous reading.” originated from the founding fathers
tal firm investing in high tech areas That sounded convincing. Once of the communist party. Even during
in communications, semiconductor, back from the trail, I did some re- war times more than half a decade
information technology, and clean search on book clubs. It turns out ago, the army would manage to find
energy. Founded in 1989, it is one of that WK Technology Fund is not alone the time between battles to have a
the early pioneers in Taiwan’s ven- in having the tradition of a company politics study session, led by a party
ture industry. Its founder, Wen K. Ko, book club. Many Taiwanese com- secretary, the highest rank in each di-
has been known as the “godfather” of panies do, from Asustek Computer vision. It is therefore a proven meth-
Taiwan venture investing. Inc. (ASUS), the world’s fifth largest od in managing the party and the
“Company book club? How does it notebook PC maker, to Media Tek Inc. army. After winning the civil war, the
work to have a book club at work?” (MTK), the dominant GSM chip sets same people that used to command
I asked. provider to the greater China area. the army were transferred to run the
“Well, we read a new book every According to Herbert Chen, one of schools, factories, and government
month. We rotate among us to be the the founding members of MTK’s GSM offices, taking with them the familiar
lead. The lead is responsible to select the chip set design team, “Mr. Tsai is very and proven managerial routine.
book, to compile the list of pondering adamant about our company book Initially, most people being asked
points, and also to preside over the dis- club. It is mandatory for all managers to go to politics study were coopera-
cussion session,” he started to explain. to join. He himself often led the dis- tive. In fact, many were even excited
“Sounds fun. Good for you to find cussion. In fact, the majority of his and enthusiastic. However, as time
the time to read and share. I wish we published thoughts on business and went by, more people became resent-
management have been presented ful of the practice. Things deteriorated
Digital Object Identifier 10.1109/MSSC.2009.935256 first in one of these book club ses- quickly, especially during the Cultural

Revolution, when everyone had to go Pudong Airport, I bought the book therefore a united team. The differ-
to many sessions of politics study Nudge, by two professors from the ence lies in how to make it enjoyable,
either for fear of retaliation or for University of Chicago, Richard H. or at least not resented.
demonstration of loyalty. It was still a Thaler and Cass R. Sunstein. It is “A nudge,” according to Thaler
team-building tool, but a tool to divide about how our daily decisions, small and Sunstein, “is any aspect of the
rather than to unite, a tool to threaten or big, trivial or important, can be choice architecture that alters people’s
rather than to guide, and a tool to en- influenced. In one of the conformity behavior in a predictable way without
force rather than to facilitate. So poli- experiments that they conducted, forbidding any options or significant-
tics study became more than just a they asked people a series of 12 ly changing their economic incen-
simple annoyance, it was dangerous very simple questions and found tives. To count as a mere nudge, the
and fearful. More than just an attempt that when asked separately to de- intervention must be easy and cheap
to “brain wash,” it became literally a cide on their own, without knowing to avoid. Nudges are not mandates.”
“team wash”—you comply or you die. answers from others, people almost So providing a book list with-
By the end of the Cultural Revolution, never erred, since the test was easy. out banning others outside the list
people grew hateful of group study But when asked in a group of six counts as a nudge. Mandating every-
and would do anything to avoid it. people at once, with five intentional- one to read Chairman Mao’s works
How did the two seemingly simi- ly giving the same incorrect answer, does not count as a nudge. People
lar group activities—the book club at people erred more than one third of most likely would choose from the
Taiwanese companies and the politics the time. This finding seems to cap- provided book list anyway as they
study at schools in mainland China— ture something universal about hu- are being nudged by the choice archi-
result in such drastically different manity—we sometimes ignore the tecture. People value the freedom of
outcomes? The book club sounds en- evidence of our own sense and sub- choice. A nudge can therefore work
joyable and entertaining, while the consciously do what others around magically better than mandates.
politics study is fearful and resented. us do to conform. So when exerting influence in guid-
When I travel, I usually visit the Both the book club and the poli- ing a team, try not to push too hard.
airport bookstore and buy a book to tics study provide a social setting for Instead try to put in some thought, and
read while flying. Before my flight our conforming tendency to work its architect a nice, gentle constant nudge.
departed for Taipei in Shanghai wonder in building consensus and
YO U K N O W YO U R S T U D E N T S N E E D I E E E I N F O R M AT I O N .
N O W T H E Y C A N H AV E I T . A N D Y O U C A N A F F O R D I T .
IEEE RECOGNIZES THE SPECIAL NEEDS OF SMALLER COLLEGES,
and wants students to have access to the information that will

put them on the path to career success. Now, smaller colleges can
subscribe to the same IEEE collections that large universities
receive, but at a lower price, based on your full-time enrollment
and degree programs.
Find out more–visit www.ieee.org/learning
Revolution, when everyone had to go Pudong Airport, I bought the book therefore a united team. The differ-
to many sessions of politics study Nudge, by two professors from the ence lies in how to make it enjoyable,
either for fear of retaliation or for University of Chicago, Richard H. or at least not resented.
demonstration of loyalty. It was still a Thaler and Cass R. Sunstein. It is “A nudge,” according to Thaler
team-building tool, but a tool to divide about how our daily decisions, small and Sunstein, “is any aspect of the
rather than to unite, a tool to threaten or big, trivial or important, can be choice architecture that alters people’s
rather than to guide, and a tool to en- influenced. In one of the conformity behavior in a predictable way without
force rather than to facilitate. So poli- experiments that they conducted, forbidding any options or significant-
tics study became more than just a they asked people a series of 12 ly changing their economic incen-
simple annoyance, it was dangerous very simple questions and found tives. To count as a mere nudge, the
and fearful. More than just an attempt that when asked separately to de- intervention must be easy and cheap
to “brain wash,” it became literally a cide on their own, without knowing to avoid. Nudges are not mandates.”
“team wash”—you comply or you die. answers from others, people almost So providing a book list with-
By the end of the Cultural Revolution, never erred, since the test was easy. out banning others outside the list
people grew hateful of group study But when asked in a group of six counts as a nudge. Mandating every-
and would do anything to avoid it. people at once, with five intentional- one to read Chairman Mao’s works
How did the two seemingly simi- ly giving the same incorrect answer, does not count as a nudge. People
lar group activities—the book club at people erred more than one third of most likely would choose from the
Taiwanese companies and the politics the time. This finding seems to cap- provided book list anyway as they
study at schools in mainland China— ture something universal about hu- are being nudged by the choice archi-
result in such drastically different manity—we sometimes ignore the tecture. People value the freedom of
outcomes? The book club sounds en- evidence of our own sense and sub- choice. A nudge can therefore work
joyable and entertaining, while the consciously do what others around magically better than mandates.
politics study is fearful and resented. us do to conform. So when exerting influence in guid-
When I travel, I usually visit the Both the book club and the poli- ing a team, try not to push too hard.
airport bookstore and buy a book to tics study provide a social setting for Instead try to put in some thought, and
read while flying. Before my flight our conforming tendency to work its architect a nice, gentle constant nudge.
departed for Taipei in Shanghai wonder in building consensus and
YO U K N O W YO U R S T U D E N T S N E E D I E E E I N F O R M AT I O N .
N O W T H E Y C A N H AV E I T . A N D Y O U C A N A F F O R D I T .
IEEE RECOGNIZES THE SPECIAL NEEDS OF SMALLER COLLEGES,
and wants students to have access to the information that will

put them on the path to career success. Now, smaller colleges can
subscribe to the same IEEE collections that large universities
receive, but at a lower price, based on your full-time enrollment
and degree programs.
Find out more–visit www.ieee.org/learning
GUEST EDITORIAL
Legendary IBM 1401 Mainframe Turns 50!
A
As area manager for accounting ma-
chines at IBM during the evolution of
the 1401, I was responsible for the de-
velopment, plan, and execution of the
project as well as for the strategy and
COMPUTER HISTORY MUSEUM CELEBRATES
THE 50TH ANNIVERSARY OF THE LEGENDARY IBM 1401
On 10 November, the Computer History Museum in Mountain View, California, held a special
event to commemorate the 50th anniversary of the IBM 1401 mainframe, which became the
business plan that would satisfy the world’s most popular computer during most of the 1960s after its debut on 5 October 1959.
needs of unit record customers. Hosted by Jon Iwata, the celebration offered presentations and a roundtable discussion by
All members of the development the following:
team are extremely grateful to Rob- • Jon Iwata, IBM senior vice president, marketing and communications
ert Garner and other members of the • Francis Underwood, IBM 1401 chief architect, 1957–1960
Computer History Museum for shin- • Charles Branscomb, IBM 1401 program manager, 1957–1960
ing a spotlight on the 1401 system 50 • Sheldon Jacobs, IBM 1401 marketing lead, 1958–1960.
years after its announcement. Also featured was a team of volunteers’ restoration of two 48-year-old IBM 1401 magnetic-
We are very impressed by the tape systems.
suc cess of the museum team in
researching and constructing an
accurate history of IBM’s pioneer-
ing work in solid-state technology unit record products. In 1957, he be- Technical Committee, which was re-
and in the development of the 1401 came area manager for accounting sponsible for future technologies
system. The timing of early achieve- machines and directed the develop- that would keep IBM on the leading
ments in solid logic and ferrite core ment of the IBM 1401, which was an- edge. In 1973, he became IBM direc-
memory meshed well with the needs nounced in 1959. The 1401 family tor of engineering, programming,
of the 1401 and permitted it to meet then became the best-selling comput- and technology.
its objective of moving thousands ers in the world in the mid-1960s. In 1974, Branscomb became vice
of unit record customers to the new In 1961, he was named systems president of the development and
world of “data processing,” in combi- manager of control systems, where manufacturing of general systems di-
nation with Fran Underwood’s stored he led development of the IBM 1710 vision in Atlanta, Georgia, responsible
program architecture and Jonas Day- for computer control of continuous for Systems 32, 34, 38, Series 1, and
ger’s new printer. Notwithstanding processes. In 1964, he became the the IBM PC. In 1983, he became vice
these achievements, we still had to director of computer-assisted in- president of the telecommunications
tenaciously pursue low cost to meet struction and established joint ac- systems in communications product
the financial needs of basic unit re- tivities with Illinois University, division in Raleigh, North Carolina.
cord customers. Michigan University, Texas Univer- After his retirement in 1986, he be-
—Charles Branscomb sity, Penn State University, and came a full-time consultant for IBM
[email protected] Stanford University. His department for three additional years. He holds
developed the IBM 1500, which was six issued patents and has seven pub-
About the Author a ten-student station system for edu- lished inventions.
Charles E. Branscomb received a mas- cators to use in support of research He then spent about 12 years doing
ter’s degree in mechanical engineer- in computer-assisted instruction. heavy volunteer work for NCSU, had
ing from North Carolina State Univer- In 1966, he became president of two adjunct appointments with the
sity (NCSU) in 1950. He joined IBM in the systems development division College of Engineering, and was
the Endicott, New York lab in 1950 to with eight U.S. and six European labs, awarded the Watauga Medal, which is
design punched card handling and managing delivery and continued de- the highest honor for volunteer work
velopment of the System/360 product at NCSU.
Digital Object Identifier 10.1109/MSSC.2009.935264 line. In 1971, he joined the Corporate

Thomas Michael Rent
E.F. Rent’s son on the genesis

of his father’s famous algorithm
E.F. Rent in 1950.
and the man behind it.
I
EEE Solid-State Circuits readers are for- person and provide an inside view of his life and how
tunate. In mid-October 2008, my 82-year- Rent’s rule was just one of many of examples of how he
old father received a request from the approached problem solving and doing effective work.
IEEE to prepare an article on Rent’s rule It’s funny, at his funeral I was asked by several of his
that would be featured in the Winter 2010 long-retired IBM coworkers to explain Rent’s rule as part
issue. The IEEE didn’t know at the time that my father, of the eulogy. I am an engineer, like my dad, and I began
Edward Francis Rent, died unexpectedly at home on 3 the eulogy by first telling the crowd that to us boys, Rent’s
October 2008, seemingly from a stroke. Had my father rule was “If you ask for it, you don’t get it.” You see, that
received this IEEE request prior to his death, he would really was my father’s clever way to keep us young and
have politely turned it down. He was not one to celebrate overanxious boys in line whenever we’d go shopping as a
his brilliance or draw attention to himself, ever. He family to prevent us from constantly begging for things
simply lived for the benefit of others. that we really didn’t need, aisle after aisle. I hated that
I’m his third son of five (Figures 1 and 2) and am hon- version of Rent’s rule as a kid, but it turned out to be pure
ored to share a bit of what I know about Rent’s rule, but Ed Rent genius.
mostly I want to share with you who my father was as a As I was working on my electrical engineering educa-
tion in the late 1970s, the actual Rent’s rule was brought
Digital Object Identifier 10.1109/MSSC.2009.935294 to my attention by my professors. My dad never spoke
14 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE 1943-0582/10/$26.00©2010IEEE

about it at home, and I don’t recall My dad savored the idea of doing things
him ever really wanting to talk about
it, either. He never did consider it to very efficiently and always looked at doing
be all that special, probably because more with less.
to him it was just one of hundreds, if
not thousands, of things he had fig-
ured out over his lifetime. In short,
Rent’s rule defined the relationship number of logic gates in the logic In my research into what he did
between the number of external block; it was a rule that he devised in to come up with this rule, it all looks
signal connections to a logic block 1960 and is still used today by system to have been done in a period of just
(i.e., the number of “pins”) with the and circuit developers. a few weeks in late 1960, when he
FIGURE 1: Ed Rent and four of his five sons in 1962. The author is second from the left.

FIGURE 2: Ed Rent with his wife, Joan, and (from left) sons Steve, Tom, Paul, and Ed Jr.; FIGURE 3: Ed Rent in 1960, age 33, in his
grandson Chris; and son Tim. den at home in Endicott, New York.
My father relished work that involved the 500-plus-circuit-card 1401 pro-

cessor, and it was from that exercise
analyzing things that already existed, that Rent’s rule was derived. Well, I
learning how they worked, and coming up was wrong. Although he would have
loved to solve the puzzle of how to
with ways to do certain functions better and distribute logic over all of these cir-
more efficiently. cuit cards efficiently, it turns out
that he only used the production
1401 and 1410 processing units as
was only nine years into his engi- just been invented and IBM had the sound examples in deriving Rent’s
neering career at IBM in Endicott, chance to really reduce the size, rule. Apparently his job was “only”
New York (Figure 3). When you have power, and cooling requirements of to develop some engineering rules
a long career—and his was 30 years their new machines as compared for IBM to use to aid in developing
to the day with IBM—you work and with the massive vacuum tube– future machines. I don’t know who
solve a lot of problems, with none of based machines being produced at actually did the 1401/1410 layout
them seeming to be any more impor- the time. and routing tasks, but no doubt it
tant than the next. Little did he My dad talked many times about
know then how valuable Rent’s rule how incredible that technological
would turn out to be for IBM and the shift was in 1960, especially men-
electronics industry. tioning the huge reduction in heat
My recollection of the Rent’s rule dissipation and energy usage, a big
story passed around within the advantage for IBM with their new sol-
family was that as a junior engineer id-state solutions. My dad savored
my dad was given the job of figuring the idea of doing things very effi-
out how to distribute logic circuits ciently and always looked at doing
composed of transistors and resis- more with less. This was the corner-
tors over a large array of single- stone of much of his thinking.
sided printed circuit cards for one For some reason I had the im- FIGURE 4: Photo of the IBM 1401 system.
The processing unit is in the center and
of IBM’s new all-solid-state proces- pression that in 1960 my dad, as a
was the subject of the Rent’s rule study.
sors, the 1401 (Figure 4). bright junior IBM engineer, was (U.S Government photo from http://
This was a new and serious prob- assigned the job of actually doing en.wikipedia.org/wiki/File:BRL61-
lem in 1960, as the transistor had the parts layout out and routing for IBM_1401.jpg.)

was very difficult and likely was not
optimal, due to the lack of rules In short, Rent’s rule defined the relationship
such as Rent’s rule at the time. between the number of external signal
The discovery that my dad prob-
ably wasn’t directly involved in the
connections to a logic block with the number
1401/1410 logic layout processes of logic gates in the logic block.
makes good sense to me, as he was
mainly a deep and quiet thinker
rather than an inventor or team- countless television sets as a hobby, So what did my dad do exactly to
leader type who would push prod- until “chips took over,” as he would come up with Rent’s rule? Well, it
uct designs through drafting and say. He was very creative when it seems he simply wanted to deter-
into the factory. He did relish work came to making things better; in mine what a reasonable logic block–
that involved analyzing things that retirement he sent many letters to to–pin ratio rule of thumb should
already existed, learning how they companies, such as Toro, illustrat- be for a range of possibilities. His
worked, and coming up with ways to ing improvements he had made to plan was to create a graph using a
do certain functions better and more their products and suggesting that high-density, best-case ratio on one
efficiently. This likely came out of they incorporate these into their end of the graphed line, and an
his early training fixing radios as next products. I don’t believe many actual ratio from machines in pro-
kid in Pittsburgh and working on actually did, though. duction—the 1401s and 1410s—on
the other. By plotting this line, IBM
would be able to estimate how many
pins to allocate in the physical
layout based on the number of logic
RENT’S RULE blocks the particular mainframe
Rent’s rule defines the relationship between the number of external signal connections to a machine contained.
logic block (i.e., the number of “pins”) with the number of logic gates in the logic block. This re- To plot the two endpoints, he
lationship was originally developed to aid logic layout and routing decisions in early mainframe took a best-case value provided by
computers but has since been used in semiconductor engineering [S1] IBM’s manufacturing research group
Np 5 Kp Nbg for high-density packaging and plot-
ted this against the actual logic
Np is the number of pins or the number of external signal connections to a logic block block–to–pin ratio from the 1401
Ng is the number of logic gates in the block and 1410 machines, which he stud-
b is the Rent’s constant ied in precise detail. The result was a
Kp is a proportionality constant log-log relationship, from which an
The values of Kp and b for the IBM computers were reported to be 2.5 and 0.6, respectively. equation for Rent’s rule was eventu-
ally derived (see “Rent’s Rule”).
Rent’s Constants for Various System Types
Exponent Multiplier In analyzing my dad’s two memos
System or Chip Type b KP on the subject, he first studied the
Static memory 0.12 6 larger IBM 1410 processing unit in
Microprocessor 0.45 0.82 November 1960 to determine its
Gate array 0.50 1.9 average logic block–to–pin ratio and
High-speed computer
then, a month later, he compared
Chip and module level 0.63 1.4
Board and system level 0.25 82
Another IBM employee, W.E. Donath, discovered that Rent’s rule can be used to estimate the
average wirelength and the wirelength distribution in VLSI chips. This motivated the System
Level Interconnect Prediction workshop, founded in 1999, and an entire community working
on wirelength prediction. The resulting wirelength estimates have been improved significantly
since then and are now used for “technology exploration.” The use of Rent’s rule allows design-
ers to perform such estimates a priori (i.e., before actual placement) and thus predict the prop-
erties of future technologies (clock frequencies, number of routing layers needed, area, power)
based on limited information about future circuits and technologies.
Reference
[S1] B. S. Landman and R. L. Russo, “On a pin versus block relationship for partitions of logic graphs,” IEEE
Trans. Comput., col. C-20, pp. 1469–1479, 1971.
FIGURE 5: The 1401 Card Chassis showing
SMS cards for the computer unit.

such future problems, allowing
IBM’S SMS CARDS system architects to quickly esti-
The logic cards used in the 1401 and 1410 processing units studied by Ed Rent were standard mate the physical effects (number of
modular system (SMS) cards (Figure S1). These single sided circuit cards were 4.5 in x 2.6 in boards, size of boards, and number
printed circuit boards and were used in IBM equipment from the late 1950s to the mid 1960s. of interconnect board pins required)
as new computers and intelligent pe-
ripherals were being conceived. This
information in turn allowed cabinet
size, power supply requirements,
cooling requirements, and cost to be
more rapidly derived.
Soon after this rule was pub-
lished it began to be used as a rule
of thumb beyond IBM. Over the
years it has been used in perhaps
millions of cases, from mainframes
to hybrid parts to the densest of
integrated circuits. Rent’s rule has
been studied, enhanced, and refined
and has even been used in fields
outside of electrical engineering,
FIGURE S1: IBM standard modular system card front and back
such as optical engineering.
(Photo by author).
My dad retired from IBM in the
Each logic SMS card would typically contain three to six germanium transistors and 15 or so summer of 1980 at age 53, exactly
resistors plus half a dozen capacitors and diodes. A board might contain one or more gate types, 30 years to the day from when he
or an entire flip-flop. At the time, these cards were equivalent to the small scale integration (SSI) started and the first possible day he
circuits that would follow in the early 1970s. was eligible (Figure 6).
The SMS concept began in 1955, with the intention of having 100 different standard card He actually left the job several
types to provide all the functions that IBM would need in any of its equipment, including power months earlier, using his accrued
supplies. This would make design, manufacture, and servicing more efficient and cost effective. vacation to stretch his term of ser-
There were single-wide and double-wide versions developed. The concept became so popular vice to exactly the 30-year minimum
that well over 2500 SMS card types were ultimately designed. eligibility date. This was so like him:
plan ahead and be precise. It wasn’t
that he didn’t enjoy working at IBM,
it was just that he figured out that he
this ratio with that found in the With these two points, the Rent’s did not need to work for the income,
smaller 1401 machine. rule formula was derived and became and so he retired at the first opportu-
It must have taken some meticu- a very handy rule of thumb for all nity. He almost made it to 30 years of
lous counting of logic blocks and retirement, too, before passing away,
pins used, as the 1410 processing although he always said he never
unit contained four card chassis, counted on more than about five
ranging from 192 to 229 cards each. years, and the rest would be a bonus.
The number of raw logic circuits He had a good, long life and is very
ranged from 904 to 964 per chassis, missed. (See “Edward Francis Rent.”)
and the total number of net pins
used per chassis was approximately Rent’s Rule Revision Attempt
2,500. Each card measured approxi- An interesting thing happened in
mately 4.5 in by 2.6 in and contained 1984 relating to Rent’s rule. None of
up to 16 card edge connector pins us in the family knew much about
(see “IBM’s SMS Cards”). the details, but my dad started
My father’s conclusion was that to get calls from IBM asking him to
the average block-to-pin ratio was come out of retirement for a bit to
2.06 to 1 for the 1401 and 1410 ma- update Rent’s rule. Apparently, IBM
chines and twice that for the best- claimed that his log-log graph was
case density as provided by the IBM FIGURE 6: Ed Rent in 1980, the year he “running out of steam,” as he would
packaging research team. retired from IBM. say, and they wanted him—and only

him—to come in and update it. By
then he had fully mastered retire- EDWARD FRANCIS RENT
ment, and he politely said, “Nope.” Edward Francis Rent was born on 3
A week later another call came September 1926 in Pittsburgh Penn-
from IBM, this time from one of his sylvania, third son of four children.
last bosses, who they must have felt His father was an industrious man and
would have a better chance of prying a tinkerer in electronics that provided
my dad out of his hammock and get- Edward with some early exposure to
ting him back on the job to do this. the field. His father bought him a crys-
Again: “Nope, not interested.” He felt tal radio as a kid, and he used it ev-
they had plenty of engineers who erywhere he went and was fascinated
could do such work and that they that it provided sound with no battery
didn’t need him. source. His father then got him his
Well, IBM didn’t give up. A call first job fixing radios as a teenager at
came from the manager at the next a local drug store and then got him
level up, and soon more zeros were enlisted into the U.S. Navy Electron-
FIGURE S2: Ed Rent in 1952, age 25, after
being added to the compensation ics school at age 18, just as WWII
moving to IBM Endicott.
proposed. My dad thought about it was concluding.
and eventually agreed to come in to After the Navy, Edward took advan-
do the work for them, but only under tage of the GI bill and received his
certain conditions: B.S.E.E. degree in just three years at
1) He could wear whatever he Pitt University, using the summers
wanted, including slippers. to gain the needed credits to gradu-
2) He could come in whenever he ate in 1950. His father then got him
wanted and talk to whomever he his first engineering job at IBM as a
wanted. customer service engineer fixing vac-
3) He could walk into the “big uum-tube and relay-intense printers
boss’s” office whenever he want- for local banks. It was here that IBM
ed to get something done. recognized Edward for his attention
4) He was not going to have to go to to detail and for his continuous drive
any meetings. to have machines run efficiently, reli-
5) And when he was done, he was ably, and correctly. In 1952, IBM then
FIGURE S3: Photo of IBM 650 Magnetic
done. offered to transfer him to Endicott,
Drum laboratory on Broad Street in Endicott
Let’s just say that the IBM folks New York, as a design engineer in the in 1953. Ed Rent worked on this machine as
loosened up their ties, swallowed development engineering organiza- his first project after moving to Endicott.
hard, and agreed. My dad went in and tion (Figure S2). He went.
spent about two months working on His first project in 1953 was working on the first IBM 650 magnetic drum processing
the update in his summer shorts, flan- unit at their Broad Street Lab (Figure S3).
nel shirt, and slippers. Unfortunately, IBM had originally forecast a need for just 50 machines, but in less than ten years
I have no details on what the results IBM produced over 2,000. In 1955, Edward was promoted to an associate engineer and
were other than his telling me that moved to the Engineering Planning Group in Endicott, which led to his work on Rent’s
modern large-scale integration (LSI) rule in 1960.
designers were doing things that were Edward worked on many more projects at IBM before retiring in 1980. The machine
beyond what Rent’s rule was meant to he talked most about was the first electronic mail sorting machine that IBM Endicott was
address and that many variations building as an experiment under a contract with the U.S. Postal Service. Edward did all
were possible based on the particu- the timing for this machine and was praised for how fast and reliable he was able to
lars of the technology. He said when make the machine run. He was instrumental in developing an early barcode that would
he devised the rule, it was all about be stamped onto letters prior to being sorted by their machine. An optical scanner would
single-sided card-edge connectors read the barcode and this determined which of 100 or more bins the mail would be
and wire-wrapped backplanes. In the routed to by the sorter. Edward initially tried to get the machine to sort a batch of 200
time from 1960 to 1984, integration letters in a single pass, but one day he increased the belt speed of the sorter and set the
had come a very long way, and the timing up to do the work over two passes, and the result was that all the letters were
original Rent’s rule did not have to actually sorted faster and with less errors. He very much enjoyed such discoveries. It
consider other parameters like line was this effort that formed the basis for many of today’s mail sorting machines and the
lengths and clock speeds. I believe associated barcoding.
IBM concluded that it would let Rent’s

Rent’s rule has been studied, enhanced, Conclusion
Rent’s rule is a simple idea devel-
and refined and has even been used in oped from a simple need. It’s com-
fields outside of electrical engineering, forting to know now that my dad has
a legacy in the field of computer
such as optical engineering. engineering and that people today
still treasure and appreciate his dis-
covery of this rather simple rule. I’d
rule stand and that it would not pub- studying the schematics. He enjoyed like to thank the IEEE and IEEE Solid-
lish anything additional; however, I explaining to me how resistors, State Circuits Magazine for providing
am not totally clear on this view. I capacitors, inductors, transformers, space in this issue to highlight my
wish he were here to fill this in for us! relays, diodes, and transistors father’s rather modest contribution
My dad did apparently make a worked. He then got me a volt-ohm to the world and for allowing me to
major contribution to computer engi- meter so that I could debug my own share some personal memories of
neering as a result of some rather circuits. I soon was designing my growing up as his son. Our family is
simple work performed by him as own circuits and building my own honored and grateful.
part of his job during those pioneer- gadgets. What fun it was to actually
ing solid-state years. He was like build something that did something About the Author
many others whose discoveries of pretty neat! Thomas Michael Rent is a retired
relationships, formulas, and break- He then taught me how radios electrical engineer living in Lakeville,
throughs seemed rather insignificant and televisions worked, one step at Minnesota. He graduated from SUNY
at the time but are now seen by others a time. I would pick up poorly work- Binghamton in 1980 and spent his
as brilliant. He was a humble man. ing units at garage sales, and with career working for the Aerospace
his help I would fix them up and Division of Control Data Corporation,
What He Taught Me either resell them or give them away which is now part of General Dynam-
My dad and I are very similar. Grow- to people in need. It was this experi- ics Corporation. He learned a great
ing up, I found myself hanging ence and knowledge that helped me deal about electronics growing up
around him as if he were my best decide to pursue an electrical engi- helping his father repair radios and
friend. He was always busy at home, neering career after finishing high TVs during the 1960s and 1970s. In
either working on electronics (TV school, and it was a good choice. 1978, he built a small PC that had a
and radio repair), remodeling the My dad also had an interest in built-in BASIC interpreter and taught
house, or keeping the cars running aviation. As a child he designed his father how to do the program-
well. He almost never hired anyone and built model airplanes, and this ming and how to save the programs
to fix anything, as he enjoyed the was also of great interest to us kids. on cassette tape. At the time IBM was
adventure of doing it himself. Al- My dad never got his private pilot still focused on mainframe comput-
though all of his sons helped him certificate, but he did solo in a ers, and Thomas remembers his
with many of these things, I found glider and regularly took the family father being stunned to see how pow-
myself especially drawn to these ac- to see gliders flying. I shared this erful and effective these new PCs
tivities so that I could learn new interest of his as well, building were. He knew at that moment that
things and be with him. dozens of model aircraft as a kid. the world was about to change
The most useful gift he ever gave As an adult I took up glider flying, because of these PCs, much like it did
me was a Tandy 50-in-1 electronics and I am now a certified flight when IBM migrated from vacuum-
kit when I was about 14 years old. I instructor in gliders. I owe him a tube machines to solid-state machines
spent hundreds of hours wiring great deal for exposing me to these just 20 years earlier.
up all of the project experiments and wonderful things.

Dirk Stroobandt
A
lthough Rent’s rule
was formulated in the
1960s and published
worldwide in 1971, it
took until the end of
the 1990s before its value became
clearly apparent, leading to the cre-
ation of an entire research field on a
priori wire length predictions. Even
when the rule itself became quite popu-
lar, its inventor, E.F. Rent, stayed in the
background: who the man actually was
remained a mystery. It was as if Mr. Rent
stayed in the prompter’s box while others
took the stage and spread the word on his
findings. In this article, I will show that Rent’s
rule can be viewed as a fundamental law of
nature with respect to electronic circuits. As there
are many interpretations of the rule, this article will
shed some light on the core of Rent’s rule and the
research that has been built on it.
The scaling of computer technology has been driven by
Moore’s law, which states that the number of transistors on a chip
doubles with every technology generation. (In the 1970s, the number of
transistors doubled every 18 months; later, this was every two years, and
over the last decade it has been every three years.) In the 20th century,
Moore’s law also meant an increase in the clock frequency with every tech-
How E.F. Rent’s nology generation (Figure 1). This currently is no longer the case, however:
decades-old rule clock frequencies are now staying almost the same with each new technology
generation. Few people are aware of it, but the reason for this has its basis in
and its implications Rent’s rule.
for chip wire lengths Although there are many interpretations, Rent’s rule basically states that,
in a chip design, the number of wires emanating from a region containing B
have guided the logic blocks (the basic computational elements on chips) grows faster than
last ten years of the perimeter length increase when B grows (Figure 2). Note that this is
explicitly a scaling argument and, in principle, assumes an infinitely large
interconnect circuit. With some calculations, one can deduce from this that the average
research. length of an interconnection on chip must increase with a growing number of
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Authorized licensed use limited to: Synopsys. Downloaded on November 23,2022 at 09:41:14 UTC from IEEE Xplore. Restrictions apply.
1971 4,004
1972 8,008
1974 8,080
1978 8,086 Moore’s Law
1982 286 Means More Perfomance
1985 386 Processor
1989 486 DX Processor
1993 Pentium Processor
1997 Pentium II Processor
1999 Pentium III Processor
2000 Pentium 4 Processor
100,000,000
Pro 10,000,000
ces 1,000,000
sing rs
Pow isto
er ( 100,000 Trans
MIP of
S) 10,000 ber
N um
1,000
FIGURE 1: Moore’s law expresses the exponential progress of technology scaling as an increase in the number of transistors. It has been
valid for clock frequency as well.
gates [6]. Since the length of a wire Rent’s Rule The Terminal-Gate
has a large effect on the delay it In the 1960s, IBM employee E.F. Rent Relationship of Rent’s Rule
induces on an electrical signal trav- wrote an internal memo that de- In their paper, Landman and Russo
eling the distance, the wire delay on scribed what later became known as discuss ways of optimally partition-
chips has surpassed the transistor Rent’s rule. It wasn’t until two other ing a circuit into modules in such a
delay since the end of the 1990s. So IBM employees, Landman and Russo, way that as few interconnections as
while transistors keep on gaining in wrote a landmark paper in 1971 that possible between the modules are
speed with every new technology Rent’s rule was made public [5]. It cut during the partitioning. The
generation, the wires in between is actually surprising and a bit rationale behind this is that con-
them induce a relatively larger delay, mysterious that E.F. Rent never pub- nected gates in different modules
and this has stopped the clock fre- lished his findings outside of IBM will be placed further apart than the
quency from continuing to scale up. himself, and it remains unknown gates within each module, and there-
Rent’s rule, first formulated in the (to me at least) why his name was fore this partitioning strategy will
1960s, is not nearly as well known as not on the paper written by Land- keep the connections shorter. In
Moore’s law but it is of a much more man and Russo—hence the title of such a strategy, Rent’s rule relates
fundamental nature. Where Moore’s this article. the average number of terminals T
law is a mere observation that has of a part of any circuit (a module) to
become a self-fulfilling prophecy the average number of logic gates
(with major ASIC technology compa- (basic logic blocks B) inside the
nies driving their road maps in module as t 5 tBp. The parameter t is
accordance with it), Rent’s rule was the average number of terminals per
largely neglected for a long time. Yet logic gate (if B 5 1, Rent’s rule
there is no way to circumvent this reduces to T 5 t) and the exponent p
fundamental rule, and so it had a is called the Rent exponent. Its value
detrimental effect on the clock sp- depends on the complexity of the
eeds of new computer systems. Logic Block Net interconnection topology (with hi-
In this article, I will explain Rent’s Space for One Terminal gher values for more complex topol-
rule in detail, focus on the wire length ogies) and on the quality of the
estimations that result from it, and FIGURE 2: Rent’s rule states that the placement (with higher values for
present an overview of the myriad of number of terminals (wires emanating from less placement optimization). The
research activities that sprouted a region) grows faster than the perimeter maximal value of the Rent exponent
length increase when the number of blocks
from the initial research work on a p is one for a very complex topology
grows. If the space for one terminal on the
priori wire length estimates. The boundary scales linearly with the block or a random placement [1].
final section wraps up with a short size, there is a shortage of space for all Rent’s rule was found by experi-
look at the future of Rent’s rule. terminals (red lines lack space). mental analysis of many circuit
partitions and proves to be valid for In the 1960s, IBM employee E.F. Rent wrote
most designs. Figure 3 shows the
result of a circuit partitioning in a an internal memo that described what later
log-log plot of number of terminals became known as Rent’s rule.
versus number of logic gates. The
validity of Rent’s rule follows from
the fact that all points follow, on on an “optimal” partitioning (result- average number of terminals in a parti-
average, a straight line in the plot. ing in Figure 3). In fact, Rent’s rule tioned complex circuit will be higher
Note that there is a deviation has been explained as a fundamen- than for a simple circuit, and the Rent
from the straight line for high tal scaling law [10] and it was shown exponent will naturally be higher.
values of T and B that is known as in [1] that Rent’s rule applies to any Therefore, the Rent exponent is a mea-
Rent’s region II and has been de- homogeneous design. sure of interconnection complexity.
scribed in [1] and [5]. This deviation A less obvious interpretation, but The complexity interpretation
at the chip boundary is a direct the one that gives rise to all major uses also gives rise to a relation between
result of the nature of Rent’s rule of Rent’s rule, is that it is a measure of the Rent exponent p and a fractal
itself. For circuits with an intercon- interconnection complexity. The rea- dimension D that describes the geo-
nection complexity p larger than soning here is that a more complex metric dimension that would be the
0.5, the number of pins (terminals structure of the wires between the “ideal” fit for implementing the circuit
at the outermost boundary) scales logic blocks means that there are more [10]. One can deduce (through parti-
faster than the perimeter of the wires that connect blocks that are less tioning) that for any D-dimensional
boundary (see Figure 2). In practice, close (in terms of graph distances or, mesh the Rent exponent is given by
the number of pins at the boundary after placement, in terms of actual dis-
of a chip is limited, and hence the tances). Hence, it is harder to place D21
p5 .
number of signals going out is inten- such a circuit with short wire lengths. d
tionally lowered by techniques such A circuit with simple interconnection
as serialization of the information complexity, then, is a circuit where all Interconnect Length Predictions
stream or encoding of the informa- wires are between blocks that are close The main claim of fame for Rent’s
tion in fewer bits. Therefore, the to each other (again in terms of graph rule has come from Wilm Donath’s
actual number of pins on a chip is distance). For example, planar graphs 1979 paper on wire length estima-
significantly lower in real circuits are simpler than nonplanar graphs tion [3] and a follow-up paper in
than Rent’s rule predicts. It is one of because it is easier to place such cir- 1981 [4]. In these papers, Wilm
the many misconceptions about cuits in two dimensions. It is clear that Donath, another IBM employee,
Rent’s rule (and one that lead to in this interpretation, a simpler circuit used Rent’s rule to predict the aver-
false conclusions in many papers) can be partitioned more easily, with age wire length and wire length dis-
that Rent’s rule fixes the relation fewer connections to be cut, than a tribution in computer chips before
between the number of pins of a cir- more complex circuit. Therefore the the actual layout. The basic idea is
cuit and its number of internal simple and uses a partition-
blocks. Rather, Rent’s rule is ing scheme as the basis of the
based on a scaling argument estimation. The three main
100
and really captures only the ISCAS89 100 models for the layout genera-
Benchmark `s953′ 70
internal interconnection com- 50 tion are (see Figure 4) i) a cir-
plexity. Another deviation at 33 cuit graph model with Rent’s
25
the low end has also been 18 rule as the model of its inter-
10 % 13
T
observed in [8] but this is much 10 connection complexity, ii) a

less frequent. 7 Manhattan grid architecture
5
Average 3 model where the circuit will be
Interpretations of Rent’s Rule Rent's Rule 2 placed and routed, and iii) a
1
In the previous section, we in 1 model for the placement and
1 10 100 1,000
fact already presented two dif- B routing of the circuit on the
ferent interpretations of Rent’s architecture.
rule: the one presented in Fig- FIGURE 3: Rent’s rule: number of terminals per module T
ure 2 (about the scaling of the versus number of gates per module B during the partitioning Donath’s Wire Length
number of terminals accord- of a benchmark circuit (ISCAS89 benchmark `s953’). The size Prediction Model
of the circles corresponds to the percentage of modules (on
ing to the number of internal a total number of modules around an average number of Donath’s model is basically a
blocks if this number grows) gates, at equal distances in the log-log plot) that has B gates hierarchical partitioning of
and the interpretation based and T terminals. both the circuit and the

used to estimate the number of ter-
minals from the number of gates
inside the subcircuit. As each termi-
Circuit Architecture nal represents a wire going out of
the module under investigation and
given the fact that two terminals are
Layout Generation needed to represent one wire that is
cut (under the restriction of two-
terminal nets only), one can easily
Layout deduce the number of wires crossing
the module boundaries at a certain
partitioning level. This number also
contains the number of wires cross-
ing the boundary from the previous
FIGURE 4: The three components of models for physical design: the circuit, the architecture
and the layout generation. The combination of these models results in the (model for the) partitioning in the hierarchy so one
layout. has to subtract that number to
obtain the number of wires cut at
Manhattan grid architecture. The This partitioning process ensures each partitioning level.
model starts with a partitioning of that the number of longer intercon- The average length of a connec-
the circuit in four equal parts in nections between large subblocks is tion at a hierarchical level was as-
such a way that the number of minimized in favor of shorter inter- sumed by Donath as the average of
nets cut is minimized [Figure connections between smaller blocks all possible connection lengths
5(a)]. At the same time, the Manhattan (inside the larger blocks). This is between each and every point from
one subgrid to another one from the
same partitioning level. The sum-
It wasn’t until two other IBM employees, mation over all partitioning levels of
these average lengths, weighted
Landman and Russo, wrote a landmark paper with the number of wires cut at that
in 1971 that Rent’s rule was made public. level, results in an estimate of the
average wire length within the cir-
cuit. The detailed calculations can
grid is partitioned in four equal exactly the same partitioning as be found in [3] and [10].
subg r ids that a re the four quad- was assumed in Rent’s rule. Hence
rants [Figure 5(b)]. Then e ach of we can use Rent’s rule and the Improved Wire Length
t he subcir c uits is mapped to a corresponding Rent exponent as an Prediction Models
subgrid, and for each of the subcir- estimate of the complexity of the The placement and routing models
cuit/subgrid pairs the partitioning interconnection structure. used in Donath’s prediction tech-
steps are repeated until each sub- Without delving into the mathe- nique are very simple. The place-
circuit only contains a single gate matical details (see [3] and [10] for ment is modeled using the hierarchical
and each subgrid contains a single this), it is clear to see that, in each partitioning model (which makes
cell location. partitioning step, Rent’s rule can be sense as partitioning is actually
used in partitioning-based placers
to induce optimality of the wire
lengths). The routing model is very
simple as well as every connection
is assumed to be routed as the
shortest wire between its two end
points. This is a very common as-
sumption and provides at least a
Mapping lower bound on actual wire lengths.
However, the simple partitioning-
based placement model has its
(a) (b) drawbacks. The main reason for
this is the relatively large granular-
FIGURE 5: Donath’s placement model: recursive partitioning of both (a) circuit and ity of the partitioning steps. It is
(b) Manhattan grid and mapping of circuit parts to grid parts. reasonable to assume wire lengths
will be longer when gates are in
different partitions. However, this Destination Destination
is not necessarily the case. Two
gates placed in different modules
but near their border (at both sides)
can have a much shorter length
than two connected gates within
the s a m e m o du le . D o n at h’s si -
mple model does not take this into
effect as it assumes all possible
interconnections within one parti-
tioning level as likely as any other
one (see Figure 6). This leads to an
overestimation of the average wire Source Source
length in Donath’s model by a factor (a) (b)
of two approximately, as has been
noted by several authors in the FIGURE 6: Donath’s placement model: the average length on a hierarchical level is es-
1980s and 1990s (an evaluation can timated by assuming that source and destination cells are uniformly distributed over the
be found in [9] and [10]). grid cells within the partition. We distinguish (a) adjacent combinations and (b) diagonal
In my own Ph.D. research work combinations.
[7], I found a way to remedy this dis-
crepancy between the model and a way of measuring the complexity or development at companies) was
actual measurements by noting that of the interconnection structure based on it during the following
an optimal placement (whether par- of circuits. 30 years—not even after Donath
titioning based or not) will prefer
shorter wires over longer ones and
will hence place gates in two mod- Rent’s rule, first formulated in the 1960s, is
ules of the same partitioning level
preferably near the border of the
not nearly as well known as Moore’s law but
modules. This has been represented it is of a much more fundamental nature.
in Figure 7 by a darker shade for
more likely gate positions. We thus
need a probability distribution for New System-Level presented his very interesting
the placement of source and desti- Interconnection Research application of Rent’s rule in a priori
nation cells for all wires within a Although Rent ’s r ule had been wire length predictions. Of course, the
hierarchical level. known since the early 1970s, not rule was mentioned in a few papers
In [6] and [7], I deduced a prob- much work (research at universities and there were some individual
ability distribution based on the
overall wire length distribution
found by Donath and statistical ar- Destination Destination
guments that the local distributions
should follow the same trends. It
was very surprising to see that the
exact same result was found around
the same time by Jeff Davis at Geor-
gia Tech [2] using a very different
approach and another interpreta-
tion of Rent’s rule. It took until 1999
before I actually found out through
careful analysis [1] that our results
were essentially the same. It was
undoubtedly this improved un-
Source Source
derstanding of Rent’s rule and its (a) (b)
effects on wire length estimations
that reignited research on this fun- FIGURE 7: Placement of source and destination cells according to a probability distribution
damental rule of scaling, giving us (darker regions have higher probability) for (a) adjacent and (b) diagonal combinations.

researchers who actually used it,
but we can hardly speak of a wide- RECENT WORK BASED ON RENT’S RULE
spread proliferation of the rule at • The interpretation and derivation/measurement of Rent’s rule: Stroobandt, University of
that time. This changed, however, Gent, SLIP 1999/SLIP 2001/SLIP 2003; Davis, Georgia Tech, IEEE Transactions on Electron
with the first System Level Intercon- Devices, 1998; Donath, IBM, SLIP 1999; Christie, University of Delaware, SLIP 1999
nect Prediction Workshop (SLIP) in • Improvements/validation of interconnection length models: Christie, University of Dela-
1999 (http://www.SLIPonline.org). ware, SLIP 2000/SLIP 2002; Najm, Toronto, SLIP 2000/SLIP 2003; Stroobandt/Dambre,
This workshop started with a clear University of Gent, SLIP 1999/SLIP 2000/SLIP 2001/SLIP 2002; Davis, Georgia Tech, SLIP
focus on Rentian interconnection 2000/SLIP 2003/SLIP 2006; Sarrafzadeh, Northwestern University, SLIP 2001; Otten, TU
models (the first keynote speaker Delft, SLIP 2001; Cheng, UCSD, SLIP 2001/SLIP 2003; Bennebroek, Philips Research,
was Wilm Donath) and gradually SLIP 2003; Bhatia, University of Texas, Dallas, SLIP 2003; Zarkesh-Ha, LSI Logic, SLIP
became a breeding ground for re- 2004; Chrzanowska-Jeske, Portland State University, SLIP 2004; Lanzerotti, IBM, SLIP
search on the boundary between 2005/SLIP 2007; Amakawa, Tokyo Institute of Technology, SLIP 2007; Behjat, University
physical interconnect modeling and of Calgary, SLIP 2009
interconnect technology, the impact • Generation of synthetic benchmark circuits: Stroobandt, University of Gent, IEEE Transac-
of interconnects on CAD, and archi- tions on Computer-Aided Design, vol. 19, no. 9, 2000
tectural interconnect issues. • Wire length models for three-dimensional systems: Rahman, MIT, SLIP 1999/SLIP 2001;
Saraswat, Stanford, SLIP 2000; Davis, Georgia Tech, SLIP 2000; Chandrakasan, MIT, SLIP
Historical Note 2005; Christie, University of Delaware, SLIP 2005
The idea of SLIP came out of frustra- • Timing estimations: Christie, University of Delaware, SLIP 2002; Amakawa, Tokyo Insti-
tion about the fact that my own tute of Technology, SLIP 2005; Brown, Altera Toronto, SLIP 2006; Luk, Imperial College
research on Rent-based interconnec- London, SLIP 2008
tion models always ended up at the • Routing/routability/congestion optimization: Chong, University of California, Berke-
strangest sessions at conferences: it ley, SLIP 1999; Stroobandt/Kahng, UCLA, SLIP 2000; Scheffer, Cadence, SLIP 2000;
was deemed interesting (and so was He, University of Wisconsin, SLIP 2001; Kahng/Stroobandt, UCLA, IEEE Transactions
accepted) but was the only work of on Computer-Aided Design, vol. 20, no. 5, 2001; Sapatnekar, University of Minnesota,
its kind. At the same time, there was SLIP 2002; Teig, Simplex Solutions, SLIP 2002; Becer/Blaauw, Motorola/University
a clear need for more interconnect- of Michigan/University of Illinois, SLIP 2002; Christie, University of Delaware, SLIP
related research as the dominance 2002; Kravets/Kudva, IBM, SLIP 2003; Karypis University of Minnesota, SLIP 2003;
of wire delays over gate delays Kahng, UCSD, SLIP 2003; Groeneveld, TU Eindhoven, SLIP 2005; Sarrafzadeh, UCLA,
began to show up in real designs. SLIP 2007
When I first presented the idea of a • Placement optimization: Cong, IEEE Transactions on Very Large Scale Integration (VLSI)
new workshop to Andrew Kahng Systems, vol. 9, no 6, 2001; Christie, IEEE Transactions on Very Large Scale Integration
(who was then a professor at UCLA), (VLSI) Systems, vol. 9, no. 6, 2001; Marek-Sadowska/Xilinx, UCSB, SLIP 2001/SLIP 2002/
I meant it to be a workshop primar- SLIP 2003
ily on Rent’s rule-based research. • Floorplanning: Sarrafzadeh, Northwestern University, SLIP 1999
Kahng rightfully thought the scope • Manufacturability and yield: Christie, University of Delaware, SLIP 2001; Zarkesh-Ha, LSI
should be broader than that and Logic, SLIP 2003; Zarkesh-Ha, University of New Mexico, SLIP 2007
came up with the name SLIP. But • Rent-based system/architectural analysis and technology extrapolations: Sylvester, Uni-
Rent’s rule has played a major role versity of California, Berkeley, SLIP 1999; Kahng, UCLA, DAC 2000; Rose, Rensselaer
in the workshop ever since. Polytechnic Institute, SLIP 2001; Hutton, Altera, SLIP 2001/SLIP 2003; DeHon, CalTech,
The presentation of Rent-related SLIP 2001; Maex, IMEC, SLIP 2002/SLIP 2004; Cheng, UCSD, SLIP 2003; Bergamaschi,
work and a tutorial on Rent’s rule at IBM, SLIP 2004; Kumar, Cornell University, SLIP 2004; Greene, Actel, SLIP 2006
SLIP in 1999 seem to have ignited • On-chip power distribution/optimization: Friedman, University of Rochester, SLIP 2002;
new research programs at several Nassif, SLIP 2002; Kolodny, Intel, SLIP 2004; Saraswat, Stanford, SLIP 2004; Kahng/Syl-
universities worldwide. It is impos- vester, UCSD/University of Michigan, SLIP 2004; Schmit, CMU, SLIP 2004
sible to list all the recent applica- • Networking and NoCs: Muddu, Sanera Systems, SLIP 2002; Verbauwhede, UCLA, SLIP
tions of Rent’s rule, but in “Recent 2002; Tenhunen, KTH Sweden, SLIP 2003; Davis, Georgia Tech, SLIP 2004; Burleson,
Work Based on Rent’s Rule” I briefly University of Massachussetts, SLIP 2004; Kolodny, Technion-Israel Institute of Technol-
list some of the areas of study con- ogy, SLIP 2007; De Micheli, Ecole Polytechnique Federale de Lausanne, SLIP 2007; Smit,
nected with it, with an indication of University of Twente, SLIP 2008; Heirman/Dambre/Stroobandt, University of Gent, SLIP
important contributors and the 2008; Reda, Brown University, SLIP 2009
year they published their work at • Optical systems: O’Connor, Ecole Centrale de Lyon, SLIP 2004; Heirman/Dambre/
SLIP or in IEEE Transactions on Very Stroobandt, University of Gent, SLIP 2005/SLIP 2006
Large Scale Integration (VLSI) Systems
(VLSI), where several special issues
Rent’s rule has found its way mainly to IEEE Trans. Circuits Syst., vol. CAS-26, pp.
272–277, 1979.
a priori interconnect length estimation [4] W. E. Donath, “Wire length distribution
for placements of computer logic,” IBM J.
and related extrapolations. Res. Develop., vol. 25, pp. 152–155, 1981.
[5] B. S. Landman and R. L. Russo, “On a pin
versus block relationship for partitions
of logic graphs,” IEEE Trans. Comput., vol.
C-20, 1971, pp. 1469–1479.
on SLIP research have been pub- related extrapolations. As wire [6] D. Stroobandt, H. Van Marck, and J. Van
Campenhout, “An accurate interconnec-
lished. Many more research papers lengths increasingly dominate cir- tion length estimation for computer log-
addressing Rent’s rule can be found cuit delays as well as power and ic,” in Proc. 6th Great Lakes Symp. VLSI,
1996, pp. 50–55.
on the Web. area usage, the importance of inter- [7] D. Stroobandt, “Analytical methods for a
Apart from the papers presented connects will surely endure. One priori wire length estimates in computer
systems,” Ph.D. thesis, Faculty of Eng.,
at SLIP, there have been a number of can question whether Rent’s rule Ghent Univ., gent, Belgium, 1998.
special issues of journals dedicated will still be sufficient as a basis of [8] D. Stroobandt, “On an efficient method
for estimating the interconnection com-
to this topic: VLSI published one in the predictions, since the accuracy plexity of designs and on the existence of
2002 (vol. 10, no. 2), one in 2003 (vol. of Rentian predictions may not be region III in Rent’s rule,” in Proc. 9th Great
Lakes Symp. VLSI, Mar. 1999, pp. 330–331.
11, no. 1), and one in 2007 (vol. 15, high enough. If one needs accurate [9] D. Stroobandt and J. Van Campenhout,
no. 8), and Integration, the VLSI Jour- estimates, one needs to revert to “Accurate interconnection length estima-
tions for predictions early in the design
nal published a special SLIP issue in simulation and actual (albeit fast) cycle,” VLSI Des. (Special Issue on Physical
2007 (vol. 40, issue 4). synthesis methods. Using actual Design in Deep Submicron), vol. 10, no. 1,
pp. 1–20, 1999.
As can be seen from “Recent Work synthesis as the basis for estima- [10] D. Stroobandt, A Priori Wire Length Esti-
Based on Rent’s Rule,” several com- tion may not be as problematic as it mates for Digital Design. Norwell, MA:
Kluwer, 2001, p. 298.
panies have begun discussing and used to be, and so it will probably
using Rent’s rule—notably IBM but gain in importance with respect to
also Actel, Altera, Cadence, Intel, Rent’s rule. However, as hardware About the Author
Sanera Systems, Simplex Solutions, design moves up to higher hierar- Dirk Stroobandt obtained the Ph.D.
and Xilinx. chy levels (e.g., with electronic sys- degree in electrotechnical engineer-
tem-level design), the early steps of ing in 1998 from Ghent University,
Historical Note architecture exploration before any Belgium. Since 2002, he has been a
Before SLIP, I had read a few papers synthesis has been done will again professor at Ghent University, affili-
by Phillip Christie (then at the Uni- require very fast and simple esti- ated with the Department of Elec-
versity of Delaware), but I had never mates to weed out inferior solutions tronics and Information Systems
met him. He was, at the time, the and keep only the promising ones. (ELIS). He was the first recipient of
one person in the world who had In this domain, a simple estimate the ACM/SIGDA Outstanding Doctor-
written a series of papers related to based on Rent’s rule, even if it is not al Thesis Award in Design Automa-
Rent’s rule. He came to SLIP in 1999 very accurate, provides the only tion (1999) and also received the
and gave a presentation there, but plausible way to obtain estimates Alcatel Bell Prize in 2002 for his
what I remember most is our hours- quickly. It is difficult to predict what work on structural and behavioral
long discussion on Rent’s rule in the lies ahead, but I believe Rent’s rule aspects of short optical intercon-
local Irish pub one Saturday eve- has a bright future as design moves nects in electronic systems. He was a
ning. Our interpretations of Rent’s to higher levels of abstraction. But visiting researcher at the laboratory
rule were very different yet so alike. even if we risk forgetting about its of Fadi J. Kurdahi at the University
The next morning, Phillip asked me power, the rule fundamentally gov- of California at Irvine (1997) and
for 15 minutes of the workshop pro- erns our designs. We will be forced postdoctoral researcher under
gram time to explain to the audience to listen to the prompter and take it Andrew B. Kahng at UCLA (1999–
the unifying interpretation he had into account. 2000). Stroobandt has coorganized
come up with overnight. The work- the International Workshop on Sys-
shop atmosphere allowed for such tem-Level Interconnect Prediction
an intervention and laid the basis References (SLIP) since 1999. He has been the
[1] P. Christie and D. Stroobandt, “The inter-
for the highly cited paper we wrote pretation and application of Rent’s rule,” guest editor for two special issues
IEEE Trans. VLSI Syst. (Special Issue on Sys-
together afterwards [1]. tem-Level Interconnect Prediction), vol. 8,
of IEEE Transactions on Very Large
no. 6, pp. 639–648, Dec. 2000. Scale Integration (VLSI) Systems ded-
Future Issues in [2] J. A. Davis, V. K. De, and J. D. Meindl, “A icated to system-level interconnect
stochastic wire-length distribution for gi-
Interconnect Research gascale integration (GSI) —Part I: Deriva- prediction and a special issue of
As stated earlier, Rent’s rule has tion and validation,” IEEE Trans. Electron Integration, the VLSI Journal on SLIP
Dev., vol. 45, no. 3, pp. 580–589, 1998.
found its way mainly to a priori [3] W. E. Donath, “Placement and average in-
for integration.
interconnect length estimation and terconnection lengths of computer logic,”

Robert Garner and Frederick (Rick) Dill
The development of the most

popular computer of the 1960s
and the story of its restoration
at age 50.
T
he IBM 1401 Data lying technologies, we begin with its passing decks of cards with holes
Processing System vacuum tube forebears. We cover punched in them through various
w a s t he world’s IBM’s development of the 1401’s electromechanical “unit record” ma-
most popular com- basic enabling technologies and chines. These machines sorted and
puter during much trace its origins in business account- merged cards, did simple calculations,
of the 1960s. Announced in 1959, it ing machines. We highlight its key punched cards, and printed reports.
was one of IBM’s earliest transistor- features and characteristics, its mar- Most machines were controlled by
ized computers. The IBM 1401 tran- ket succession, and even its appear- hand-wired plugboards tailored for
sitioned thousands of businesses ance in popular culture. We also particular jobs. By the 1950s, IBM’s
and institutions to stored-program describe the volunteer project at the operations from the leasing of unit
computing, and its tape- and disk- Computer History Museum in Moun- record machines and the sale of bil-
oriented systems freed users from tain View, California, that success- lions of punched cards each year
the decades-long practice of storing fully restored two tape-oriented were very profitable.
data on punched cards. In 1965, half 1401 systems to full operation. By this time, calculators with
of all computers were IBM 1401s punched cards for input and output
or members of its family. Figure 1 Early Accounting Machines, were being used to augment account-
shows a tape-oriented 1401 system Calculators, and ing machines. Announced in 1948,
from the 1960s. Stored-Program Computers the IBM 604 Electronic Calculating
In this overview of the develop- For the first six decades of the 20th Punch was about the size of two
ment of the IBM 1401 and its under- century, many businesses processed refrigerators. It was a vacuum tube,
data for inventory, billing, receiv- plugboard-controlled, serial-decimal-
Digital Object Identifier 10.1109/MSSC.2009.935295 ables, and payroll by repetitively digit machine with 50 digits of
28 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE 1943-0582/10/$26.00©2010IEEE
FIGURE 1: A tape-oriented IBM 1401 Data Processing System from the early 1960s. From
left to right: 1402 Card Read Punch, 729 Magnetic Tape Unit, 1407 Console Inquiry Station,
1401 Processing Unit, 1403 Printer. (Image courtesy of IBM Archives.)
storage that could multiply and rency) [2]. It was a stored-program (about US$180,000 to US$300,000
divide. In 1949, IBM also offered the computer with instructions and data today), versus only US$2,000 to
Card-Programmed Calculator (CPC), residing in 2,000 words on a mag- US$2,500 per month for a set of unit
a product that interconnected an IBM netic drum rotating at 12,500 r/min. record machines, such as a 604 Cal-
604 wired for common subroutines, By 1956, a dozen commercial firms culating Punch (US$650 per month),
an extra storage unit, and the popu- had delivered about 1,000 stored- a 407 Accounting Machine (US$1,000
lar IBM 402 Accounting Machine [1]. program computers and 3,200 calcu- per month), a sorter, a collator, and
About 4,500 IBM 604s and 130 CPCs lators, with IBM and the Univac so on [2], [3].
were installed [2]. division of Sperry Rand leading the Particularly during the 1950s, com-
In 1951, UNIVAC pioneered the marketplace [2]. puter design was closely interwoven
business stored-program computer. Broadly speaking, stored-program with rapidly evolving circuit tech-
Soon thereafter, IBM and other com- computers were considerably more nologies and techniques. The 1950s
puter manufacturers introduced com- flexible and adaptable than plug- vacuum tube computers— about
puters for the business and scientific board-based accounting machines. 3,600 were installed commercially
marketplaces. The IBM 650 Magnetic Their software was easier to load, [2]—were typically based on diode
Drum Data Processing Machine an- maintain, and distribute than wiring logic circuits with vacuum tube res-
nounced in 1953 was the first widely and handling plugboards. However, toration of logic levels. Stored-pro-
popular, low-cost business and scien- large-scale stored-program com- gram memories employed mercury
tific computer. The 650 was installed puters were too expensive for all but electroacoustic delay lines (UNIVAC
at more than a thousand customer the largest corporations. Typical I), electrostatic Williams cathode-
sites and rented for about US$4,000 monthly rentals ranged from ray tubes (IBM 701 and 702), or other
per month (US$32,000 in today’s cur- US$25,000 to US$40,000 per month approaches. Vacuum tubes suffered

from high heat dissipation and fila- transistors were far superior to point- quently grew into a working proto-
ment burnout from thermal cycling, contact devices for digital logic cir- type of a fully transistorized 604,
parameter drift, secondary emission, cuits because of their higher current publicly revealed in October 1954
and dust-induced cathode-to-grid gain, greater fan-out, and orders-of- and demonstrated in several U.S.
shorts. Storage CRTs suffered from magnitude lower collector cutoff cur- cities [1], [6]. Based on this effort,
internal particle contamination and rent. Even though alloy-junction was IBM’s 608 Transistor Calculator prod-
proved difficult to manufacture. Vacuum slower and more temperature-sensi- uct was announced in April 1955,
tube machines of this era were typically tive than point-contact, he advocated and it became the world’s first fully
serviced several times per week. IBM for alloy-junction’s higher reliability transistorized commercial calcula-
went so far as to establish a small in- and predictability, lower manufac- tor when delivered in December 1957
house pilot line to demonstrate reli- turing cost, and greater circuit ver- [1]. Nevertheless, only 32 units were
able production of vacuum tubes satility [6]. produced, as it became outmoded by
for computing machines [1]. For In 1953, Logue conducted a class other IBM products [4], [11]. Figure 2
main memory, concerted efforts by in transistor digital circuit design. shows a photo of a transistorized
604 printed-circuit card.
In place of the IBM 604’s 1,400
Businesses and institutions throughout twin-triode tubes, the transistorized
version used 2,200 alloy-junction
the world used the IBM 1401 in the 1960s
germanium transistors; it occupied
to process rapidly growing amounts of half the volume and consumed 95%
information. less power than the original. Even
its power supplies and neon tube in-
dicator drivers were solid-state, the
IBM, MIT, and others made magnetic For lab assignments, six IBM vacuum first time all functions of a large
core the technology of choice due to tube machines were reconfigured to electronic calculating machine were
its high reliability and fast access use transistors. One of the projects implemented with transistors [1].
times. By 1956, IBM had automated was a cross section of the IBM 604 Its direct-coupled transistor and di-
the production of its core memory calculator. The design project subse- ode-transistor logic ran at a 50-kHz
planes [4]. cycle rate with 5-V signal swings [7].
To access its magnetic core memory,
Early IBM Transistor Development three parallel transistors were
and Manufacturing needed to drive a core half-select
Bell Labs invented the transistor in line [4].
1947 and broadly disclosed the tech- Although the transistorized 604
nology in the summer of 1951. It was very reliable, one issue with early
continued to focus on the point-con- alloy-junction transistors was that
tact germanium transistor, as did base resistance was too high for digital
IBM’s initial transistor investiga- circuits. Logue attempted to convince
tions. Although no one knew how to transistor vendors—GE, Raytheon,
manufacture point-contact transis- RCA, and Westinghouse—to lower
tors reliably with repeatable stable base resistance, but the effort was to
characteristics and reasonable gain, no avail since their transistors met the
their faster speed over junction needs of the more popular communi-
transistors was attractive to com- cation applications.
puter designers [1]. Also, due to a In 1954, a Poughkeepsie research
negative resistance region at higher team (working in the site’s defunct
emitter currents, a bistable latch pickle factory) began to design tran-
could be implemented with just a sistors for use in future calculators
single point-contact transistor in- and computers. To lower the transis-
stead of a cross-coupled pair of tor’s base resistance, they used a
transistors [5]. FIGURE 2: A printed-circuit logic card disk-shaped base with a ring contact
In 1952, Joseph Logue joined IBM’s with germanium diodes and alloy-junc- around its circular periphery. The
tion transistors from the 1955 experimen-
nascent transistor research group in emitter was alloyed on one side of
tal transistorized 604 calculator—basis of
Poughkeepsie, New York, after trou- the IBM 608, world’s first fully transistor- the disk and a larger collector on the
bleshooting IBM 701 storage tubes. ized commercial calculator. (Photograph other, allowing for some misalign-
He concluded that alloy-junction courtesy of Robert Garner.) ment (see Figure 3).
In 1956, anticipating the need to
lower the manufacturing costs of its
upcoming transistorized computers,
IBM established a small group in
Poughkeepsie responsible for mass-
producing discrete transistors. By
mid-1959, with Elliott Fritz as its
lead mechanical engineer, IBM had
constructed the world’s first fully
automated production line for as-
sembling alloy-junction transistors.
The line comprised six assembly
units, two ovens, and a welder and
took about three hours to fully as-
semble a transistor [1].
The automated room-sized facil-
ity was a mechanical tour de force
[8]. The assembly process started (a) (b)
with sonic-driven Syntron bowls that
FIGURE 3: A germanium alloy-junction n-p-n transistor (IBM 083) showing (a) its internal
vibrated out only properly dimen- structure and (b) its hermetically sealed TO-5 package, as manufactured by IBM’s fully
sioned preformed components: rect- automated transistor production line transferred to TI in 1959. (Photo courtesy of
angular metallic base frames with a Robert Garner.)
hole for the single-crystal germa-
nium disk, emitter and collector manufacture electronic components. IBM’s new large-scale 7000-series
alloy spheres, and two contact whis- Since Texas Instruments (TI) was transistorized mainframes used the
kers and a mounting base. These already supplying 90% of IBM’s tran- Rolygon packaging.
were inserted into a machined carbon sistors, IBM shipped their entire auto- The SMS Cube packaging com-
fixture that held them in place in mated production line to TI in October prised 29-inch by 29-inch by 31-inch
boats that moved between stations 1959 in exchange for three years’ frame modules, with four large card
by means of a conveyer belt moni- exclusive use [1]. TI later replicated “gates” in the front and four gates in
tored by photoelectric sensors. First, the facility several times and became the back. Cooling airflow was verti-
the emitter sphere was alloyed into a major international supplier of cal, from bottom to top, with a fan in
the germanium disk in a hydrogen germanium discrete transistors. each gate. Frame modules could be
furnace; then the collector sphere stacked two high and two wide, for a
was alloyed into the opposite side in a IBM’s Standard Modular System total capacity of 32 gates—the con-
different furnace. In the zone-con- (SMS) of Circuits and Packaging figuration used by the 1401’s “main
trolled furnaces, the germanium disk While perfecting the automated frame” processing unit (see Figure 4).
melted in a controlled fashion along transistor production line, IBM was Gates easily swung outward 908 from
its slow-dissolving <111>-oriented also planning for the automatic man- the frame or slid out for convenient
surface, recrystallizing a thin layer ufacture of printed circuit boards maintenance. A logic gate could
doped with the elements of the alloy (PCBs). Edward Garvey, after oversee- hold up to 144 single-width SMS
dot. On further cooling, the alloy ing the design of 2,000 types of cards plugged into its single wire-
solidified into a bump that held the vacuum tube modules for the IBM wrapped backplane.
whisker wire contact. The boats were 700-series computers, realized the Figure 5 shows two sample SMS
automatically disassembled, and then need for an automated facility for cards from the 1401: a typical single-
the whiskers were welded to the assembling PCBs with solid-state width card and the less common
package leads. The transistor was ex- components [1] . By 1958, w it h double-width card. Single-width SMS
tracted, acid-etched, washed, dried, Logue’s transistorized 604 cards as a cards were 2.6 in wide by 4.5 in long,
hermetically vacuum-sealed in a can starting point, the standardized engi- with components mounted on one
with a powder to stabilize the mois- neering group in Endicott, New York, side. The cards had up to 16 contact
ture content, and then tested. settled on the Standard Modular pads. When a card was inserted into
IBM’s automated line was theoreti- System (SMS) for electronics packag- a backplane slot, the contact pad
cally capable of producing 3,600 tran- ing. SMS defined two system packag- pressed against a thick gold dot on a
sistors per hour, or 30 million ing options, called Cube and Rolygon. phosphor-bronze spring. The cards
transistors a year—far more than IBM The IBM 1401 was the first system employed a gold-nickel-copper met-
needed. IBM had earlier decided not to to use the Cube packaging, and allurgic stackup with a thick gold

schematics that others then redrew
onto standard forms and key-
punched into cards. The ALD
software performed basic rule
checking (outputs only to inputs,
proper logic levels, net loading,
and so on) and printed a machine’s
full set of logic schematics on 17
inch by 22 inch C-sized paper with
standardized symbols for logic
gates and signal levels, page num-
bers for inputs and outputs, SMS
card block frame locations, and EC
information. Designers had to man-
ually verify path delays and timing
since the software did not perform
timing analysis.
For computing circuits, IBM devel-
oped several transistor logic families
in the latter part of the 1950s, in-
FIGURE 4: Restoration volunteer Ronald Williams and the 1401 processor “main frame” cluding nonsaturating current mode
unit, which includes four SMS Cube frames with 24 gates of SMS cards (out of 32 total gate switching and saturating complemen-
positions); the front panel with indicator lights, buttons, switches, and data paths; 4,000
tary transistor diode logic (CTDL).
positions of magnetic core memory; and hard-wired cable bundles to peripherals. The 1401
processor contains about 2,300 SMS cards with 10,600 alloy-junction transistors and 13,200 Hannon Yourke at IBM invented cur-
point-contact diodes. (Photo courtesy of Robert Garner.) rent mode logic with a typical gate
delay of only 60 ns [1], which was
overcoat on top (100 µin, or 2.54 µm) were wrapped to a post, which made deployed in the scientific IBM 7090
that precluded small surface pores it easier for a field engineering change and Stretch 7030 mainframes with
and prevented corrosion of the under- (EC) to alter backplane wiring. In IBM’s 460-KHz clock cycle rates. With a
lying layers. The thick gold layer production line, punched card read- slower typical gate delay of 250 ns,
eliminated the need for a special lubri- ers controlled automated Gardner- saturating CTDL was first deployed in
cant or corrosion inhibitor chemical Denver wire-wrapping machines. the large-scale 250-kHz commercial
on the contact surfaces. Also during this time, IBM pio- IBM 7070. An earlier study had found
To ensure the reliable intercon- neered an early computer-aided that CTDL consumed 40% fewer tran-
nection of wires between backplane design (CAD) system called auto- sistors than current mode switching
pins, wire-wrap technology was used, mated logic diagram (ALD), which logic. Based on the IBM 7070 design
with stiff solid-core wires snuggly initially ran on IBM 704 and 705 experience, CTDL was selected for
wrapped around rectangular back- mainframes. Logic designers began the 1401’s logic circuits.
plane posts. No more than two wires the CAD process by hand-sketching CTDL implemented and-or-in-
verter (AOI) compound logic gates
where parallel input diodes imple-
mented the AND function followed by
an open-collector wired-OR inverting
transistor output (see Figure 6). The
n-p-n gates had active high inputs
and active low outputs; the reverse
was true of the p-n-p gates. The
n-p-n gate outputs could only be
connected to p-n-p gate inputs.
Other standard logic elements in-
cluded emitter followers for driving
large loads, latches, oscillators, and
single-shot triggers.
CTDL was robust and forgiving,
FIGURE 5: Single- and double-width SMS cards from the IBM 1401 Processing Unit. (Photo and it handled large fan-ins and fan-
courtesy of Robert Garner.) outs with wires of up to about 12 ft.
+6M +6
B T1
P 34
N
15K
P –0.2
430 Ω
H –6
C
56 Uh +6
220 Ω –12
B 0
+6 –6
220 Ω H
0 56 Uh
C N T1
–0 –5.8
–6 P 83
–12 N
15K 430 Ω
–6 –12M –12
(a) (b)
FIGURE 6: (a) A CTDL n-p-n active-high-input, active-low-output and-nor logic gate. (b) An n-p-n active-low-input, active-high-output and-or
logic gate. The “H” output could be wired-OR’d to other gates without a load resistor. (Images courtesy of IBM.)
CTDL signal swings were 12 volts wanted engineering to move more credit interest-rate charges. Chris-
peak-to-peak: n-p-n gates received quickly from tubes to transistors, tian de Waldner, the chairman of
U levels centered about 26 V and however. So in October 1957, IBM’s IBM France, initiated an in-depth
generated T levels centered about director of engineering issued a planning and study effort on the
0 V; the situation was reversed for decree that from that time on no part of IBM World Trade and domes-
p-n-p gates. The 6-V offset allowed products would employ vacuum tic organizations that resulted in
for 4.6 V of noise and load margin at tubes [1]. The dictate became known specifications for a combined tran-
each logic level. Of course, it was within IBM as “Solid-state in ’58.” sistorized calculator and accounting
not always possible that an output In meeting this challenge, by machine for the global market.
signal would have the necessary 1958 IBM had invented all the Three IBM development laboratories
level and logic polarity for a par-
ticular input, so 15–20% of the gates
existed only to convert between U Since the early 1950s, IBM’s CEO Thomas
and T levels or between true and
false polarities. Watson, Jr. had led the company in a transition
In 1958, IBM was already design- from electromechanical to electronic products.
ing several large-scale computers
using SMS technology: the scientific
IBM 7090 (delivered in November design and manufacturing technol- in Paris (France), Böblingen (Ger-
1959), the commercial IBM 7070 ogies for delivering a high-volume many), and Poughkeepsie (New York)
(delivered in March 1960), and the transistorized computer: magnetic held a competition in 1954 for the
massive IBM 7030 Stretch supercom- core plane manufacturing, a fully best design. The Paris lab’s variable-
puter (delivered in May 1961) [2]. automated transistor assembly word-length accounting machine
Stretch contained more than 18,000 line, and automated PCB assembly. (VWLAM) design was selected for
single-width SMS cards and 4,000 However, a plan for a mass-market the processing unit in the summer
double-width cards [9]. However, computer in IBM’s product lineup of 1955. For peripherals, the IBM
due to their high rental costs—an was proving to be elusive [10]. Böblingen lab designed a high-speed
average of US$40,000 per month (or stick-based printer and punched
US$300,000 today) —only about 800 Origins of the IBM 1401 card reader.
large-scale 7000-series computers In 1954, the French firm Machines The Paris processor design team,
were delivered to customers [2]. Bull introduced a combined calcula- led by Maurice Papo and Eugene
Since the early 1950s, IBM’s CEO tor and accounting machine called Estrems, at first wanted to design a
Thomas Watson, Jr. had led the com- the Bull Gamma III that outsold IBM variable-data-length stored-program
pany in a transition from electrome- products, particularly at French computer like the IBM 705. However,
chanical to electronic products. He banks that frequently recalculated the initial estimate by a U.S.-based

costing department showed that the SPACE, for stored-program account- general, Branscomb resisted pres-
design could not achieve its price tar- ing and calculating equipment— sure to add additional features, but
gets, and the Paris team inauspi- striking a responsive chord as in early 1959 he agreed to incorpo-
ciously reverted to plugboard-based Sputnik had just launched in rate an interface for controlling up
control. Although the control panel October 1957. to six magnetic tape units. Thus,
layout was clever, it soon became an Unlike existent stored-program by including magnetic tape sup-
Achilles’ heel. computers with accumulators that port and keeping cost low, SPACE
Renamed the World-Wide Account- had to be explicitly loaded from and became the preferred design for
ing Machine (WWAM), the prototype stored into memory by software, offloading tape-to-print and card-
was operational in the Paris lab by Underwood instead defined a memory- to-tape operations from high-end
1957. Even though the WWAM used a to-memory architecture without using mainframes [1].
By mid-1959, with the 40-person
engineering team working night and
In response to a 2004 ad in an IBM retirement day under engineering manager Jim
newsletter, about 20 retired IBM employees Ingram, trial educational classes
within IBM being spearheaded by mar-
stepped up to the challenge of restoring a keting planner Sheldon Jacobs, and a
45-year-old 1401 acquired from Germany in prototype that achieved the entry-
level price target up and running, the
mostly unknown condition. renamed IBM 1401 was poised to trans-
form the business world with its low
plugboard for control, its projected an accumulator, thereby reducing price, outstanding print quality, pow-
price still came in significantly the number of instructions needed erful magnetic tape subsystem, and
higher than the US$2,500 monthly for accounting and business pro- the promise of a stored-program com-
rental target for an entry-level grams. He anticipated that the 1401’s puter for the mass marketplace. But
system (US$18,000 in today’s cur- newly minted programmers would first Jacobs had to persuade IBM’s
rency). In addition, the high-speed hand-code programs and manually skeptical forecasting department to
German stick printer was deemed assign instructions to memory loca- sign off on the product launch. After
too costly to maintain [1]. tions, so he selected easy-to-recall debating exactly which features small
In 1957, Francis O. Underwood of instruction encodings and formats, business users really needed, IBM’s
IBM Endicott’s Advanced Systems such as A for add and E for edit. He doubtful forecasters reluctantly
Development Department (ASDD) also manually programmed several approved the 1401 as a revenue-neu-
was asked to join a newly formed important algorithms, including the tral program just a few months before
Accounting Machines Department French banking algorithm, to validate its announcement.
under Ralph Mork and establish its that they fit in fewer than 1,400 On 5 October 1959, the 1401 was
technical direction. He surveyed memory locations for the entry-level presented via closed-circuit televi-
IBM’s attempts to design an inex- 1401 system. sion to 50,000 participants in 102
pensive transistorized accounting To achieve the ambitious entry- cities. In the following September,
machine and decided that the WWAM level rental price target of US$2,500 the first 1401 was delivered to Time-
had come closest with its familiar per month, Charles Branscomb, the Life in Chicago and by year end 100
and flexible serial-by-character pro- Accounting Machine Department’s systems had been manufactured in
cessing, decimal arithmetic, vari- new engineering program manager, Endicott and delivered to customers
able-length numbers and strings, worked tenaciously with IBM’s com- (see Figure 7).
print edit functionality, and up to puter technology groups to meet The 1401 was very successful. By
1,900 magnetic core memory loca- the company’s requirements for 1965, half of the approximately
tions for data [1]. However, examin- low cost and high reliability. He 26,000 computers in the world were
ing the WWAM circuits more closely, selected the SMS Cube system of 1400-family machines—models 1401,
he found that 45% of its electronics packaging and the CTDL circuit 1410, 1440, 1460, and 7010 [2]. The
cost was only for communicating family. He also adopted a techno- total number of 1400-family comput-
between its plugboard and internal logically advanced chain printer ers peaked at about 15,000 systems
logic. An avid proponent of stored- already under development as a in 1967 [2]. Although IBM’s planning
program computing, Underwood standalone product for offloading team had not considered the full
jettisoned the WWAM’s plugboard mainframe printing (it became the impact of the tape option on custom-
and formulated a new instruction IBM 1403). For punched card I/O, ers before the announcement, cus-
set for controlling its data paths. He he elected to modify a mainstream tomers soon took advantage of the
called his new processor design reader punch unit, the IBM 088. In tape-oriented 1401 systems to replace
the long-term storage of data on end-
less numbers of punched cards. For
example, Time-Life transferred 40
million punched card subscriber
records to just several hundred mag-
netic tapes.
Characteristics and
Features of the IBM 1401
Most 1401s were leased. Rental for
an entry-level system was US$2,500
per month, although very few such
systems were installed. The aver-
age system typically rented for
about US$6,500 per month or cost
US$500,000 to purchase (equivalent
to US$45,000 and US$3.4 million
today)—about a sixth of the purchase
price of a large-scale mainframe.
Even though the 1401 was consid-
ered a small-scale computer, a full-size
system had up to half a million discrete FIGURE 7: The IBM 1401 manufacturing and test production line in Endicott, New York, in
components, weighed up to four tons, the 1960s. (Image courtesy of IBM Archives.)
and consumed up to 13,000 W. The
1401 processing unit used 10,600 ger- holding 8 bits: a 6-bit character or 12,000 additional characters of
manium alloy-junction transistors and digit, a variable-length data and vari- core memory in a single Cube cabi-
13,200 germanium point-contact di- able-length instruction flag called the net. Core memory was priced at
odes on about 2,300 SMS cards inter- “word mark,” and a memory “check about 60 cents per bit (or US$24
connected with 5.5 mi of wire. bit” with odd parity. per byte in today’s currency) —300
The reliability of the 1401 was The 1401’s processor cycle was million times more expensive than
renowned, and many systems oper- 11.5 ms, for a clock rate of 87,000 today’s DRAM.
ated around the clock. IBM had a large cycles/s. A single character could be Inexpensive mag netic core
organization of customer engineers transferred per clock cycle, so the memory was critical to the 1401’s
(CEs) who worked closely with users processing speed was well balanced success. Since it was impractical to
to maintain their systems. The typical to peripheral I/O rates. Given its dig- drive each of the core memory’s
1401 system was out of service only a it-serial arithmetic, 50 cycles, or ap- half-select X and Y lines with a power
few times a year. proximately 0.5 ms, were required to transistor or several transistors as
The 1401 processor sequentially add two positive 20-digit numbers. in the transistorized 604, a mag-
processed 6-bit characters or decimal Today’s 4-GHz PC can add two 64-bit netic core switching matrix drove
digits. A single character or digit was numbers about a million times faster. the memory’s X and Y select lines,
stored per memory position, and Assuming today’s currency, a 1401 implementing both address decod-
strings of characters or digits could would cost about a thousand times ing and amplification to supply the
be arbitrarily long (up to the size of more than a modern PC. This would required one-amp current pulse to
memory). Instructions could operate make a PC’s price-performance a bil- the selected memory core. The pro-
on two operand strings in memory lion times better than a 1401 when cessor destructively read out core
and write the result back into one of doing arithmetic. memory in the first half of an 11.5-µs
them. This memory-to-memory in- The 1401 was originally designed cycle; then, in the second half, it
struction format, without using an with a 4,000-character maximum restored the previous value or wrote
accumulator, reduced program size. It memory capacity but was soon ex- a new value.
also reduced processor cost with only panded to 16,000 characters. The Pivotal to the 1401’s success were
two operand registers and three first 4,000 characters of memory (in- its robust peripherals. Foremost
memory address registers required in cluding a core plane for the punched among these was the IBM 1403 chain
hardware logic. Memory ranged in card reader, card punch, and printer) printer. Introduced together with
capacity from an entry-level system were located in the 1401 processor’s the 1401, its high speed and enduring
with 1,400 positions to a maximum of “main frame” cabinet. The 1406 Op- print quality made it an industry
16,000 positions, with each position tional Storage Unit supported up to workhorse. The 1403 could print up to

132 columns at 600 lines/min, and 1418 was one of the earliest optical to filter out the noisy grid power
its hydraulic carriage could skip character recognition (OCR) devices, prevalent around the world. While
over blank lines at 33 in/s under the scanning 420 documents/min with large-scale computers generally re-
control of a punched carriage con- an OCR algorithm tuned for account- quired cus tom raised-floor and
trol tape. Incorporating a new ap- ing machines, the 1403, and Selec- overhead air-exhaust facilities, the
proach from IBM’s earlier 150-lines/ tric fonts. The IBM 1428 could read 1401 could be situated in a normal
min wheel or stick printers, the 1403 full alphanumeric data in what air-conditioned office or small room,
simultaneously fired multiple ham- became the ANSI OCR A font. The with the cables lying on the floor or
mers when the proper characters on IBM 1412 Magnetic Ink Character strung overhead.
The 1401 contributed to the
growth of programming as a profes-
sion and software as an industry.
Particularly during the 1950s, computer design Thousands of accounting-machine
was closely interwoven with rapidly evolving users were retrained as program-
mers, and several books covered
circuit technologies and techniques. 1401 programming. IBM offered Au-
tocoder and Symbolic Programming
System (SPS) assemblers for ma-
its horizontally revolving chain were Reader (MICR) could read and sort chine-level programming, FORTRAN,
in position, slamming the paper, bank checks with digits imprinted COBOL, and report program genera-
inked ribbon, and character slug to- with magnetic ink—the ABA E13B tor (RPG) compilers, and sort and
gether. Since the human eye does not font seen on the bottom of bank I/O utilities. There was no operating
notice minor sideways spacing varia- checks to this day. system for the 1401 (IBM later re-
tions between adjacent horizontal To help achieve the low entry- leased one for the 1410). IBM, togeth-
characters but is sensitive to vertical level cost, the 1401 processor cabi- er with one of the earliest software
misalignment, 1403 printouts were net included controllers for the 1403 user groups, SHARE, offered hun-
easy to read. The 1403’s chain assem- printer, 1402 card reader/punch, dreds of privately developed 1401 ap-
blies were interchangeable, allowing and optional tape drives. Peripher- plications for multiple industries in
the printing of different character als used the processor data paths to business, engineering, mathematics,
sets. In order to drive the 1403’s elec- access memory, so instruction pro- and science.
tromechanical hammers, a special cessing stopped during most periph-
60-V high-power germanium power eral operations. Later, an “overlap” 1401 Competition and Succession
transistor was adopted. feature enabled punched cards to be In late 1963, Honeywell challenged
Various models of the IBM 729 read while the processor executed IBM’s market dominance by announc-
magnetic-tape vacuum-column drive instructions. IBM provided docu- ing the faster and more capable H200
unit, developed for the 7000-series mentation to enable customers to processor, which had a design simi-
mainframes, were able to transfer construct custom interfaces for lar to that of the 1401 (albeit with
data at 15,000 to 62,500 char- their peripherals. less robust peripherals). The H200
acters/s, access tape records at 75 The 1401 employed several inter- was offered with so-called “Libera-
or 112.5 in/s, and rewind a 2400- esting analog approaches to lower tor” software that could run 1401
foot, 13-million-character tape in costs. The magnetic tape drives programs unmodified and more
less than 1 min. Lower-speed IBM transmitted low-voltage tape read quickly than a 1401. The 1401 was
7330 tape drives were also offered. head signals through up to 100 ft of the world’s most popular computer
The IBM 1402 Reader Punch Unit daisy-chained single-ended coaxial at the time, and this threat caught
could read cards at 800/min and cables to the processor, where the IBM’s management by surprise [11].
punch at 250/min. read amplifiers, dual-level peak de- By that time, IBM was far along in
In 1961, the IBM 1405 RAMAC disk tection circuits, and clock recovery orchestrating the succession and
drive, with a 20 million character circuits were located. To reduce unification of its many incompatible
capacity and an 1800-r/min rota- costs further, the pulses generated computer lines, an effort begun in
tional rate, was offered for the 1401. by the 1402’s card reader brushes 1961. That significant planning
This was followed in 1962 by the wrote character data over a long effort resulted in the April 1964
IBM 1311 Storage Drive, with remov- cable directly into the magnetic announcement of the System/360
able 2-million-character disk packs. cores in the 1401 frame. To increase (S/360), which consolidated soft-
Also in 1961, IBM offered optical reliability, the system employed ware, peripherals, and support in
and magnetic bank check readers as ferroresonant transistorized power one compatible and scalable com-
peripherals to the 1401. The IBM supplies tuned either to 50 or 60 Hz puter family [11].
One key technology used in the transatlantic transmission of com- printout from a tape-oriented IBM
S/360 was a flexible control store puter data via Telstar, the first 1401 used as an I/O spooler for a
that implemented the S/360 instruc- commercial communications satellite. large-scale IBM 7090 system.
tion set via microcode instructions, IBM engineers using an IBM 1009
enabling the emulation of other Data Transmission Unit on a 1401 in 1401 Restoration Project at the
computer instruction sets. When the Endicott and a similar setup in the Le Computer History Museum
Honeywell H200 was announced, Gaude lab near Nice, where the IBM Two complete IBM 1401 systems
the S/360 Model 30 architects Paris lab had moved, were able to have been brought back to life by a
quickly made enhancements to effi- transmit data at 2,000 b/s over a team of about 20 volunteers at the
ciently emulate the 1401 instruction voice-grade phone line [13]. Computer History Museum (CHM) in
set, thus enabling the Model 30 to
hold the fort against the H200 [11].
Although 1400-family develop- Just for fun, the 1401 could play musical
ment wound down with the S/360
announcement in 1964, 1400s con-
tunes via software that timed the firing of
tinued to outnumber S/360s until 1403 print hammers.
about mid-1967 [2]. The 1401 was
offered by IBM until 1971, and PC-
based simulators are still available Just for fun, the 1401 could play Mountain View, California—mostly
today. There is a reasonable chance musical tunes via software that IBM engineers who had previously
that an IBM mainframe somewhere is timed the firing of 1403 print ham- worked on 1401s in design, test, and
still running a 1401 application from mers. Other programs, by executing customer engineering (see Figures 8
decades ago. particular code sequences, modu- and 9). The successful restoration,
lated a 1401’s radio wave emissions, after nearly 500 work sessions and
1401 Miscellanea which a nearby AM radio could 20,000 hours [15], highlights the
In Endicott, New York, in 1960, Edward easily receive via electromagnetic strength of the 1401’s design and
Rent performed an initial analysis of interference (EMI). the reliability of its mechanical and
optimal logic card sizes for the IBM The 1401 resurfaced in popular solid-state components nearly 50
1410, the first follow-on to the 1401. culture in 2001 when a young Icelandic years after its manufacture.
He measured the ratio of the number composer, Jóhann Jóhannsson, scored In response to a 2004 ad in the
of logic blocks in SMS cards in four the symphonic composition IBM 1401: San Jose, California, IBM retirement
1401 chassis gates to the number of A User’s Manual. He had been inspired newsletter, about 20 retired IBM em-
card edge signal connectors. The by a 1971 recording of 1401 radio ployees stepped up to the challenge
resulting straight-line relationship on music made by his father, a customer of restoring a 45-year-old 1401 ac-
a log-log graph was the start of what engineer for Iceland’s first computer, quired from Germany in mostly un-
became known as Rent’s rule: Given a 1401, during the machine’s decom- known condition. The CHM acquired
the number of logic gates or blocks in missioning ceremony [14]. Jóhanns- a second, 47-year-old 1401 in 2008
a particular circuit, one can calculate son’s composition may be the only from Connecticut that was in better
an estimated number of connections human-composed music written for condition. Both systems had origi-
or signal pins needed to communi- and dedicated to a computer. nally been operated continuously
cate with them [12]. In the 1964 movie Dr. Strangelove, for six and ten years, respectively,
In 1964, AT&T, IBM, and the French actor Peter Sellers made his opening by insurance companies; private
postal service demonstrated the first appearance examining an IBM 1403 entrepreneurs had then purchased
FIGURE 8: View of the 1401 restoration room at the CHM. The Connecticut 1401 is to the left of center, and the German 1401 is on the right.
From left to right: Ron Williams, Don Luke, Joe Preston, Ed Thelen, George Ahearn, Frank King, Glenn Lea, and Bob Erickson (at an IBM 513
Reproducing Punch). An IBM 026 Printing Card Keypunch and a 077 Collator are to the right. (Photo courtesy of Robert Garner.)

FIGURE 9: Members of the 1401 restoration team in period dress. From left to right: Bill Flora, Joe Preston, Sam Sjogren, Jeff Stutzman,
Ed Thelen, Bob Feretich, Ron Williams, Frank King, Matthias Goerner, Bob Erickson, Robert Garner, George Ahearn, Don Luke, Allan Palmer,
Ron Crane, Stan Paddock, and Bill Newman. (Photo courtesy of Robert Garner.)
them to provide billing services IBM 026 card punch. Another was a various peripheral units. The SMS
for small businesses. The German 729 tape drive emulator built around card traces with their uncommonly
system operated until 1977 and an embedded PC and analog elec- thick gold overcoat, analyzed by
was then stored in an outdoor auto tronics used to restore the 1401’s IBM Poughkeepsie’s Materials and
garage for 27 years. The U.S. system tape adapter unit (TAU) logic, upload Process Engineering group in 2007,
had operated until 1995 in the binaries into the 1401, and emulate have proven extraordinarily reli-
air-conditioned basement of a 729 tape drives. able. Nearly all SMS cards were left
small residence. Both systems were Remarkably and thankfully, there undisturbed even though the 1401s
fully configured with 16,000 have been no problems with the were transported to the CHM via
memory locations and four IBM 729 wire-wrap or backplane wires, the trucks and ocean cargo ships and
tape drives. IBM’s Almaden Re- long signal wires interconnecting were stored in less-than-ideal envi-
search Center and 14 Silicon Valley chassis gates, or the long signal and ronments. Intermittent contact fail-
donors generously contributed funds power cable bundles between the ures have been essentially zero
for the acquisition of these two nearly 50 years after the date
1401 systems. of manufacture.
After acquiring a 60-Hz-to- The 1401 restoration volunteers
50-Hz power converter, restoration analyzed defective components after
of the German 1401 proceeded for troubleshooting faulty system be-
three years of earnest oscilloscope- havior. A surprising phenomenon
and schematic-based debugging. was observed in certain defective
The restoration team diagnosed 130 transistors: a “loopy” or hysteretic
defective SMS cards. The Connecti- collector current versus voltage
cut 1401, mothballed for 18 fewer curve (see Figure 10). This phenom-
years than the German system, enon was first reported in the 1950s
yielded 25 failed SMS cards. Most and was thought to be caused by
of the card failures were due to cor- moist air affecting the germanium
roded ferrous transistor and diode surface [16]. The loopy I-V curves
leads; weak or leaky transistors; appear in our defective transistor
open, shorted, or broken diodes; measurements with collector-emitter
and latches acting like one-shots. voltages alternating from 2 Hz up to
The number of faulty SMS cards FIGURE 10: A current versus voltage trace 1 MHz, and the effect can persist for
corresponded to an annual failure of a defective germanium alloy-junction up to 0.5 s after scanning stops. The
n-p-n transistor, illustrating a hysteresis
rate of only about 0.125% per year, phenomenon appears to be charac-
curve likely caused by a surface inversion.
not unreasonable considering high- The I-V curve shows collector-emitter volt- teristic of the “memristor,” first theo-
humidity storage. The team located age on the abscissa versus current on the retically defined by Leon Chua in
“new old stock” transistors from ordinate at four different base currents. 1971 [17]. In 2008, HP Laboratories
Internet sellers. The team also Such “loopy” I-V curves, measured with reported observing memristor hys-
the collector voltage alternating from 2 Hz
designed several new hardware teresis caused by ionic transport in
up to 1 MHz, appear to exhibit “memris-
devices. One was a USB interface that tor” behavior, first theoretically defined by thin-film TiOx devices [18]. Perhaps
allowed small binary files stored on Leon Chua in 1971 [17]. (Photo courtesy of these defective “loopy” germanium
a laptop to be punched directly on an Robert Garner.) transistors were also unknowingly
exhibiting memristor behavior back Jacobs, Jim Ingram, Jud McCarthy, [15] 1401 Restoration Project Web site. Avail-
able: http://www.ed-thelen.org/1401Proj
in the 1950s? John Pokoski, George Ahearn, WWAM ect/1401RestorationPage.html
designer Maurice Papo, and IBM cir- [16] H. C. Montgomery and W. L. Brown, “Field-
Summary cuits pioneer Joseph Logue; comput- induced conductivity changes in germa-
nium,” Phy. Rev., vol. 103, no. 4, Aug. 15,
Businesses and institutions thro - er historians Fredrick Brooks, Emerson 1956, pp. 866–870.
[17] L. O. Chua, “Memristor—The missing cir-
ughout the world used the IBM 1401 Pugh, and Jack Palmer; 1401 restora- cuit element,” IEEE Trans. Circuit Theory,
in the 1960s to process rapidly tion volunteers and retired IBM test vol. 18, no. 5, pp. 507–519, Sept. 1971.
[18] D. B. Strukov, G. S. Snider, D. R. Steward,
growing amounts of information. and customer engineers Ron Wil- and R. S. Williams, “The missing memris-
By the middle of the decade, one liams, Bob Erickson, Frank King, Allen tor found,” Nature, vol. 453, no. 6932, pp.
80–83, 2008.
out of every two computers in the Palmer, Bill Flora, and Don Luke; 1401
world was an IBM 1400-family restoration volunteers Ed Thelen,
machine, delivering on the promise Grant Saviers, Bob Feretich, and Stan About the Authors
of a reliable, cost-effective, high- Paddock; analog expert volunteers Robert Garner received an M.S.E.E.
volume transistorized computer. Ronald Crane and Bill Newman; CHM degree from Stanford University in
The 1401 heralded a widespread senior curator Dag Spicer; and review- 1977. He started his Silicon Valley
transition from plugboard-based ers Ronald Mak, Dick Weaver, Mitchell career at Xerox System Development
unit record machines to ubiquitous Marcus, and David Laws. All errors in Palo Alto in 1977. In 1981, he trans-
stored-program computing, now and omissions are due entirely to the ferred to the Xerox Palo Alto Research
taken for granted with its easy authors’ oversights. Center. In 1984, he joined the start-up
sharing and distribution of soft- company Sun Microsystems as the
ware applications. The 1401 pro- References lead architect of its SPARC (RISC)
vided IBM with the first realistic [1] C. J. Bashe, L. R. Johnson, J. H. Palmer, and architecture and codesigned its first
E. W. Pugh, IBM’s Early Computers. Cam-
glimpse of the size and importance bridge, MA: MIT Press, 1986.
SPARC product, the Sun-4/200 Work-
of the computer market and changed [2] E. C. Berkeley, Ed., “Monthly computer cen- station. In 1998, he joined the
sus,” Comput. Automat., Dec. 1959–Dec.
the world. 1969.
start-up company Brocade Communi-
Computer History Museum vol- [3] M. H. Weik. (1961, Mar.). A third survey of cations as director of hardware engi-
domestic electronics digital computing
unteers, over the course of the past systems. Ballistic Research Laboratories,
neering, where he was responsible
five years, have restored two tape- Aberdeen, MD. Report No. 1115 [Online]. for FibreChannel ASIC and switching
Available: http://ed-thelen.org/comp-
oriented IBM 1401s. The operational hist/BRL61.html
products. In 2001, he joined the IBM
systems continue to impress mu- [4] E. W. Pugh, Memories That Shaped an Indus- Almaden Research Center in San Jose,
try. Cambridge, MA: MIT Press, 1984.
seum visitors and attract new volun- [5] J. C. Logue, “Transistor switching cir-
where he codesigned the experimen-
teers to keep them running, write cuits,” in Handbook of Semiconductor tal 3-D IceCube server. He currently
Electronics, 1st ed., L. P. Hunter, Ed.
new demonstration programs, and New York: McGraw-Hill, 1956, ch. 15, pp.
manages an advanced-redundancy
learn more about the 1401’s elec- 12–13. Petascale storage subsystem soft-
[6] J. C. Logue, “From vacuum tubes to very
tronic and mechanical technologies large scale integration: A personal mem-
ware project. In 2004, he also volun-
that are not so miniaturized that oir,” IEEE Annals Hist. Comput., vol. 20, teered at the Computer History
no. 3, pp. 55–68, July–Sept. 1998.
they can’t be easily repaired. [7] G. D. Bruce and J. C. Logue, “An ex-
Museum to lead the restoration of an
The Computer History Museum perimental transistor calculator,” AIEE IBM 1401 computer. He can be reached
Elect. Eng., vol. 74, pp. 1044–1048, Dec.
is dedicated to the preservation and 1955.
at [email protected].
celebration of the computing revo- [8] T. J. Leach, “Automated assembly of alloy-
junction transistors,” Electronics, vol. 25,
lution and its worldwide impact on pp. 57–61, Mar. 1960.
Frederick (Rick) Dill first worked for
the human experience. If you have [9] W. Buchholz, Ed., Planning a Computer IBM in 1954 as a summer student and
System, Project STRETCH. New York, NY:
artifacts or stories of the informa- McGraw-Hill, 1962.
returned after completing his Ph.D
tion age or are interested in volun- [10] C. J. Bashe, W. Buchholz, G. V. Hawkins, degree in electrical engineering from
J. J. Ingram, and N. Rochester, “The archi-
teering, you are invited to visit the tecture of IBM’s early computers,” IBM J.
Carnegie Tech in early 1958, where he
museum in person or its Web site, Res. Develop., vol. 25, no. 5, pp. 363–375, used the IBM 650 vacuum tube com-
1981.
www.computerhistory.org. [11] E. W. Pugh, L. R. Johnson, and J. H. Palmer,
puter. He is a Fellow of the IEEE, former
IBM’s 360 and Early 370 Systems. Cam- president of the Electron Devices Soci-
Acknowledgments bridge, MA: MIT Press, 1991.
[12] M. Y. Lanzerotti, G. Fiorenza, and R. A.
ety, and a member of NAE. Most
The first author, Robert Garner, is in- Rand, “Microminiature packaging and in- importantly, he remembers building
tegrated circuitry: The work of E. F. Rent,”
debted to the first-person insights IBM J. Res. Develop., vol. 49, no. 4/5, pp.
gallium arsenide transistors with his
and feedback on various parts of 777–803, 2005. own hands trained by the technicians
[13] (1964, Oct. 25). IBM Press Release, Endicott,
this paper obtained in e-mails and NY [Online]. Available: http://www.ed-thel-
who built the prototypes for the 1401
conversations with original 1401 en.org/1401Project/1401Origins.html#IBM- transistors. He was fortunate to live
Endicott-Nice-Telestar-1964
hardware team members Francis Un- [14] J. Jóhannsson. (2005) Available: www.
when the transistor was new and his-
derwood, Charles Branscomb, Sheldon ausersmanual.com tory was happening.

Reprinted with permission from IBM Journal of Research and
40 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE Development, vol. 49, pp. 777–803, Sept. 2005.
Reprinted with permission from IBM Journal of Research and
42 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE Development, vol. 49, pp. 777–803, Sept. 2005.
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PEOPLE
Takayasu Sakurai Selected for 2010 IEEE Donald O. Pederson

Award in Solid-State Circuits
T
Takayasu Sakurai was selected to re-
ceive the 2010 IEEE Donald O. Peder-
son Award in Solid-State Circuits “for
pioneering contributions to the design
and modeling of high-speed and low-
written account. Echoing Prof. Kuroda,
Prof. Eby Friedman of the University
of Rochester, who has been a friend of
Prof. Sakurai for almost 20 years and
has known his work for many more,
power CMOS logic circuits.” Recipient said in an e-mail statement that Prof.
selection is administered by the Tech- Sakurai’s “ability to express complex
nical Field Awards Council of the IEEE ideas and relationships in simple and
Awards Board. elegant ways that make them easy
Prof. Sakurai “produced fundamen- to apply to practical circuit design is
tally important results in a number probably his greatest strength.” Fried-
of important areas, any one of which man noted that one of his favorite
would make him deserving of this Sakurai innovations is his treatment of
award,” said one of his endorsers. “He is interconnects, which “exploits the con-
easily one of the top five IC researchers issues that are critical for all wires today. cept, well known in politics and also
in the world—probably close to the top The simple formulas that he worked on true in circuit design, that everything
of that list—and one of the most out- over 20 years ago are still useful ap- is local by treating each interconnect
standing researchers in the entire field proximations today, and served as the differently according to the relative
of integrated circuits, clearly the best- basis for many improvements over the magnitude of the interconnect imped-
known IC design researcher in Asia.” past two decades,” he said. ances in terms of the source and load
In the estimation of Keio University impedances. Prof. Sakurai applied this
Creator of the Seminal Prof. Tadahiro Kuroda, a lifelong col- insight to all kinds of circuit phenom-
Alpha-Power “Sakurai” Model league who worked with Dr. Sakurai at ena, and I have used it throughout my
Prof. Sakurai’s leadership in the VLSI the time that he wrote his frequently own research and teaching,” he said.
area is attested by Stanford University’s cited paper on the alpha-power model Even more significant from the mod-
Mark Horowitz, who met him more with Prof. Richard Newton, Prof. Saku- eling perspective, said Prof. Horowitz,
than 15 years ago. In an e-mail testi- rai’s work on modeling for submicron “the alpha-power law model that Prof.
monial he said Prof. Sakurai developed transistors, interconnect delay, and Sakurai developed while a visiting
many models designers use today, capacitance had a seminal impact not scholar at University of California,
particularly the simplified models that only on circuit designers but also de- Berkeley, might be the most common
can be used to acquire intuition about vice engineers and EDA tool builders. simple transistor model that is used
the performance of circuits before they “The simple and yet accurate today, and has been used in numerous
are simulated. In the early 1980s, said closed-form equations that Prof. Saku- tools and approximations from esti-
Horowitz, “Sakurai was working on rai developed can provide research- mating how transistor performance
simple modeling equations for estimat- ers and engineers with a clear and will scale with technology, to optimiz-
ing the effects of both wire capacitance, intuitive understanding of devices ing the size, Vdd and Vth of all the de-
including fringing effects that were be- and means as useful bridges between vices to minimize power while achiev-
ginning to be important, and wire RC devices and circuits. His papers on the ing a given level of performance.”
delays. While back in the 1980s these alpha-power model and the on wiring
were new issues that were just starting delay are the most frequently cited ar- Visionary Creator
to show up in SRAM designs, they are ticles of the IEEE Journal of Solid-State of CMOS Low-Power Solutions
Circuits. (155 times and 104 times, In Prof. Horowitz’s view, Sakurai’s
Digital Object Identifier 10.1109/MSSC.2009.935273 respectively),” Prof. Kuroda said in a most important contributions have

been in the area of low-power design. and motivator. We invented a variable power problems facing CMOS logic
In the early 1990s while at Toshiba, threshold-voltage CMOS (VTCMOS) circuit designers. His simplified mod-
“he created the leading low-power technology to control VTH through sub- els provide designers with intuition
group and managed to invent and first strate bias. We applied it to a DCT core of chip performance that is needed
demonstrate many of the ideas that processor and a gate-array for the first to use circuit simulation tools effec-
were being discussed in the low power time in 1995. The DCT core processor tively. The “Sakurai model,” devel-
area,” he said. While others were work- consumed the record-breaking low oped in 1991, was the world’s first
ing on many low-power ideas at the power dissipation. Leakage current of realistic interconnect delay and ca-
time, he said, “Toshiba, under Sakurai the gate-array in standby mode was pacitance model formula and plays a
was first to demonstrate them.” In ad- lowered by more than three orders of key role in developing today’s high-
dition to inventing and demonstrating magnitude. He also proposed various speed circuits. His “alpha power law
innovative ways to save power, Saku- circuit techniques for power gating. model” has been used in many tools
rai was also analyzing low-power de- His pioneering works unveiled a new for estimating how transistor per-
signs, and working out what optimiz- research area,” Prof. Kuroda said. formance will scale with technology
ing for power really means. He figured to optimize size and at the same
out many of the “rules” that we all talk “A Good Guy—Kind, Helpful time minimize power. An IEEE Fellow,
about today. He was also the first per- and Straightforward” Dr. Sakurai is currently a professor
son to work out what variability means In a recent e-mail, Dr. Kuroda noted, with the University of Tokyo’s Insti-
for low-power design, a topic that is “Prof. Sakurai is a gentleman who al- tute of Industrial Science.
more relevant than ever today. In an- ways brings a pleasant breeze.” People Dr. Sakurai received the Ph.D. de-
other example, he was the first person meeting him for the first time and gree in electrical engineering from
to work out and publish what the ratio finding out who he was often exclaim, the University of Tokyo in 1981,
of leakage current to dynamic cur- ‘Oh you are the Sakurai who developed after which he joined Toshiba Cor-
rent should be in a power optimized the famous Sakurai’s model. It’s a great poration as a designer of CMOS
design (about 40%) and showed that honor to meet you!’ ” DRAM, SRAM, RISC processors, DSPs,
this was not very sensitive to design In a comparable reminiscence cor- and SoC solutions. He also worked
parameters. This analysis, and others roborated by Prof. Friedman, Prof. extensively on interconnect delay
like it, clarified many of the technol- Horowitz said, “I have interacted with and capacitance modeling known as
ogy trends we had been seeing and Takayasu Sakurai on numerous oc- Sakurai model and alpha power-law
made it possible to estimate future casions on a whole range of topics. I MOS model.
problem areas more clearly. It is his have always found him kind, helpful, From 1988 through 1990, he was
formulas that I still use in my classes and very straightforward to deal with. a visiting researcher at the University
today,” Horowitz said. He is just a good guy. And I like it when of California, Berkeley, where he con-
Intel Senior Fellow Ian Young, good guys finish first.” ducted research in the field of VLSI
who has known Sakurai-san’s re- Dr. Sakurai’s achievements and CAD. An IEEE Fellow, Dr. Sakurai has
search since his first publications, has contributions to the field of solid-state been a professor with the University
found it always to be of significant circuits will be acknowledged and cel- of Tokyo’s Institute of Industrial Sci-
relevance and impact to the field of ebrated during the awards ceremony ence since 1996.
digital integrated circuits. Prof. Saku- of the ISSC in February 2010. In the Previous recipients of the Donald O.
rai’s later work on idle leakage power view of an endorser, Prof. Sakurai is Pederson Award include Teresa Meng,
reduction, specifically, the idea of the not only “worthy of having his name the Reid Weaver Dennis professor of
power supply switch to cut off the associated with Prof. Pederson, but electrical engineering at Stanford
power supply current due to transis- someday will actually have an award University (2009); Prof. Asad Abidi
tor leakage, was “extremely important named after him.” (2008); Hugo De Man, Professor Emer-
for the development of logic chips itus at the Katholieke Universiteit,
used in handheld multimedia consum- Takayasu Sakurai Leuven, Belgium (2007); and Prof.
er electronics requiring long battery considered one of Mark Horowitz of Stanford (2006). A
life,” he said in an e-mail statement the top integrated- full list of previous recipients may
that Prof. Kuroda independently af- circuit researchers in be found at //ewh.ieee.org/soc/sscs/
firmed: “Prof. Sakurai’s low-power the world, Takayasu index.php?option=com_content&tas
CMOS design techniques are widely Sakurai’s contribu- k=view&id=15&Itemid=18. A de-
used today in commercial products tions to CMOS technology have en- scription of the Pederson Award can be
and have become an indispensable abled the scaling down of chip sizes found at //www.ieee.org/portal/pages/
technology in the industry.” As a pio- needed for today’s handheld electron- sscs/06Jan/PedersonMDL.html.
neer in low-power CMOS design, Prof. ics. Dr. Sakurai was one of the earli- The IEEE Solid-State Circuits Award
Sakurai was “a great visionary mentor est researchers to create solutions to was established by the IEEE Board of

Directors in 1987 to honor an indi- ogy, and professional leadership. The nowned scholarly publication, IEEE
vidual, or team of up to three, for out- award was renamed the IEEE Donald O. Journal of Solid-State Circuits.
standing contributions to solid-state Pederson Award in Solid-State Circuits
circuits, as exemplified by benefit in 2005 to honor Donald O. Pederson, —Katherine Olstein
to society, enhancement to technol- a founder of the Society and of its re- SSCS Administrator
SSCS DLs Tour Northern Europe
I
In the fourth annual Distinguished
Lecturer (DL) Tour sponsored by the
Education Program of the IEEE Solid-
State Circuits Society, SSCS DLs Bern-
hard Boser, Betty Prince, Stefan Rusu,
and Vojin Oklobdzija visited SSCS-
Germany on Wednesday, 7 October
and SSCS-UK/Ireland on Friday, 9
October. The event in Hannover was
hosted by SSCS-Germany Chapter
Chair Holger Blume, who deemed the
day-long event “a full success,” with
good presentations that generated
intense discussions. The program
in Cork was hosted by SSCS Chapter
From left: SSCS-Germany Chapter Chair Holger Blume and SSCS DLs Bernhard Boser,
Chair Peter Kennedy, who was equally Betty Prince, Vojin Oklobdzija, and Stefan Rusu after their program in Hannover,
pleased. Echoing the sentiments of Germany on 8 October 2009.
the group, Dr. Oklobdjiza said “It was
the best organized distinguished features. An intensive and vivid dis- Hannover, gave a short keynote
lecture event I have been at—a very cussion followed, as the main focus of address about the history of and
productive time.” Leibniz Universität Hannover is nano- current developments at Leibniz Uni-
and quantum engineering, with many versität. He welcomed all of the inter-
Event in Hannover at researchers working on new materials national guests and expressed his
Leibniz Universität suitable, for example, for new kinds of gratitude to the IEEE for supporting
The IEEE SSCS DL program at Leibniz nonvolatile memories. such an exciting event in Hannover.
Universität Hannover in Germany After lunch, Prof. Dr. Erich Barke, In the first of three afternoon talks,
was devoted to current trends in VLSI president of Leibniz Universität Stephan Rusu, a senior principal
circuit design.
Attended by approximately 80 par-
ticipants, it started in the morning
with an opening note by Prof. Dr. Holg-
er Blume, the Germany SSCS Chapter
chair. The first presentation, “Trends
in Emerging and Nanotechnology
Memories” given by Dr. Betty Prince,
chief executive officer of Memory
Strategies International, highlighted
promising candidates for nonvolatile
memories and discussed their specific
From left: SSCS DLs Bernhard Boser, Stefan Rusu, Betty Prince, and Vojin Oklobdzija with SSCS
Digital Object Identifier 10.1109/MSSC.2009.935274 UKRI Chapter Chair Peter Kennedy at Tyndall National Institute on 9 October 2009.

Directors in 1987 to honor an indi- ogy, and professional leadership. The nowned scholarly publication, IEEE
vidual, or team of up to three, for out- award was renamed the IEEE Donald O. Journal of Solid-State Circuits.
standing contributions to solid-state Pederson Award in Solid-State Circuits
circuits, as exemplified by benefit in 2005 to honor Donald O. Pederson, —Katherine Olstein
to society, enhancement to technol- a founder of the Society and of its re- SSCS Administrator
SSCS DLs Tour Northern Europe
I
In the fourth annual Distinguished
Lecturer (DL) Tour sponsored by the
Education Program of the IEEE Solid-
State Circuits Society, SSCS DLs Bern-
hard Boser, Betty Prince, Stefan Rusu,
and Vojin Oklobdzija visited SSCS-
Germany on Wednesday, 7 October
and SSCS-UK/Ireland on Friday, 9
October. The event in Hannover was
hosted by SSCS-Germany Chapter
Chair Holger Blume, who deemed the
day-long event “a full success,” with
good presentations that generated
intense discussions. The program
in Cork was hosted by SSCS Chapter
From left: SSCS-Germany Chapter Chair Holger Blume and SSCS DLs Bernhard Boser,
Chair Peter Kennedy, who was equally Betty Prince, Vojin Oklobdzija, and Stefan Rusu after their program in Hannover,
pleased. Echoing the sentiments of Germany on 8 October 2009.
the group, Dr. Oklobdjiza said “It was
the best organized distinguished features. An intensive and vivid dis- Hannover, gave a short keynote
lecture event I have been at—a very cussion followed, as the main focus of address about the history of and
productive time.” Leibniz Universität Hannover is nano- current developments at Leibniz Uni-
and quantum engineering, with many versität. He welcomed all of the inter-
Event in Hannover at researchers working on new materials national guests and expressed his
Leibniz Universität suitable, for example, for new kinds of gratitude to the IEEE for supporting
The IEEE SSCS DL program at Leibniz nonvolatile memories. such an exciting event in Hannover.
Universität Hannover in Germany After lunch, Prof. Dr. Erich Barke, In the first of three afternoon talks,
was devoted to current trends in VLSI president of Leibniz Universität Stephan Rusu, a senior principal
circuit design.
Attended by approximately 80 par-
ticipants, it started in the morning
with an opening note by Prof. Dr. Holg-
er Blume, the Germany SSCS Chapter
chair. The first presentation, “Trends
in Emerging and Nanotechnology
Memories” given by Dr. Betty Prince,
chief executive officer of Memory
Strategies International, highlighted
promising candidates for nonvolatile
memories and discussed their specific
From left: SSCS DLs Bernhard Boser, Stefan Rusu, Betty Prince, and Vojin Oklobdzija with SSCS
Digital Object Identifier 10.1109/MSSC.2009.935274 UKRI Chapter Chair Peter Kennedy at Tyndall National Institute on 9 October 2009.

Electronic Point-of-Care Medical combines resonant gain boosting and sub- • stand-alone and embedded MRAM in-
Diagnostic Devices kT/C low noise amplification to realize more cluding multiple-bit-per-cell and perpendic-
than an order-of-magnitude power reduction ular field write MRAMs, spin torque transfer
Bernhard Boser compared to conventional solutions. The MRAMs and use of MTJ elements in various
device employs positive feedback to ensure CMOS logic circuits
Abstract
robust and stable operation, accommodating • floating body DRAMs, nanocrystal and
Quantification of biological and biomedical
over 200° phase shift from parasitic resonanc- trapping site flash memories
processes plays a crucial role in early and acute
es and transport delay. The measured spot • resistance RAMs including phase change
detection of disease, food safety, and monitoring
noise of the gyro is 14°/h/rt-Hz in a 50 Hz sig- and solid electrolyte memories, metal ox-
the environment. Present solutions are largely
nal band and 1 mW power dissipation. ide resistance RAMs, organic resistance
based on a complex laboratory infrastructure.
memories
Point-of-care (POC) devices based on lateral
Microprocessor Design • ferroelectric memories.
flow and colorimetric readout offer much faster
in the Nanoscale Era Development status and potential applications
turnaround time and are enjoying increasing
for the various memories are also mentioned.
popularity. Unfortunately, the range of presently Stefan Rusu
available POC solutions is limited and present
devices suffer from low sensitivity. Abstract Methodology for Energy-Efficient
We discuss a new class of devices based on This presentation reviews trends and chal- Design of Digital Circuits
electronic detection that overcomes the short- lenges in microprocessor design with practi-
cal examples from Intel’s leading-edge mi- Vojin Oklobdzija
comings of present POC technology by offering
the same ease of use, accuracy, and economy we croprocessors with multiple cores and large
Abstract
have come to expect from consumer electronic on-die caches. CMOS process technology will
Techniques for designing and optimizing digi-
devices. The devices duplicate the biochemistry continue its historical scaling trend, while re-
tal circuits have, for a long time, been driven
used in laboratory tests but replace enzymatic search activities are focusing on novel devices
by performance. Recently, power became the
tags with micron-scale magnetic tags attached to and manufacturing techniques. Process, volt-
limiting factor for performance. The logical ef-
receptor molecules to facilitate electronic detec- age, and temperature variations are driving a
fort technique helps to determine transistor siz-
tion with integrated circuits. major paradigm shift from a deterministic to a
es for speed as an objective function. However,
probabilistic design methodology. Active and
it neglects energy issues and fails to provide a
Electronics for High-Performance Sensors leakage power will remain the main limiters
guideline when designing with power budget.
for both high-end and mobile processors.
Bernhard Boser Other techniques have been presented that op-
Continued advances in packaging technology
portunistically improve power, or degrade per-
improve the cooling capabilities, while pro-
Abstract formance to reduce power. These approaches
viding better power delivery and higher pin
High-performance sensors place unusually do not directly address the true concern of
counts.
stringent demands on interface electronic cir- digital designers, which is obtaining the mini-
cuits. Vibratory gyroscopes, for example, infer mal energy for a given performance. How to
Trends in Emerging and
orientation from subatomic displacements make energy-delay tradeoffs for the optimal de-
Nanotechnology Memories
that are detected capacitively. Straightforward sign point is neither well understood nor well
solutions meeting these requirements suffer Betty Prince defined. Design space is bound by maximally
from high-power dissipation, hindering de- achievable speed and minimal achievable
ployment in power constrained applications Abstract power. This presentation addresses the factors
such as battery operated mobile communica- This presentation covers technology and devel- impacting optimization of digital circuits, and a
tion devices. We present an unconventional opment trends in “Emerging and Nano-Technol- framework for the optimal sizing, comparison,
approach to gyro interface electronics that ogy Memories.” It includes and analysis of energy-efficient designs.
engineer at Intel, presented a lecture on modeling results have been compared The third presentation by Prof.
“Microprocessor Design in the Nanoscale to thermal imaging (infrared emission) Vojin Oklobdzija of the University of
Era.” He discussed current techniques results that proved the accuracy of the Texas (ACSEL Laboratory) on “Meth-
for reducing power consumption within models. During a discussion that fol- odology for Energy-Efficient Design
general purpose microprocessor archi- lowed, many questions were devoted of Digital Circuits,” provided a sys-
tectures. The audience was especially to future perspectives for microproces- tematic exploration of the complex
impressed by the accuracy of the power sor architectures, such as the number of design spaces for digital signal pro-
models that he described for Intel’s new cores that will be available on one processing architectures. Using different
processor architectures; their power cessor die within ten years. computational intensive examples

From left: Prof. Boser, Prof. Joachim Mucha, Betty Prince, Prof. Blume
Betty Prince, speaking at Tyndall National Institute in Cork. and lab associate, and Prof. Oklobdjiza in Hannover.
(e.g., number-crunching data paths tific demonstrations at the Institute Centre and now Ireland’s largest
within microprocessor architectures) of Microelectronic systems (IMS) research institute, addressed approx-
Prof. Oklobdzija showed to what at Leibniz Universität imately 60 attendees
extent the efficiency of implemen- Hannover, a tour around from universities, re-
tations can be controlled by single the historic center of Prof. Boser gave a search institutes, and
parameters like gate sizing or the Hannover, and a visit fascinating lecture, industry. The technical
choice of suitable architectural vari- to the town hall. The “Electronics for High sessions were chaired
ants. Finally, he presented a new evening ended with Performance Sensors,” by Prof. Peter Kennedy
methodology to systematically op- a wonderful dinner detailing work at (UCC), chair of the UKRI
timize the power consumption of a on the shore of Lake Berkeley on high- Chapter, Dr. Noel Murphy
design at a given speed of a circuit. Maschsee in the cen- performance MEMS (Intel, Shannon), Dr. James
The last presentation was given ter of Hannover. gyroscopes. O’Riordan (Silicon and Soft-
by Prof. Bernhard Boser, University ware Systems, Dublin) and
of California, Berkeley, whose lecture Event in Cork, Dr. Colin Lyden (Analog De-
“Electronic Point-of-Care Medical Di- Ireland, at Tyndall National Institute vices, Cork).
agnostic Devices” explained how fu- On the morning after their arrival, Deviating slightly from the pro-
ture low-cost diagnostic devices with Prof. Kennedy gave SSCS’s DL speakers gram in Germany, Prof. Boser gave a
ICs performing chemical analysis a guided visit to the papers of George fascinating lecture, “Electronics for
and signal processing could be built. Boole as a special treat (//booleweb. High Performance Sensors,” detailing
Possible applications of such devic- ucc.ie/index.php?pageID=264), work at Berkeley on high-performance
es are test systems for geographical inventor of Boolean algebra and MEMS gyroscopes.
regions with limited access to medi- the first professor of mathemat- At the end of the technical pro-
cal laboratories. Such integrated so- ics at University College Cork (UCC) gram, the speakers were treated to
lutions could provide the possibility (//www.ucc.ie). These included let- a guided tour of Tyndall and vis-
of carrying out fast tests for diseases ters to his sister describing his ited the nearby house where George
like malaria. Given the cooperation arrival in Ireland in the middle of the Boole lived in the latter part of the
of Leibniz Universität Hannover with potato famine and his signed copy 19th century.
the medical and veterinary schools of his book An Investigation into
of Hannover, an intensive discussion the Laws of Thought, on Which Are
about the future of such integrated Founded the Mathematical Theories —Holger Blume
testing systems followed. of Logic and Probabilities. German SSCS Chapter Chair
After the Chapter chair’s closing The DL program, which began at —Peter Kennedy
remarks expressing the audience’s 10 a.m. at Tyndall National Institute SSCS UKRI Chapter Chair
gratitude to the lecturers, an evening (//www.tyndall.ie), formerly the Na- —Katherine Olstein
program for the DLs included scien- tional Microelectronics Research SSCS Administrator

SSCS DL Albert Theuwissen Talks on CMOS Imaging
at IEEE-CAS Conferences in Brazilian Federal Universities
S
SSCS DL and ISSCC Cochair Albert
Theuwissen presented an invited
four-hour tutorial at a workshop spon-
sored by the IEEE Circuits and Systems
Society (CASS) at the Federal Univer-
According to Workshop
Cochair Jose Gabriel Rodri-
guez Carneiro Gomes of
UFRJ, interest in commer-
cial IC design at the Rio de
sity of Rio de Janeiro (UFRJ) on 24 No- Janeiro and Belo Horizonte
vember, and at the Federal University federal universities spiked
of Minas Gerais (UFMG) on 26 Novem- recently in response to
ber. Carlos Mendoza from AnaFocus the government’s approval
in Spain and Simon Schneiter, cur- of design houses at both
rently at CSEM-Brasil, gave afternoon schools. “The Brazilian gov-
talks. The goal of both full-day events ernment recently selected
was to motivate undergraduate and the semiconductor sector
graduate students to pursue research as a priority in its industrial
in CMOS image sensors and to foster policy,” causing an increase
CASS membership. The audience in in demand for qualified peo-
Rio was composed mostly of under- ple and the establishment
graduate and graduate students. In of a number of new design
Belo Horizonte, many lecturers, pro- houses and other small
fessors, and professional engineers companies that are expected
attended the workshop as well. to create electric and elec-
tromechanic products incor- SSCS DL Albert Theuwissen lecturing to audience of
porating chips, sensors, and about 100 at the Federal University of Rio de Janeiro
Digital Object Identifier 10.1109/MSSC.2009.935275 actuators, he said. in November.
RECENT DEVELOPMENTS IN IC DESIGN IN BRAZIL

At the Federal University of Rio de Janeiro, a variety of ICs have been and private universities and Federal University of Minas Gerais (UFMG),
designed and patented in 0.8, 0.35, and 0.18 mm CMOS technologies with 34,000 students, plays a distinguished role in the aforementioned
and successfully tested in laboratories there. New designs are also initiatives, offering academic research and undergraduate, specialist and
being carried out in modern CMOS technologies at the 65 and 90 nm graduate courses on themes related to microelectronics and imaging.
scales and, soon, at 45 nm. Image sensor activities comprise the devel- Various departments within UFMG (electrical engineering, computer
opment of CMOS image sensors with special robustness properties (e.g., science, and physics) jointly organized in Ouro Preto—MG the congress
radiation hardening) and CMOS image sensors with focal-plane image “Chip on the Mountains,” which was the 2006 edition of the SBCCI/
processing features. In September 2007, the graduate and undergraduate SBMicro.
schools of UFRJ organized the “Chip in RIO” edition of the Symposium UFRJ offers basic microelectronics courses in the fifth year of its
on Integrated Circuits and Systems Design/Symposium on Microelec- undergraduate curriculum as well as courses on analog integrated
tronics Technology and Devices (SBCCI/SBMicro), which was the larg- circuit design, circuit modeling and simulation, VLSI, focal plane im-
est scientific event in IC design and process technologies in Latin Amer- age processing, analog filter design, and radio frequency circuits at
ica, attracting a record number of participants and renowned the graduate level, as does the Electrical Engineering Department at
researchers from the United States, Europe, and Asia. UFMG. UFMG has recently organized its first graduate-level course
The state of Minas Gerais (MG) has a historical background in the field specializing in microelectronics and focusing on microfabrication
of semiconductor device plants. Today, there are activities on micro- and and on IC design.
nanofabrication, on smart cameras, on photosensitive devices and IC de-
sign for image sensing purposes, and for digital processing of information, —Jose Gabriel Rodriguez Carneiro Gomes
including a recently approved design house by the federal government. UFRJ—Electrical Engineering Program
There is also an Innovation Center (CSEM-BRASIL), subsidized by the —Davies William de Lima Monteiro
MG-State government, dedicated to the development of industrial solu- UFMG—Department of
tions employing micro- and nanosystems. There are a number of public Electrical Engineering

CMOS IMAGING: FROM PIXELS TO CAMERAS
An Overview of Solid-State Imaging with CMOS Technology
The first part of this tutorial focused on CMOS image sensors and pixel
structure. Figure 1 illustrates the evolution of pixel sizes and technolo- Camera Block Diagram Digital Gain
Image Sensor
gies used to make these pixels.
Several two-dimensional image sensor architectures were reviewed
Analog
as well as details about CMOS pixels. The basic working principle of a Gain Statistics
CMOS image sensor with a rolling shutter was demonstrated by means
of a short animation. The following pixel structures were highlighted: White
passive pixel with one transistor in every pixel, active pixel with three Balance
Integration
transistors per pixel, pinned-photodiode with four transistors per pixel, Time
Exposure
and shared pixels with 1.75 transistors per pixel (shown in Figure 2). Control
Iris
The second part of the presentation focused on a color camera system Control
(Figure 3). The first item in the discussion was color imaging by means
of a solid-state image FIGURE 3: Camera block diagram.
CMOS Scaling sensor covered with
Node/Pixel Size (μm)
100
primary color filters. Auto-White Balancing
Technology
10 Pixel Size
As far as the camera Source Spectral
Radiance Lλ (W/m2·sr·nm)
system is concerned, the
1 Technology Node
following topics were Object Spectral
ITRS Road Map Reflectance Sλ (/nm)
0.1 reviewed: image inter-
19 2
19 4
19 6
20 8
20 0
2002
20 4
20 6
20 8
10
polation or demosaicing
9
9
9
9
0
0
0
0
19
Year to reconstruct the R, G,

and B in every pixel,
FIGURE 1: CMOS scaling.
Color Signal Lens Spectral Image Spectral
Cλ (W/m2·sr·nm) Transmission Tλ (/nm) Irradiance Eλ (W/m2·nm)
CMOS Pixels : Shared PPD-APS Cλ (xo, t, λ) = L(xo, t, λ) · S(xo, t, λ) F = f/D = 1/(2·tanΘi)
VDD Eλ (xi, t, λ) = π · Sin2Θi · Tλ · C(xo, t, λ) = π · Sin2Θi · Tλ · L(xo, t, λ) · S(xo, t, λ)
RST
FIGURE 4: Auto-white balancing.

Column Bus
TX11 TX12 RS
auto-white balance to match the camera with the white-perception of the hu-
p+ n
man eye (Figure 4) and color matrixing to get rid of the overlap in the color
p-Si
filter characteristics and to get rid of the cross-talk between various pixels.
TX21 TX22
At the end of the presentation, a comparison was made between the
state of the art in solid-state imaging and the human eye. Can we still
p+ n p-Si
learn from the human eye or is silicon already doing better?
• 7 T/cell, 1.75 T/pixel • Small Conversion Gain —Albert Theuwissen
• 8 lines/cell, 2 lines/pixel • FPN Sensitive Harvest Imaging, Bree, Belgium
• Very Small Pixel Size • Kodak, Canon, Matsushita, Sony
Delft University of Technology
FIGURE 2: CMOS pixels: shared PPD-APS. Delft, The Netherlands
Digital Phase-Locked Loops

Open New Avenues for Clock Generation in SoCs
Lecture by SSCS DL Dr. Krishnaswamy Nagaraj at SSCS-New York
T
The New York IEEE EDS/SSCS Chap-
ter and the Columbia Integrated Sys-
tems Laboratory sponsored a talk on
2 October 2009 by SSCS DL Dr. Krish-
naswamy Nagaraj on “Digital Phase-
Locked Loops and Their Role in SoCs.”
His hour-long lecture at the university
attracted over 40 people from the
industry and from faculty and student
communities in the New York metro-
politan area.
After an overview of traditional
analog phase-locked loops (PLLs)

CMOS IMAGING: FROM PIXELS TO CAMERAS
An Overview of Solid-State Imaging with CMOS Technology
The first part of this tutorial focused on CMOS image sensors and pixel
structure. Figure 1 illustrates the evolution of pixel sizes and technolo- Camera Block Diagram Digital Gain
Image Sensor
gies used to make these pixels.
Several two-dimensional image sensor architectures were reviewed
Analog
as well as details about CMOS pixels. The basic working principle of a Gain Statistics
CMOS image sensor with a rolling shutter was demonstrated by means
of a short animation. The following pixel structures were highlighted: White
passive pixel with one transistor in every pixel, active pixel with three Balance
Integration
transistors per pixel, pinned-photodiode with four transistors per pixel, Time
Exposure
and shared pixels with 1.75 transistors per pixel (shown in Figure 2). Control
Iris
The second part of the presentation focused on a color camera system Control
(Figure 3). The first item in the discussion was color imaging by means
of a solid-state image FIGURE 3: Camera block diagram.
CMOS Scaling sensor covered with
Node/Pixel Size (μm)
100
primary color filters. Auto-White Balancing
Technology
10 Pixel Size
As far as the camera Source Spectral
Radiance Lλ (W/m2·sr·nm)
system is concerned, the
1 Technology Node
following topics were Object Spectral
ITRS Road Map Reflectance Sλ (/nm)
0.1 reviewed: image inter-
19 2
19 4
19 6
20 8
20 0
2002
20 4
20 6
20 8
10
polation or demosaicing
9
9
9
9
0
0
0
0
19
Year to reconstruct the R, G,

and B in every pixel,
FIGURE 1: CMOS scaling.
Color Signal Lens Spectral Image Spectral
Cλ (W/m2·sr·nm) Transmission Tλ (/nm) Irradiance Eλ (W/m2·nm)
CMOS Pixels : Shared PPD-APS Cλ (xo, t, λ) = L(xo, t, λ) · S(xo, t, λ) F = f/D = 1/(2·tanΘi)
VDD Eλ (xi, t, λ) = π · Sin2Θi · Tλ · C(xo, t, λ) = π · Sin2Θi · Tλ · L(xo, t, λ) · S(xo, t, λ)
RST
FIGURE 4: Auto-white balancing.

Column Bus
TX11 TX12 RS
auto-white balance to match the camera with the white-perception of the hu-
p+ n
man eye (Figure 4) and color matrixing to get rid of the overlap in the color
p-Si
filter characteristics and to get rid of the cross-talk between various pixels.
TX21 TX22
At the end of the presentation, a comparison was made between the
state of the art in solid-state imaging and the human eye. Can we still
p+ n p-Si
learn from the human eye or is silicon already doing better?
• 7 T/cell, 1.75 T/pixel • Small Conversion Gain —Albert Theuwissen
• 8 lines/cell, 2 lines/pixel • FPN Sensitive Harvest Imaging, Bree, Belgium
• Very Small Pixel Size • Kodak, Canon, Matsushita, Sony
Delft University of Technology
FIGURE 2: CMOS pixels: shared PPD-APS. Delft, The Netherlands
Digital Phase-Locked Loops

Open New Avenues for Clock Generation in SoCs
Lecture by SSCS DL Dr. Krishnaswamy Nagaraj at SSCS-New York
T
The New York IEEE EDS/SSCS Chap-
ter and the Columbia Integrated Sys-
tems Laboratory sponsored a talk on
2 October 2009 by SSCS DL Dr. Krish-
naswamy Nagaraj on “Digital Phase-
Locked Loops and Their Role in SoCs.”
His hour-long lecture at the university
attracted over 40 people from the
industry and from faculty and student
communities in the New York metro-
politan area.
After an overview of traditional
analog phase-locked loops (PLLs)

architecture that highlighted the sociated with an analog charge-pump PLL design and encouraged gradu-
motivation for a digital PLL (DPLL), PLL. Other advantages for DPLLs in- ate students and researchers in the
Dr. Nagaraj discussed the advantages clude better area efficiency and the audience to get involved.
of digital PLL in terms of programma- ability to achieve instant lock using An interesting question and
bility and control of loop dynamics. precalibration in DSP chips. answer session followed his talk.
He stressed that with the continuous After discussing the design of —Peter Kinget
scaling of CMOS technologies, the dig- Digital PLL building blocks at the Associate Professor
ital implementation of the loop filter circuit level, Dr. Nagaraj pinpointed Department of Electrical Engineering
avoids the charge leakage problem as- cutting edge challenges in digital Columbia University
DIGITAL PHASE-LOCKED LOOPS OPEN UP NEW AVENUES FOR CLOCK GENERATION IN SOC
Abstract A DPLL also lends itself to novel architectural enhancements which
Phase-locked loops (PLLs) are widely used in modern day systems-on- would not be possible with an APLL. One example is a fractional PLL.
chip (SoCs), to perform a variety of vital functions like clock generation Such PLLs are used to obtain a fine resolution in the output frequen-
for A/D and D/A converters and digital signal processing blocks, local cy while using a relatively high reference frequency. In an APLL, the
oscillators in RF transceivers, and for clock and data recovery in wire line
systems. The net area and power consumed by the PLLs in typical SoCs is DPLL Block Schematic
very significant, resulting in a lot of interest in making them better. Analog
PLLs (APLLs) have been employed widely, but with the rapid advances in REFINT
REFCLK DIGTL DCO CLKOUT
nanometer digital CMOS technologies, there has recently been a lot of ÷N PFD TDC ÷Q
FILT
interest in digital PLLs (DPLLs). The seminar gave an overview of the dif-
UP+DN
ferences between APLLs and DPLLs. It described the key building blocks
in a DPLL and discussed several advanced DPLL architectures to empha- FBCLK
÷M
size how DPLLs can exploit the power of digital signal processing.
Figure 1 shows the block schematic of a basic DPLL. This is different
from the corresponding APLL in three major aspects. FIGURE 1: The block schematic of a basic DPLL.
First, the voltage controlled oscillator (VCO) or current controlled
oscillator (ICO) that is used in an APLL is replaced by a digitally con-
trolled oscillator (DCO). Second, the charge pump that typically follows A DCO Architecture
the phase frequency detector (PFD) in an APLL is replaced by a time- Current-Steering
DAC
to-digital converter (TDC). Finally, the analog loop filter is replaced by
5b
a digital loop filter. The DPLL has several important advantages over its 5-bit
analog counterpart. The loop filter response is now completely free from Coarse CLKOUT
ICO
variations due to process and temperature. The variations in the char- 7-bit
21b 7b
acteristics of the TDC and the DCO can easily be calibrated out. Thus, Fine
the overall loop response can be precisely controlled. The absence of 9b
passive analog components in the loop filter can also result in substantial 1b, Over-Sampled
area savings as well as facilitate implementation in cheaper technologies. 9-bit SDM CLK
The flexibility and programmability of the DPLL allows the use of a single SDM
design in a wide range of applications, unlike an APLL, which generally
requires custom designs. Finally, DPLL architectures can take advantage FIGURE 2: One implementation of a DCO.
of the power of digital signal processing to enable new features.
The TDC and DCO both represent critical circuit blocks whose perfor-
A New Fractional Pll Architecture
mance has a strong impact on the performance a DPLL. This makes their
REFINT
design challenging. For example, the DCO would need to cover the fre- Conventional
Edge Based
quency range required by a particular application while at the same time, Phase Detection FBCLK
its resolution has to be good enough to meet the phase noise require- Forces edge alignment between
Phase Err
ment. In a typical wireless application, this would map to the equivalent between FBCLK and REFINT
of more than 20 binary bits in the DCO control. Figure 2 shows one way REFINT
New Method of
of achieving such a high resolution. Phase Detection DCOCLK
Of the 21 b, the top 12 b drive a conventional segmented current
steering DAC. The bottom nine bits are encoded by a highly over- We just keep counting the number of DCO cycles and comparing the count
with the expected count at every REFINT edge.
sampled sigma-delta modulator (SDM), which generates a 1-b bi-
nary signal that operates on a unit current source in the fine DAC. FIGURE 3: An alternative way of phase detection.

commonly used technique to accomplish this is
to dither the M-divider ratio at a rapid rate be- Implementation of New Phase Det
(Staszewski, et. al)
tween two integers such that on average it gives
the required fractional numbers. Such PLLs suffer REFINT
from spurious tones that are known as fractional ACCUM
M (Fraction) + REFINT
spurs. There are analog techniques to mitigate
them, but they are very difficult to implement. A Phase Error
DPLL, on the other hand, offers several solutions. Integer Counter + REFINT -
DCOLCK
An example is shown in Figures 3 and 4.
REFINT
Figure 3 shows an alternative way of phase TDC +
detection that is distinct from the conventional DCOCLK
edge based phase detection. Here, we have Free From Traditional Fractional SPURS!
two counters that are simultaneously counting
the DCO clock edges and also accumulat- FIGURE 4: The implementation of a fractional counter to count DCO edges.
ing the expected count using the reference
edges. The difference between these represents the phase error. Figure 4 In summary, the advent of the DPLL has opened the door for innova-
shows the implementation of a fractional counter to count the DCO tive architectural advances that could enable powerful new features and
edges. A fractional DPLL implemented with such a phase detector would better performance.
be free from the fractional spurs seen in a traditional fractional APLL. —K. Nagaraj
SSCS VP Rakesh Kumar Presents DL Talk

on Semiconductor Entrepreneurship
Addresses IEEE SSCS/EDS Chapter in Shanghai
A
About 40 IEEE Members from Fudan
University and local companies and
some non-IEEE professors and gradu-
ate students from the Department of
Microelectronics at Fudan University
gathered on 21 September 2009 for a
seminar by Dr. Rakesh Kumar, “Fabless
Semiconductor Implementation in a
Changing Landscape.”
Dr. Kumar, who is the president
of TCX Inc., a fabless semiconductor
company based in Poway, California,
In front from left, Huihua Yu (SSCS Shanghai Chapter secretary), Guoping Ru (EDS Shanghai
and a DL for the IEEE Electron Devices Chapter secretary), Dr. Kumar, Ting-Ao Tang (SSCS Shanghai Chapter chair), and students
Society (EDS) and 2010–2011 IEEE SSCS Min Rao, Peng Zhang, Chen Shu, and Xiao Guo.
vice president, was invited to speak
by the IEEE SSCS/EDS joint Shanghai positioning, product positioning, fund- are creating product as a “must-have”
Chapter. ing, product definition, technology for the customer and developing a
Dr. Kumar began his seminar with selection, supply chain selection, and systematic approach from planning
an overview of fabless IC companies cost management. Additional elements to execution, he said.
around the world and analyzed the low for success are sourcing methodology, After the seminar, the audience dis-
success rate of new start-ups. Then he operations best practices, quality and cussed the progress and future of fab-
discussed key factors for successful reliability, schedule development and less IC companies with Dr. Kumar.
entrepreneurship, including market management, and program manage-
ment, he said. The two key guidelines —Ting-Ao Tang
Digital Object Identifier 10.1109/MSSC.2009.935277 for a successful fabless IC company SSCS Shanghai Chapter Chair

commonly used technique to accomplish this is
to dither the M-divider ratio at a rapid rate be- Implementation of New Phase Det
(Staszewski, et. al)
tween two integers such that on average it gives
the required fractional numbers. Such PLLs suffer REFINT
from spurious tones that are known as fractional ACCUM
M (Fraction) + REFINT
spurs. There are analog techniques to mitigate
them, but they are very difficult to implement. A Phase Error
DPLL, on the other hand, offers several solutions. Integer Counter + REFINT -
DCOLCK
An example is shown in Figures 3 and 4.
REFINT
Figure 3 shows an alternative way of phase TDC +
detection that is distinct from the conventional DCOCLK
edge based phase detection. Here, we have Free From Traditional Fractional SPURS!
two counters that are simultaneously counting
the DCO clock edges and also accumulat- FIGURE 4: The implementation of a fractional counter to count DCO edges.
ing the expected count using the reference
edges. The difference between these represents the phase error. Figure 4 In summary, the advent of the DPLL has opened the door for innova-
shows the implementation of a fractional counter to count the DCO tive architectural advances that could enable powerful new features and
edges. A fractional DPLL implemented with such a phase detector would better performance.
be free from the fractional spurs seen in a traditional fractional APLL. —K. Nagaraj
SSCS VP Rakesh Kumar Presents DL Talk

on Semiconductor Entrepreneurship
Addresses IEEE SSCS/EDS Chapter in Shanghai
A
About 40 IEEE Members from Fudan
University and local companies and
some non-IEEE professors and gradu-
ate students from the Department of
Microelectronics at Fudan University
gathered on 21 September 2009 for a
seminar by Dr. Rakesh Kumar, “Fabless
Semiconductor Implementation in a
Changing Landscape.”
Dr. Kumar, who is the president
of TCX Inc., a fabless semiconductor
company based in Poway, California,
In front from left, Huihua Yu (SSCS Shanghai Chapter secretary), Guoping Ru (EDS Shanghai
and a DL for the IEEE Electron Devices Chapter secretary), Dr. Kumar, Ting-Ao Tang (SSCS Shanghai Chapter chair), and students
Society (EDS) and 2010–2011 IEEE SSCS Min Rao, Peng Zhang, Chen Shu, and Xiao Guo.
vice president, was invited to speak
by the IEEE SSCS/EDS joint Shanghai positioning, product positioning, fund- are creating product as a “must-have”
Chapter. ing, product definition, technology for the customer and developing a
Dr. Kumar began his seminar with selection, supply chain selection, and systematic approach from planning
an overview of fabless IC companies cost management. Additional elements to execution, he said.
around the world and analyzed the low for success are sourcing methodology, After the seminar, the audience dis-
success rate of new start-ups. Then he operations best practices, quality and cussed the progress and future of fab-
discussed key factors for successful reliability, schedule development and less IC companies with Dr. Kumar.
entrepreneurship, including market management, and program manage-
ment, he said. The two key guidelines —Ting-Ao Tang
Digital Object Identifier 10.1109/MSSC.2009.935277 for a successful fabless IC company SSCS Shanghai Chapter Chair

SSCS DL Kofi Makinwa Talks
About Smart Sensor Design at SSCS-Boston
Applying Analog Signal Processing Techniques to Enhance Sensor Performance
I
It’s 6:00 p.m. on Friday in Boston,
the right time to get together with
your friends and colleagues to talk
about things that make you wonder
and that drive your enthusiasm.
For a group of SSCS members and
IC design fans, this meant gathering
on 16 October at the Tufts University
Gordon Institute in Medford, Massa-
chusetts, for an evening with SSCS
DL Dr. Kofi Makinwa. The meeting,
with participants from local industry
and area universities including Bos-
ton University, the University of Mas-
sachusetts in Lowell, and Tufts, was
organized by Dr. Valencia Joyner, an
assistant professor at Tufts and a
member of the SSCS-Boston Chapter
committee.
Dr. Makinwa, who is an Antoni
van Leuwenhoek Professor at Delft
Dr. Valencia Joyner introducing SSCS DL Kofi Makinwa at the SSCS Boston Chapter meeting
University of Technology (TU-Delft), at Tufts University in October.
began by referencing the famous
scientist of his named position and
musing on how advances in the In his talk “Designing Smart Sen-
understanding of microscopically sors in Standard CMOS,” Dr. Makinwa
DR. MAKINWA’S RECIPE FOR
small things continually brings ben- described how the latest toolbox of
SENSOR SUCCESS: A DESIGN
efits to society. signal processing techniques can
METHODOLOGY
1) Do no harm! Sensor performance
greatly improve sensor accuracy
should not be limited by interface
and precision, showing how these
circuitry.
techniques could be applied to a
2) Do system design! Use circuit tech-
variety of sensor types, includ-
niques to compensate for sensor non-
ing an innovative wind sensor, a
idealities.
Hall effect magnetic sensor, and an
3) Digitize early! Minimize analog errors
extremely precise temperature sen-
and leverage digital signal processing
sor capable of rivaling Class-A plati-
(flexibility, Moore’s law).
num thermocouples with 1/20.1 °C
4) Be dynamic! Use DEM, chopping,
accuracy over the range of 255 °C
auto-zeroing, and SD modulation to
to 1125 °C.
shift gain errors, 1/f noise, offset, and
Dr. Makinwa spurred lively audi-
quantization noise out of the sensor’s
ence interaction and an appreciation
(narrow) bandwidth.
of future opportunities for sensor
design and applications by giv-
SSCS DL Dr. Kofi Makinwa receiving an ing his “recipe of sensor success” programmable sensors that led to
IEEE Boston Section laser pointer as a (see “Dr. Makinwa’s Recipe for Sen- further conversation.
token of thanks from SSCS-Boston com-
sor Success: A Design Methodol-
mittee member Prof. Valencia Joyner of
Tufts University. ogy”). One audience participant, Ted —Bruce Hecht
Kochanski, a past chair of the Bos- SSCS-Boston Chapter Chair
Digital Object Identifier 10.1109/MSSC.2009.935278 ton Section, brought a collection of [email protected]

DESIGNING SMART SENSORS IN STANDARD CMOS
Abstract Designing smart sensors is a multidisciplinary through an n-well resistor. However, the in-
Smart sensors combine sensing functionality task that requires a good understanding of homogeneity and stress sensitivity of such re-
and the interface electronics. Their small size, sensor physics and a solid background in ana- sistors mean that the resulting sensors exhibit
digital interface, and low-cost account for their log circuit design. Take, for instance, the design significant offset and drift. By using the spin-
increasingly widespread use. Examples of smart of an electronic compass. This requires sensors ning-current technique, which involves running
sensors are the accelerometers used as crash that can detect the Earth’s weak magnetic field bias current in different directions through the
detectors in most cars and the temperature with submicro-Tesla accuracy. sensor and then averaging the output, drift can
sensors that enhance the reliability of most per- In standard CMOS, Hall sensors can be re- be reduced to the nano-Tesla level. The residu-
sonal computers. alized simply by running some bias current al offset can then be trimmed to zero.
Hall Sensors
+
+
VHall
Ibias
–
B
–
VHall = SHIbiasB
Wheatstone Bridge Model
• Sensor (an n-well resistor) looks like a bridge!
• But bridge resistances
– Are mismatched ⇒ offset (10 mT typical)
– Change due to changes in temperature and
packaging stress ⇒ offset drift.
FIGURE 1: Hall sensors.
Hall Sensor Readout
V-I Decimation
Inst. Counter and
Modulator
Amp. Summing Spin
Hall Slow Fast Fast Digital

Sensor Chopper Chopper Chopper Slow Chopper
Submicrovolt Offset Nested Chopping

• Hall voltages converted to currents by chopped
instrumentation amplifier (fast choppers)
• ΣΔ modulator digitizes resulting currents
• Entire front end is chopped (slow choppers)
• Decimation filter sums and averages Hall voltages.
FIGURE 2: Hall sensors readout.

Another drawback of n-well-based Hall sen-
Compass Performance sors is their rather low sensitivity. In conse-
Compass Output Heading Error quence, an electronic compass requires preci-
25 2.5 sion interface electronics, with offset below 60
20 X Vector 2 Before Calibration
Y Vector Offset and Gain nV! This was achieved by applying nested chop-
Sensor Outputs (µT)
15 1.5
Calibrated ping to the analog front end, and then digitizing
10 1
5 0.5 and averaging the result in a sigma-delta ADC.
0 0 The resulting smart magnetic field sensor
0
30
60
90
120
150
180
210
240
270
300
330
360
achieved a stable offset of less than 5µT, which
0
30
60
90
120
150
180
210
240
270
300
330
360
–5 –0.5
–10 –1 enabled the realization of a two-chip electronic
–15 –1.5 compass with a heading error of less than 1°.
–20 –2
More details about the design of this state-of-
–25 –2.5
Rotation (degrees) the-art sensor can be found in [1].
• Consists of two orthogonally mounted Hall sensors
• Angle error <1° after calibration and trimming! Reference
• State-of-the-art performance! [1] K.A.A. Makinwa, M.A.P. Pertijs, J.C. van der
Meer and J.H. Huijsing, “Smart sensor design:
the art of compensation and cancellation,” in
FIGURE 3: Compass performance. Proc. ESSCIRC, Sept 2007, pp. 76 – 82.
SSCS DL Behzad Razavi Addresses 300

at National Chiao-Tung University
Invited by SSCS-Taipei to Speak on Design Techniques
Using Advanced CMOS Technology
T
The lecture hall at National Chiao-
Tung University was full, as an audi-
ence of about 300 gathered to hear
SSCS DL Behzad Razavi’s lecture “A
300-GHz Fundamental Oscillator in
65-nm CMOS Technology,” on 22 Sep-
tember 2009. Since his talk was open
to the public, many engineers from
local companies attended in addition
to students and faculty from electri-
cal engineering-related departments
in the university. In a second talk on
24 September, Prof. Razavi lectured
on “Transmitter Linearization by
Beamforming.”
New Oscillator Typology Achieves

First Harmonic Frequency of 300 GHz
Precis
A common approach to generating
high frequencies is to use “super-
harmonic” oscillators, i.e., to “sift” a
Prof. Behzad Razavi of UCLA addressed 300 members and guests of SSCS-Taipei at National
Digital Object Identifier 10.1109/MSSC.2009.935279 Chiao-Tung University in Hsinchu on 22 September 2009.

Another drawback of n-well-based Hall sen-
Compass Performance sors is their rather low sensitivity. In conse-
Compass Output Heading Error quence, an electronic compass requires preci-
25 2.5 sion interface electronics, with offset below 60
20 X Vector 2 Before Calibration
Y Vector Offset and Gain nV! This was achieved by applying nested chop-
Sensor Outputs (µT)
15 1.5
Calibrated ping to the analog front end, and then digitizing
10 1
5 0.5 and averaging the result in a sigma-delta ADC.
0 0 The resulting smart magnetic field sensor
0
30
60
90
120
150
180
210
240
270
300
330
360
achieved a stable offset of less than 5µT, which
0
30
60
90
120
150
180
210
240
270
300
330
360
–5 –0.5
–10 –1 enabled the realization of a two-chip electronic
–15 –1.5 compass with a heading error of less than 1°.
–20 –2
More details about the design of this state-of-
–25 –2.5
Rotation (degrees) the-art sensor can be found in [1].
• Consists of two orthogonally mounted Hall sensors
• Angle error <1° after calibration and trimming! Reference
• State-of-the-art performance! [1] K.A.A. Makinwa, M.A.P. Pertijs, J.C. van der
Meer and J.H. Huijsing, “Smart sensor design:
the art of compensation and cancellation,” in
FIGURE 3: Compass performance. Proc. ESSCIRC, Sept 2007, pp. 76 – 82.
SSCS DL Behzad Razavi Addresses 300

at National Chiao-Tung University
Invited by SSCS-Taipei to Speak on Design Techniques
Using Advanced CMOS Technology
T
The lecture hall at National Chiao-
Tung University was full, as an audi-
ence of about 300 gathered to hear
SSCS DL Behzad Razavi’s lecture “A
300-GHz Fundamental Oscillator in
65-nm CMOS Technology,” on 22 Sep-
tember 2009. Since his talk was open
to the public, many engineers from
local companies attended in addition
to students and faculty from electri-
cal engineering-related departments
in the university. In a second talk on
24 September, Prof. Razavi lectured
on “Transmitter Linearization by
Beamforming.”
New Oscillator Typology Achieves

First Harmonic Frequency of 300 GHz
Precis
A common approach to generating
high frequencies is to use “super-
harmonic” oscillators, i.e., to “sift” a
Prof. Behzad Razavi of UCLA addressed 300 members and guests of SSCS-Taipei at National
Digital Object Identifier 10.1109/MSSC.2009.935279 Chiao-Tung University in Hsinchu on 22 September 2009.

SECOND DL TALK BY RAZAVI ON “TRANSMITTER LINEARIZATION BY BEAMFORMING”
Sponsored by NTU-MediaTek Wireless Research Lab, National Taiwan University,
National Taiwan University, Taipei on 24 September 2009
Precis
To increase the data rate in communication
systems, the modulation scheme can incorpo-
rate higher-order constellations, e.g., 16 QAM,
but at the cost of tighter linearity and/or phase
noise requirements. It is therefore desirable to
develop linearization techniques for transmit-
ters, particularly for power amplifiers, which
improve the efficiency.
This presentation described a new method of
transmitter linearization by beamforming. Two
constant-envelope waveforms representing
a general modulated signal are combined in
space, reproducing the original signal. The ar- Prof. Razavi lecturing on “Transmitter Linearization by Beamforming” at National
Taiwan University, Taipei, on 24 September 2009.
chitecture allows completely nonlinear power
amplifiers—and hence high efficiency—while
transmitting 16 QAM signals. Designed for the
60-GHz band, a dual-transmitter prototype has
been demonstrated in 65-nm CMOS technol-
ogy with an EVM of 219 dB.
Prof. Razavi showed the design details to
explain how the nonlinear power amplifier
could operate efficiently in this architecture. He
also presented experimental results for a dual-
transmitter prototype in 65-nm technology.
After his talk, Prof. Razavi answered all questions
about the topic and contents. Since designing a
60 GHz system is quite difficult, Prof. Razavi
has used a high-frequency structure simulator
After Prof. Razavi’s lecture at National Taiwan University, Taipei on 24 September 2009.
(HFSS) to simulate the passive components in (From left) Prof. CK Wang, Prof. Razavi, Prof. Peter Kinget, Prof. Shen-Iuan Liu, and
the circuits. Prof. TC Lee.
Prof. Behzad Razavi of UCLA (front row, fourth from left) addressed 300 members and
A die photograph of the 300-GHz oscillator. guests of SSCS-Taipei at National Chiao-Tung University in Hsinchu on 22 September 2009.
higher harmonic by techniques “fundamental” oscillators that oper- existence of gain, and they provide
such as edge combining or push- ate at the first harmonic offer two differential and even quadrature
push action. On the other hand, advantages: they demonstrate the outputs. These properties pave the

way for the design of compact high- tolerates greater passive and active trial products, it has drawn a lot of
performance transceivers. device losses than conventional interest from design engineers. Prof.
In his talk, Prof. Razavi presented oscillators. The three prototypes that Razavi’s lecture was a good tutorial
a new oscillator topology that have been fabricated with an on-chip about design techniques for subtera-
achieves a first harmonic frequency mixer achieving frequencies of 204, hertz circuits, as was shown by the
of 300 GHz, 50% higher than that 240, and 300 GHz while consuming lively question and answer session
of prior 45-nm CMOS technology. 3.5 mW show remarkable agreement that followed it.
He explained that the circuit, using with simulations, he said.
magnetic coupling between a differ- Although this emerging technol-
ential pair and a cross-coupled core, ogy is beyond the viewpoint of indus- —IEEE SSCS Taipei Chapter
2009 ISSCC Lewis Winner Outstanding Paper Award

An Omission from the Spring 2009 Issue
T
The editors of the magazine regret the
omission of the ISSCC 2009 Lewis Win-
ner Award for Outstanding Paper from
the Spring 2009 issue.
The award was presented to Dim-
itris Pantelakis, James Chan, Phil
Kliza, Grishma Shah, Trung Pham,
Anne Koh, Tien-Chien Kuo, Yan Li,
Feng Pan, Seungpil Lee, Chi-Ming
Wang, and Makoto Hamada for their
paper “A16Gb 3b/Cell NAND Flash
Memory in 56 nm with 8 MB/s Write
Rate.” The award winners—all senior
managers and senior NAND design
Tim Tredwell, ISSCC 2009 Executive-Committee chair (at left), presented the ISSCC Lewis
engineers at SanDisk Corporation Winner Best Paper Award to (from left): Dimitris Pantelakis, James Chan, Phil Kliza, Grishma
and Toshiba Corporation—are ex- Shah, Trung Pham, Anne Koh, Tien-ChienKuo, Yan Li, Feng Pan, Seungpil Lee, Chi-Ming
perienced NAND flash memory de- Wang, and Makoto Hamada.
signers working in industry-leading
NAND flash memory that is used designs, and Intel flagship micro-
worldwide in consumer products processor work. He holds a B.A.
such as digital cameras, USB drives, and an M.A. degree with honors
and MP3 players. from the University of Cambridge,
Award corecipient James Chan, where he studied under Prof. Alec
who reported the omission is cur- Broers, a world-renowned figure
rently a manager with SanDisk in nanotechnology, an IBM Fellow,
Corporation in its state-of-the- and the 1985 IEEE Cledo Brunetti
art NAND flash memory group. Award winner. Chan furthered his
His work experiences encompass studies in integrated circuits at
industry-leading NAND and NOR UCLA’s famed analog circuit group
flash memories, MLC and ABL under the direction of Prof. Gabor
Temes, the 2006 IEEE Gustav Rob-
James Chan, a corecipient of the 2009 ISSCC ert Kirchoff Award winner for ana-
Digital Object Identifier 10.1109/MSSC.2009.935280 Lewis Winner Award. log signal processing.

way for the design of compact high- tolerates greater passive and active trial products, it has drawn a lot of
performance transceivers. device losses than conventional interest from design engineers. Prof.
In his talk, Prof. Razavi presented oscillators. The three prototypes that Razavi’s lecture was a good tutorial
a new oscillator topology that have been fabricated with an on-chip about design techniques for subtera-
achieves a first harmonic frequency mixer achieving frequencies of 204, hertz circuits, as was shown by the
of 300 GHz, 50% higher than that 240, and 300 GHz while consuming lively question and answer session
of prior 45-nm CMOS technology. 3.5 mW show remarkable agreement that followed it.
He explained that the circuit, using with simulations, he said.
magnetic coupling between a differ- Although this emerging technol-
ential pair and a cross-coupled core, ogy is beyond the viewpoint of indus- —IEEE SSCS Taipei Chapter
2009 ISSCC Lewis Winner Outstanding Paper Award

An Omission from the Spring 2009 Issue
T
The editors of the magazine regret the
omission of the ISSCC 2009 Lewis Win-
ner Award for Outstanding Paper from
the Spring 2009 issue.
The award was presented to Dim-
itris Pantelakis, James Chan, Phil
Kliza, Grishma Shah, Trung Pham,
Anne Koh, Tien-Chien Kuo, Yan Li,
Feng Pan, Seungpil Lee, Chi-Ming
Wang, and Makoto Hamada for their
paper “A16Gb 3b/Cell NAND Flash
Memory in 56 nm with 8 MB/s Write
Rate.” The award winners—all senior
managers and senior NAND design
Tim Tredwell, ISSCC 2009 Executive-Committee chair (at left), presented the ISSCC Lewis
engineers at SanDisk Corporation Winner Best Paper Award to (from left): Dimitris Pantelakis, James Chan, Phil Kliza, Grishma
and Toshiba Corporation—are ex- Shah, Trung Pham, Anne Koh, Tien-ChienKuo, Yan Li, Feng Pan, Seungpil Lee, Chi-Ming
perienced NAND flash memory de- Wang, and Makoto Hamada.
signers working in industry-leading
NAND flash memory that is used designs, and Intel flagship micro-
worldwide in consumer products processor work. He holds a B.A.
such as digital cameras, USB drives, and an M.A. degree with honors
and MP3 players. from the University of Cambridge,
Award corecipient James Chan, where he studied under Prof. Alec
who reported the omission is cur- Broers, a world-renowned figure
rently a manager with SanDisk in nanotechnology, an IBM Fellow,
Corporation in its state-of-the- and the 1985 IEEE Cledo Brunetti
art NAND flash memory group. Award winner. Chan furthered his
His work experiences encompass studies in integrated circuits at
industry-leading NAND and NOR UCLA’s famed analog circuit group
flash memories, MLC and ABL under the direction of Prof. Gabor
Temes, the 2006 IEEE Gustav Rob-
James Chan, a corecipient of the 2009 ISSCC ert Kirchoff Award winner for ana-
Digital Object Identifier 10.1109/MSSC.2009.935280 Lewis Winner Award. log signal processing.

Leenaerts Visits SSCS-Austria Chapter
Speaks on “Wideband RF and PA Circuit Design in
Nanoscale CMOS for Wireless Applications”
S
SSCS DL Domine Leenaerts visited the
Society’s Austria chapter on the invita-
tion of its founder and chair, Gernot Hue-
ber, on 12 November 2009. The chapter,
in Linz, Austria, was established at the
end of 2008.
In the first part of his lecture,
Dr. Leenaerts, a senior principal
corporate I&T/research engineer at
The Netherlands, discussed devel-
opments in wide band RF design in
nanoscale CMOS technology. In the
second, he focused on the design
of a reliable 1W CMOS power ampli-
Digital Object Identifier 10.1109/MSSC.2009.935491 NXP Semiconductors in Eindhoven, fier (PA).
ABSTRACT
Recent interest in software-defined radios and Meanwhile, the application focus of wide also the interferers (in this case, at 1.6 and
the upcoming UWB WiMedia standard have band RF design shifted from UWB towards 2.4 GHz). As the LNA works, nonlinear inter-
triggered research in wide band RF design in software-defined radios (SDRs), or reconfigu- modulation of the two interferes will occur,
deep submicron CMOS. At first, it focused on rable radios. These applications address a radio distorting the wanted channel at RF. On top
how to achieve low NF and high linearity over capable of receiving/transmitting several com- of this, the square wave 800 MHz LO sig-
the wide RF bandwidth; today its focus has munication standards in the, e.g., 700 MHz–5 nal will cause harmonic mixing with the 2.4
shifted to the interference issue. GHz frequency band by reconfiguring the radio GHz interferer.
At the same time, modern CMOS processes each time to a specific standard, with the inten- The linearity of the LNA can be improved in
have proven to be capable of covering the de- tion of reusing as much hardware as possible. several ways, and the harmonic mixing can be
mands of wireless communication standards for However, a consequence of wide-band RF eliminated, largely by using harmonic rejection
RF PAs with moderate output power levels up to design for SDR is the issue of interference mixers shown in this lecture. However, dealing
20–24 dBm. The 1 W output power level is now (Figure 1). with interferers, which are not related to the
seen as a holy grail for the design of CMOS RF Wide band LNA will not only receive the wanted channel in a harmonic way, remains an
PAs for cellular applications. desired frequency channel (800 MHz) but open question.
The following remarks address both topics
and report results that have been obtained in
academia and industry. Nonlinear !! Wideband
Gain = 20 dB
Wide Band RF in Nanoscale CMOS A B C 0.8 G 2.4 G
LNA
The initiation of the UWB standard triggered re-
search in wide band RF CMOS design. +100 dbm
–10 dbm –20 dbm
The first publications that appeared around –40 dbm –50 dbm
–70 dbm
2004 focused on the design aspects of wide
band LNA (low noise amplifier) performance.
0.8 G 1.6 G 2.4 G
These designs used many (integrated) induc-
Wanted Interference Intermodulation and Blocking
tors, mainly to realize a band pass behavior of
the input impedance and to assure low-noise Wideband
performance. Gain = 20 dB
The second generation of LNAs realized A B C0.8 G 2.4 G
LNA
proper input matching over a wide bandwidth
by means of a common-gate, common-source –70 dbm –40 dbm –50 dbm –20 dbm –30 dbm
input stage configuration. Deploying the so- –50 dbm
called “noise cancellation technique” im-
proved the performance of this class of LNAs. 0.8 G 2.4 G 0.8 G 2.4 G DC
Recently, inverter-based LNA realized in 65 nm Wanted Third Harmonic
CMOS resulted also in excellent wide band
RF performances. FIGURE 1: Interference problems associated with wide band RF performance.

Reliable 1 W CMOS PAs away from the gate, thereby improv-
The problem in achieving 1W ing the breakdown voltage at the cost
60
output power in 65 nm CMOS, for 30 of a slightly lower cut-off frequency.
alo t
An en
g
example, is the relation between 50 But a class-E PA using the ED-NMOS
ee em
Fr nc
the supply voltage (VDD) and the device achieves output powers be-
Pout(dBm)
40
to ha
PAE(%)
20
e En
required impedance level (R). yond 1W with very high efficiency
30
Du AE
Using the relation Pout ~ and outperforms a similar PA based
P
VDD2/R, 1 W at 50 V demands a 20 10 on a normal (thick oxide) NMOS de-
7 V supply, whereas the maxi- 10 GO2 Thick Oxide vice (Figure 2).
mum reliable voltage in 65 nm Breaks at 3 V ED-NMOS Power combining techniques
0 0
CMOS is in the order of 1 V; a 0 1 2 3 4 5 6 7 8 rely on transformer-based match-
matching network between the VDD(V) ing where the transformer ratio N
PA and its load does not help is kept low, preferable N equal 1.
much because the network’s as- FIGURE 2: Measured performance of the ED NMOS PA and a Several PAs with low to moderate
regular PA using thick oxide (GO2), operating at 2 GHz.
sociated loss requires impractical output powers are connected to
high quality components. a single load by means of a trans-
Currently two possible strategies have been discusses their performances compared to the former having multiple ports at the primary
proposed in the literature—technology im- state-of-art PA in commercial cellular commu- side (each having one winding), all coupled
provement (without the use of additional masks, nication devices. to a single secondary port (of preferable
therefore referred to as a FreeAnalog device) The FreeAnalog device is a so-called extend- one winding).
or power combining techniques. This lecture ed-drain NMOS (ED-NMOS). Compared to
shows several examples of both techniques and the normal NMOS, the drain is located further —Domine Leenaerts
Woe Is the Dangling Phrase

Dr. Grammatica on Misplaced Modifiers
T
The professor is not without appre-
hension as she submits to you a
lesson from her somewhat strange
and estranged sister who is a pseu-
doexpatriate living it up in Paris.
upsets the parrot, and makes many
trips each year to London to visit
her favorite pub, The Coughing Pig.
She has a Ph.D. degree in linguistics
from Oxford, but for some reason
I submit to you Dr. Grammatica’s
essay on dangling and misplaced
modifiers, a topic near and dear to
the professor’s heart.
Her name is Dr. Grammatica (the prefers not to speak of it. To some Woe Is the Dangling Phrase
ninny changed her name because extent, she shuns what she considers “Woe is the dangling phrase that
of an argument with your esteemed the haughtiness of the English (she’s hangeth in the airy paragraphical
professor over commas); she rides been tainted by the French point of firmament, describing nothing, con-
a motorcycle with a sidecar, owns a view), and she is especially contemp- fusing all who suffer to read, and
parrot named Mrs. Wiggins (the par- tuous of her highly regarded sister, leading to fervent frustration.”
rot often rides in the sidecar), prefers your own Prof. Grammar. —The lesser known poet
to watch rugby rather than American However, it’s clear that the doctor playwright, and taxidermist
football, never smokes because it secretly admires her sister’s admirable Josephine Grammatica, 1616, from
command of language rules and writ- the scandalous play Death of the
Digital Object Identifier 10.1109/MSSC.2009.935281 ing styles. With begrudging respect, Grammar Queen

Reliable 1 W CMOS PAs away from the gate, thereby improv-
The problem in achieving 1W ing the breakdown voltage at the cost
60
output power in 65 nm CMOS, for 30 of a slightly lower cut-off frequency.
alo t
An en
g
example, is the relation between 50 But a class-E PA using the ED-NMOS
ee em
Fr nc
the supply voltage (VDD) and the device achieves output powers be-
Pout(dBm)
40
to ha
PAE(%)
20
e En
required impedance level (R). yond 1W with very high efficiency
30
Du AE
Using the relation Pout ~ and outperforms a similar PA based
P
VDD2/R, 1 W at 50 V demands a 20 10 on a normal (thick oxide) NMOS de-
7 V supply, whereas the maxi- 10 GO2 Thick Oxide vice (Figure 2).
mum reliable voltage in 65 nm Breaks at 3 V ED-NMOS Power combining techniques
0 0
CMOS is in the order of 1 V; a 0 1 2 3 4 5 6 7 8 rely on transformer-based match-
matching network between the VDD(V) ing where the transformer ratio N
PA and its load does not help is kept low, preferable N equal 1.
much because the network’s as- FIGURE 2: Measured performance of the ED NMOS PA and a Several PAs with low to moderate
regular PA using thick oxide (GO2), operating at 2 GHz.
sociated loss requires impractical output powers are connected to
high quality components. a single load by means of a trans-
Currently two possible strategies have been discusses their performances compared to the former having multiple ports at the primary
proposed in the literature—technology im- state-of-art PA in commercial cellular commu- side (each having one winding), all coupled
provement (without the use of additional masks, nication devices. to a single secondary port (of preferable
therefore referred to as a FreeAnalog device) The FreeAnalog device is a so-called extend- one winding).
or power combining techniques. This lecture ed-drain NMOS (ED-NMOS). Compared to
shows several examples of both techniques and the normal NMOS, the drain is located further —Domine Leenaerts
Woe Is the Dangling Phrase

Dr. Grammatica on Misplaced Modifiers
T
The professor is not without appre-
hension as she submits to you a
lesson from her somewhat strange
and estranged sister who is a pseu-
doexpatriate living it up in Paris.
upsets the parrot, and makes many
trips each year to London to visit
her favorite pub, The Coughing Pig.
She has a Ph.D. degree in linguistics
from Oxford, but for some reason
I submit to you Dr. Grammatica’s
essay on dangling and misplaced
modifiers, a topic near and dear to
the professor’s heart.
Her name is Dr. Grammatica (the prefers not to speak of it. To some Woe Is the Dangling Phrase
ninny changed her name because extent, she shuns what she considers “Woe is the dangling phrase that
of an argument with your esteemed the haughtiness of the English (she’s hangeth in the airy paragraphical
professor over commas); she rides been tainted by the French point of firmament, describing nothing, con-
a motorcycle with a sidecar, owns a view), and she is especially contemp- fusing all who suffer to read, and
parrot named Mrs. Wiggins (the par- tuous of her highly regarded sister, leading to fervent frustration.”
rot often rides in the sidecar), prefers your own Prof. Grammar. —The lesser known poet
to watch rugby rather than American However, it’s clear that the doctor playwright, and taxidermist
football, never smokes because it secretly admires her sister’s admirable Josephine Grammatica, 1616, from
command of language rules and writ- the scandalous play Death of the
Digital Object Identifier 10.1109/MSSC.2009.935281 ing styles. With begrudging respect, Grammar Queen

Yes, even one of my nearly Example
famous ancestors knew the CONGRATULATIONS NEW SENIOR MEMBERS We sent the computers to our
pain of the dangling or mis- Eighteen Elected in September and Octoberr customers with Intel chips.
placed modifier. Chen-Hao Chang Taipei Section I suppose this writer could
Undoubtedly, we have all suc- William Cook Princeton/Central Jersey Section have meant that the custom-
cumbed to the allure of writing Wayne Dettloff Eastern North Carolina Section ers had Intel chips, but most
badly (except perhaps the haugh- Ping Gui Dallas Section likely the computers have the
ty Prof. G, who is insufferably Rex Hales Utah Section Intel chips. (I think everyone
perfect). If we wish to do more Marc Hutner Toronto Section should have a chip, except
than keep the meaning of our Bult Klaas Benelux Section perhaps Prof. G who thinks,
ideas to ourselves, we should en- Rolf Lagerquist Dallas Section no doubt, that she does not
deavor to destroy dangling and Thomas Morf Switzerland Section need one.) The prepositional
misplaced modifiers, wherever Zhong-Hua Li Santa Clara Valley Section phrase with Intel chips should
they are mis. . . .placed. Mike McGregor Santa Clara Valley Section be placed next to computers,
Chan Hong Park Santa Clara Valley Section not customers.
Dangling Modifiers Sreelal Pillai Kerala Section
You can create dangling modi- Kong-Pang Pun Hong Kong Section Rewrite
fiers when you do not pay L Simar Houston Section We sent the computers with
close attention to syntax (word Mark Sturza San Fernando Valley Section Intel chips to our customers.
order). Always place modifying Thomas Toifl Switzerland Section For the next example, we
words, phrases, and clauses Chao Xu Buenaventura Section must decide whether the author-
next to the words they are sup- ities should arrest Uncle Bob.
posed to modify. Uncle Bob gave the pie to
The dangling modifier is some- some sort of mechanical help. The the twins that he had dropped in the
times caused by a participial phrase author of this sentence was probably trash compactor.
followed by a passive independent referring to birds that soar, not peo- Ouch! Death by trash compactor.
clause. ple who soar. If you place the word Perhaps if Uncle Bob’s author had
people directly after the participial not misplaced the modifying phrase
Example phrase, then that phrase must mod- that he had dropped in the trash com-
Applying algorithms to large vol- ify people. However, the participial pactor, those children would be here to
umes of data, interesting values are phrase should modify birds. enjoy the pie.
discovered.
This sentence tells us that values Rewrite Rewrite
can apply algorithms to large vol- People have always envied birds that Uncle Bob gave the pie that he had
umes of data, as if the values were soar effortlessly through the air. dropped in the trash compactor to
scratching mathematical formulae We move the dangling phrase the twins.
on the white board, trying to solve next to birds. Also, notice that for Or
the mysteries of the universe. easier translation, we should use a Uncle Bob gave the twins the pie
relative pronoun clause instead of a that he had dropped in the trash
Rewrite participial phrase. compactor.
By applying algorithms to large vol- As someone quite famous once
umes of data, we can discover inter- Misplaced Modifiers said, “Without proper syntax, the tat-
esting values. “Misplace my phrase, and I’ll show tooed cow lives precariously.”
We repair the offending error by you a tattoo on my favorite cow.” Place your modifiers where they
adding someone or something that —Anonymous belong. As for me, it’s off to The
can perform the action. The pronoun Coughing Pig for a pint with my com-
we solves the problem. Though most scholars have no idea panion parrot, Mrs. Wiggins.
Here is an example of a dangling what this proverb means, we might
modifier without the passive con- take heed of the virtually implicit
struction. pseudowarning about misplac- This article is reprinted from the
Soaring effortlessly through the ing modifying words, phrases, and IEEE Professional Communication
air, people have always envied birds. clauses. Again, proper syntax is Society Newsletter vol. 46, no. 1,
Of course, people can soar through important: Place a modifier next to pp. 12–13, Jan./Feb. 2002.
the air. However, most would need the word it is supposed to modify.

CHAP TERS
SSCS Chapters Chair Jan Van der Spiegel

and DL Tom Lee Inaugurate Lehigh Valley Chapter
F
Forty people, including Chap-
ter members and volunteers, newly
appointed officers, members of the
p l a n ning committee, and guests
from local industry and area univer-
sities, celebrated the kickoff of the
Lehigh Valley Chapter of the IEEE Solid
State Circuits Society (SSCS) at Lehigh
University in Bethlehem, Pennsylva-
nia on 21 September 2009. To encour-
age a good turnout, invitations were
extended to SSCS and IEEE members
and students in the IEEE Lehigh Val-
ley Section, all SSCS members in IEEE
Region 2, as well as the members of
the new Princeton SSCS Chapter. The
leadership of our Chapter would like
to thank Alvin Loke, SSCS-Denver
Attendees and speakers at the inaugural meeting of SSCS-Lehigh Valley included (standing
cochair, for hours of phone conversa- from left) SSCS Chapters Chair Jan Van der Spiegel, SSCS DL Tom Lee, Chapter founder and
tions and dozens of e-mails regarding Chair Robert Peruzzi, Roger Minear (Chapter treasurer), and Kouros Azimi (Chapter secre-
inaugural meeting plans and advice tary); seated from left: Ian Rippke (Chapter vice chair), Dale Nelson, and Robert Walden.
on Chapter activities.
As SSCS-Lehigh Valley founder
and chair, I opened the meeting,
which featured an overview of IEEE
and SSCS organizational structure
by SSCS Chapters Chair Jan Van
der Spiegel and the lecture “Wire-
less Technology: Past, Present, and
Future” by SSCS DL Thomas Lee of
Stanford University.
Slideshow on IEEE and

SSCS Scope and Activities SSCS-Lehigh Valley Chapter Chair and
Dr. Van der Spiegel, a professor of SSCS Chapters Chair Jan Van der Spiegel founder Robert Peruzzi presents SSCS DL
electrical and systems engineering at addresses the inaugural meeting of the Tom Lee with a special memento in appre-
the University of Pennsylvania, high- Lehigh Valley Chapter. ciation for his talk at its inaugural meeting.
lighted the benefits of member partic-
ipation and congratulated the officers on its establishment, which became volunteers in the Chapters to organize
and founding members of the Chapter official on 14 May 2009. meaningful activities. Tracing the
Prof. Van der Spiegel pointed out that structure of the IEEE down to the Soci-
IEEE is one of the world’s largest vol- ety and Chapter level, he noted that the
Digital Object Identifier 10.1109/MSSC.2009.935266 unteer organizations and depends on scope of SSCS encompasses all aspects

FORMING THE LEHIGH VALLEY SSCS CHAPTER
Moving Beyond “You Know What? We Ought To...”
Picking up on an agenda item about increasing IEEE Council and coworkers in the Region had Secretary Kouros Azimi
section activity at a Lehigh Valley Section Execu- no need for a local Chapter because they saw Webmaster Richard Booth
tive Committee meeting last year, Bob Peruzzi each other every day. Today, SSCS members are
took a giant leap beyond his position as the scattered among a number of small employers in Companies Represented
annual Fellows Recognition Night and Dinner the Lehigh Valley and no longer interact. So the Agilent Technologies
Dance committee chair by agreeing to found a SSCS-Lehigh Valley group serves an important Anadigics, Inc
new SSCS Chapter. Society members within the purpose and aims to reach out to a wide audience. Infineon Technologies
Section had been talking about founding a Chap- Innovative Wireless Technologies
ter for several years, but hadn’t moved beyond Joint Events Planned with SSCS- Lattice Semiconductor
the “You know what? We ought to...” phase. Princeton Central New Jersey Chapter LGS Innovations
In the ensuing months, SSCS Chapters Chair Jan In response to the same need for network- LSI Corporation
Van der Spiegel, IEEE Regional and Geographic ing, another new SSCS Chapter in Princeton, Mobility Semiconductors
Activities Administrator Joseph Hale, and SSCS New Jersey, had its kickoff meeting only days Multiplex, Inc.
Administrator Katherine Olstein were very helpful. before that of Lehigh Valley SSCS. The two PMC-Sierra
Chapters, which straddle the border between R. Peruzzi Consulting, Inc.
Meeting Present-Day IEEE Regions 1 and 2, plan joint meetings from REF, LLC
Regional Networking Needs now on. We also anticipate that one or more RF Extreme
At the group’s first business meeting, attendees groups will arise in the Delaware River area in Wireless Microsystems Corporation
not only brainstormed ideas for activities but response to the same circumstances. Zarlink Semiconductor
also pondered “Why did we start this Chapter
only now?” Chapter Officers Colleges/Universities Represented
All agreed that back in the 1980s, AT&T Bell Chair Robert Peruzzi Lafayette College
Labs was about it in the Lehigh Valley for work- Vice Chair Ian Rippke Lehigh University
places in electronics. In those days, SSCS was an Treasurer Roger Minear University of Pennsylvania
“WIRELESS TECHNOLOGY: PAST, PRESENT, AND FUTURE”

BY SSCS DL THOMAS LEE OF STANFORD UNIVERSITY
Drawing on his exten- phones illustrated to me that commercial viabil- devices. If history is any guide, he said, this
sive knowledge of com- ity in wireless and most other electronic fields next age of wireless will offer great disrup-
munication history, Prof. is similar to the stock market, proceeding in a tions, and great opportunities, both techni-
Thomas Lee set the stage series of jumps that are random in timing inter- cal and entrepreneurial.
for his talk with a time line val and amplitude—unlike Moore’s law, which
of the technology behind is relatively steady on a log scale. Speculating —Paul C. Davis
Thomas Lee
communication growth, on timing, or spectacu-
interspersing well-known lar issues, in both elec-
early examples, including Marconi’s spark radio, tronics development
with much lesser known ideas. Especially inter- and the stock market
esting for me was a high-powered mechanical and can be costly and
radio frequency (100 kHz) generator that was a time consuming.
truly an “out of the box” creation. Prof. Lee made Eschewing predic-
note of the forgotten opinion-resistance that kept tions, Prof. Lee pointed
the threshold of popular acceptance for voice out that a new devel-
telephone below telegraph for decades; a later opment involves the
parallel that came to my mind, having participat- addition of objects to
ed in its early design, was the public reception wireless networks: The
of Picturephone Visual Telephone. Introduced in “Internet of things”
1969, Picturephone was not widely accepted un- has been talked about
til about 30 years later, in a completely different for years, but only re-
Alexanderson’s alternator, said Prof. Lee, was a mechanical RF
format, as the Webcam. cently has this term generator of high-frequency current that revolutionized radio
Selected statistics in Prof. Lee’s presentation explicitly included communication.” It is in the IEEE timeline of electrical and elec-
on the phenomenal growth of cellular tele- wirelessly connected tronic milestones. (Photo courtesy of Wikipedia.)

of solid-state circuits: design, testing,
NEW SSCS CHAPTERS FORMED IN 2009 and application of circuits and sub-
BRING WORLDWIDE TOTAL TO 72 systems and closely related topics in
Nanjing, China 21 January Prof. Qing An Huang, chair device technology and circuit theory.
Princeton/Central New Jersey 7 May Dr. Subramanian Naganathan, chair After outlining the history of the Soci-
Lehigh Valley 14 May Dr. Robert Peruzzi, chair ety, Prof. Van der Spiegel summarized
Macau 12 June Dr. Seng-Pan U, chair how SSCS has aided the evolution of
solid-state circuit technology and its
life-altering impact all over the world.
SSCS Chapters Growth
He concluded by summarizing the
72 Chapters
80 online recourses and references that
70 SSCS provides.
60 Attendees had the opportunity
50 to meet Prof. Lee and Prof. Van der
40 Spiegel before the meeting began
30 and to network during a social hour
20 with pizza, soft drinks, coffee, and
10 cookies. At the end of the meeting,
0 Prof. Lee was presented with a special
Jan. 1998
1997
June 1998
Jan. 1999
June 1999
Jan. 2000
June 2000
Jan. 2001
June 2001
Jan. 2002
June 2002
Jan. 2003
June 2003
Jan. 2004
June 2004
Jan. 2005
June 2005
Jan. 2006
June 2006
Aug. 2006
Feb. 2007
Sept. 2007
Oct. 2007
Dec. 2007
May 2008
Nov. 2008
Mar. 2009
May. 2009
June 2009
memento in appreciation for his visit.
—Robert Peruzzi
SSCS-Lehigh Valley Chapter Chair
IEEE/SSCS-Princeton/Central Jersey Chapter Formed in May 2009
T
The SSCS Chapter of the Princeton/ Administrator Katherine Olstein, Talks by SSCS DL Peter Kinget and
Central Jersey Section (PCJS) was IEEE Geographic and Regional Activi- SSCS Chapters Chair Jan Van der
established on 7 May 2009 as the ties Administrator Joseph Hale, Spiegel Spark First Meeting
result of a successful petition drive and Ashutosh Dutta, chair of IEEE Thanks to the efforts of Prof. David
spearheaded by several SSCS mem- PCJS, for their support. Daut of the Department of Electrical
bers who are industry profession-
als in the central New Jersey area.
I was motivated to start the group
after reading about the activities
of the India Council Chapter in
this magazine and by correspond-
ing with Dr. Kandala Chari, chair
of the SSCS India Council Chapter.
I had met Dr. Chari and SSCS Presi-
dent Willy Sansen previously at
the 2009 VLSI Design Conference
in Delhi.
On behalf of the Chapter, I would
like to thank SSCS Chapters Chair
Prof. Jan Van der Spiegel of the
University of Pennsylvania, SSCS
IEEE Princeton/Central Jersey Section chair, Ashutosh Dutta (at left), Prof. Jan Van Der Spiegel,
SSCS Chapters Chairs, SSCS DL Prof. Peter Kinget, Nagi Naganathan, SSCS Princeton/Central
Digital Object Identifier 10.1109/MSSC.2009.935267 Jersey Chapter chair, and Chapter members Walt Curtis, and Pravin Raghuwanshi.

of solid-state circuits: design, testing,
NEW SSCS CHAPTERS FORMED IN 2009 and application of circuits and sub-
BRING WORLDWIDE TOTAL TO 72 systems and closely related topics in
Nanjing, China 21 January Prof. Qing An Huang, chair device technology and circuit theory.
Princeton/Central New Jersey 7 May Dr. Subramanian Naganathan, chair After outlining the history of the Soci-
Lehigh Valley 14 May Dr. Robert Peruzzi, chair ety, Prof. Van der Spiegel summarized
Macau 12 June Dr. Seng-Pan U, chair how SSCS has aided the evolution of
solid-state circuit technology and its
life-altering impact all over the world.
SSCS Chapters Growth
He concluded by summarizing the
72 Chapters
80 online recourses and references that
70 SSCS provides.
60 Attendees had the opportunity
50 to meet Prof. Lee and Prof. Van der
40 Spiegel before the meeting began
30 and to network during a social hour
20 with pizza, soft drinks, coffee, and
10 cookies. At the end of the meeting,
0 Prof. Lee was presented with a special
Jan. 1998
1997
June 1998
Jan. 1999
June 1999
Jan. 2000
June 2000
Jan. 2001
June 2001
Jan. 2002
June 2002
Jan. 2003
June 2003
Jan. 2004
June 2004
Jan. 2005
June 2005
Jan. 2006
June 2006
Aug. 2006
Feb. 2007
Sept. 2007
Oct. 2007
Dec. 2007
May 2008
Nov. 2008
Mar. 2009
May. 2009
June 2009
memento in appreciation for his visit.
—Robert Peruzzi
SSCS-Lehigh Valley Chapter Chair
IEEE/SSCS-Princeton/Central Jersey Chapter Formed in May 2009
T
The SSCS Chapter of the Princeton/ Administrator Katherine Olstein, Talks by SSCS DL Peter Kinget and
Central Jersey Section (PCJS) was IEEE Geographic and Regional Activi- SSCS Chapters Chair Jan Van der
established on 7 May 2009 as the ties Administrator Joseph Hale, Spiegel Spark First Meeting
result of a successful petition drive and Ashutosh Dutta, chair of IEEE Thanks to the efforts of Prof. David
spearheaded by several SSCS mem- PCJS, for their support. Daut of the Department of Electrical
bers who are industry profession-
als in the central New Jersey area.
I was motivated to start the group
after reading about the activities
of the India Council Chapter in
this magazine and by correspond-
ing with Dr. Kandala Chari, chair
of the SSCS India Council Chapter.
I had met Dr. Chari and SSCS Presi-
dent Willy Sansen previously at
the 2009 VLSI Design Conference
in Delhi.
On behalf of the Chapter, I would
like to thank SSCS Chapters Chair
Prof. Jan Van der Spiegel of the
University of Pennsylvania, SSCS
IEEE Princeton/Central Jersey Section chair, Ashutosh Dutta (at left), Prof. Jan Van Der Spiegel,
SSCS Chapters Chairs, SSCS DL Prof. Peter Kinget, Nagi Naganathan, SSCS Princeton/Central
Digital Object Identifier 10.1109/MSSC.2009.935267 Jersey Chapter chair, and Chapter members Walt Curtis, and Pravin Raghuwanshi.

At the inaugural meeting of SSCS-Princeton/Central
Jersey, Prof. Jan Van der Spiegel, SSCS Chapters Chair,
noted that advances in solid-state circuits and ICs have
accounted for 18 of 30 life-changing advancements in
the past 30 years.
and Computer Engineering of the range from the Internet, laptops, and as design techniques for analog and
same university, our inaugural meet- mobile phones to genetically modi- RF circuits operating well below 1 V
ing was held at Rutgers University on fied plants over the last 30 years, have for low-power digital SoCs. He also
17 September 2009. been directly related to advances in pointed out how the space under the
Following my welcome address as solid-state circuits, and another eight inductors can be reclaimed to reduce
Chapter chair, Prof. Van der Spiegel have been indirectly related to ICs. cost and area and described how the
gave an overview of the SSCS, describ- Joining Prof. Van der Spiegel on the digital gates can facilitate self-calibra-
ing the scope of the Society’s interests program, SSCS DL Prof. Peter Kinget, tion for RF front ends to improve per-
and its administrative structure and associate professor in the Department formance and simplify design.
tracing its history since 1997 as the of Electrical Engineering of Columbia After stimulating questions from the
successor of the Solid-State Circuits University, gave a talk titled, “Design- audience, IEEE PCJS Chair Ashutosh
Council. The Society’s interests cover ing Analog and RF Circuits in Nano- Dutta presented mementos to Prof.
all aspects of solid-state circuits, scale CMOS Technologies: Scale the Jan Van der Spiegel and Prof. Peter
design, testing and application of sub- Supply, Reduce the Area, and Use Kinget as a token of appreciation.
systems, as well as closely related top- Digital Gates.” He presented recent
ics in device technology and circuit research that has centered around —Nagi Naganathan
theory, he said. In particular, Prof. three themes aimed at designing ana- LSI Corporation
Van der Spiegel noted that ten of the log and RF interface circuits in digi- PCJS/ SSCS Chapter Chair
top 30 life-changing innovations that tal nanoscale COS processes, as well [email protected]
8th IEEE International Conference on ASIC Held in Changsha, China

Administered by SSCS-Shanghai and Fudan University
I
IEEE ASICON is one of the most impor-
tant international integrated circuits design
conferences in China. Established in
1994, the 8th International Conference
on ASIC was held on 20–23 October
aims to provide a
forum for research-
ers, engineers, and
students working
in the fields of
2009 in Changsha, China. ASICON SOC/VLSI circuits design, EDA/CAD and Fudan University were in charge
technologies, and other related of the technical program and organi-
Digital Object Identifier 10.1109/MSSC.2009.935268 areas. The SSCS Shanghai Chapter zation in 2009.

At the inaugural meeting of SSCS-Princeton/Central
Jersey, Prof. Jan Van der Spiegel, SSCS Chapters Chair,
noted that advances in solid-state circuits and ICs have
accounted for 18 of 30 life-changing advancements in
the past 30 years.
and Computer Engineering of the range from the Internet, laptops, and as design techniques for analog and
same university, our inaugural meet- mobile phones to genetically modi- RF circuits operating well below 1 V
ing was held at Rutgers University on fied plants over the last 30 years, have for low-power digital SoCs. He also
17 September 2009. been directly related to advances in pointed out how the space under the
Following my welcome address as solid-state circuits, and another eight inductors can be reclaimed to reduce
Chapter chair, Prof. Van der Spiegel have been indirectly related to ICs. cost and area and described how the
gave an overview of the SSCS, describ- Joining Prof. Van der Spiegel on the digital gates can facilitate self-calibra-
ing the scope of the Society’s interests program, SSCS DL Prof. Peter Kinget, tion for RF front ends to improve per-
and its administrative structure and associate professor in the Department formance and simplify design.
tracing its history since 1997 as the of Electrical Engineering of Columbia After stimulating questions from the
successor of the Solid-State Circuits University, gave a talk titled, “Design- audience, IEEE PCJS Chair Ashutosh
Council. The Society’s interests cover ing Analog and RF Circuits in Nano- Dutta presented mementos to Prof.
all aspects of solid-state circuits, scale CMOS Technologies: Scale the Jan Van der Spiegel and Prof. Peter
design, testing and application of sub- Supply, Reduce the Area, and Use Kinget as a token of appreciation.
systems, as well as closely related top- Digital Gates.” He presented recent
ics in device technology and circuit research that has centered around —Nagi Naganathan
theory, he said. In particular, Prof. three themes aimed at designing ana- LSI Corporation
Van der Spiegel noted that ten of the log and RF interface circuits in digi- PCJS/ SSCS Chapter Chair
top 30 life-changing innovations that tal nanoscale COS processes, as well [email protected]
8th IEEE International Conference on ASIC Held in Changsha, China

Administered by SSCS-Shanghai and Fudan University
I
IEEE ASICON is one of the most impor-
tant international integrated circuits design
conferences in China. Established in
1994, the 8th International Conference
on ASIC was held on 20–23 October
aims to provide a
forum for research-
ers, engineers, and
students working
in the fields of
2009 in Changsha, China. ASICON SOC/VLSI circuits design, EDA/CAD and Fudan University were in charge
technologies, and other related of the technical program and organi-
Digital Object Identifier 10.1109/MSSC.2009.935268 areas. The SSCS Shanghai Chapter zation in 2009.

From left: Huihua Yu (ASICON 2009 Organizing Committee cochair), Xiaoyang Zeng (Technical Program Committee cochair), Masaharu Imai
of Osaka University, Richard M.M. Chen and Ting-Ao Tang (General cochairs), Chong-Min Kyung, Martin Wong (Technical Program Committee
cochair), keynote speaker Frank Chang of UCLA, Cheng-Wen Wu, and Bin Zhao.
The conference received 552 papers

from 17 countries and areas, breaking
a previous record. Among them, 450
papers were submitted from universi-
ties, representing 82% of the total; 102
papers were submitted from industries
and institutes, representing 18%. One
hundred and sixty contributed papers
and 41 invited papers were accepted
for oral presentation in five parallel
sessions. More than 300 attendees
from 18 countries and areas attended
the conference. Among them, 140 are
IEEE members.
The seven ASICON 2009 tutorials and
additional information about the con-
ference is available on the its Web site
//www. asicon2009.com/index.htm.
Student Paper Awardees

The ASICON 2009 Excellent Student
Papers award winners announced at
Plenary audience at ASICON 2009. the closing banquet were:

■ Ying-Khai Teh (Multimedia Uni-
versity, Malaysia), “Development
of CMOS UHF RFID Modulator and
Demodulator Using DTMOST Tech-
niques”
■ Xiong Liu (UCLA), “A 1.5 GHz Linear-
in-dB Variable Gain Amplifier with
Process and Temperature Tracking
in 0.18-mm CMOS”
■ Sanad Bushnaq (University of To-
kyo), “All Digital Wireless Trans-
ceiver Using Modified BPSK and 2/3
Sub-sampling Technique”
■ Simeng Li (Fudan University), “A
Low Power 4K Point FFT for CMMB
OFDM Receiver System”
■ Marie Engelene Jimenez Obien
(Nara Institute of Science and Tech-
Attendees at the ASICON 2009 poster session.
nology, Japan), “F-Scan: An Ap-
proach to Functional RTL Scan for
Assignment Decision Diagrams” ■ Tian, Hammami [École Nationale The 9th IEEE International Confer-
■ Qing Liu from Waseda (University Supérieure de Techniques Avancées ence on ASIC (IEEE ASICON 2011) will
of Japan), “A Switched-Inductor (ENSTA), France], “Automatic Par- be held in October 2011.
Based VCO with an Ultra-wideband allelization Experiments on 16PE —Ting-Ao Tang
Tuning Range of 87.6%” NOC Based MPSOC.” Chair, SSCS-Shanghai
Fourth Annual ACISC Cosponsored by SSCS-Central Texas
A
Affiliated with the Austin Conference
on Integrated Systems and Circuits
(ACISC) since its inception, the Cen-
tral Texas Section of the Solid-State
Circuits Society cosponsored its 2009
meeting for a third consecutive year
on 26–27 October. With IEEE Members
paying only US$150 for early registra-
tion (which included two lunches and
a cocktail reception on opening night
in addition to the technical sessions),
ACISC was a downright bargain.
Approximately 130 attendees from 14
universities, 18 companies, six states,
and four countries gathered at the J.J.
Pickle Research Center in Austin to
hear 31 papers presented in eight con-
current tracks:
■ two analog
■ three CAD
■ one digital
Keynote speakers at ACISC 2009 in Austin, Texas, were Ken Hansen and Krisztián Flautner
(from left, top row). Tutorials were presented by Gary Carpenter, Harish Krishnaswamy, and
Digital Object Identifier 10.1109/MSSC.2009.935269 Andreas Gerstlauer (from left, bottom row).

■ Ying-Khai Teh (Multimedia Uni-
versity, Malaysia), “Development
of CMOS UHF RFID Modulator and
Demodulator Using DTMOST Tech-
niques”
■ Xiong Liu (UCLA), “A 1.5 GHz Linear-
in-dB Variable Gain Amplifier with
Process and Temperature Tracking
in 0.18-mm CMOS”
■ Sanad Bushnaq (University of To-
kyo), “All Digital Wireless Trans-
ceiver Using Modified BPSK and 2/3
Sub-sampling Technique”
■ Simeng Li (Fudan University), “A
Low Power 4K Point FFT for CMMB
OFDM Receiver System”
■ Marie Engelene Jimenez Obien
(Nara Institute of Science and Tech-
Attendees at the ASICON 2009 poster session.
nology, Japan), “F-Scan: An Ap-
proach to Functional RTL Scan for
Assignment Decision Diagrams” ■ Tian, Hammami [École Nationale The 9th IEEE International Confer-
■ Qing Liu from Waseda (University Supérieure de Techniques Avancées ence on ASIC (IEEE ASICON 2011) will
of Japan), “A Switched-Inductor (ENSTA), France], “Automatic Par- be held in October 2011.
Based VCO with an Ultra-wideband allelization Experiments on 16PE —Ting-Ao Tang
Tuning Range of 87.6%” NOC Based MPSOC.” Chair, SSCS-Shanghai
Fourth Annual ACISC Cosponsored by SSCS-Central Texas
A
Affiliated with the Austin Conference
on Integrated Systems and Circuits
(ACISC) since its inception, the Cen-
tral Texas Section of the Solid-State
Circuits Society cosponsored its 2009
meeting for a third consecutive year
on 26–27 October. With IEEE Members
paying only US$150 for early registra-
tion (which included two lunches and
a cocktail reception on opening night
in addition to the technical sessions),
ACISC was a downright bargain.
Approximately 130 attendees from 14
universities, 18 companies, six states,
and four countries gathered at the J.J.
Pickle Research Center in Austin to
hear 31 papers presented in eight con-
current tracks:
■ two analog
■ three CAD
■ one digital
Keynote speakers at ACISC 2009 in Austin, Texas, were Ken Hansen and Krisztián Flautner
(from left, top row). Tutorials were presented by Gary Carpenter, Harish Krishnaswamy, and
Digital Object Identifier 10.1109/MSSC.2009.935269 Andreas Gerstlauer (from left, bottom row).

■ one architecture the innovation pipeline in embedded tion between software, architecture,
■ one process technology. electronics and presents a vision for and circuit features.
In addition, there were ten posters, growth driven by semiconductors.
two keynote addresses, and three The premise of a second keynote, Tutorials on 3-D-VLSI,
tutorials. A healthy discussion on “Lighting Up Dark Silicon,” by Krisztián Analog Performance
the state of high tech in “the Silicon Flautner, vice president of research Breakthroughs, and MPSoC
Hills,” as the Austin design commu- and development, ARM Ltd was that A tutorial titled “Coming Soon! VLSI in
nity is known, and cocktails con- with today’s chips already pushing the 3-D. . . (Design and Methodology Con-
cluded the opening day. power envelope to the limit, as silicon siderations of 3-D Integration),” by
scales to 22 nm over the next decade, Gary Carpenter, IBM Austin Research
Keynote Addresses by only a small fraction of the silicon can Laboratory, surveyed state of the art in
Industry Veterans be practically used. As a result, archi- three-dimensional design and the chal-
Ken Hansen, Senior Fellow and vice tectural and other innovations will be lenges bringing this technology into
president and chief technology officer required to fully enable the use of all the mainstream.
of Freescale Semiconductor, delivered the silicon at our disposal. Analog engineers attended a second
the opening keynote address “Tech- Abstract: Silicon technology ev- tutorial on “Silicon-based Millimeter-
nology and Markets: A Vision for olution over the last four decades has Wave Multiple-Antenna Transceivers:
Growth.” yielded an exponential increase in From Beamforming to Baseband,”
Abstract: As economies the world integration densities with steady im- presented by Harish Krishnaswamy
over seek to overcome the recent provements in performance and power of Columbia University, while digital
downturn, the primary engine that consumption at each technology gener- brethren learned about the challeng-
will drive growth will be technologi- ation. This progress has created a sense es of “Designing Multi-Processor and
cal innovations. Three fundamental of entitlement for the riches that fu- Multi-Core Systems-on-Chip,” present-
market forces are shaping the market ture process generations would bring. ed by Andreas Gerstlauer, assistant
today and forseeably into the future: Today, however, classical process scal- professor at the University of Texas
health and safety, going green, and ing seems to be dead, and living up at Austin.
the net effect. These market trends to technology expectations requires More abstracts, biographies, and
and their derivatives will provide new continuous innovation at many levels, general information may be found on
growth opportunities for semicon- along with steadily progressing imple- the ACISC home page, http://www.
ductors and will also require innova- mentation and design costs. Solutions acisc.org/.
tion to provide value along different to problems need to cut across layers —Mike Seningen
dimensions. This keynote addresses of abstractions and require coordina- Chair, SSCS-Central Texas
14th Annual DIPED Workshop Celebrates 90th Birthday

of Founder Boris Z. Katsenelenbaum
T
The XIVth International Seminar/
Workshop on Direct and Inverse Prob-
lems of Electromagnetic and Acoustic
Wave Theory (DIPED 2009), spon-
sored by the IEEE MTT/ED/AP/CPMT/
scientists from Moscow, Tbilisi, and
Lviv. The workshop went on to attract
participants from various cities for
such a long time that it turned into
an international event. This year,
SSC-West Ukraine Chapter, took place DIPED was dedicated to Prof. Katsenel-
21–24 September 2009 at the Institute enbaum in celebration of his 90th
of Applied Problems of Mechanics birthday; he has contributed articles
and Mathematics in Lviv, Ukraine. to the programs of almost all its meet-
Established in 1982 at the initia- Prof. Boris Z. Katsenelenbaum at work, in
ings, and he has been a staunch sup-
tive of Prof. Boris Z. Katsenelenbaum Nahariya, Israel in 2005. porter of DIPED ever since it began.
from the Institute of Radiotechnique For the past ten years, Prof.
and Electronics, Moscow, DIPED began Katsenelenbaum has been living
Digital Object Identifier 10.1109/MSSC.2009.935270 as an informal annual meeting of in Israel as a result of destiny and

■ one architecture the innovation pipeline in embedded tion between software, architecture,
■ one process technology. electronics and presents a vision for and circuit features.
In addition, there were ten posters, growth driven by semiconductors.
two keynote addresses, and three The premise of a second keynote, Tutorials on 3-D-VLSI,
tutorials. A healthy discussion on “Lighting Up Dark Silicon,” by Krisztián Analog Performance
the state of high tech in “the Silicon Flautner, vice president of research Breakthroughs, and MPSoC
Hills,” as the Austin design commu- and development, ARM Ltd was that A tutorial titled “Coming Soon! VLSI in
nity is known, and cocktails con- with today’s chips already pushing the 3-D. . . (Design and Methodology Con-
cluded the opening day. power envelope to the limit, as silicon siderations of 3-D Integration),” by
scales to 22 nm over the next decade, Gary Carpenter, IBM Austin Research
Keynote Addresses by only a small fraction of the silicon can Laboratory, surveyed state of the art in
Industry Veterans be practically used. As a result, archi- three-dimensional design and the chal-
Ken Hansen, Senior Fellow and vice tectural and other innovations will be lenges bringing this technology into
president and chief technology officer required to fully enable the use of all the mainstream.
of Freescale Semiconductor, delivered the silicon at our disposal. Analog engineers attended a second
the opening keynote address “Tech- Abstract: Silicon technology ev- tutorial on “Silicon-based Millimeter-
nology and Markets: A Vision for olution over the last four decades has Wave Multiple-Antenna Transceivers:
Growth.” yielded an exponential increase in From Beamforming to Baseband,”
Abstract: As economies the world integration densities with steady im- presented by Harish Krishnaswamy
over seek to overcome the recent provements in performance and power of Columbia University, while digital
downturn, the primary engine that consumption at each technology gener- brethren learned about the challeng-
will drive growth will be technologi- ation. This progress has created a sense es of “Designing Multi-Processor and
cal innovations. Three fundamental of entitlement for the riches that fu- Multi-Core Systems-on-Chip,” present-
market forces are shaping the market ture process generations would bring. ed by Andreas Gerstlauer, assistant
today and forseeably into the future: Today, however, classical process scal- professor at the University of Texas
health and safety, going green, and ing seems to be dead, and living up at Austin.
the net effect. These market trends to technology expectations requires More abstracts, biographies, and
and their derivatives will provide new continuous innovation at many levels, general information may be found on
growth opportunities for semicon- along with steadily progressing imple- the ACISC home page, http://www.
ductors and will also require innova- mentation and design costs. Solutions acisc.org/.
tion to provide value along different to problems need to cut across layers —Mike Seningen
dimensions. This keynote addresses of abstractions and require coordina- Chair, SSCS-Central Texas
14th Annual DIPED Workshop Celebrates 90th Birthday

of Founder Boris Z. Katsenelenbaum
T
The XIVth International Seminar/
Workshop on Direct and Inverse Prob-
lems of Electromagnetic and Acoustic
Wave Theory (DIPED 2009), spon-
sored by the IEEE MTT/ED/AP/CPMT/
scientists from Moscow, Tbilisi, and
Lviv. The workshop went on to attract
participants from various cities for
such a long time that it turned into
an international event. This year,
SSC-West Ukraine Chapter, took place DIPED was dedicated to Prof. Katsenel-
21–24 September 2009 at the Institute enbaum in celebration of his 90th
of Applied Problems of Mechanics birthday; he has contributed articles
and Mathematics in Lviv, Ukraine. to the programs of almost all its meet-
Established in 1982 at the initia- Prof. Boris Z. Katsenelenbaum at work, in
ings, and he has been a staunch sup-
tive of Prof. Boris Z. Katsenelenbaum Nahariya, Israel in 2005. porter of DIPED ever since it began.
from the Institute of Radiotechnique For the past ten years, Prof.
and Electronics, Moscow, DIPED began Katsenelenbaum has been living
Digital Object Identifier 10.1109/MSSC.2009.935270 as an informal annual meeting of in Israel as a result of destiny and

Lali Bibilashvili received the Best Young
Speaker Award from Organizing Committee
Chair Prof. Nikolai N. Voitovich at the tradi-
tional DIPED seminar/workshop dinner. Participants in the XIVth annual DIPED Seminar at High Castle height in Lviv.
circumstance. Despite being physi- by scientists from China, Georgia, of the Periodic Ferrite-Dielectric
cally isolated from his life-long India, Israel, Poland, Russia, Turkey, Structure Bounded with the Semi-
scientific community, it is amazing the United States, and Ukraine, conductor Media”
that he has continued to work inten- grouped into eight sections: ■ Sergiy Alexin (Dniepropetrovsk Na-
sively. His articles have appeared ■ theoretical aspects of electrody- tional University, Ukraine) for “In-
regularly in scientific journals and namics verse Problem Solving for Layered
three published books, while a ■ scattering and diffraction Dielectric Structure Using Newton-
fourth is in preparation. ■ propagation in complex media Kantorovich Iterative Scheme with
Prof. Katsenelenbaum headlined ■ waveguide and photonic crystal Increased Accuracy”
the DIPED 2009 plenary session, structures ■ Evgeniy Antonenko (V.N. Karaz-
speaking online from Nahariya, Israel ■ inverse problems and synthesis in Kharkov National University,
on “The Problems We Choose,” dedi- ■ antennas and antenna arrays Ukraine) was granted the special
cated to the ethical problems of sci- ■ numerical methods Prof. Boris Z. Katsenelenbaum’s
entific work. ■ acoustics: theory and applications. Award, established by Organizing
In a presentation that followed, Committee Chair Prof. Nikolai N.
“Contributions of B.Z. Katsenel- Student Research Awards Voitovich, for the presentation “The
enbaum’s Theory into High Power The DIPED Organizing Commit- Cellphone Antenna Test Results.”
Microwave Electronics,” Prof. Mikhail tee traditionally pays significant Social events at DIPED 2009 in-
I. Petelin of the Institute of Applied attention to encouraging young cluded a tour around the city of
Physics, RAS, Nizhny Novgorod, Rus- scientists and students by award- Lviv, known as the architectural
sia, discussed the elegant innovations ing prizes for outstanding papers “pearl of Europe,” due to its many
introduced by Prof. Katsenelenbaum and presentations. This year, the sites dating back to the 13th cen-
into theoretical electrodynamics that following young researchers were tury. At the DIPED 2009 banquet,
have been used in the development of recognized: original Ukrainian dishes and splen-
high power microwave (HPM) genera- ■ Lali Bibilashvili (Tbilisi State Uni- diferous drinks contributed to the
tors and amplifiers. Driven today by versity, Tbilisi, Georgia) for “Re- intimate friendship of participants
high-current electron accelerators, lationship Between Temperature and guests.
HPM generators produce gigawatt Rises with SAR in a Head Tissue in The next DIPE D Semina r a nd
RF pulse powers thanks to research Bandwidth Exposure” Workshop will be held at Tbilisi State
building upon the theories of Prof. ■ Lyubomyr Kapko (Physico-Me- University, Tbilisi, Georgia, 27–30
Katsenelenbaum. chanical Institute, NASU, Lviv, September 2010.
Ukraine) for “Microwave Testing of
International Contributors Exfoliation in a Dielectric Plate” —Dr. Mykhaylo I. Andriychuk
Offer 60 Papers ■ Olga Kostylyova (Institute of Radio- DIPED-2009 Seminar/Workshop
DIPED’s technical program in 2009 in- physics, NASU, Kharkiv, Ukraine) Organizing Committee Secretary
cluded four invited talks and 60 papers for “Surface Waves on the Interface

SOC IET Y N E WS
Bernstein, Lee, Corcoran, Redman-White,

and Stetzler Elected to SSCS AdCom
I
In November 2009, IEEE Solid-
State Circuits Society (SSCS) mem-
bers selected Kerry Bernstein, Bill
Redman-White, and Trudy Stetzler
to join the Society’s AdCom, and
Throughout his career, Bernstein
had the privilege of participating in
the teams developing and introduc-
ing fundamental device and inter-
connect technologies to our indus-
Stanford University in 1970. From
1969 to 1999 he was with Hewlett-
Packard (HP) Company, first at
the Santa Clara Instrument Division,
then at HP Laboratories in Palo Alto,
reelected John J. Corcoran and try including NMOS, CMOS, partially California. His work at HP focused on
H.S. (Harry) Lee to continue as vot- depleted silicon-on-insulator devic- integrated circuit design in bipolar,
ing members, from 1 January 2010 es, and copper/low-K interconnects. CMOS, BiCMOS, CCD, GaAs MESFET,
through 31 December 2012. He holds 106 U.S. patents in the and GaAs HBT technologies. Since
All Society members, including areas of high-performance circuits 2000, he has been manager of the
students, were eligible to vote. and technology and coauthored two Mixed-Signal Electronics Department
college textbooks with colleague and at Agilent Laboratories, which devel-
Kerry Bernstein is a friend Norman Rohrer, as well as ops high-performance integrated cir-
principal engineer at approximately 100 papers or book cuits for test instrumentation.
Applied Research As- chapters on high-speed/low-power Corcoran has published numerous
sociates. His research CMOS. He attributes any success he papers on high-speed A/D conver-
interests are in the has enjoyed in large part to working sion and A/D testing, and was coau-
areas of emerging with wonderful, talented people. Mr. thor of the paper “A 1-GHz 6-bit ADC
device/circuit architectures for post- Bernstein has served on the program System,” which received the 1987–
CMOS high-performance computing; committees of the IEEE International 1988 IEEE Journal of Solid-State Cir-
3-D integration; and neuromorphic Solid-State Circuits Conference (ISSCC) cuits Best Paper Award. He received
computing. He spent 31 years at IBM and the Symposium on VLSI Design. the 1988 International Solid-State
and was a senior technical staff mem- He derives fulfillment as an industrial Circuits Conference (ISSCC) Best Eve-
ber at the T.J. Watson Research Center, mentor for students and researchers ning Panel Award and the 1992 ISSCC
Yorktown Heights, New York. at SEMATECH, SRC/MARCO, DARPA, Beatrice Winner Award for Editorial
Bernstein received the B.S. de- and for high school students interest- Excellence. He has served as a guest
gree in electrical engineering from ed in math, science, and engineering editor for IEEE Journal of Solid-State
Washington University in St. Louis. careers. Bernstein is a staff instruc- Circuits and was secretary of the IEEE
Bernstein’s work has bridged chip tor of computational neuroscience at Solid-State Circuits Council from
technology and circuit design, ex- RUNN/Marine Biological Laboratories, 1994 to 1997. He has also served
ploring the technology sensitivities Woods Hole, Massachusetts and an on the technical program committee
of high performance CMOS circuit operations officer in the Headquarters of ISSCC and on the advisory com-
topologies; the mitigation of delay Battalion of the Vermont State Guard. mittee of the IEEE SSCS. In 2001, he
variability in design; and the circuit He and his family live in northern Ver- was named a Fellow of the IEEE for
responses to single-event upsets. mont. He is an IEEE Fellow. contributions to high-performance
He served as lead technologist for analog-to-digital converters.
IBM’s POWER Server series and for John J. Corcoran
IBM’s PowerPC microprocessor fam- received the B.S. de- Hae-Seung (Harry)
ily. He also supervised technology gree in electrical en- Lee received the
application for IBM’s highest perfor- gineering from the Ph.D. degree in elec-
mance external foundry customers. University of Iowa trical engineering
in 1968 and the M.S. from the University of
Digital Object Identifier 10.1109/MSSC.2009.935271 degree in electrical engineering from California, Berkeley,

in 1984, where he developed the first has also worked for Philips in San as they all seem somewhat unreason-
self-calibration technique for A/D Jose, California from 2001 to 2003 ably clever. During a recent ISSCC,
converters. Since 1984, he has been and in Caen, France, in 1999. Within however, he did receive the compli-
with the Department of Electrical NXP/Philips, he has worked on a wide ment that he might make a good game
Engineering and Computer Science, range of projects and products, cov- show host.
Massachusetts Institute of Technolo- ering optical storage, WLAN, WiMax,
gy, Cambridge, where he is now a pro- Bluetooth, CDMA and GSM cellular, Trudy Stetzler re-
fessor and the director of the Center digital audio, analog, and digital TV, ceived the B.S de-
for Integrated Circuits and Systems. satellite TV baseband, high-speed se- gree in electrical
His research interests are in the areas rial data links, and wireless car secu- en gineering from
of analog integrated circuits, particu- rity. He was previously with Motorola, Pennsylvania State
larly analog-to-digital converters in Geneva, working on telecom, GEC- University in 1984,
scaled CMOS technologies. Marconi Research London, working the M.S. degree in electrical engineer-
From 1985 to 1999, he was a con- on aerospace ICs, and Post Office Tele- ing from the University of California,
sultant to Analog Devices. In 1999, he communications, London, working on Berkeley, in 1985, and executive M.B.A.
cofounded SMaL Camera Technology, digital line communications. from the Wharton School, University
in Cambridge, Massachusetts. Since Concurrent with his industrial ac- of Pennsylvania, in 1997. From 1985 to
2005, he has been on the technol- tivities, Prof. Redman-White has also 1997 she was with AT&T Bell Laborato-
ogy advisory committee of Samsung held an academic position at South- ries as a technical staff member and
Electronics and the technology advi- ampton University, United Kingdom. was promoted to distinguished mem-
sory board of Cypress Semiconduc- He joined the faculty in 1983, be- ber of technical staff in 1995. During
tor. Prof. Lee is a recipient of the came a full professor in 1998; his her career at Bell Laboratories, she
1988 Presidential Young Investiga- research and teaching centers on led the development of several mixed
tors’ Award from President Ronald analog and RF design. His circuit re- signal IC designs for telecommunica-
Reagan and a corecipient of the 2002 search has covered RF and continu- tions applications and RF IC designs
ISSCC Jack Kilby Award for Outstand- ous and sampled techniques, and he for mobile phones. In 1997, Stetzler
ing Student Paper. He was also listed has published early work on digital joined Texas Instruments (TI) Incor-
in the ISSCC 50-Year Anniversary Au- calibration of analog filters for com- porated as a senior member of the
thor Honor Roll as one of the top 50 munications and noise shaping as technical staff. Her responsibilities
contributors of technical papers at well as design in mainstream CMOS. at TI initially involved investigating
ISSCC between 1954 and 2003. His group has undertaken work on new markets for TI DSP devices. Since
Prof. Lee has served on a number small signal characterization, com- 1999, her work has focused on digital
of technical program committees for pact modeling, and special circuit broadcast radio standards and devel-
various IEEE conferences, including techniques for the realization of opment of TI’s digital radio solutions.
the International Electron Devices analog circuits in silicon on insulator She is currently a distinguished mem-
Meeting, the International Solid-State CMOS. Prof. Redman-White has pub- ber of the technical staff at TI.
Circuits Conference, the Custom In- lished about 120 papers in IEEE jour- Ms. Stetzler is currently the chair
tegrated Circuits Conference, and nals and conferences. He has around of the ISSCC Wireless Subcommittee.
the IEEE Symposium on VLSI Circuits. 15 patents currently active, with sev- She was on the steering team for the
From 1992 to 1994, he was an asso- eral pending. He served as associate Custom Integrated Circuits Confer-
ciate editor for IEEE Journal of Solid- editor for IEEE Journal of Solid-State ence (CICC) from 2003 to 2008, where
State Circuits. He has also authored Circuits from 1996 to 2002 and as she served as technical program chair
or coauthored more than 100 journal guest editor in 1995. He has been ac- (2003), conference chair (2004), and
and conference papers and is a Fel- tive in the ISSCC for many years and general chair (2005). She was also the
low of IEEE for contributions to CMOS is currently the analog subcommit- CICC educational session chair for the
high-accuracy data converters. tee chair. He has twice been techni- 2001 and 2002 conferences. While at
cal program chair of the European AT&T, she served as the chair, vice-
William Redman- Solid State Circuits Conference (1997 chair, secretary, and student activities
White has been with and 2008) and is a member of the chair for the IEEE Lehigh Valley Section.
NXP Semiconductors steering committee for the European She has four patents and has published
(and its precursor, Solid State Circuits and Devices Con- seven papers and two chapters in the
Philips Semiconduc- ference series (ESSCIRC/ESSDERC). book The Application of Programmable
tors) since 1990 as Working and associating with so DSPs in Mobile Communications (Alan
a fellow, specializing in analog and many clever and pleasant people over Gatherer and Edgar Auslander, editors).
RF design. He is currently based in the years has been inspirational but
Southampton, United Kingdom, but at the same time slightly depressing, (Continued on page 75)

IEEE NEWS
CEDA Currents
T
The following is reprinted from CEDA 2) “Hardware Resource Virtualiza- night on 31 March 2009. The most
Currents, November 2009 issue, a tion for Dynamically Partially successful teams and their results
publication of the IEEE Council on Reconfigurable Systems,” by were:
Electronic Design Automation. C.-H. Huang and P.-A. Hsiung ■ TeleTitanium: D.L. Rosenband and
3) “Temperature Driven Time Syn- T. Rosenband

ICCAD 2009 chronization,” by T. Schmid, Z. • Speedup — absolute : 53,0 6 4
The International Conference on Charbiwala, R. Shea, and M.B. (first place); normalized: NA
Computer-Aided De sign (ICCAD) Srivastava ■ Team MIT: A. Agarwal, N. Dave, K.
(held 2–5 November 2009 in San 4) “ASIP-Based Universal Demap- Fleming, A. Khan, M. King, M. Ng,
Jose, California) is the premier con- per for Multiwireless Standards,” and M. Vijayaraghavan
ference devoted to technical innova- by A.R. Jafri, A. Baghdadi, and • Speedup —normalized: 3,381
tions in design automation. ICCAD’s M. Jezequel (first place); absolute: 3,381
program of technical papers, tutori- (third place)
als, keynotes, and panels highlights The standouts this year in the abso-
the most important current and lute-performance competition were
future research challenges in com- the GPU-based entries, which achieved
puter-aided design. high performance using Compute
ICCAD also features a day of col- Unified Device Architecture (CUDA)
located workshops on hot topics programming. However, a well-crafted
and several side meetings and social 5) “Verification of Synchronous Elas- FPGA-based design won the normal-
events, providing plenty of opportu- tic Processors,” by S.K. Srinivasan, ized-performance contest, despite
nities for networking with colleagues K. Sarker, and R.S. Katti. running on the comparatively under-
and friends. For more details, go to //ieeex- powered XUPV2P platform. The win-
ICCAD 2009 received 438 world- plore.ieee.org/xpl/topAccessedAr- ning teams received US$1,000 prizes
wide submissions, and the technical ticles.sp?punumber=4563995. from the contest sponsors.
program committee selected the best Philip Jones (Iowa State Univer-
115 papers. In addition, this year’s Results of the 2009 sity) incorporated the contest into
program featured several embedded Memocode Codesign Contest his graduate-level design course. A
tutorials, as well as two designer ses- The 2009 Memocode Codesign Con- month of the course was dedicated
sions. Up-to-date details are avail- test asked participants to implement to the competition. He found the
able at //www.iccad.com. a system that computed values of an experience quite valuable and plans
—Jajjeet Roychowdhury N 3 N grid in polar coordinates by to participate again next year.
[email protected] interpolating values from an N 3 N —Forrest Brewer
grid in Cartesian coordinates. Grid [email protected]
IEEE Embedded Systems Letters’ size varied from ten to 1,000 points.
Most-Accessed Articles A reference design by Rachata Ausa- Results of the 2009 CAV Award
(September 2009) varungnirun (Carnegie Mellon Uni- The annual Computer-Aided Veri-
1) “Optimizing Bandwidth of Call versity) was released at the start of fication (CAV) Award recognizes a
Traces for Wireless Embedded the contest. specific fundamental contribution,
Systems,” by R. Shea, M.B. Srivas- Twenty-two teams from around or a series of outstanding contribu-
tava, and Y. Cho the world downloaded the contest tions, to the field of computer-aided
materials and registered teams. verification.
Ultimately, five teams submitted fin- On 29 June 2009, at the 21st Inter-
Digital Object Identifier 10.1109/MSSC.2009.935272 ished and verified solutions by mid- national Conference on CAV in

IEEE Embedded Systems Letters is open
for submissions. Visit: mc.manuscriptcentral.
com/les-ieee.
se lected Bryant for the award

because of his seminal technologi-
cal breakthroughs in the area of for-
mal verification.
Bryant’s research has focused
on methods for formally verifying
digital hardware and some forms
of software. Notably, he devel-
Winners of the 2009 CAV Award at its annual banquet (from left), Lintao Zhang, Joao oped efficient algorithms based
Marques-Silva, and Karem Sakallah, with CAV award committee member Joseph Sifakis. on ordered binary decision dia-
grams (OBDDs) to manipulate the
Grenoble, France, the 2009 CAV Founded in 1989 by Edmund M. logic functions that form the basis
Award was presented to seven indi- Clarke, Robert P. Kurshan, Amir of computer designs. OBDDs form
viduals: Conor F. Madigan (Kate- Pnueli, and Joseph Sifakis, the first the computational basis for tools
eva Inc.), Sharad Malik (Princeton CAV conference was hosted in 1989 that perform hardware verification,
University), Joao P. Mar ques-Silva in Grenoble, France. Since then, it logic circuit synthesis, and test
(University College Dublin), Mat- has been held at various sites in generation. Bryant’s work revolu-
thew W. Moskewicz (University North America, Europe, and the tionized the field, enabling reason-
of California, Berkeley), Karem A. Middle East. ing about large-scale circuit designs
Sakallah (University of Michigan, —Randal E. Bryant for the first time.
Ann Arbor), Lintao Zhang (Micro- [email protected] Gradually, Bryant’s focus shifted
soft Research), and Ying Zhao (Wuxi from simulation, which tests a
Capital Group). IEEE CEDA Phil Kaufman Award design for a representative set of
The CAV conference steering com- Randal E. Bryant (dean and univer- cases, to formal verification, which
mittee established the CAV Award in sity professor of the School of Com- ensures that a design operates cor-
2008, and it was given this year for puter Science at Carnegie Mellon rectly under all possible conditions.
the second time. This year’s award University) was selected to receive It was in this context that he devel-
included a US$10,000 prize and was the 2009 Phil Kaufman Award for oped his OBDD-based algorithms.
presented with the citation: “For fun- his impact on theory and practice His OBDD data structure provides a
damental contributions to the devel- of EDA. way to represent and reason about
opment of high-performance Bool- The Electronic Design Automa- Boolean functions.
ean satisfiability solvers.” tion Consortium and the IEEE Coun- The Phil Kaufman Award, pre-
The CAV conference is the pre- cil on Electronic Design Automation sented annually since 1994, honors
mier international event for reporting individuals who have had a demon-
research on computer-aided verifi- strable impact on the field of elec-
cation, a subdiscipline of computer tronic design automation (EDA).
science concerned with ensuring IEEE COUNCIL ON ELECTRONIC It was established as a tribute to
that software and hardware systems DESIGN AUTOMATION deceased EDA industry pioneer
operate correctly and reliably. It is President: John Darringer Phil Kaufman, who turned innova-
dedicated to the advancement of the President-Elect: Andreas Kuehlmann tive technologies such as silicon
theory and practice of computer-aided Secretary: David Atienza compila tion and emulation into
formal-analysis methods for hardware VP Finance: Donatella Sciuto businesses that have benefited elec-
and software systems. The confer- VP Technical Activities: Shishpal Rawat tronic designers. For more informa-
ence covers the entire spectrum of VP Conferences: Bill Joyner tion about the award, go to //www.
CAV, from theoretical results to con- VP Publications: Rajesh K Gupta edac.org or http://www.c-eda.org.
crete applications, with an emphasis Administrator: Barbara Wehner,
on practical verification tools and the [email protected] —Jose L. Ayala
algorithms and techniques needed [email protected]
Find us online at www.c-eda.org.
for their implementation.

CONFERENCE REPORTS
VLSI-TSA and VLSI-DAT to

Highlight 3-D IC Technology in 2010 Program
T
The 2010 International Symposium
on VLSI Technology, Systems, and
Applications (2010 VLSI-TSA) will be
held in conjunction with the 2010
International Symposium on VLSI
coupling 3-D integration, as well
as 3-D processes, CAD tools, and
design issues, with overviews of
major 3-D programs by key indus-
trial players.
Design, Automation, and Test (2010
VLSI-DAT) at the Ambassador Hotel in
Hsinchu, Taiwan, 26–29 April 2010.
To stimulate interaction between the
technology and design communi-
ties, the symposia will overlap for
two days, as they did in 2009. Spon-
sored by the Industrial Technology
Research Institute (ITRI) and divided Featured Programs
into separate annual symposia since In addition to 50–60 contributed pa-
2006, VLSI-TSA and VLSI-DAT are pers and three keynote speakers, each
proud to create a platform for tech- symposium will address the interests Dr. Roger De Keersmaecker delivered the
nical exchanges and communica- of attendees in semiconductor manu- opening speech at VLSI-TSA 2009 as
general chair of the 2008 conference.
tions between experts from all over facturing and IC design, respectively:
the world.
VLSI Technology, Systems, ■ Invited talks on FEOL, memo-
Special Session on 3-D Technology and Applications ry, BEOL, CMOS, and new tech-
To reflect marketing trends and ■ Special session on RF devices nologies
developing domains in three-di-
mensional (3-D) IC technology, a
joint-invited session on this topic,
with speakers representing both de-
sign and technology perspectives, is
scheduled for the second day of the
conference.
Three-dimensional integration
is emerging as an attractive op-
tion to sustain Moore’s law and to
enable “More Than Moore’s Law.”
At the 2010 special VLSI-TSA/DAT
session on 3-D integration, five
distinguished invited speakers from
the United States, Europe, and Japan
will discuss various aspects of this
topic, including TSV-based 3-D inte-
gration and inductance/capacitance
Dr. Mark Pinto, senior vice president of Applied Materials, gave a keynote address at
Digital Object Identifier 10.1109/MSSC.2009.935265 VLSI-TSA 2009 titled “Has The Sun Finally Risen on Photovoltaics?”

Dr. Fang-Churng Tseng, vice chair of TSMC, keynoted at 2009 VLSI-TSA/DAT on “The Future of Semiconductor Industry–A Foundry’s
Perspective.”
■ Two parallel in-depth short cours- A detailed conference agenda will Please also visit the conference
es on MEMS and DRAM and em- be released in January 2010 and early Web sites at http://vlsitsa.itri.org.tw
bedded memory. registration will open at that time. (for VLSI-TSA) or http://vlsidat.itri.
We look forward to seeing you and org.tw (for VLSI-DAT).
VLSI Design, Automation, hope that you will enjoy an excellent —Clara Wu
and Test meeting and warm hospitality at the Symposium Secretariat, VLSI-TSA
■ Two highlight topics on portable conference. If you have any further [email protected]
and emerging medical electronics questions about registration, please —Elodie Ho
and MEMS and circuits contact the conference registrar, Symposium Secretariat, VLSI-DAT
■ Industrial sessions with up-to- Yvonne Chen at +886 3 5913003 or [email protected]
date research results. e-mail [email protected].
SOC IET Y N E WS (Continued from page 71)
SSCS and the IEEE Technology Management Council

The SSCS is a founding Member Soci- SSCS being a TMC member Society, can certainly subscribe to its publica-
ety (one of 14) of the IEEE Technology members of their local TMC chapter. tions). IEEE Transactions on Engineer-
Management Council (TMC) and has a The TMC offers publications, confer- ing Management is more research
voting representative on its Board of ences, and networking forums. Op- oriented, and the very popular IEEE
Governors. The TMC provides a criti- portunities to network will exist at Engineering Management Review (EMR)
cal opportunity to network with lead- societal conferences as well. Anyone is a compilation of papers reprinted
ers from the other member Societies with interest in the management of from the most respected engineering
in the common pursuit of the mission technology, management principles and technology management journals
and goals of the TMC and to explore in general, or who is a technical pro- in the world, as selected by its Editori-
additional ways for the member Soci- fessional responsible for technology al Board. EMR is targeted more for the
eties to interact with each other. management, or is striving to be- practicing professional. If you have
The mission and goals of the TMC come a manager, should have inter- any questions about the TMC, please
can enhance the experiences, knowl- est in what the TMC has to offer. contact me at [email protected]. More
edge, and skill sets of SSCS mem- SSCS members may want to con- information about the TMC can be
bers who now also are, by virtue of sider, when rejoining IEEE for 2010, found at http://www.ieeetmc.org/.
subscribing to the TMC publications —Rakesh Kumar
Digital Object Identifier 10.1109/MSSC.2009.935489 (individuals cannot join a Council, but

Dr. Fang-Churng Tseng, vice chair of TSMC, keynoted at 2009 VLSI-TSA/DAT on “The Future of Semiconductor Industry–A Foundry’s
Perspective.”
■ Two parallel in-depth short cours- A detailed conference agenda will Please also visit the conference
es on MEMS and DRAM and em- be released in January 2010 and early Web sites at http://vlsitsa.itri.org.tw
bedded memory. registration will open at that time. (for VLSI-TSA) or http://vlsidat.itri.
We look forward to seeing you and org.tw (for VLSI-DAT).
VLSI Design, Automation, hope that you will enjoy an excellent —Clara Wu
and Test meeting and warm hospitality at the Symposium Secretariat, VLSI-TSA
■ Two highlight topics on portable conference. If you have any further [email protected]
and emerging medical electronics questions about registration, please —Elodie Ho
and MEMS and circuits contact the conference registrar, Symposium Secretariat, VLSI-DAT
■ Industrial sessions with up-to- Yvonne Chen at +886 3 5913003 or [email protected]
date research results. e-mail [email protected].
SOC IET Y N E WS (Continued from page 71)
SSCS and the IEEE Technology Management Council

The SSCS is a founding Member Soci- SSCS being a TMC member Society, can certainly subscribe to its publica-
ety (one of 14) of the IEEE Technology members of their local TMC chapter. tions). IEEE Transactions on Engineer-
Management Council (TMC) and has a The TMC offers publications, confer- ing Management is more research
voting representative on its Board of ences, and networking forums. Op- oriented, and the very popular IEEE
Governors. The TMC provides a criti- portunities to network will exist at Engineering Management Review (EMR)
cal opportunity to network with lead- societal conferences as well. Anyone is a compilation of papers reprinted
ers from the other member Societies with interest in the management of from the most respected engineering
in the common pursuit of the mission technology, management principles and technology management journals
and goals of the TMC and to explore in general, or who is a technical pro- in the world, as selected by its Editori-
additional ways for the member Soci- fessional responsible for technology al Board. EMR is targeted more for the
eties to interact with each other. management, or is striving to be- practicing professional. If you have
The mission and goals of the TMC come a manager, should have inter- any questions about the TMC, please
can enhance the experiences, knowl- est in what the TMC has to offer. contact me at [email protected]. More
edge, and skill sets of SSCS mem- SSCS members may want to con- information about the TMC can be
bers who now also are, by virtue of sider, when rejoining IEEE for 2010, found at http://www.ieeetmc.org/.
subscribing to the TMC publications —Rakesh Kumar
Digital Object Identifier 10.1109/MSSC.2009.935489 (individuals cannot join a Council, but

CALENDAR
19–22 September 2010 International European Solid-State

SSCS SPONSORED San Jose, California, Symposium on VLSI Circuits Conference
CONFERENCES Submission date: TBA Design, Automation and (ESSCIRC 2010)
Test (VLSI-DAT) www.esscirc.org
2010 IEEE Asian Solid-State vlsidat.itri.org.tw 13–18 September
2010 Circuits Conference (A-SSCC) 26–29 April Seville, Spain
a-sscc.org/
November Hsinchu, Taiwan Submission Date: 10 April
2010 IEEE International
Solid-State Circuits China
Conference (ISSCC) 2010 IEEE Radio Frequency 2010 IEEE International
www.isscc.org/isscc Integrated Circuits Conference on Ultra-
7–11 February SSCS TECHNICALLY Symposium (RFIC) Wideband (ICUWB)
San Francisco, California, COSPONSORED www.rfic2010.org/ icuwb2010.emfield.org
USA CONFERENCES 23–25 May 20–23 September
Anaheim, California, Nanjing, China
2010 IEEE Symposium
on VLSI Circuits USA Submission Date: 10 May
2010
www.vlsisymposium.org/
index.html 2010 IEEE Symposium on 2010 IEEE Compound
2010 International
16–18 June VLSI Technology Semiconductor Integrated
Symposium on VLSI
Honolulu, Hawaii, USA Circuit Symposium (CSICS)
Technology, Systems and www.vlsisymposium.org/
Applications (VLSI-TSA) www.csics.org
2010 IEEE Custom index.html
3–6 October
Integrated Circuits vlsitsa.itri.org.tw 15–17 June
Conference (CICC 2010) 26–28 April Monterey CA, USA
Honolulu, Hawaii, USA
www.ieee-cicc.org Hsinchu, Taiwan Submission date:
7 May
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SSCS DLs: We’re All Around the World

1 9
6 9 3
12 4 5
13 1 8 7 11
2
DL Domine Leenaerts
SSCS VP Rakesh Kumar (third
from left) with members of SSCS-
10 SSCS-Austria
12 November 2009
Shanghai, 21 September 2009
2
10
© imagesource
DL David Su
SSCS-Penang,
SSCS-India Council Chair Kandala 6 Malaysia
Chari with SSCS VP and EDS 28 October 2009
DL Rakesh Kumar, Delhi, India,
9 November 2009
11
3
DLs Bernhard Boser, Stefan Rusu, Betty Prince, and

Vojin Oklobdzija with Peter Kennedy, Chapter chair, SSCS-UKRI
Cork, U.K., 8 October 2009
DL Kofi Makinwa with
DLs Betty Prince and Takayuki Kawahara Valencia Joyner of SSCS-Boston,
spoke at the INTERNANO-2009 Conference 7 Boston, USA, 16 October 2009
at Novosibirsk State Technical University
at the invitation of SSCS-chapter chair
Alexander Gridchin, who addressed
the opening session in Siberia in October. 12
Ashutosh Dutta, DL Jan Van der Spiegel, DL Peter Kinget,

Chapter Chair Nagi Naganathan, Walt Curtis, and Pravin Raghu-
wanshi at inauguration of Princeton-Central New Jersey Chapter,
Princeton, USA, 17 September 2009 DL Peter Kinget
SSCS-Hong Kong
22 September 2009
DLs Jan Van der Spiegel and Tom Lee
Lehigh Valley, Pennsylvania, USA, 8
21 September 2009
13
5
DL Peter Kinget addressed nearly 100

DL K. Nagaraj addressing students and industry professionals at
SSCS-New York, New York, USA, DL Behzad Razavi (first row, fourth from left) with members of the Advanced Communication Center
2 October 2009 SSCS-Taipei, Taipei, Taiwan, 22, 24 September 2009 of Tel Aviv University in November.
More information about the IEEE Solid-State Circuits Society Distinguished Lecturer (DL) Program
and our DLs can be found in the “People” section of this magazine and at sscs.org/Chapters/dl.htm.
Materials edited by Katherine Olstein, SSCS News Editor

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21 Interconnect Research Influenced

28 The Legendary IBM 1401

40 Memorandum to: File, Subject:

42 Memorandum to: File, Subject: 4 EDITOR’S NOTE

Microminiature Packaging—Logic Block 5 LETTERS

Digital Object Identifier 10.1109/MSSC.2009.935236

IEEE SOLID-STATE CIRCUITS MAGAZINE W I N T E R 2 0 10 1

SCOPE: Each issue of IEEE Solid-State Circuits Magazine is envisioned as a self-contained

Digital Object Identifier 10.1109/MSSC.2009.935486

2 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE

50TH ANNIVERSARY OF THE IBM 1401

Digital Object Identifier 10.1109/MSSC.2010.935868

IEEE SOLID-STATE CIRCUITS MAGAZINE W I N T E R 2 0 10 3

50TH ANNIVERSARY OF THE IBM 1401

Digital Object Identifier 10.1109/MSSC.2010.935868

IEEE SOLID-STATE CIRCUITS MAGAZINE W I N T E R 2 0 10 3

4 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE

Digital Object Identifier 10.1109/MSSC.2009.935259

IEEE SOLID-STATE CIRCUITS MAGAZINE W I N T E R 2 0 10 5

Be in the Driver’s Seat!

6 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE

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8 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE

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IEEE RECOGNIZES THE SPECIAL NEEDS OF SMALLER COLLEGES,

and wants students to have access to the information that will

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IEEE SOLID-STATE CIRCUITS MAGAZINE W I N T E R 2 0 10 13

E.F. Rent’s son on the genesis

14 W I N T E R 2 0 10 IEEE SOLID-STATE CIRCUITS MAGAZINE 1943-0582/10/$26.00©2010IEEE

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observed in [8] but this is much 10 connection complexity, ii) a

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