Unit FILM CAPACITOR COMMON MODE

BUSBAR BUSBAR
DcConnector (2+2pin)
Isolation Ferrite Core
CTRL Board DCDC DRV Board （Normal ）
X Capacitor
HARNESS ASSY INPUT TERMINAL
B to B CN The amplifier has been deleted and replaced by an IC BUSBAR
CTRL-CN9 DCDC-CN1 HVB VOLTAGE
DCDC_A5V1 with the function of amplifier + isolated amplifier.. DCDC-CN601 DC+ (HV)
DCDC_VOL_HVB DCDC_VOL_HVB ISO AMP Divider
A/D
/_OV_HVB
I/F
DCDC_CUR_HVB_(AP,BP,CP) 3 DCDC_CUR_HVB_(AP,BP,CP) 3 3 CT_HVB_(AP,BP,CP)
A/D(×3)
DC- (HV)
5VREF 5VREF
/_OC_HVB 1 /_OC_HVB_(A,B,C) 3 DCDC-CN603
OR I/F HARNESS ASSY Current Sensor 3ch Film Capacitor Ferrite Core
DCDC CURRENT + （Common mode）
Circuitry for forcibly releasing the latch state has been SENSOR Y Capacitor
DCDC_REA_TEMP_(1,2) DCDC_REA_TEMP_(1,2) removed. 2
A/D(×2) 2 【DC input Capacitor】
LvConnector Interlock Dc_Interlock_IN
FLBK_VBATT VBATT2 VBATT FLT circuit
Signal_IN
FLBK_VBATT Pch DCDC_EN DCDC_EN
POUT
MOSFET Unlatch the FLT circuit. Release with High.
DCDC-CN602 Reactor
POUT FLT_LAT_RST FLT_LAT_RST REA_THM(1+,1-,2+,2-) 3ch LvConnector Interlock Dc_Interlock_OUT
4
/_S /_R Q I/F Thermistor COM_N_BUSBAR Signal_OUT
/_VCC_INH /_DCDC_OV_DCL_OUT 0 0 0
POUT (For DCL OV circuit) 0 1 1
/_R /_S 1 0 0 HARNESS ASSY
/_PE2_OV_DCL /_DCDC_OV_DCL_OUT /_R 1 1 No Change REACTOR
/_DCDC_OV_DCL_OUT 1 (For CTRL Board） 6
/_PE1_OV_DCL OR /_R Q BUSBAR MODULE
/_DCDC_OC_DCL_OUT AND
/_R
/_R /_R
/_DCDC_OV_HVB /_DCDC_OV_HVB_IN
PIN
PIN /_DCDC_OC_HVB /_DCDC_OC_HVB_IN 4
Wired

/_Gate Stop
PIN /_DCDC_OV_DCL /_DCDC_OV_DCL_IN
/_DCDC_OC_DCL OR Isolation (DCDC)Heat sink
PIN /_DCDC_OC_DCL_IN
/_SBC_RESET
Redundant For SBC Wired /_DCDC_CTRL_RST /_DCDC_CTRL_RST
/_SS OR
Power Supply RD_5VASC Signal used in PHEV. DCDC_D12V P P P N
Power Transformer
@5VASC Not used in HEV.
supply IC
LDO1 6ch
I/F ×3
TLE4276DV
50 AH / HV GND_H/desat 3 BUS-BAR
DCDC_FLBK DCDC_FLBK
POUT
/_DCDC_FLT_H /_DCDC_FLT_H /_FLT_(A,B,C)_H AL / HV GND_L/desat 3 Connector
1 1 3
PIN(×1) OR +Harness
/_DCDC_FLT_ L 1 /_DCDC_FLT_L 1 /_FLT_(A,B,C)_L 3
PIN(×1) OR BH / HV GND_H/desat 3 DCDC
Isolation
ASC& DCDC_PWM_AP_(H,L) 2 DCDC_PWM_AP_(H,L) 2 Converter
PWM(×2) Gate Driver
BL / HV GND_L/desat 3ch
Board（PE2,PE1） DCDC_PWM_BP_(H,L) 2 DCDC_PWM_BP_(H,L) 2 6ch 3
PWM(×2) (SIC MOSFET) Connecter
5V Power Supply N_5VASC PWM(×2) DCDC_PWM_CP_(H,L) 2 DCDC_PWM_CP_(H,L) 2
B12V 5VASC CH / HV GND_H/desat 3
LDO1 H_5VASC POUT DCDC_LDO-D5V_MON DCDC_LDO-D5V_MON
TLE4276DV SW (to MCU) CL / HV GND_L/desat 3
50 H_5VASC_PE1 DCDC_LDO-A5V1_MON DCDC_LDO-A5V1_MON Board to Board
(to MCU)
H_5VASC_PE2 Connector
DCDC_FET_TEMP circuit removed

ECU_SRC DCDC_D12V DCDC_D5V /_DCDC_OV_DCL_OUT I/F P N I/F Interface

L_5VASC LDO (to FLT circuit) DCDC_A5V1
I/F The amplifier has been deleted and replaced by an IC Current Sensor
SW R1524S050B- DCDC_D5V_MON
with the function of amplifier + isolated amplifier.. 1 DCL_CUR 1ch TIM Timer Input Module
ECU_SRC ADC L_5VASC_PE1 E2-KE (to CTRL)
HV12V HV5V
5V Power Supply L_5VASC_PE2
ADC_12V 5VADC LDO LV Side
LDO I/F HV5V_MON
LVConnecter R1524S050B-
ISO AMP Divider
R1524S050B- E2-KE (to CTRL)
B0sample DCDC_A12V DCDC_A5V1
24pin E2-KE HV12V 20V_I HV Side
DCDC_VOL_DCL Power Transformer
A/D I/F
LDO DCDC_A5V1_MON supply IC 1ch
5VREF TLE4252D (to CTRL) ×1
HV5V_MON HV5V LV GND
/_BOOST_EN HV5V_MON 20V_I
POUT (to MCU)

LVDC VBATT B12V ISO_MON_DCL_N ISO_MON_DCL_N HV GND

A/D
/_DRV_FLBK ISO_CON_DCL_N ISO_CON_DCL_N Isolation
DRV_FLBK PWM
POUT Monitor
LV DC+ (KL30) load SW Boost
POUT
ISO_GATE_SW ISO_GATE_SW I/F Chassis GND(FG)
(Pch MOSFET) DC/DC
PE_12V POUT ISO_CALIB_SW ISO_CALIB_SW
PE(H)_12V DCDC_VOL_DCL
PE1_OC (Reserved)
A/D DCDC_CUR_DCL
SW P N DCDC-CN600 Passive Passive Discharge
PE2_OC (Reserved)
VBATT2 PE1(L)_12V A/D Resistor
LV DC- (KL31) SW 5VREF CTRL-CN15
DCDC_CUR_DCL (Reserved) Signal used in PHEV.
/_wake-up
A/D
Not used in HEV.
Active Active Discharge
Resistor
ADC_12V PE2(L)_12V A/D DC_LINK_CUR(Reserved)
ADC_12V 20V_ADC_(H,L)
5VCAN SW Signal used in PHEV. Power Transformer
Not used in HEV. supply IC 2ch
B12V Current Sensor
QCO ×2
20V_ADC_L
5VSC1 (to PE1_Board,RPS1,Current Sensor1) 5VADC HV to LV
VST Passive
Pch & Nch MOSFETs were used to generate the core power DC-DC
VS QT1 (to PE2_Board,RPS2,Current Sensor2) H/W-ASC
supply, but this has been changed to an IC. Active Active short circuit
ENA 5VSC2 Fixed to HIGH.
PWM POUT Release with LOW. Latch
/_FLBK_INH Flyback
QT2 VGATE1P DC/DC
TLF11251EP FLBK_VBATT
5.8V LSCON VGATE1N
SW Active
FB ADC_H_ON (Active Discharge ON_Hi-side)
FLBK_OUT (12V) Not gate
1.25V VDD(×11) POUT DCL_BUSBAR
ADC_L_ON (Active Discharge ON_Lo-side) Transformer
5VuC POUT FLBK_GND
5VuC 5VADC 20V_ADC_H
QUC VEVRSB The HW-ADC circuit has been removed as it is no longer required.
HARNESS ASSY
Active CTRL-CN18 HVIN FOR RD
VDDM 20V_ADC_L
SBC VEXT(×5) 5VADC
Discharge P

TLF35584QVVS1 5VREF VFLEX

QVR 5VREF
VAREF1 N

VAREF2
/_DAP_RESET
/_ETK_RESET HARNESS ASSY
MPS(for CN11) ISO AMP CTRL-CN7
/_RESET FILM CAPACITOR
MPS ROT DCL_TEMP DCL_TEMP_(P,N)
RESET 2 P N
A/D I/F
/_SBC_Reset (to ASC Wired OR, DCDC Wired OR) ADC_MON Film Capacitor
/_INTOUT A/D +
INT PIN HARNESS ASSY
PE2 DRIVE Y Capacitor
ESR1 CTRL-CN3 P N P N
WDI WD_O The amplifier has been deleted and replaced by an IC Isolation
POUT with the function of amplifier + isolated amplifier..
B to B CN PE2 DRV Board 【DC LINK】
/_ERROROUT 5VASC
ERR SMUFSP0 DCDC_FLT_(BP,CP)_H(Reserved) 2 P2DR-CN1
MOSI GPIO(×2)
SDI QSPI DCDC_FLT_(BP,CP)_L(Reserved) 2
SCLK GPIO(×2) PE2(H)_12V
SCL QSPI DCDC_OC_HVB_(BP,CP)(Reserved) 2
SCS CSN GPIO(×2) /_ST Transformer 20V(U,V,W)
QSPI PE1_IGBT_FLT_(V,W,Y,Z)(Reserved) 4 Power
MISO GPIO(×4) H_5VASC_PE2 H_5VASC
supply IC 3 3ch
QST SDO PE2_IGBT_FLT_(V,W,Y,Z)(Reserved) 4
QSPI GPIO(×4) delay ×3
/_SS
SS (to ASC Wired OR, DCDC Wired OR) PE2(L)_12V
WAK L_5VASC_PE2 L_5VASC
DC-Link_PE2 +（U,V,W） 3
Transformer 20V(X,Y,Z)
Power DC-Link_PE2 – (U,V,W)
H/W-ASC supply IC 3 3ch 3
PE(H)_12V PE2(H)_12V
×3

5VASC PE2(L)_12V PE2(L)_12V 20V(U,V,W)

"ST" H_5VASC
/_ST
/_PE2_IGBT_FLT_H L input → IC-ON IGBT Module
H_5VASC H input → IC-OFF AC BUSBAR Terminal(1)
5VSC2 5VSC2
/_PE2_IGBT_FLT_L MATRIX
PE2_PWM UH / HV GND 2
Selector PE2_PWM AC BUSBAR MODULE
PE2_PWM_(U,V,W) 3 (GU,GV,GW) 3 3 (GU,GV,GW)
MCU A (H-side)

PE2
PWM(×3) Isolation IGBT U U
B Gate Driver
(TC377) L_5VASC
Fixed to HIGH. PE2_PWM 3 /_PE2_IGBT_FLT_(U,V,W) 3ch UL / HV GND 2
(High-Side)
Release with LOW.
PE2-P
PE2_PWM_(X,Y,Z) 3 (GX,GY,GZ) 3 3
/_wake-up PWM(×3) A Selector ＋
(to load SW) For PE2 /_PE2_OV_DCL B (L-side) 3 Interlock_(U,V,W) Initial check
SELF_HOLDING Timer PE2_IGBT_EN_H (3 phase)
IG (KL15) For PE1 /_PE1_OV_DCL
POUT
OR /_DevmtESTOP IGBT_INIT_H
For LV connecter
(wake) IGBT_INIT_H
/_SBC_RESET /_ST VH / HV GND 2
Wired Sel_Signal(B-select)
/_IG_SIG delay IGBT_INIT_L
PIN OR 20V(X,Y,Z)
For SBC /_ST SEL A B OUT L_5VASC V
PE2

NTC
1 x x x 0 IGBT V
/_SS
0 0 0 x 0
IG_MON A/D Timer
Divider POUT /_EM_STOP 0 0 1 x 1 VL / HV GND 2
0 1 x 0 0
PIN READ_BACK 0 1 x 1 1
PE2_PWM
/_CAN_INH PIN PE2_ (GU,GV,GW,GX,GY,GZ)_FB 6 6 (GX,GY,GZ)
TIM(×6) 6 I/F Isolation
IOM(×6) PE2_(GU,GV,GW,GX,GY,GZ)_FB_IOM /_PE2_IGBT_FLT_L RPS
VBATT IGBT_INIT_L Gate Driver
5VCAN 5VuC 3ch
/_PE2_IGBT_FLT_H
(Low-Side)
/_PE2_IGBT_FLT_H 1 1 3 WH / HV GND 2
CAN_EN PIN(×1) OR ＋
POUT /_PE2_IGBT_FLT_L 1 1 3 /_PE2_IGBT_FLT_(X,Y,Z) Initial check
CAN PIN(×1) OR
CAN_NTSB (3 phase) IGBT W W
Transceiver POUT PE2_IGBT_EN_H
CAN_INH1 (wake-up) /_CAM_NFAULT POUT
PIN PE2_IGBT_EN_L PE2_IGBT_EN_L WL / HV GND 2
(TCAN1043)
CANFD_TX/RX POUT
CAN(×2) Interlock_(X,Y,Z) Ferrite Core
CANFD1 3
(Vehicle) /_PE2_OVP to ASC AND Passive （Common mode）
CAN PIN I/F AC BUSBAR Terminal(3)
Transceiver PE2_VOL_DCL
(TJA1042T/3/ A/D ISO AMP Divider DC-Link Voltage_PE2
CAN1_TX/RX CAN(×2)
CAN1 1J) The amplifier has been deleted and replaced by an IC
(Development) PE2_IGBT_TEMP_(U,V,W) with the function of amplifier + isolated amplifier.. PE2_IGBT Temperature (U,V,W)
3 3
A/D(×3) IGBT Temp.(U,V,W)
CalWakeup ETK_WAK_SIG
(For CN13 ) POUT

HARNESS ASSY
WATER_TEMP CTRL-CN5 CURRENT SENSOR
Wake up circuits with ETKs and circuits to detect them have been A/D PE2_CUR_(U,V,W) 3 PE2_Phase Current Signals (U,V,W) 3
added. A/D(×3)
BUSBAR_TEMP (Reserved) 5VSC2
A/D
5VSC1

XTAL1 Xtal1
Xtal A/D(×3) PE1_CUR_(U,V,W) 3 PE1_Phase Current Signals (U,V,W) 3
Lv_Interlock_IN Resistor LvConnector Interlock Signal_IN (20MHz)
Lv_Interlock_OUT LvConnector Interlock Signal_OUT
XTAL2 Xtal2
POUT
RPS2_SW
CTRL-CN6 HARNESS ASSY RPS
PE2-S
CTRL-CN2 EM2_TH_DIG
POUT
HARNESS ASSY 4 SW
PE2_SIN_(P,N) PE2_COS_(P,N) PE2_Rotational position (SIN+,SIN-,COS+,COS-) 4
INTER LOCK DSA/D(×4) I/F
WSP1_P 1 1 TIM(×1) PE2_TEMP PE2_Motor Temperature (+,-) 2
WSP1 (+,-) I/F A/D I/F

WSP2_P 1 A/D
1 TIM(×1)
WSP2 (+,-) I/F

/_DevmtESTOP DevmtESTOP /_DevmtESTOP

PCB_TEMP A/D
(Emergency stop) (for NCP1BXW153J)
CTRL-CN1
EM1_TH_DIG
POUT
HARNESS ASSY LVDC
Ferrite Core LV power supply LVDC_MON A/D
（Common mode） Divider A/D PE1_TEMP PE1_Generator Temperature (+,-) 2
VBATT I/F
A/D PE1_SIN_(P,N) PE1_COS_(P,N) 4 PE1_Rotational position (SIN+,SIN-,COS+,COS-) 4
VBATT_MON DSA/D(×4) I/F
Divider A/D SW
CTRL-CN8 FLBK_VBATT
FLBK_MON RPS1_SW
Thermistor Divider A/D POUT

A water temperature sensor circuit has been added due to a

change request.
B12V

Divider
B12V_MON
A/D
HARNESS ASSY
PE1 DRIVE
PE1-S
5VCAN CTRL-CN4
B to B CN PE1 DRV Board Isolation
5VCAN_MON
Divider A/D
5VSC1 P2DR-CN1 PE1(H)_12V
5VSC1_MON Transformer 20V(U,V,W)
Divider Power
A/D H_5VASC_PE1 H_5VASC 3ch
5VSC2 supply IC 3
5VSC2_MON ×3
Divider A/D H/W-ASC L_5VASC_PE1 L_5VASC PE1(L)_12V
N_5VASC
/_ST SEL A B OUT Transformer 20V(X,Y,Z) DC-Link_PE1 +（U,V,W） 3
N_5VASC_MON Power
Divider A/D
1 x x x 0
PE(H)_12V supply IC 3 3ch DC-Link_PE1 – (U,V,W)
0 0 0 x 0 PE1(H)_12V 3
RD_5VASC 0 0 1 x 1 ×3
RD_5VASC_MON 0 1 x 0 0
Divider A/D
0 1 x 1 1
PE1(L)_12V PE1(L)_12V
H_5VASC 20V(U,V,W)
5VASC
/_ST IGBT Module
/_PE1_IGBT_FLT_H H_5VASC
DCDC_LDO-D5V 5VSC1 5VSC1 AC BUSBAR Terminal(2)
/_PE1_IGBT_FLT_L MATRIX
DCDC_LDO-D5V_MON UH / HV GND 2
Divider PE1_PWM PE1_PWM
A/D Selector
DCDC_LDO-A5V1 PE1_PWM_(U,V,W) 3 (GU,GV,GW) 3 3 (GU,GV,GW) U
PWM(×3) A (H-side) Isolation IGBT U
DCDC_LDOｰA5V1_MON B
5VuC Divider A/D Gate Driver
5VADC L_5VASC /_PE1_IGBT_FLT_(U,V,W) 3ch
PE1_PWM 3 UL / HV GND 2

MPS
MPS(To SBC)
HV5V
Divider
5VADC_MON
A/D PWM(×3)
PE1_PWM_(X,Y,Z) 3 A
B Selector
(GX,GY,GZ) 3 3
3 Interlock_(U,V,W)
(High-Side)
＋
Initial check
PE1-P
(L-side) Timer RPS
CTRL- HV5V_MON (3 phase)
CN11 Divider A/D PE1_IGBT_EN_H
5VuC
[RESET] PE1_ (GU,GV,GW,GX,GY,GZ)_FB IGBT_INIT_H
TIM(×6) 6 6 VH / HV GND 2
MPS PE1_(GU,GV,GW,GX,GY,GZ)_FB_IOM I/F
IOM(×6)
PE1

NTC
DAP 6 IGBT_INIT_H 20V(X,Y,Z) V
DAP2 L_5VASC IGBT V
DAP TDO /_ST
IGBT_INIT_L
DAP0 Timer
DAP TCK IGBT_INIT_H VL / HV GND 2
DAP1 POUT
DAP TMS IGBT_INIT_L PE1_PWM
DAP_TRST POUT
CTRL- (GX,GY,GZ)
TRST
CN12 ESR0/HDRST Isolation
/_PE1_IGBT_FLT_L
ESR0 Gate Driver
[High Speed DAP communication] ETK/TDI 3ch
TDI /_PE1_IGBT_FLT_H
/_ETK_RESET IGBT_INIT_L (Low-Side)

PE1
(To uC) /_PE1_IGBT_FLT_H 1 1 3 WH / HV GND 2
PIN(×1) OR ＋
LVDC_MON /_PE1_IGBT_FLT_L 1 1 3 /_PE1_IGBT_FLT_(X,Y,Z) Initial check W
PIN(×1) OR IGBT W
PE1_IGBT_EN_H (3 phase)
5VuC POUT
CalWakeup PE1_IGBT_EN_L PE1_IGBT_EN_L WL / HV GND 2 AC BUSBAR MODULE
CTRL- POUT
(To wake ) DAP2 to ASC AND Ferrite Core
CN13 3 Interlock_(X,Y,Z)
CTRL- /_PE1_OV_DCL Passive （Common mode）
DAP0 PIN I/F
[Permanent power supply(LVDC)] CN10 PE1_VOL_DCL
[Normal DAP communication] DAP1 ISO AMP Divider DC-Link Voltage_PE1
Voltage
DAP_TRST The amplifier has been deleted and replaced by an IC
PE1_IGBT_TEMP_(U,V,W) with the function of amplifier + isolated amplifier.. PE1_IGBT Temperature (U,V,W) 3
/_DAP_RESET 3 IGBT Temp.(U,V,W)
A/D(×3)
(To uC)

GND(×57)

Confidential DO NOT COPY AND/OR DISTRIBUTE This document prior written consent of Nidec
 Unit COMMON MODE
BUSBAR
DcConnector (2+2pin)
Ferrite Core
X Capacitor
CTRL Board INPUT TERMINAL （Normal ）
B to B CN BUSBAR
CTRL-CN9
DC+ (HV)
DCDC_VOL_HVB
A/D

DCDC_CUR_HVB_(AP,BP,CP) 3 1 CT_DCL
A/D(×3)
DC- (HV)
5VREF
HARNESS ASSY Current Sensor 1ch Ferrite Core
DCDC CURRENT （Common mode）
SENSOR
DCDC_REA_TEMP_(1,2) 2
A/D(×2)
LvConnector Interlock Dc_Interlock_IN
FLBK_VBATT VBATT2 VBATT
Signal_IN
FLBK_VBATT Pch DCDC_EN
POUT
MOSFET Unlatch the FLT circuit. Release with High.

POUT FLT_LAT_RST LvConnector Interlock Dc_Interlock_OUT

COM_N_BUSBAR Signal_OUT
/_VCC_INH
POUT
/_PE2_OV_DCL
/_DCDC_OV_DCL_OUT 1
/_PE1_OV_DCL OR BUSBAR MODULE

/_DCDC_OV_HVB
PIN
PIN /_DCDC_OC_HVB
PIN /_DCDC_OV_DCL
PIN /_DCDC_OC_DCL (DCDC)Heat sink
/_SBC_RESET
Redundant For SBC Wired /_DCDC_CTRL_RST
/_SS OR
Power Supply RD_5VASC Signal used in PHEV. P N
@5VASC Not used in HEV.

LDO1
TLE4276DV I/F
50 BUS-BAR
DCDC_FLBK
POUT
/_DCDC_FLT_H Connector
1
PIN(×1) +Harness
/_DCDC_FLT_ L 1
PIN(×1)
ASC& DCDC_PWM_AP_(H,L) 2
PWM(×2)
Board（PE2,PE1） DCDC_PWM_BP_(H,L) 2
PWM(×2) Connecter
5V Power Supply N_5VASC PWM(×2) DCDC_PWM_CP_(H,L) 2
B12V 5VASC
LDO1 H_5VASC POUT DCDC_LDO-D5V_MON
TLE4276DV SW (to MCU)
50 H_5VASC_PE1 DCDC_LDO-A5V1_MON Board to Board
(to MCU)
H_5VASC_PE2 Connector
DCDC_FET_TEMP circuit removed

ECU_SRC P N I/F Interface

L_5VASC
I/F
SW
ECU_SRC ADC L_5VASC_PE1 TIM Timer Input Module
5V Power Supply L_5VASC_PE2
ADC_12V 5VADC I/F LV Side
LVConnecter LDO
R1524S050B-
B0sample
24pin E2-KE HV Side
DCDC_VOL_DCL
A/D I/F

HV5V_MON LV GND
/_BOOST_EN (to MCU)
POUT
LVDC VBATT B12V ISO_MON_DCL_N HV GND
A/D
/_DRV_FLBK DRV_FLBK ISO_CON_DCL_N
PWM
POUT
LV DC+ (KL30) load SW Boost
POUT
ISO_GATE_SW Chassis GND(FG)
(Pch MOSFET) DC/DC
PE_12V POUT ISO_CALIB_SW
PE(H)_12V PE1_OC (Reserved)
A/D
SW Passive Passive Discharge
PE2_OC (Reserved)
VBATT2 PE1(L)_12V A/D Resistor
LV DC- (KL31) SW 5VREF CTRL-CN15 Signal used in PHEV.
(Reserved) Not used in HEV.
DCDC_CUR_DCL(Reserved)
/_wake-up
A/D Active Active Discharge
Resistor
ADC_12V PE2(L)_12V A/D DC_LINK_CUR
ADC_12V 20V_ADC_(H,L)
5VCAN SW Signal used in PHEV. Power Transformer
Not used in HEV. supply IC 2ch
B12V Current Sensor
QCO ×2
20V_ADC_L
5VSC1 (to PE1_Board,RPS1,Current Sensor1) 5VADC HV to LV
VST Passive
Pch & Nch MOSFETs were used to generate the core power DC-DC
VS QT1 (to PE2_Board,RPS2,Current Sensor2) H/W-ASC
supply, but this has been changed to an IC. Active Active short circuit
ENA 5VSC2 Fixed to HIGH.
PWM POUT Release with LOW. Latch
/_FLBK_INH Flyback
QT2 VGATE1P DC/DC
TLF11251EP FLBK_VBATT
5.8V LSCON VGATE1N
SW Active
FB ADC_H_ON (Active Discharge ON_Hi-side)
FLBK_OUT (12V) Not gate
1.25V VDD(×11) POUT DCL_BUSBAR
ADC_L_ON (Active Discharge ON_Lo-side) Transformer
5VuC POUT FLBK_GND
5VuC 5VADC 20V_ADC_H
QUC VEVRSB The HW-ADC circuit has been removed as it is no longer required.
HARNESS ASSY
Active CTRL-CN18 HVIN FOR RD
VDDM 20V_ADC_L
SBC VEXT(×5) 5VADC
Discharge P

TLF35584QVVS1 5VREF VFLEX

QVR 5VREF
VAREF1 N

VAREF2
/_DAP_RESET
/_ETK_RESET HARNESS ASSY
MPS(for CN11) ISO AMP CTRL-CN7
/_RESET FILM CAPACITOR
MPS ROT DCL_TEMP DCL_TEMP_(P,N)
RESET 2 P N
A/D I/F
/_SBC_Reset (to ASC Wired OR, DCDC Wired OR) ADC_MON Film Capacitor
/_INTOUT A/D +
INT PIN HARNESS ASSY
PE2 DRIVE Y Capacitor
ESR1 CTRL-CN3 P N P N
WDI WD_O The amplifier has been deleted and replaced by an IC Isolation
POUT with the function of amplifier + isolated amplifier..
B to B CN PE2 DRV Board 【DC LINK】
/_ERROROUT 5VASC
ERR SMUFSP0 DCDC_FLT_(BP,CP)_H(Reserved) 2 P2DR-CN1
MOSI GPIO(×2)
SDI QSPI DCDC_FLT_(BP,CP)_L(Reserved) 2
SCLK GPIO(×2) PE2(H)_12V
SCL QSPI DCDC_OC_HVB_(BP,CP)(Reserved) 2
SCS CSN GPIO(×2) /_ST Transformer 20V(U,V,W)
QSPI PE1_IGBT_FLT_(V,W,Y,Z)(Reserved) 4 Power
MISO GPIO(×4) H_5VASC_PE2 H_5VASC
supply IC 3 3ch
QST SDO PE2_IGBT_FLT_(V,W,Y,Z)(Reserved) 4
QSPI GPIO(×4) delay ×3
/_SS
SS (to ASC Wired OR, DCDC Wired OR) PE2(L)_12V
WAK L_5VASC_PE2 L_5VASC
DC-Link_PE2 +（U,V,W） 3
Transformer 20V(X,Y,Z)
Power DC-Link_PE2 – (U,V,W)
H/W-ASC supply IC 3 3ch 3
PE(H)_12V PE2(H)_12V
×3

5VASC PE2(L)_12V PE2(L)_12V 20V(U,V,W)

"ST" H_5VASC
/_ST
/_PE2_IGBT_FLT_H L input → IC-ON IGBT Module
H_5VASC H input → IC-OFF AC BUSBAR Terminal(1)
5VSC2 5VSC2
/_PE2_IGBT_FLT_L MATRIX
PE2_PWM UH / HV GND 2
Selector PE2_PWM AC BUSBAR MODULE
PE2_PWM_(U,V,W) 3 (GU,GV,GW) 3 3 (GU,GV,GW)
MCU A (H-side)

PE2
PWM(×3) Isolation IGBT U U
B Gate Driver
(TC377) L_5VASC
Fixed to HIGH. PE2_PWM 3 /_PE2_IGBT_FLT_(U,V,W) 3ch UL / HV GND 2
(High-Side)
Release with LOW.
PE2-P
PE2_PWM_(X,Y,Z) 3 (GX,GY,GZ) 3 3
/_wake-up PWM(×3) A Selector ＋
(to load SW) For PE2 /_PE2_OV_DCL B (L-side) 3 Interlock_(U,V,W) Initial check
SELF_HOLDING Timer PE2_IGBT_EN_H (3 phase)
IG (KL15) For PE1 /_PE1_OV_DCL
POUT
OR /_DevmtESTOP IGBT_INIT_H
For LV connecter
(wake) IGBT_INIT_H
/_SBC_RESET /_ST VH / HV GND 2
Wired Sel_Signal(B-select)
/_IG_SIG delay IGBT_INIT_L
PIN OR 20V(X,Y,Z)
For SBC /_ST SEL A B OUT L_5VASC V
PE2

NTC
1 x x x 0 IGBT V
/_SS
0 0 0 x 0
IG_MON A/D Timer
Divider POUT /_EM_STOP 0 0 1 x 1 VL / HV GND 2
0 1 x 0 0
PIN READ_BACK 0 1 x 1 1
PE2_PWM
/_CAN_INH PIN PE2_ (GU,GV,GW,GX,GY,GZ)_FB 6 6 (GX,GY,GZ)
TIM(×6) 6 I/F Isolation
IOM(×6) PE2_(GU,GV,GW,GX,GY,GZ)_FB_IOM /_PE2_IGBT_FLT_L RPS
VBATT IGBT_INIT_L Gate Driver
5VCAN 5VuC 3ch
/_PE2_IGBT_FLT_H
(Low-Side)
/_PE2_IGBT_FLT_H 1 1 3 WH / HV GND 2
CAN_EN PIN(×1) OR ＋
POUT /_PE2_IGBT_FLT_L 1 1 3 /_PE2_IGBT_FLT_(X,Y,Z) Initial check
CAN PIN(×1) OR
CAN_NTSB (3 phase) IGBT W W
Transceiver POUT PE2_IGBT_EN_H
CAN_INH1 (wake-up) /_CAM_NFAULT POUT
PIN PE2_IGBT_EN_L PE2_IGBT_EN_L WL / HV GND 2
(TCAN1043)
CANFD_TX/RX POUT
CAN(×2) Interlock_(X,Y,Z) Ferrite Core
CANFD1 3
(Vehicle) /_PE2_OVP to ASC AND Passive （Common mode）
CAN PIN I/F AC BUSBAR Terminal(3)
Transceiver PE2_VOL_DCL
(TJA1042T/3/ A/D ISO AMP Divider DC-Link Voltage_PE2
CAN1_TX/RX CAN(×2)
CAN1 1J) The amplifier has been deleted and replaced by an IC
(Development) PE2_IGBT_TEMP_(U,V,W) with the function of amplifier + isolated amplifier.. PE2_IGBT Temperature (U,V,W)
3 3
A/D(×3) IGBT Temp.(U,V,W)
CalWakeup ETK_WAK_SIG
(For CN13 ) POUT

HARNESS ASSY
WATER_TEMP CTRL-CN5 CURRENT SENSOR
Wake up circuits with ETKs and circuits to detect them have been A/D PE2_CUR_(U,V,W) 3 PE2_Phase Current Signals (U,V,W) 3
added. A/D(×3)
BUSBAR_TEMP (Reserved) 5VSC2
A/D
5VSC1

XTAL1 Xtal1
Xtal A/D(×3) PE1_CUR_(U,V,W) 3 PE1_Phase Current Signals (U,V,W) 3
Lv_Interlock_IN Resistor LvConnector Interlock Signal_IN (20MHz)
Lv_Interlock_OUT LvConnector Interlock Signal_OUT
XTAL2 Xtal2
POUT
RPS2_SW
CTRL-CN6 HARNESS ASSY RPS
PE2-S
CTRL-CN2 EM2_TH_DIG
POUT
HARNESS ASSY 4 SW
PE2_SIN_(P,N) PE2_COS_(P,N) PE2_Rotational position (SIN+,SIN-,COS+,COS-) 4
INTER LOCK DSA/D(×4) I/F
WSP1_P 1 1 TIM(×1) PE2_TEMP PE2_Motor Temperature (+,-) 2
WSP1 (+,-) I/F A/D I/F

WSP2_P 1 A/D
1 TIM(×1)
WSP2 (+,-) I/F

/_DevmtESTOP DevmtESTOP /_DevmtESTOP

PCB_TEMP A/D
(Emergency stop) (for NCP1BXW153J)
CTRL-CN1
EM1_TH_DIG
POUT
HARNESS ASSY LVDC
Ferrite Core LV power supply LVDC_MON A/D
（Common mode） Divider A/D PE1_TEMP PE1_Generator Temperature (+,-) 2
VBATT I/F
A/D PE1_SIN_(P,N) PE1_COS_(P,N) 4 PE1_Rotational position (SIN+,SIN-,COS+,COS-) 4
VBATT_MON DSA/D(×4) I/F
Divider A/D SW
CTRL-CN8 FLBK_VBATT
FLBK_MON RPS1_SW
Thermistor Divider A/D POUT

A water temperature sensor circuit has been added due to a

change request.
B12V

Divider
B12V_MON
A/D
HARNESS ASSY
PE1 DRIVE
PE1-S
5VCAN CTRL-CN4
B to B CN PE1 DRV Board Isolation
5VCAN_MON
Divider A/D
5VSC1 P2DR-CN1 PE1(H)_12V
5VSC1_MON Transformer 20V(U,V,W)
Divider Power
A/D H_5VASC_PE1 H_5VASC 3ch
5VSC2 supply IC 3
5VSC2_MON ×3
Divider A/D H/W-ASC L_5VASC_PE1 L_5VASC PE1(L)_12V
N_5VASC
/_ST SEL A B OUT Transformer 20V(X,Y,Z) DC-Link_PE1 +（U,V,W） 3
N_5VASC_MON Power
Divider A/D
1 x x x 0
PE(H)_12V supply IC 3 3ch DC-Link_PE1 – (U,V,W)
0 0 0 x 0 PE1(H)_12V 3
RD_5VASC 0 0 1 x 1 ×3
RD_5VASC_MON 0 1 x 0 0
Divider A/D
0 1 x 1 1
PE1(L)_12V PE1(L)_12V
H_5VASC 20V(U,V,W)
5VASC
/_ST IGBT Module
/_PE1_IGBT_FLT_H H_5VASC
DCDC_LDO-D5V 5VSC1 5VSC1 AC BUSBAR Terminal(2)
/_PE1_IGBT_FLT_L MATRIX
DCDC_LDO-D5V_MON UH / HV GND 2
Divider PE1_PWM PE1_PWM
A/D Selector
DCDC_LDO-A5V1 PE1_PWM_(U,V,W) 3 (GU,GV,GW) 3 3 (GU,GV,GW) U
PWM(×3) A (H-side) Isolation IGBT U
DCDC_LDOｰA5V1_MON B
5VuC Divider A/D Gate Driver
5VADC L_5VASC /_PE1_IGBT_FLT_(U,V,W) 3ch
PE1_PWM 3 UL / HV GND 2

MPS
MPS(To SBC)
HV5V
Divider
5VADC_MON
A/D PWM(×3)
PE1_PWM_(X,Y,Z) 3 A
B Selector
(GX,GY,GZ) 3 3
3 Interlock_(U,V,W)
(High-Side)
＋
Initial check
PE1-P
(L-side) Timer RPS
CTRL- HV5V_MON (3 phase)
CN11 Divider A/D PE1_IGBT_EN_H
5VuC
[RESET] PE1_ (GU,GV,GW,GX,GY,GZ)_FB IGBT_INIT_H
TIM(×6) 6 6 VH / HV GND 2
MPS PE1_(GU,GV,GW,GX,GY,GZ)_FB_IOM I/F
IOM(×6)
PE1

NTC
DAP 6 IGBT_INIT_H 20V(X,Y,Z) V
DAP2 L_5VASC IGBT V
DAP TDO /_ST
IGBT_INIT_L
DAP0 Timer
DAP TCK IGBT_INIT_H VL / HV GND 2
DAP1 POUT
DAP TMS IGBT_INIT_L PE1_PWM
DAP_TRST POUT
CTRL- (GX,GY,GZ)
TRST
CN12 ESR0/HDRST Isolation
/_PE1_IGBT_FLT_L
ESR0 Gate Driver
[High Speed DAP communication] ETK/TDI 3ch
TDI /_PE1_IGBT_FLT_H
/_ETK_RESET IGBT_INIT_L (Low-Side)

PE1
(To uC) /_PE1_IGBT_FLT_H 1 1 3 WH / HV GND 2
PIN(×1) OR ＋
LVDC_MON /_PE1_IGBT_FLT_L 1 1 3 /_PE1_IGBT_FLT_(X,Y,Z) Initial check W
PIN(×1) OR IGBT W
PE1_IGBT_EN_H (3 phase)
5VuC POUT
CalWakeup PE1_IGBT_EN_L PE1_IGBT_EN_L WL / HV GND 2 AC BUSBAR MODULE
CTRL- POUT
(To wake ) DAP2 to ASC AND Ferrite Core
CN13 3 Interlock_(X,Y,Z)
CTRL- /_PE1_OV_DCL Passive （Common mode）
DAP0 PIN I/F
[Permanent power supply(LVDC)] CN10 PE1_VOL_DCL
[Normal DAP communication] DAP1 ISO AMP Divider DC-Link Voltage_PE1
Voltage
DAP_TRST The amplifier has been deleted and replaced by an IC
PE1_IGBT_TEMP_(U,V,W) with the function of amplifier + isolated amplifier.. PE1_IGBT Temperature (U,V,W) 3
/_DAP_RESET 3 IGBT Temp.(U,V,W)
A/D(×3)
(To uC)

GND(×57)

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