Fpga Design For Embedded Systems-1

COURSE SYLLABUS
FPGA Design for Embedded Systems

Duration 30 Hours
Time 9:00 a.m. to 12:00 p.m.
2:00 p.m. to 5:00 p.m.
Venue
Catalog Description
With the advance of semiconductor technology, the complexity of digital circuits has increased
to a level that circuit designers cannot handle without the help of modern sophisticated
Electronic Design Automation (EDA) tools. The design methodology for digital systems and
digital integrated circuits has moved from the traditional logic design and schematic capture to
the HDL (Hardware Description Language) and synthesis approach. Verilog HDL is currently one
of the two most popular HDL used by hardware designers. This course covers the use of Verilog
HDL in high-level synthesis of digital system designs. The language Verilog HDL as well as how it
is used for describing, modeling, simulating and synthesizing various digital modules will be
addressed. Verilog HDL coding and synthesis issues on combinational and sequential modules
including Finite State Machine will be discussed. In the hands-on sessions, the participants will
not only learn the language through hands-on coding, synthesis and simulation of some
practical designs, but they will also synthesize and test the designs with industrial so􀅌ware
packages (ModelSim/Quartus Pro) and FPGA devices. The 30-hours (6-hours / 5-days) course
comprises of lecture sessions on Verilog HDL language, hands-on sessions on coding, synthesis
and simulation, together with a fully-guided project, in which a complete digital system is coded
in Verilog HDL, simulated, synthesized and tested with FPGA devices. The course study will also
involve extensive lab experiments to give students hands-on experience on designing digital
systems on FPGA platforms and going through a complete cycle of design. This course focuses
on Intel FPGA, and main course components include understanding of FPGA design and its
architecture, design synthesis, placement and routing and configuring the FPGA to implement
application specific architectures.
COURSE SYLLABUS
Who Should Attend

• Computer, electrical and communication engineers who would like to use FPGA
technology for digital and embedded systems design and who would like to gain
knowledge on Verilog HDL and high-level synthesis.
• Computer, electrical and communication engineering graduate and undergraduate
students who are working or involving on thesis or graduation projects that have
hardware and embedded system design and want to prototype with FPGA.
Course Topics
1. Introduction, design and simulation review
2. ALTERA tutorial, HW & SW characteristics
3. FPGA Design flow using Verilog HDL
4. Synthesis of Verilog HDL Code
5. Sequential Circuit design
6. Finite State machines design
7. Register Transfer Methodology
8. Timing Issues in FPGA Synchronous Circuits
9. RTL: Principles and Practice
10. Design issues in complex systems
11. Clock Synchronization
12. Case study: design, simulate and Implement RISC CPU from scratch
Course Learning Objectives

• Use software application to design hardware logic for FPGA architectures
• Design synthesizable Verilog HDL systems based on industry-standard coding methods.
• Optimize logic for various performance goals.
• Build testbenches and create data models to verify bit-true accurate designs.
• Design streaming architectures for high-performance computing applications.
• Simulate and compare performance results between different optimizations.
• Utilize commercial FPGA development tools for compilation, simulation, and synthesis.
• Apply the principles of abstraction, modularity and hierarchy in digital design.
• To develop debugging skills by designing, building, and testing digital systems on FPGA.
• To understand what’s under the hood of FPGA.
Course Resources
Intel ® FPGA Academic Program
https://www.intel.com/content/www/us/en/developer/topic-technology/fpga-
academic/overview.html
COURSE SYLLABUS
Instructor Information
Dr. Eljhani is experienced faculty member with a demonstrated history of working in the
higher education for more than 25 years both in the academics and industries. He has
published several research journal papers in the area of high level synthesis of advanced
digital systems, and digital integrated circuit design with Field-Programmable Gate Arrays
(FPGA) using Verilog Hardware Description Language (HDL). Now he is teaching several
computer engineering courses at University of Tripoli. He has strong education professional
with a Doctor of Philosophy focused in Computer Engineering from Florida Institute of
Technology, 2015, a Master’s of Science focused in Computer Sciences from Florida
Institute of Technology, 2012, and a Master’s of Science focused in Computer Engineering
from Beijing University of Aeronautics & Astronautics, 2004.
Mohamed M. Eljhani
Department of Computer Engineering
College of Engineering
University of Tripoli
P.O. Box 13442 Tripoli-Libya
https://uot.edu.ly/eng/ec/staff/index.php?id=5629
https://scholar.google.com/citations?hl=en&user=Gm6R7uYAAAAJ
[email protected]
+218 91 3704121

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COURSE SYLLABUS

FPGA Design for Embedded Systems

Who Should Attend

Course Learning Objectives

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