Assignment 4 Dte
Assignment 4 Dte
Assignment 4 Dte
1 ANS
Sequential Circuit
Sequential circuits are digital circuits that store and use previous state information to determine their
next state. They are commonly used in digital systems to implement state machines, timers, counters,
and memory elements and are essential components in digital systems design. Sequential circuits are
commonly used in digital systems to implement state machines, timers, counters, and memory
elements. The memory elements in sequential circuits can be implemented using flip-flops, which are
circuits that store binary values and maintain their state even when the inputs change.
A combinational circuit produces an output based on input variables only, but a sequential circuit
produces an output based on current input and previous output variables. That means sequential
circuits include memory elements that are capable of storing binary information. That binary information
defines the state of the sequential circuit at that time. A latch capable of storing one bit of information.
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What is a Flip-Flop?
The flip-flop is a circuit that maintains a state until directed by input to change the state. A basic flip-flop
can be constructed using four-NAND or four-NOR gates. Flip-flop is popularly known as the basic digital
memory circuit. It has its two states as logic 1(High) and logic 0(low) states. A flip flop is a sequential
circuit which consist of single binary state of information or data. The digital circuit is a flip flop which
has two outputs and are of opposite states. It is also known as a Bistable Multivibrator.
Types of Flip-Flops
SR Flip Flop
JK Flip Flop
D Flip Flop
T Flip Flop
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A One Bit Memory Cell (also known as a Basic Bistable Element) is a digital circuit that can store a single
bit of information. It is a type of sequential circuit that can hold its state until a new input signal is
received, causing the state to change. One Bit Memory Cells are used in digital systems as temporary
storage elements and are the building blocks of more complex sequential circuits such as flip-flops,
latches, and state machines.
1.SR (Set-Reset) Flip-Flops: The SR flip-flop is a type of One Bit Memory Cell that has two inputs, S (Set)
and R (Reset). The S input sets the output to 1, while the R input resets the output to 0. When both S
and R are at 1, the flip-flop is in an “undefined” state.
2.D (Data) Flip-Flops: The D flip-flop is a type of One Bit Memory Cell that has two inputs: D (Data) and a
clock signal. The output of the flip-flop follows the input at the D terminal as long as the clock signal is
high. When the clock signal goes low, the output of the flip-flop is stored and held until the next rising
edge of the clock.
3.One Bit Memory Cells are widely used in digital systems for various applications, including data
storage, control circuits, and state machines. They are often used in combination with other digital
circuits to implement sequential circuits, such as memory elements and state machines.
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A Counter is a device which stores (and sometimes displays) the number of times a particular event or
process has occurred, often in relationship to a clock signal. Counters are used in digital electronics for
counting purpose, they can count specific event happening in the circuit. For example, in UP counter a
counter increases count for every rising edge of clock. Not only counting, a counter can follow the
certain sequence based on our design like any random sequence 0,1,3,2… .They can also be designed
with the help of flip flops. They are used as frequency dividers where the frequency of given pulse
waveform is divided. Counters are sequential circuit that count the number of pulses can be either in
binary code or BCD form. The main properties of a counter are timing , sequencing , and counting.
Counter works in two modes
1.Up counter
2.Down counter
Counter Classification
i. Asynchronous counter
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It is a Flip Flop with two inputs, one is S and the other is R. S here stands for Set and R here stands for
Reset. Set basically indicates set the flip flop which means output 1 and reset indicates resetting the flip
flop which means output 0. Here, a clock pulse is supplied to operate this flip-flop, hence it is a clocked
flip-flop.
Working of SR Flip Flop
Case 1 : Let’s say, S=0 and R=0 , then output of both AND gates will be 0 and the value of Q and Q’ will be
same as their previous value, i.e, Hold state.
Case 2 : Let’s say, S=0 and R=1 , then output of both AND gates will be 1 and 0, correspondingly the value
of Q will be 0 as one of input is 1 and it is a NOR gate so it will ultimately gives 0, hence Q gets 0 value,
similarly Q’ will be 1.
Case 3 : Let’s say, S=1 and R=0 , then output of both AND gates will be 0 and 1, correspondingly the value
of Q’ will be 0 as one of input to NOR gate is 1, so output will be 0 ultimately and this 0 value will go as
input to upper NOR gate, and hence Q will become 1.
Case 4 : Let’s say, S=1 and R=1 , then output of both AND gates will be 1 and 1 which is invalid, as the
outputs should be complement of each other.
What is JK Flip-Flop?
It is one kind of sequential logic circuit which stores binary information in bitwise manner. It consists of
two inputs and two outputs. Inputs are Set(J) & Reset(K) and their corresponding outputs are Q and Q’.
JK flipflop has two modes of operation which are synchronous mode and asynchronous mode. In
synchronous mode, the state will be changed with the clock(clk) signal, and in asynchronous mode, the
change of state is independent from its clock signal
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Master Slave JK flip flop – The Master-Slave Flip-Flop is basically a combination of two JK flip-flops
connected together in a series configuration. Out of these, one acts as the “master” and the other as a
“slave”. The output from the master flip flop is connected to the two inputs of the slave flip flop whose
output is fed back to inputs of the master flip flop. In addition to these two flip-flops, the circuit also
includes an inverter. The inverter is connected to clock pulse in such a way that the inverted clock pulse
is given to the slave flip-flop. In other words if CP=0 for a master flip-flop, then CP=1 for a slave flip-flop
and if CP=1 for master flip flop then it becomes 0 for slave flip flop.
Working of a master slave flip flop –
When the clock pulse goes to 1, the slave is isolated; J and K inputs may affect the state of the system.
The slave flip-flop is isolated until the CP goes to 0. When the CP goes back to 0, information is passed
from the master flip-flop to the slave and output is obtained.
Firstly the master flip flop is positive level triggered and the slave flip flop is negative level triggered, so
the master responds before the slave.
If J=0 and K=1, the high Q’ output of the master goes to the K input of the slave and the clock forces the
slave to reset, thus the slave copies the master.
If J=1 and K=0, the high Q output of the master goes to the J input of the slave and the Negative
transition of the clock sets the slave, copying the master.
If J=1 and K=1, it toggles on the positive transition of the clock and thus the slave toggles on the negative
transition of the clock.
If J=0 and K=0, the flip flop is disabled and Q remains unchanged.
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For J-K flip-flop, if J=K=1, and if clk=1 for a long period of time, then output Q will toggle as long as CLK
remains high which makes the output unstable or uncertain.
We can overcome this problem by making the clock =1 for very less duration.
The circuit used to overcome race around conditions is called the Master Slave JK flip flop.
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T flip flop or to be precise is known as Toggle Flip Flop because it can able to toggle its output depending
upon on the input.
Toggle basically indicates that the bit will be flipped i.e., either from 1 to 0 or from 0 to 1.
Here, a clock pulse is supplied to operate this flop, hence it is a clocked flip-flop.
Let’s see the construction of T Flip Flop using SR Flip Flops, which require 2 AND gates and 2 NOR gates
as shown below:
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D Flip Flop
D flip flop is an electronic devices that is known as “delay flip flop” or “data flip flop” which is used to
store single bit of data.D flip flops are synchronous or asynchronous. The clock single required for the
synchronous version of D flip flops but not for the asynchronous one.The D flip flop has two inputs, data
and clock input which controls the flip flop. when clock input is high, the data is transferred to the
output of the flip flop and when the clock input is low, the output of the flip flop is held in its previous
state.
Working of D Flip Flop
D flip flop consist of a single input D and two outputs (Q and Q’). The basic working of D Flip Flop is as
follows:
When the clock signal is low, the flip flop holds its current state and ignores the D input.
When the clock signal is high, the flip flop samples and stores D input.
The value that was previously fed into the D input is reflected at the flip flop’s Q output.
If D = 0 then Q will be 0.
If D = 1 then Q will be 1.
If Q = 0 then Q’ will be 1.
If Q = 1 then Q’ will be 0.
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The shift registers are also used for data transfer and data manipulation.
The serial-in serial-out and parallel-in parallel-out shift registers are used to produce time delay to digital
circuits.
The serial-in parallel-out shift register is used to convert serial data into parallel data thus they are used
in communication lines where demultiplexing of a data line into several parallel lines is required.
A Parallel in Serial out shift register is used to convert parallel data to serial data.
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A Serial-In Serial-Out shift register is a sequential logic circuit that allows data to be shifted in and out
one bit at a time in a serial manner. It consists of a cascade of flip-flops connected in series, forming a
chain. The input data is applied to the first flip-flop in the chain, and as the clock pulses, the data
propagates through the flip-flops, ultimately appearing at the output.
The logic circuit provided below demonstrates a serial-in serial-out (SISO) shift register. It comprises four
D flip-flops that are interconnected in a sequential manner. These flip-flops operate synchronously with
one another, as they all receive the same clock signal.
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A PISO shift register is a digital circuit that can accept parallel data and output serial data. It is made up
of a succession of flip-flops, with each flip-flop capable of storing one bit of data. Unlike PIPO shift
registers, which offer parallel input and output, a PISO shift register accepts data in parallel and outputs
it sequentially, or serially.
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The universal shift register is another general-purpose digital circuitry that provides the facility of left or
right shifting apart from parallel data loading. It can perform a variety of operations such as serial and
parallel data input and output. It finds wide applications in different types of digital systems. The term
“universal” itself designates multi-operation capability, which includes holding the data statically along
with shifting in both directions. Normally, the universal shift register is designed by using digital ICs such
as 74291 and 74395 in order to obtain full functionality within digital circuits.
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A ring counter is a typical application of the Shift register. The ring counter is almost the same as the shift
counter. The only change is that the output of the last flip-flop is connected to the input of the first flip-
flop in the case of the ring counter but in the case of the shift register it is taken as output. Except for
this, all the other things are the same.
Ring counters are one of the most important applications of shift registers. They are created by
connecting multiple flip-flops to one another (such that the output of one flip-flop is the input for
another), and by connecting the output of the last flip-flop to the input of the first flip-flop.
For a mod 2-ring counter, two flip-flops will be required. Recall that the number of states that can be
counted by a ring counter is equal to the number of flip-flops being used. Since a mod 2-ring counter can
count up to 2 states, 2 flip-flops will be required. Since a ring counter is a synchronous counter, the clock
needs to be in an “ON” state so that state transitions can happen and the ring counter can function
normally.
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A 3-bit asynchronous counter uses three flip-flops to count from 0 to 7 in binary. Each flip-flop toggles
based on the previous one's output, creating a ripple effect. Q0 (least significant bit) changes with each
clock pulse, Q1 toggles every two pulses, and Q2 (most significant bit) every four pulses. This setup
produces a counting sequence, but with slight delays, as each flip-flop waits for the prior one to toggle.
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A Mod-5 counter is a digital counter that cycles through five distinct states (0 to 4) before resetting to 0,
counting in binary as 000, 001, 010, 011, and 100. This counter requires three flip-flops since it counts up
to 2^3 = 8 states but is designed to reset on the fifth count. After reaching the binary value of 100 (4 in
decimal), the counter resets to 000 on the next clock pulse. To implement this, logic gates detect when
the count reaches 101 (binary 5) and feed a reset signal to reset all flip-flops to 0, creating the Mod-5
behavior.