LCD Module Specification

Model: LG128645-SFLYH6V

Table of Contents

● COVER & CONTENTS ······················· 1

● BASIC SPECIFICATIONS ····················· 2
● ABSOLUTE MAXIMUM RATINGS ················· 3
● ELECTRICAL CHARACTERISTICS ··············· 4
● FUNCTION DESCRIPTION ···················· 8
● INSTRUCTION SET ························ 14
● INTERFACE WITH MPU ······················ 21
● INITIALIZATION ··························· 24
● ELECTRO—OPTICAL CHARACTERISTICS ·········· 26
● DIMENSIONAL OUTLINE ····················· 28
● LCD MODULE NUMBERING SYSTEM ············· 29
● PRECAUTIONS FOR USE OF LCD MODULE ········· 30
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1. BASIC SPECIFICATIONS
1.1 Features
Display Format : 128 X 64 Dots
LCD Mode : STN－Yellow Green－Positive－Transflective
Driving Method : 1/32 Duty,1/6 Bias
Viewing Direction : 6:00
Backlight : LED, yellow green color
Outline Dimension : 93.0(W) X 70.0(H) X 13.5(T) mm
Viewing Area : 72.0(W) X 39.0(H) mm
Dot Size : 0.48 X 0.48 mm
Dot Pitch : 0.52 X 0.52 mm
Weight : 75 g
Controller : ST7920-0B (GB code simplified character set)
Others : 8 Chinese characters X 4 lines
8-bit, 4-bit or serial bus MPU interface
Built-in 8192 Chinese characters (16X16 dots) and 126 half
width alphanumerical characters (8X16 dots)
64 x 16-bit character display RAM (DDRAM)
64 x 256-bit graphic display RAM (GDRAM)
64 x 16-bit character generation RAM (CGRAM)

1.2 Block Diagram

Control Signals
ST7921
RS(CS)
R/W(SID)
LCD
E(SCLK) Controller 64 SEG 64 SEG
PS LSI 32 COM
/RST
ST7920 128 x 32 dots
DB0

DB7 128 x 32 dots

32 COM
VDD To LSI 32 SEG 96 SEG
VSS Power
VO Circuit
VOUT
ST7921
LEDA
LED B/L Control Signals
LEDK
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1.3 Terminal Functions

Pin No. Symbol Level Function
1 VSS 0V Ground
2 VDD +5V Power supply for logic
3 VO - Operating voltage for LCD (contrast adjusting)
Register selection for parallel mode
RS
4 H/L H: Display data L: Instruction code
(CS)
(Chip selection for serial mode, active “H”)
Read/Write selection for parallel mode
R/W H: Data/status read L: Data/instruction write
5 H/L
(SID) (Serial data input for serial mode)
Chip enable signal for parallel mode. Read data
E when E is “H”, write data at the falling edge of E.
6 H, H→L
(SCLK) (Serial clock input for serial mode)
7 DB0 H/L
In 8-bit mode, used as low order bi-directional
8 DB1 H/L
data bus.
9 DB2 H/L
In 4-bit mode, open these terminals.
10 DB3 H/L
11 DB4 H/L In 8-bit mode, used as high order bi-directional
12 DB5 H/L data bus.
13 DB6 H/L In 4-bit mode, used as both high and low order
14 DB7 H/L data bus.
Parallel/Serial mode selection
15 PSB H/L
H: Parallel mode L: Serial mode
16 NC -- No connection
17 /RST L Reset signal, active “L”
18 VOUT +7.5V Output voltage for LCD driving
19 LEDA +5V Power supply for LED backlight
20 LEDK 0V Power supply for LED backlight

2. ABSOLUTE MAXIMUM RATINGS

Item Symbol Min. Max. Unit
Supply Voltage(Logic) VDD-VSS -0.3 5.5 V
Supply Voltage(LCD) VO-VSS -0.3 7.0 V
Input Voltage VI -0.3 VDD+0.3 V
Operating Temp. Topr -20 70 ℃
Storage Temp. Tstg -30 80 ℃
 LG128645-SFLYH6V -4-

3. ELECTRICAL CHARACTERISTICS

3.1 DC Characteristics (VDD=5.0V±5%, Ta=25℃)

Item Symbol Condition Min. Typ. Max. Unit

Supply Voltage
VDD 4.5 5.0 5.5 V
(Logic)
Supply Voltage
VO-VSS -- 6.5 -- V
(LCD Drive)
Input High Voltage VIH 0.7VDD -- VDD V

Input Low Voltage VIL -0.3 -- 0.6 V

Output High Voltage VOH IOH=-0.1mA 0.8VDD -- VDD V

Output Low Voltage VOL IOL=0.1mA 0 -- 0.4 V

Supply Current
IDD VDD=5.0V -- 3.0 5.0 V
(Logic)

3.2 Parallel Mode AC Characteristic (VDD=5.0V±5%, Ta=25℃)

Characteristic Symbol Min. Typ. Max. Unit

E Cycle tC 1200 -- -- ns

E Pulse Width tPH 140 -- -- ns

E Rise Time tR -- -- 25 ns

E Fall Time tF -- -- 25 ns

Address Setup Time tAS 10 -- -- ns

Address Hold Time tAH 20 -- -- ns

Data Setup Time TDSW 40 -- -- ns

Data Delay Time tDDR -- -- 100 ns

Data Hold Time(Write) tH 20 -- -- ns

Data Hold Time(Read) tH 20 -- -- ns

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● Parallel Mode Write Timing Diagram

● Parallel Mode Read Timing Diagram

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3.3 Serial Mode AC Characteristic (VDD=5.0V±5%, Ta=25℃)

Characteristic Symbol Min. Typ. Max. Unit

Rise Time tR -- -- 200 ns

Fall Time tF -- -- 200 ns

Serial Clock Cycle tSCYC 400 -- -- ns

SCLK High Pulse Width tSHW 200 -- -- ns

SCLK Low Pulse Width tSLW 200 -- -- ns

SID Data Setup Time TSDS 40 -- -- ns

SID Data Hold Time TSDH 40 -- -- ns

CS Setup Time TCSS 60 -- -- ns

CS Hold Time TCSH 60 -- -- ns

● Serial Mode Timing Diagram

 LG128645-SFLYH6V -7-

3.4 LED Backlight Characteristics (Ta=25℃)

Item Symbol Condition Min. Typ. Max. Unit
Forward Voltage Vf 3.9 4.1 4.3 V
Forward Current If Vf=4.1V -- 300 -- mA
Peak Wave Length λ p If=300mA -- 568 -- nm

3.5 Power Supply

1) Power Supply for Fixed Contrast (VDD=5.0V±2%)

VDD
+5V
VSS
LCM

Open VO

Open VOUT

LEDA
+5V
LEDK

2) Power Supply for Adjustable Contrast (VDD=5.0V±5%)

VSS
+5V
VDD
LCM

VR
VO
20 k Ω

VOUT
LEDA
+5V
LEDK

Note: 5V voltage for the LED backlight should be supplied to Pin19 (LEDA) and Pin20
(LEDK) terminal of the interface, it should not be supplied to the Anode/Cathode terminal
of the LED backlight directly.
 LG128645-SFLYH6V -8-

4. FUNCTION DESCRIPTION
4.1 System Interface
ST7920 supports 3 kinds of bus interface to MPU. 8-bit parallel, 4-bit parallel and clock
synchronized serial interface. Parallel interface and serial interface is selected by PSB
terminal. 8-bit/4-bit interface is selected by function set instruction DL bit. Two 8-bit
registers (Data Register DR, Instruction Register IR) are used in ST7920’s write and read
operation. Data Register (DR) can access DDRAM/CGRAM/GDRAM data through the
address pointer implemented by Address Counter (AC). Instruction Register (IR) stores
the instruction by MPU to ST7920.
4 modes of read/write operation specified by RS and RW：
RS RW Description
L L MPU write instruction to instruction register (IR)
L H MPU read busy flag (BF) and address counter (AC)
H L MPU write data to data register (DR)
H H MPU read data from data register (DR)

4.2 Busy Flag (BF)

Internal operation is in progress when BF=”1”, ST7920 is in busy state. No new instruction
will be accepted until BF=”0”. MPU must check BF to determine whether the internal
operation is finished and new instruction can be sent.

4.3 Address Counter (AC)

Address counter (AC) is used for address pointer of DDRAM/CGRAM/IRAM/GDRAM. AC
can be set by instruction and after data read or write to the memories AC will increase or
decrease by 1 according to the setting in “entry mode set”. When RS=”0” and RW=”1” and
E=”1” the value of AC will output to DB6-DB0.

4.4 16x16 Character Generator ROM (CGROM) and 8x16 Half Width ROM (HCGROM)
ST7920 provides character generator ROM supporting 8192 16x16 character fonts and
126 8x16 alphanumeric characters. It is easy to support multi languages application such
as Chinese and English. Two consecutive bytes are used to specify one 16x16 character
or two 8x16 half-width characters. Character codes are written into DDRAM and the
corresponding fonts are mapped from CGROM or HCGROM to the display drivers.

4.5 Character Generator RAM (CGRAM)

ST7920 provides RAM to support user-defined fonts. Four sets of 16x16 bit map area are
available. These user-defined fonts are displayed the same ways as CGROM fonts
through writing character cod data to DDRAM.
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4.6 Display Data RAM (DDRAM)

There are 64x2 bytes for display data RAM area which can store display data for 16
characters (16x16) by 4 lines or 32 characters (8x16) by 4 lines. Character codes stored
in DDRAM point to the fonts specified by CGROM, HCGROM and CGRAM. ST7920 can
display half width HCGROM fonts, user-defined CGRAM fonts and full 16x16 CGROM
fonts. The font type is selected by the data code automatically. Data codes 0000H to
0006H are for CGRAM user-defined fonts. Data codes 02H to 7FH are for half width
alphanumeric fonts. Data codes A140 to D75F are for BIG5 code and A1A0 to F7FF are
for GB code.
1) Display HCGROM fonts：Write 2 bytes data to DDRAM to display two 8x16 fonts. Each
byte represents 1 character font. The data of each byte is
02H to 7FH.
2) Display CGRAM fonts： Write 2 bytes data to DDRAM to display one 16x16 font. Only
0000H, 0002H, 0004H, 0006H are allowed.
3) Display CGROM fonts： Write 2 bytes data to DDRAM to display one 16x16 font.
A140H to D75FH are for BIG5 code, A1A0H to F7FFH are
for GB code.
Higher byte (D15-D8) is written first and then lower byte (D7-D0).
CGRAM fonts and CGROM fonts can only be displayed in the start position of each
address.

4.7 Graphic RAM (GDRAM)

Graphic display RAM supports 64x256 bits bit-mapped memory space. GDRAM address
is set by writing 2 consecutive bytes for vertical address and horizontal address. Two-byte
data write to GDRAM for one address. Address counter will automatically increase by one
for the next two-byte data. The procedure is as followings.
1. Set vertical address (Y) for GDRAM
2. Set horizontal address (X) for GDRAM
3. Write D15-D8 to GDRAM (first byte)
4. Write D7-D0 to GDRAM (second byte)
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4.8 8x16 Half-width Characters Table

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4.9 DRAM Data (Character Code), CGRAM Data Address Map

Note：
1. DDRAM data (character code) bit1 and bit2 are the same as CGRAM address bit4 and
bit5.
2. CGRAM address bit0 to bit3 specify total 16 rows. Row16 is for cursor display. The
data in row 16 will be logical OR to the cursor.
3. CGRAM data for each address is 16 bits.
4. DDRAM data to select CGRAM bit4 to bit15 must be “0”. Bit0 and bit3 value are “don’t
care”.
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4.10 DDRAM Display Coordinates and Corresponding Address

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4.11 GDRAM Address and LCD Map

GDRAM Horizontal Address (X) for Upper 32 rows of LCD (1~32 rows)

0 1 2 3 4 5 6 7

0 1
1 2
2 3
3 4

-- -- -- -- -- -- -- -- -- --
-- -- -- -- -- -- -- -- -- --
-- -- -- -- -- -- -- -- -- --
GDRAM Vertical Address (Y)

28 29
29 30
30 31

LCD Rows
31 32
0 33
1 34
2 35
3 36

-- -- -- -- -- -- -- -- -- --
-- -- -- -- -- -- -- -- -- --
-- -- -- -- -- -- -- -- -- --

28 61
29 62
30 63
31 64
LCD 1~16 17~32 33~48 49~64 65~80 81~96 97~112 113~128
Columns

8 9 10 11 12 13 14 15

GDRAM Horizontal Address (X) for Lower 32 rows of LCD (33~64 rows)

4.12 DDRAM Address and Character position Map

The LCD has 128 x 64 dots, it can display 8 Chinese characters x 4 lines.
The DDRAM address and character position map is as bellow:

1 2 3 4 5 6 7 8
Line1 80H 81H 82H 83H 84H 85H 86H 87H
Line2 90H 91H 92H 93H 94H 95H 96H 97H
Line3 88H 89H 8AH 8BH 8CH 8DH 8EH 8FH
Line4 98H 99H 9AH 9BH 9CH 9DH 9EH 9FH
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5. INSTRUCTION SET
ST7920 offers basic instruction set and extended instruction set：

Instruction set 1: (RE=0, basic instruction)

Instruction code Execution
time
Instruction Description
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (fosc=540
KHz)
Fill DDRAM with “20H”, and set
Clear 0 0 0 0 0 0 0 0 0 1 DDRAM address counter (AC) to 1.6ms
“00H”.
Set DDRAM address counter (AC) to
“00H”, and return cursor to its original
Home 0 0 0 0 0 0 0 0 1 X 72μs
position if shifted. The contents of
DDRAM remain unchanged.
Set cursor moving direction and
enable the shift of entire display.
Entry Mode 0 0 0 0 0 0 0 1 I/D S 72μs
These operations are performed
during data write and read.
Set ON/OFF of entire display (D),
Display
0 0 0 0 0 0 1 D C B cursor ON/OFF(C), and blinking of 72μs
ON/OFF
cursor position character (B).
Cursor or
Move cursor and shift display without
Display 0 0 0 0 0 1 S/C R/L X X 72μs
changing DDRAM contents.
Shift
Set interface data length
0 (DL=1: 8-bit; DL=0: 4-bit)
Function Set 0 0 0 0 1 DL X X X 72μs
RE RE=0: Basic instruction
RE=1: Extended instruction
Set CGRAM address to address
Set CGRAM counter (AC). Make sure that in
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 72μs
Address extended instruction SR=0 (scroll or
RAM address select)
Set DDRAM 0 Set DDRAM address to address
0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 72μs
Address AC6 counter (AC). AC6 is fixed to 0.
Read Busy Whether during internal operation or
not can be know by reading busy flag
Flag and 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 0μs
(BF). The contents of address
Address counter (AC) can also be read.
Write data Write data into internal RAM
1 0 D7 D6 D5 D4 D3 D2 D1 D0 72μs
to RAM (DDRAM/CGRAM/GDRAM).
Read data Read data from internal RAM
1 1 D7 D6 D5 D4 D3 D2 D1 D0 72us
from RAM (DDRAM/CGRAM/GDRAM).

“X”: don’t care

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Instruction set 2: (RE=1, extended instruction)

Instruction code Execution
time
Instruction Description
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (fosc=540
KHz)
Enter standby mode, any other
Standby
0 0 0 0 0 0 0 0 0 1 instruction can terminate the standby 1.6ms
Mode
mode.
Scroll or
SR=1: Enable vertical scroll position
RAM
0 0 0 0 0 0 0 0 1 SR SR=0: Enable CGRAM address 72μs
Address
(basic instruction)
Select
Select data in DDRAM and decide
whether to reverse the display by
Reverse 0 0 0 0 0 0 0 1 R1 R0 72μs
toggling this instruction.
R1, R0 initial value is 00
Set interface data length
(DL=1: 8-bit; DL=0: 4-bit)
Extended 1 RE=0: Basic instruction
0 0 0 0 1 DL X G 0 72μs
Function Set RE RE=1: Extended instruction
G=0: Graphic display off
G=1: Graphic display on
Set Scroll SR=1: AC5~AC0 is the address of
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 72μs
Address vertical scroll
Set GDRAM address to address
counter (AC). First set vertical
Set Graphic
0 0 0 AC3 AC2 AC1 AC0 address and then horizontal address
RAM 0 0 1 72μs
0 AC5 AC4 AC3 AC2 AC1 AC0 by consecutive writing.
Address
Vertical address range AC5~AC0
Horizontal address range AC3~AC0

“X”: don’t care

Note：
1. Make sure that ST7920 is not in busy state by reading the busy flag before sending
instruction or data. If use delay loop instead please make sure the delay time is enough.
Please refer to the instruction execution time.
2. “RE” is the selection bit of basic and extended instruction set. Each time when altering
the value of RE it will remain. There is no need to set RE every time when using the
same group of instruction set.
 LG128645-SFLYH6V - 16 -

5.1 Clear (RE=0)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 0 0 0 0 1

Clear all the display data by writing the space code “20H” to all DDRAM addresses, and
set DDRAM address to “00H” into address counter. Return cursor to the original position,
namely, bring the cursor to the upper left end of the display. The execution of clear
display instruction set entry mode to increment mode (I/D = 1).

5.2 Home (RE=0)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 0 0 0 1 X
Set DDRAM address “00H” in address counter. Return display to its original position if it
was shifted. Return cursor to the original position. Contents of DDRAM remain
unchanged.

5.3 Entry Mode Set (RE=0)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 0 0 1 I/D S

Set the moving direction of cursor and display.

I/D: Increase (I/D = 1) or decrease (ID = 0) DDRAM address by 1 when a character code
is written into or read from DDRAM.
The cursor or blink moves to the right when increased by 1 and to the left when
decreased by 1. The same applies to writing and reading CGRAM/GDRAM
S: Shift the entire display when S = 1; shift to the left when I/D = 1 and to the right when
I/D = 0. Thus it looks as if the cursor stands still and only the display seems to move.
The display does not shift when reading from DDRAM or writing/reading into/from
CGRAM/GDRAM.
When S = 0, the display does not shift.

5.4 Display ON/OFF Control (RE=0)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 0 1 D C B
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Control the display ON/OFF status, Cursor ON/OFF and Cursor Blink function.
D: The entire display is ON when D = 1 and OFF when D = 0. The display data remains in
the DDRAM when display is OFF, it can be displayed immediately by setting D = 1.
C: The cursor displays when C = 1 and does not display when C = 0.
B: When B = 1, cursor position blink is ON, the character in cursor position will blink.
When B = 0, cursor position blink is OFF.

5.5 Cursor or Display Shift (RE=0)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 1 S/C R/L X X

Shift the cursor position or display to the right or left without writing or reading display
data. This function is used to correct or search for the display.
Note that the display shift is performed simultaneously in all lines.
The contents of address counter do not change when display shift is performed.
Shift Patterns According to S/C and R/L Bits
S/C R/L Operation
0 0 Shift cursor position to the left (AC is decreased by 1)
0 1 Shift cursor position to the right (AC is increased by 1)
1 0 Shift the entire display to the left, cursor follows the display shift.
1 1 Shift the entire display to the right, cursor follows the display shift.

5.6 Function Set (RE=0)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 1 DL X RE X X

Set the interface data length, and select basic or extended instruction set.
DL: Set interface data length. Data is sent or received in 8-bit length (DB7 ~ DB0) when
DL = 1, and in 4-bit length (DB7 ~ DB4) when DL = 0. When the 4-bit length is
selected, data must be sent or received twice.
RE: When RE = 0, basic instruction set
When RE = 1, extended instruction set
Note: DL and RE can not be changed in a same instruction, make sure change DL first
and then RE.
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5.7 Set CG RAM Address (RE=0)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0

Set CGRAM address (00H~3FH) to the address counter. Data is then written/read to/from
CGRAM.
Make sure in extended instruction SR = 0 (scroll address or RAM address select).

5.8 Set DDRAM Address (RE=0)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0

Set DDRAM address to the address counter, AC6 is fixed to 0. Data is then written/read
to/from DDRAM.
DDRAM address code ranges from 80H to BFH.
Refer Section 4.12 (DDRAM Address and Character position Map)

5.9 Read Busy Flag & Address (RE=0 or 1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0

Read the busy flag (BF) and value of the address counter (AC). BF = 1 indicates that
internal operation is in progress and the next instruction will not be accepted until BF is
set to “0”. The BF status should be checked before each write operation. At the same time
the value of the address counter is read out. The address counter is used by CGRAM,
DDRAM and GDRAM, and its value is determined by the previous instruction.

5.10 Write Data to RAM (RE=0 or 1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

1 0 D7 D6 D5 D4 D3 D2 D1 D0

Write data to DDRAM/CGRAM/GDRAM and change the address by 1.

The previous address set instruction (CGRAM address set, DDRAM address set or
GDRAM address set) determines which kind of RAM is to be written. Each RAM address
must be written 2 consecutive bytes for 16-bit data. After the writing of the second byte,
 LG128645-SFLYH6V - 19 -

the address counter will automatically increase or decrease by 1 according to the (I/D)
control bit of entry mode.

5.11 Read Data from RAM (RE=0 or 1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

1 1 D7 D6 D5 D4 D3 D2 D1 D0

Read data from DDRAM/CGRAM/GDRAM and change the address by 1.

The previous address set instruction (CGRAM address set, DDRAM address set or DRAM
address set) determines which kind of RAM is to be read. Before entering the read
instruction, you must execute the address set instruction. One time of dummy read must
be required after address setting. There is no need to dummy read for the following bytes
unless a new address set instruction is issued. After the read the address will
automatically increase or decrease by 1 according to the (I/D) control bit of entry mode.

5.12 Standby (RE=1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 0 0 0 0 1

Execution of this instruction enters standby mode. Any other instruction follows this
instruction can terminate standby. The contents of DDRAM remain the same.

5.13 Vertical Scroll or RAM Address Select (RE=1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 0 0 0 1 SR

SR = 1: the vertical scroll address set is enabled.

SR = 0: the CGRAM address set (basic instruction) is enabled.

5.14 Reverse (RE=1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 0 0 1 R1 R0

Select DDRAM data to reverse the display and toggle the reverse condition by repeating
 LG128645-SFLYH6V - 20 -

this instruction. R1, R0 initial value is 00. When set the first time the display is reversed
and set the second time the display become normal.

R1 R0 Operation
80H~8FH RAM data (1 line and 3rd line of LCD) normal or reverse
st
0 0
0 1 90H~9FH RAM data (2nd line and 4th line of LCD) normal or reverse
1 0 A0H~AFH RAM data normal or reverse
1 1 B0H~BFH RAM data normal or reverse

5.15 Extended Function Set (RE=1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 1 DL X RE G 0

Set the interface data length, and select basic or extended instruction set.
DL: Set interface data length. Data is sent or received in 8-bit length (DB7 ~ DB0) when
DL = 1, and in 4-bit length (DB7 ~ DB4) when DL = 0. When the 4-bit length is
selected, data must be sent or received twice.
RE: When RE = 0, basic instruction set
When RE = 1, extended instruction set
G: Graphic display control bit
When G = 0, graphic display OFF
When G = 1, graphic display ON (logically “EXOR” with text display)
Note: DL and RE can not be changed in a same instruction, make sure change DL first
and then RE.

5.16 Set Scroll Address (RE=1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0

SR = 1: AC5~AC0 is the vertical scroll displacement address.

5.17 Set Graphic RAM Address (RE=1)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 1 0 AC5 AC4 AC3 AC2 AC1 AC0
 LG128645-SFLYH6V - 21 -

Set GDRAM address to the address counter. First set vertical address and then horizontal
address (write 2 consecutive bytes to complete vertical and horizontal address set).
Vertical address range is AC5~AC0.
Horizontal address range is AC3~AC0.
The address counter of graphic RAM (GDRAM) only increases after write for horizontal
address. After horizontal address reaches 0FH it will automatically back to 00H. However,
the vertical address will not increase as the result of the same action.

6. Interface with MPU

6.1 Parallel Interface
ST7920 is in parallel mode when PSB is set “H”. It can select 8-bit or 4-bit bus interface
by function set instruction DL control bit. MPU can control RS, RW, E and DB0 to DB7
pins to complete the data transmission.
In 4-bit transfer mode, every 8-bit data or instruction is separated into 2 parts. Higher 4
bits (DB7-DB4) data will transfer first and placed into data pins (DB7-DB4). Lower 4 bits
(DB3-DB0) data will transfer second and placed into data pins (DB7-DB4). (DB3-DB0)
data pins are not used.

8-bit interface:

4-bit interface:
 LG128645-SFLYH6V - 22 -

6.2 Serial Interface :

ST7920 is in serial interface mode when PSB is set “L”. Two terminals (SCLK and SID)
are used to complete the data transfer. Only write data is available.
When connecting several ST7920, chip select (CS) must be used. Only when CS is high
the serial clock SCLK can be accepted. On the other hand, when CS is low ST7920 serial
counter and data will be reset. Transmission will be terminated and data will be cleared.
Serial transfer counter is set to the first bit. For a minimal system with only one ST7920
and one MPU, only SCLK and SID pins are necessary. CS pin can be pulled to high.
ST7920’s serial clock (SCLK) is asynchronous to the internal clock and is generated by
MPU. When multiple instruction/data is transferred instruction execution time must be
considered. Must wait for the previous instruction to finish before sending the next.
ST7920 has no internal instruction buffer area.
When starting a transmission a start byte is required. It consists of 5 consecutive “1” (sync
character). Serial transfer counter will be reset and synchronized. Following 2 bits for
read/write (RW) and register/data select (RS). Last 4 bits are filled by “0”.
After receiving the sync character and RW and RS bits, every 8 bits instruction/data will
be separated into 2 groups. Higher 4 bits (DB7-DB4) will be placed in first section
followed by 4 “0”. And lower 4 bits (DB3-DB0) will be placed in second section followed by
4 “0”.
 LG128645-SFLYH6V - 23 -

6.3 Connection with 8051 Family MPU

8051 LG128645
8
P0.0~P0.7 DB0~DB7
8 A0
RS
74LS373 A1
R/W

Y0
3 +5V
P2.5~P2.7 74LS138
PSB

/RD E
/WR

RST /RST

a. Application Circuit 1

8051 LG128645
8
P1.0~P1.7 DB0~DB7

P3.0 RS
P3.1 R/W
P3.2 E
+5V
PSB
RST /RST

b. Application Circuit 2
 LG128645-SFLYH6V - 24 -

7. INITIALIZATION
(1). 8-Bit Initialization:
Power on
↓
Wait for more than 40ms
/RST “L”à“H”
↓
Function Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 1 X 0 X X
↓
Wait for more than 100μs
↓
Function Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 1 X 0 X X
↓
Wait for more than 37μs
↓
Display ON/OFF Control
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 1 D C B
↓
Wait for more than 100μs
↓
Display Clear
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 0 1
↓
Wait for more than 10ms
↓
Entry Mode Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 1 I/D S
↓
End of initialization
 LG128645-SFLYH6V - 25 -

(2). 4-Bit Initialization:

Power on
↓
Wait for more than 40ms
/RST “L”à“H”
↓
Function Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 0 X X X X
↓
Wait for more than 100μs
↓
Function Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 0 X X X X
0 0 X 0 X X X X X X
↓
Wait for more than 100μs
↓
Display ON/OFF Control
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 X X X X
0 0 1 D C B X X X X
↓
Wait for more than 100μs
↓
Display Clear
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 X X X X
0 0 0 0 0 1 X X X X
↓
Wait for more than 10ms
↓
Entry Mode Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 X X X X
0 0 0 1 I/D S X X X X
↓
End of initialization
 LG128645-SFLYH6V - 26 -

8. ELECTRO—OPTICAL CHARACTERISTICS (Ta=25℃)

Item Symbol Condition Min. Typ. Max. Unit Note

View Angle Φ2-Φ1 K≥2 , θ=0° -- 70 -- Deg Note1, Note2

Contrast K Φ=0°,θ=0° 3 -- -- -- Note3

tr (rise) Φ=0°,θ=0° -- 250 -- ms

Response Time Note3
tf (fall) Φ=0°,θ=0° -- 250 -- ms

Note1: Definition of Viewing Angle θ,Φ

Z( φ =0° ) Top

φ2
Y( θ =180° , φ =-90° ) φ1

X X'
θ

Bottom
Y'( θ =0° , φ =+90° )

Note2: Definition of viewing Angle Range: Φ1,Φ2

2.0

φ1 φ2
Viewing Angle
 LG128645-SFLYH6V - 27 -

Note3: Definition of Contrast

B1

Brightness

B2

Driving Voltage

Brightness of non-selected dot (B1)

Contrast=
Brightness of selected dot (B2)

Note4: Definition of Response Time

Non-selective Selective state Non-selective

state state
Brightness

90%
100%

10%

tr tf Time
 LG128645-SFLYH6V - 28 -

9. DIMENSIONAL OUTLINE
 LG128645-SFLYH6V - 29 -

10. LCD MODULE NUMBERING SYSTEM

L G 128 64 5 ― S F L Y H 6 V ― XXX
(1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) (13)

(1) Brand
(2) Module type
C - Character module
G - Graphic module
(3) Display format
Character module : Number of characters per line, two digits XX
Graphic module : Number of columns, tow or three digits XX or XXX
(4) Display format
Character module : Number of lines, one digit X
Graphic module : Number of rows, two or three digits XX or XXX
(5) Development number : One digit X ( 1~9, A~Z )
(6) LCD mode
T - TN Positive, Gray N - TN Negative, Blue
S - STN Positive, Yellow-green G - STN Positive, Gray
B - STN Negative, Blue F - FSTN Positive, White
K - FSTN Negative, Black K - FSTN Negative, Blue

(7) Polarizer mode

R - Reflective F - Transflective M - Transmissive
(8) Backlight type
N - Without backlight L - Array LED D - Edge light LED E - EL C - CCFL
(9) Backlight color
Y - Yellow-green B - Blue W - White G - Green
A - Amber R - Red M - Multi color
(10) Operating temperature range
S - Standard temperature ( 0 ~ +50 oC ) H - Extended Temperature ( -20 ~ +70 oC )
(11) Viewing direction
3 - 3:00 6 – 6:00 9 – 9:00 U – 12:00
(12) DC-DC Converter
N or Nil – Without DC-DC converter V – Built in DC-DC converter
(13) Version code
Nil – Standard product 01~ZZ – Version code
 LG128645-SFLYH6V - 30 -

11. PRECAUTIONS FOR USE OF LCD MODULE

11.1 Handing Precautions
1) The display panel is made of glass. Do not subject it to a mechanical shock by
dropping it from a high place, etc.
2) If the display panel is damaged and the liquid crystal substance inside it leaks out,
be sure not to get any in your mouth. If the substance comes into contact with your
skin or clothes, promptly wash it off using soap and water.
3) Do not apply excessive force on the surface of display or the adjoining areas of
LCD module since this may cause the color tone to vary.
4) The polarizer covering the display surface of the LCD module is soft and easily
scratched. Handle this polarizer carefully.
5) If the display surface of LCD module becomes contaminated, blow on the
surface and gently wipe it with a soft dry cloth. If it is heavily contaminated, moisten
cloth with one of the following solvents.
· Isopropyl alcohol
· Ethyl alcohol
Solvents other than those mentioned above may damage the polarizer.
Especially, do not use the following:
· Water
· Ketone
· Aromatic Solvents
6) When mounting the LCD module make sure that it is free of twisting, warping, and
distortion. Distortion has great influence upon display quality. Also keep the
stiffness enough regarding the outer case.
7) Be sure to avoid any solvent such as flux for soldering never stick to Heat-Seal.
Such solvent on Heat-Seal may cause connection problem of heat-Seal and TAB.
8) Do not forcibly pull or bend the TAB I/O terminals.
9) Do not attempt to disassemble or process the LCD module.
10) NC terminal should be open. Do not connect anything.
11) If the logic circuit power is off, do not apply the input signals.
12) To prevent destruction of the elements by static electricity, be careful to maintain
an optimum work environment.
· Be sure to ground the body when handling the LCD module.
· Tools required for assembly, such as soldering irons, must be properly grounded.
· To reduce the amount of static electricity generated, do not conduct assembly
and other work under dry conditions.
· The LCD module is coated with a film to protect the display surface. Exercise
care when peeling off this protective film since static electricity may be
generated.

11.2 Storage Precautions

 LG128645-SFLYH6V - 31 -

1) When storing the LCD module, avoid exposure to direct sunlight or to the light of
fluorescent lamps and high temperature/high humidity. Whenever possible, the
LCD module should be stored in the same conditions in which they were shipped
from our company.
2) Exercise care to minimize corrosion of the electrodes. Corrosion of the electrodes
is accelerated by water droplets or a current flow in a high humidity environment.

11.3 Design Precautions

1) The absolute maximum ratings represent the rated value beyond which LCD module
can not exceed. When the LCD modules are used in excess of this rated value, their
operating characteristics may be adversely affected.
2) To prevent the occurrence of erroneous operation caused by noise, attention must
be paid to satisfy VIL, VIH specification values, including taking the precaution of
using signal cables that are short.
3) The liquid crystal display exhibits temperature dependency characteristics. Since
recognition of the display becomes difficult when the LCD is used outside its
designated operating temperature range, be sure to use the LCD within this range.
Also, keep in mind that the LCD driving voltage levels necessary for clear displays
will vary according to temperature.
4) Sufficiently notice the mutual noise interference occurred by peripheral devices.
5) To cope with EMI, take measures basically on outputting side.
6) If DC is impressed on the liquid crystal display panel, display definition is rapidly
deteriorated by the electrochemical reaction that occurs inside the liquid crystal
display panel. To eliminate the opportunity of DC impressing, be sure to maintain
the AC characteristics of the input signals sent to the LCD Module.

11.4 Others
1) Liquid crystals solidify under low temperatures (below the storage temperature
range) leading to defective orientation or the generation of air bubbles (black or
white).
Air bubbles may also be generated if the LCD module is subjected to a strong
shock at a low temperature.
2) If the LCD modules have been operating for a long time showing the same display
patterns, the display patterns may remain on the screen as ghost images and a
slight contrast irregularity may also appear. A normal operating status can be
regained by suspending use for some time. It should be noted that this
phenomenon does not adversely affect performance reliability.
3) To minimize the performance degradation of the LCD modules resulting from
destruction caused by static electricity, etc., exercise care to avoid touching the
following sections when handling the module:
· Terminal electrode sections.
· Part of pattern wiring on TAB, etc.