Saini 2016
Saini 2016
Saini 2016
Abstract-This paper proposes a technique to track and reg DC in put voltage DC output v oltage
ulate the "true average" current in any branch of a pulse-width Pulse-width
modulated dc-dc power converter. An example buck converter
Duty c ycle modulated dc-de Ind uctor cu r rent
in continuous-conduction mode is considered. A comprehensive power converter
characterization is presented for the proposed scheme. An over
all dc and small-signal analysis of the inner current loop is
performed. The current average current-mode control methods
suffer from switching instability at low duty ratios due to a
b.
large ripple in the sensed current. Moreover, the current error
amplifier's high-frequency pole located at the switching frequency
neither alleviates the stability issue nor improves the dynamic t
Fig. 2 shows the circuit of the average current-mode con where il is the low-frequency, small-signal inductor cur
trolled buck dc-dc converter producing a reduced ripple in the rent. The feedback path low-pass filter eliminates the high
control voltage. The buck converter comprises of an inductor frequency component RslliL' The dc component Rsh is
L, a filter capacitor C, a switch S, a diode Do , and a load compared with the reference voltage set by the outer voltage
resistor RL. The switching frequency is is liT and duty
= loop. The low-frequency, small-signal disturbance Rsil is
cycle is D. The supply voltage is VI and the output voltage is attenuated by the error amplifier. Due to space constraints,
Va. The resistance Rs is placed in the inductor branch to sense only the small-signal block diagram of the closed inner current
the inductor current. A unity gain differential amplifier is used loop is shown in this paper. Fig. 3 shows the complete
to measure the potential difference across Rs, whose output small-signal block diagram of the buck dc-dc converter with
is the sensed voltage VRs. The voltage VRs is supplied to the average current-mode control. The outer voltage loop sets the
input of a low-pass filter, designed to eliminate the switching reference voltage to the inner current loop. The small-signal
frequency ripple component. Since the output voltage of the linear equivalent model of the buck dc-dc converter has been
filter Vp I and the reference voltage VRI to the inner loop must derived using circuit averaging technique in [6]. The small
be equal, a non-inverting amplifier with a finite gain T f o is signal model is adopted from [5] and its duty cycle-to-inductor
used. The control voltage Vel at the output of the controller current transfer function Tpi, inductor current to output voltage
is compared with a sawtooth signal Vsaw, which generates the transfer function Tv , and duty cycle-to-output voltage transfer
required duty cycle D. function Tp are presented here. Detailed derivations for Tpi,
Tv , and Tp are provided in [5].
B. Steady-State Operation
d S
The low-pass filter reduces or theoretically eliminates the W() �w·
0
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where Tm, Tpi, and TJ are given in (4), (6), and (11), respec
tively. Also
(13)
From (12)
(14)
Fig. 3. Small-signal block diagram of the closed inner current loop and outer where dc gain TkiO is given by
voltage loop (highlighted in gray).
2 -
_ VIRs (1+RaJ ) . (IS)
JWo VTm(RL+ r) RaJl
the undamped natural frequency is
Thus, one may observe that the overall transfer function Tki
does not depend on the filter cutoff frequency.
(7)
LC(RL+rc)' IV. DESIGN EXAMPLE
the frequency of LHP zero is A. Power Stage, Low-Pass Filter, and Non-Inverting Amplifier
Wzi
fzi = - = -
21f
1 1
21f C(RL+ rc) .
, (8)
A buck dc-dc converter with the following design specifica
tions is considered to analyze the inner loop transfer functions:
supply voltage is VI = 28 V, output voltage is Va = 14 V,
and the damping coefficient is switching frequency is f8= 100 kHz, and RL = 10 rl. The
C(RLrC+rcr+ RLr)+L selected MOSFET was IRFS40 by International Rectifiers and
�= . (9)
the selected diode was MBRlO100 by Vishay Semiconductors.
2JLC(RL+ rc)(RL+r)
From the datasheets, the on-state resistance of the MOSFET
In the above expressions, rc represents the parasitic resistance and the on-resistance of the diode were rDS = 0.077 rl
of the filter capacitor and r represents the equivalent averaged and RF = 15 mrl, respectively. The required duty cycle
resistance given as r = DrDS + (1 - D)RF + rL, where at an efficiency of 90% is D = 0.556, the inductance to
rDS is the on-state resistance of the MOSFET, RF is the on ensure continuous-conduction mode operation is 301 ILH and
resistance of the diode, and rL is the dc parasitic resistance the capacitance is C = 68 fLF with its esr rc = 0.111 rl.
of the inductor. The transfer function between the inductor The average value of the inductor current is calculated as
current and the output voltage is h = Va/RL = 14/10 = l.4 A.
S+ 1+ 8 The amplitUde of the sawtooth voltage waveform VTm =
Va Wz w-;;
Tv(s) = --:- = Tvx- -
- = Tvo 8' (10) 5 V. The control voltage is VCI = DVTm = 0.556 x 5 =
1.[ S+ Wzi 1+w,,;
2.78 V. Thus, the reference voltage VRI of inner loop must be
where Tvx = RLrCC/[(RL+ rc)C], the gain at dc is Tvo = set at 2.78 V to attain an output voltage Va = 14 V and an
RL, and the LHP zero is fz = wz/21f = 1/(21fCrc). inductor current IL = 1.4 A. The value of the sense resistor
is chosen as Rs = 0.1 rl. The average value of sensed voltage
B. Transfer Function of Filter and Non-Inverting Amplifier TJ
value VRs = RJL = 0.1 x 1.4 = 0.14 V. Therefore, the
The low-pass filter stage composed of a resistor RJ and dc gain of the non-inverting amplifier is TJ o = VFI/VRs ::::::
a capacitor CJ is connected to the non-inverting terminal VRI/VRS = 2.78/0.14 = 19.86. Using (II) Ral = 1 krl and
of the non-inverting amplifier. The non-inverting amplifier Raj 18.8 krl. Resistance of Raj 20 krl was chosen.
= =
is composed of two resistors RaJl and Raj. The complete The small-signal ac parameters of the open-loop power stage
transfer function is transfer functions are as follows. Using (7), (8), and (9), fo =
1.29 kHz, fzi = 307.43 Hz, and � = 0.1943. The equivalent
averaged resistance is r = 0.2578 rl. For this design, the
upper cutoff frequency fpJ = 0.5fs = 50 kHz was selected.
Choosing CJ = 1 nF yields
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30 60
20
40
10
iii iii
'"
- 0 '" 20
I-� -10 ,,-
-
-20
-30 -20
-40
90
45 -45
�
'" -45 � -90
I' c
0
"0
-90
-135 -135
8
-1 0
10 ' 10 ' 10' 10 ' 10 ; 10 ' 10'
f (Hz) f (Hz)
Fig. 4. Theoretically obtained magnitude and phase plots of Tki transfer Fig. 5. Theoretically obtained magnitude and phase plots of loop gain Ti. (a)
function. (a) Magnitude of Tki with dc gain TkiO = 1.08 V IV = 0.718 dB Magnitude of Ti with dc gain TiO � 562.34 V IV = 55 dB with an improved
and I� = 6 kHz. (b) Phase of Tki with ¢Tki(I�) = -94.7°. crossover frequency Ie = 10 kHz. (b) Phase of Ti with ¢Ti(Ie) = - 117 . 5 °
and PM = 62.5°.
of the overall transfer function Tki of the buck converter with
an uncompensated inner loop. The magnitude plot has a dc Rl = 1.1 kD, and R2 = 2 kD. The zero of the control circuit
gain ITkiOI = 1. 08 VN = 0. 718 dB and a crossover frequency is located as fzei = 1 kHz.
f� = 6 kHz. The phase of Tki at f� = 6 kHz is CPTki(f�) =
C. Loop Gain of Inner Current-Loop Ti
-94.7°. The characteristics of Tki show a low gain at dc, a
low crossover frequency, and the phase at crossover frequency The loop gain of the compensated inner current loop is
must be modified to achieve a phase margin of 60°. The
stability of the inner loop at high frequencies is ensured by the (21)
pole of the low-pass filter. The dc gain and crossover frequency
or equivalently
must be boosted to a higher value. A classical proportional
integral circuit, satisfies these requirements and its design is (s+ wz�)(s+ Wzei) , .
Ti = Tix 2 (22)
presented in the following section. ( +
ss w pJ )(s +2�wos+ w5) '
B. Transfer Function of Control Circuit Tei where
A proportional-integral circuit as shown in Fig. I has a
pole at the origin that boosts the dc gain and a zero at Tix = TkixTeix = �
R8
1+-
RaJ
WJTpiX
(
R2
- '
) (23)
V Tm RaJl Rl
fe/l0 to improve the crossover frequency, where fe is the
desired crossover frequency, and fe > f�. The gains of the Manipulating (22) yields
proportional and integral parts of the control circuit are
(1+ 8)(1+
_Wzi _ 8)
27Tfe T,. = T·20 _ _ ) ( 1+
Wzci
� )' (24)
s(l+ 8 �+ 8
K2 = Kp' (17) Wpf Wo w�
10
The expressions to determine component values are where TiO is the gain at s = 0 given by
Rl =
1
and (18) T iO TkiO TciO
VJR8
1+
RaJ R2
-- - .
( ) (25)
VTm(RL+ RaJl Rl
= =
KiC1 r)
Thus, the transfer function Tei of the control circuit is The magnitude and phase plots of the loop gain transfer
S+
1 function Ti are shown in Fig. 5. The dc gain is TiO :::::: 55 dB=
Vei Kp(s+Wzei) R2 R:;c;
Te., - 562.34 VN, the crossover frequency is fe = 10 kHz, and the
_ _ _
- - ' (19)
Vei S Rl S
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-5
� ____
_
m -10
_
_
-
-
"- -
�_
�I'! -15
-20 . , , ,
� ::": �
�
�
'0
-45
-90 "----�����-'---
10'
- --'---
-- ��'--'---'--'--'-'-
1 0'
-���-'--"'
--- ''''''='
10'
�V1:: ::: V}: : ::V}:::: I7L::: :: : ::
i i i i i i
f (Hz) 9.64m 9.65m 9.66m 9.67m 9.68m 9.69m
I(s)
20 ,----��---�---�,-
10
iii
� -10
1.9 1'-
�"& -20
1.B
-30
-40
1.7
�
.-�
1.6
� -45
"- 1.5
"
"
(} -90
1.4
-135 '-
10' 10' 10; 1.3
-����ll-��-'-'.L_�-'-LiJ'--��"""
f (Hz) -2 -1 1
t(ms)
Fig_ 7. Theoretically obtained magnitude and phase plots of closed-loop Fig. 9. Theoretically obtained plot of the inductor current iL for a step change
reference voltage-to-output voltage transfer function Tpicl. (a) ITpiclI· (b) in the reference voltage v RI by 1 V.
¢Tpicl-
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20 vO (V) : t(s)
20.0
, ,----�----� vO
19 19.0
18
18.0
17.0
�
_ 17
� '!? 16.0
0
"
16 15.0
14.0
15
13.0 I
14 4.0m 6.0m 7.0m
3.0m 5.0m
t(s)
13
-2 -1 1 Fig. 12. SABER simulated waveform of output voltage Va for a step change
t(ms) in the reference voltage V RI by 1 V.
Fig. II. Theoretically obtained plot of the output voltage Va for a step change
in the reference voltage V RI by 1 V.
functions have been derived. The loop gain transfer function
has been established. The critical path closed-loop transfer
VI. MODEL VALIDATION THROUGH SIMULATIONS functions such as reference voltage to the inductor current
The average current-mode controlled buck dc-dc converter and the output voltage of the converter have been derived. The
in Fig. 2 was designed, built, and tested on Saber circuit sim analysis in this paper have led to the following conclusions:
ulator to verify the correctness of the theoretical predictions. (a) The ripple in the feedback voltage is reduced by the low
The values of the components used in the simulations have pass filter due to which the control voltage is nearly dc. Thus,
been provided in Sections IV and IV-B. Fig. 8 shows the problems such as switching instability or peak current sensing
steady-state waveforms of the inductor current, feedback volt are avoided. These were evident drawbacks in existing average
age, control voltage, and the sawtooth voltage. The feedback current-mode control schemes. (b) The true average compo
and control voltages are nearly dc and their values correspond nent of the sensed voltage is tracked and regulated. (c) Current
to the true average value of inductor current. The ripple in the in any branch in the converter, irrespective of the magnitude
feedback voltage was reduced to 36% of its value measured of the ripple can be controlled. (c) The characteristics of the
in the sensed voltage. loop gain are unaffected by the feedback path low-pass filter
Fig. 9 shows the theoretically obtained current response for up to the crossover frequency. Therefore, the control circuit
a step change in the reference voltage VRI from 2.78 V to can work independently to optimize the dynamic performance
3.78 V. The plot was obtained using the transfer function of the converter. (d) Noise immunity is enhanced by using the
provided in (26). The initial value is 1.4 A and the final value low-pass filter in the feedback path. The low-pass filter can be
is 1.9 A. The step change is 6.h = 1.9 - 1.4 = 0.5 A. placed either in the feedback path (as described in this paper)
Simulation was performed on the circuit and the resulting or in the forward path (before the current error amplifier).
step response plot is as shown in Fig. 10. The average value However, it was observed by the authors that an ideal location
obtained through the circuit simulation is identical to the plot for the filter was the feedback path due to better loop gain
obtained in Fig. 9. The dc gain obtained through the Bode characteristics. Detailed comparison of the performance of the
plot of Tiel is TiclO = -6.2 dB= 0.489 . Thus, the value converter for these two cases is a topic for future study.
6.h = Ticlo6. VRI = 0.489 x 1 = 0.489 A agrees with REFERENCES
simulation results. Similar analysis was performed to validate
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