LEC3 Assembly Programming
LEC3 Assembly Programming
LEC3 Assembly Programming
Microprocessors
and Applications
Lecture 3
Assembly
Programming
Outline
▪ Introduction.
▪ Pipelining.
▪ Stack Operations.
▪ Addressing Modes.
▪ Assembler Directives.
▪ Assembly Programs.
▪ References.
2
Microprocessor-Based Microcomputer
3
Intel 8086 Architecture
4
Pipelining
❖ In 8085 microprocessor, the CPU could either fetch or execute at a given time. CPU had
to fetch an instruction from the memory, then execute it, then fetch again and execute
it and so on.
❖ Pipelining is the simplest form to allow the CPU to fetch and execute at the same time.
Note that the fetch and execute times can be different.
5
Registers of 8086 Microprocessor
▪ AX is used for the accumulator, BX is used for base addressing, CX
is used for counter loop operations, DX is used to point out data
in I/O operations.
6
Registers of 8086 Microprocessor
▪ [Link1]
▪ [ALU]
▪ [SEG REGs]
▪ [FLAGs]
7
Program Segments (8086 Real Mode)
8
Assembly Program Structure
Write an 8086-assembly
located at offset A1 to
9
Flag Register
• The Flag Register (FR) and bit fields:
• The Flag register is a 16-bit register sometimes referred as the status register. Although
the register is 16-bit. Not all the bits are used.
• Conditional flags: 6 of the flags are called the conditional flags, meaning that they
indicate some condition that resulted after an instruction was executed. These 6 are:
CF, PF, AF, ZF, SF, and OF.
10
Flag Register
• Manipulating the Flag Register:
• There are two instructions that can be used to use/change the content of
the flag register.
• PUSHF Instruction:
PUSHF ; Copy the flag register into stack
SP register is decremented by 2
Example: Copy the content of the flag register into register AX.
PUSHF ; copy the content of Flag register into the stack.
POP AX ; copy from the stack into AX
11
Flag Register
• Manipulating the Flag Register:
• There are two instructions that can be used to use/change the content of
the flag register.
• POPF Instruction:
Example: Clear the flag bits. (Make the flag bits to be all 0)
MOV AX, 0000H
PUSH AX ; now top of the stack contains 16-bit 0.
POPF ; copy the content of stack into flag register.
12
Flag Register
• Flag Register and ADD instruction
• The flag bits affected by the ADD instructions are: CF, PF, AF, ZF, SF and OF. The OF will
be studied later.
• Example: Show how the flag register is affected by the addition of 38H and 2FH.
• The following example shows the implementation of the loop concept in the program
which adds 5 bytes of data. Assume that the beginning address of the array of 5 bytes
starts from offset address 0200H in the data segment.
15
Addressing Modes
• The CPU can access operands (data) in various ways, called addressing modes.
In 80x86, there are 7 addressing modes:
1. Register.
2. Immediate.
3. Direct.
4. Register indirect.
5. Based relative.
6. Indexed relative.
7. Based indexed relative.
1. Register addressing mode:
❖ Involves the use of registers.
❖ Memory is not accessed, so faster.
❖ Source and destination registers must match in size.
Example: MOV BX , DX ; possible
MOV ES , AX ; possible
ADD AL , BH ; possible
MOV AL , CX ; not possible
16
Addressing Modes
2. Immediate addressing mode:
❖ Source operand is a constant.
❖ Possible in all registers except segment , instruction pointer, and flag registers.
Ex: Find the physical address of the memory location and its content after the execution of the
following operation. Assume DS = 1512H
MOV AL , 99H ; Physical address of DS:3518 => 15120+3518=18638H
MOV [3518] , AL ; The memory location 18638H will contain the value 99H
17
Addressing Modes
4. Register indirect addressing mode:
❖ The address of the memory location where the operand resides is held
by a register.
❖ SI, DI and BX registers are used as the pointers to hold the offset
addresses.
❖ They must be combined with DS to generate the 20-bit physical address.
Ex: MOV AL , [BX] ; moves into AL the contents of the memory location pointed to by DS:BX
18
Addressing Modes
5. Based relative addressing mode:
❖ BX and BP are known as the base registers. In this mode base registers as well as
a displacement value are used to calculate the effective address.
❖ The default segments used for the calculation of Physical address (PA) are DS for
BX, and SS for BP.
Ex:
MOV CX , [BX]+10 ; move DS:BX+10 and DS:BX+11 into CX
; PA = DS (shifted left) +BX+10
▪ Note that, the content of the low address will go into CL and the high address
contents will go into CH.
▪ There are alternative coding: MOV CX , [BX+10]
▪ BX+10 is the effective address.
Ex:
MOV AL , [BP]+5 ; PA = SS (shifted left) + BP+5
19
Addressing Modes
6. Indexed relative addressing mode:
❖ Indexed relative addressing mode works the same as the based relative
addressing mode.
❖ Except the registers DI and SI holds the offset address.
Ex: MOV DX , [SI]+5 ; PA=DS(shifted left)+SI+5
MOV CL , [DI]+20 ; PA=DS(shifted left)+DI+20
21
Assembler Directives
Directives are statements that give directions to the assembler about how it should translate the
assembly language instructions into machine code.
An assembly language instruction consists of four fields,
[label:] mnemonic [operands] [ ; comments ]
1. Brackets indicate that the field is optional. Brackets are not typed.
2. The label field allows the program to refer to a line of code by name. In a line of assembly
language program there can be mnemonic (instruction) and operand(s).
Example : ADD AL , BL
MOV AX , 6764H
3. Alternatively, instead of these two fields there can be directives. Directives are used by the
assembler to organize the program as well as other output files. The following program adds two
bytes to calculate their sum. IN this program SEGMENT, DB, ENDS, ASSUME, END, and ENDP are
examples of directives.
4. The comment field begins with a “;”
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Assembly Program Structure
Write an 8086-assembly
located at offset A1 to
23
Sample Assembly Program
STSEG SEGMENT ; A Sample Assembly Language Program using FULL SEGMENT DEFINITION
DB 64 DUP (?)
STSEG ENDS
;--------------------------------------------------
DTSEG SEGMENT
DATA1 DB 52H
DATA2 DB 29H
SUM DB ?
DTSEG ENDS
;--------------------------------------------------
CDSEG SEGMENT
ASSUME CS:CDSEG , DS:DTSEG , SS:STSEG
CDSEG ENDS
END ; this is the program exit point 24
Assembler Directives
• Program segments:
label SEGMENT [options]
; place the statements belonging to this segment here
label ENDS
▪ The stack segment defines storage for the stack, the data segment defines the data that the
program will use and the code segment contains the Assembly Language instructions.
Where DB 64 DUP (?) ; directive reserves 64 bytes of memory for the stack.
25
Assembler Directives
• Data segment definition:
▪ There are three data items in this sample program: DATA1, DATA2 and SUM. Each is
defined as DB (define byte).
▪ The DB directive is used to allocate memory in byte-sized chunks. DW (define word)
allocates 2 bytes of memory. DATA1 and DATA2 have initial values but SUM is
reserved for later use.
Load AL and BL with DATA1 and DATA2 and ADD them together, and store the result in
SUM.
MOV AL , DATA1 ; get the first operand
MOV BL , DATA2 ; get the second operand
ADD AL , BL ; add the operands
MOV SUM , AL ; store result in location SUM
The last two instructions returns the control to the operating system.
MOV AH , 4CH ; set up to
INT 21H ; return to DOS
27
Control Transfer Instructions
• In the conditional jump, control is transferred to a new location if a certain condition is
met. JC (jump if carry) [CF is checked], JNZ (jump if not zero) [ZF is checked].
Mnemonic Condition Tested “Jump if …”
JA/JNBE (CF=0) and (ZF=0) above/not below nor equal
JAE/JNB CF=0 above or equal/not below
JB/JNAE CF=1 below/not above nor equal
JBE/JNA (CF or ZF)=1 below or equal/not above
JE/JZ ZF=1 equal/zero
JNE/JNZ ZF=0 not equal/not zero
JG/JNLE ((SF xor OF) or ZF) = 0 greater/not less nor equal
JGE/JNL ((SF xor OF) = 0 greater or equal/not less
JL/JNGE ((SF xor OF) = 1 less/not greater nor equal
JLE/JNG ((SF xor OF) or ZF) = 1 less or equal/not greater
JC CF=1 carry
JNC CF=0 not carry
JNO OF=0 not overflow
JNP/JPO PF=0 not parity/parity odd
JNS SF=0 not sign
JO OF=1 overflow
JP/JPE PF=1 parity/parity equal
JS SF=1 Sign
Note: “above” and “below” refer to the relationship of two unsigned values; “greater” and
“less” refer to the relationship of two signed values.
28
Assembler Data Directives
ORG (Origin): ORG is used to indicate the beginning of the offset address. The number
after ORG can be either in hex or decimal. Mostly used in Data segment.
Ex: DSEG segment
DATA_IN DB 93H, 86H, 3BH, 5AH
ORG 0010H
SUM DW ? ; SUM variable is at offset 0010H in DS.
DB (Define Byte) : DB allows allocation of memory in bytes for decimal, binary, hex and ASCII.
Ex: DATA Segment
DATA1 DB 25 ; DECIMAL D IS OPTIONAL
DATA2 DB 10001001B ; BINARY
DATA3 DB 12H ; HEX
ORG 0010H
DATA4 DB ‘2591’ ; ASCII NUMBERS
0RG 0018H
DATA5 DB ? ; SET ASIDE A BYTE
ORG 0020H
DATA6 DB ‘My name is Joe’ ; ASCII CHARACTERS
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Assembler Data Directives
DUP (duplicate): DUP is used to duplicate a given number of characters.
Ex: DATA1 DB 0FFH, 0FFH, 0FFH, 0FFH ; FILL 4 BYTES WITH FF
DATA2 DB 4 DUP(0FFH) ; FILL 4 BYTES WITH FF
Ex: DATA3 DB 32 DUP (?) ; SET ASIDE 32 BYTES
DATA4 DB 5 DUP (2 DUP (99)) ; FILL 10 BYTES WITH 99
DT(define ten bytes): Allocates 10 bytes of memory space. Mostly used for BCD
numbers.
PUSH source ; ; Copy the content of source (16-bit register) into stack
Example: Given that SP = 1456H, what are the contents of AX, top of the stack and SP after the
execution of the following instruction.
MOV AX , 2174H
PUSH AX
PUSH AX
PUSH DI
PUSH DX
Solution:
Note that in 80x86 the lower byte of
the register is stored to the lower
address. (Little Endian Convention)
34
Pushing and Popping Operations
• Pop Instruction:
Loading the contents of the stack into the CPU register is called a pop.
POP destination; Copy the top of the stack into destination (16-bit register)
mnemonic operand * SP register is incremented by 2
35
Pushing and Popping Operations
• Popping the stack:
Loading the contents of the stack into the CPU register is called a pop.
Example: Assume that the stack is shown below, and SP = 18FAH, show the contents of the
stack and registers as each of the following instructions is executed.
POP CX
POP DX
POP BX
Solution:
Note that in 80x86 the byte in the
Low address goes into the low byte.
the byte in the high address goes into
the high byte. (Little Endian Convention)
36
Unsigned Addition
Unsigned numbers are defined as data in which all the bits are used to represent data
and no bits are set aside for the positive and negative sign.
❖ For 8-bit, data operand can be between 00H and FFH (0 to 255 decimal).
❖ For 16-bit, data operand can be between 0000H and FFFFH ( 0 to 65535 decimal).
If CF=1 prior to this instruction, then after execution of this instruction, source is added to
destination plus 1. If CF=0, source is added to destination plus 0. Used widely in multibyte
and multiword additions.
Note that these numbers are converted to hex by the assembler as follows: 125=7DH,
235=EBH, 197=C5H, 91=5BH, 48=30H.
38
Addition of Individual Byte Data
;This program adds 5 unsigned byte numbers.
DATA segment
COUNT EQU 05
DATA_1 DB 125 , 235 ,197 , 91 , 48
ORG 0008H
SUM DW ?
DATA ends
CODE Segment
MOV AX, ATA
MOV DS, AX
MOV CX, COUNT ;CX is the loop counter
MOV SI, OFFSET DATA ;SI is the data pointer
MOV AX, 00 ;AX will hold the sum
BACK: ADD AL, [SI] ;add the next byte to AL
ADC AH, 00 ;add 1 to AH if CF =1
INC SI ;increment data pointer
DEC CX ;decrement loop counter
JNZ BACK ;if not finished, go add next byte
MOV SUM, AX ;store sum
MOV AH,4CH
INT 21H ;go back to DOS
END
39
Addition of Individual Byte Data
• Unsigned Addition:
In the above program following lines of the program can be replaced with an
alternative coding as follows.
40
Addition of individual word data
Ex: Write a program to calculate the total sum of 5 words of data. Each data value represents
the yearly wages of a worker. This person does not make more than $65535 (FFFFH) a year.
The decimal data is as follows: 27345, 28521, 29533, 30105, and 32375.
Classwork: Repeat the previous program for the addition of the five words given above.
Execution steps:
AL 3F 0011 1111 0011 1111
– BH – 23 – 0010 0011 + 1101 1101 (2’s complement)
AL 1C 0001 1100 1 0001 1100 (CF=0) Step 3
CF=0, ZF=0, AF=1, PF=0, SF=0.
43
Subtraction of Unsigned Numbers
▪ SUB (Subtract) Instruction:
▪ If the CF=0, the result is positive, and the destination has the result.
▪ If the CF=1, the result is negative, and the destination has the 2’s complement.
▪ of the result. NOT and INC increment instructions can be used to change it.
Ex: ; from the data segment:
DATA1 DB 4CH
DATA2 DB 6EH
RESULT DB ?
; from the code segment:
MOV DH , DATA1 ; load DH with DATA1 value (4CH)
SUB DH ,DATA2 ; subtract DATA2 (6E) from DH (4C)
JNC NEXT ; if CF=0 jump to NEXT target
NOT DH ; if CF=1 take the 1’s complement
INC DH ; and increment to get 2’s complement
NEXT: MOV RESULT , DH ; save DH in RESULT
Analysis: Following the 3 steps for “SUB DH , DATA2”
4C 0100 1100 0100 1100
– 6E 0110 1110 2’s comp + 1001 0010
– 22 0 1101 1110 CF=1(Step 3) the result is negative
44
Subtraction of Unsigned Numbers
45
Subtraction of Unsigned Numbers
▪ SBB (Subtract with borrow) Instruction:
Ex: Analyze the following program:
DATA Segment
DATA_A DD 62562FAH
DATA_B DD 412963BH
RESULT DD ?
….. …..
MOV AX , WORD PTR DATA_A ; AX=62FA
SUB AX , WORD PTR DATA_B ; AX=AX – 963B
MOV WORD PTR RESULT , AX ; save the result
MOV AX , WORD PTR DATA_A +2 ; AX=0625
SBB AX , WORD PTR DATA_B +2 ; SUB 0412 with borrow
MOV WORD PTR RESULT +2 , AX ; save the result
Note: PTR (Pointer) Directive is used to specify the size of the operand. Among the options
For size are BYTE, WORD, DWORD and QWORD.
Solution: After the SUB, AX = 62FA – 963B = CCBF and the carry flag is set. Since CF=1, when
SBB is executed, AX = 625 – 412 – 1 = 212. Therefore, the value stored in RESULT is 0212CCBF.
46
Multiplication of Unsigned Numbers
▪ Byte x Byte:
▪ One of the operands must be in AL .
▪ The other operand can be either in a register or in memory.
▪ After the multiplication, the result is in AX.
CODE Segment
MOV AL , 25H ; a byte is moved to AL
MOV BL , 65H ; immediate data must be in a register
MUL BL ; AX = AL x BL = 25 x 65
MOV RESULT , AX ; result is saved
47
Multiplication of Unsigned Numbers
▪ Byte x byte:
Ex: DATA Segment
DATA1 DB 25H
DATA2 DB 65H
RESULT DW ?
48
Multiplication of Unsigned Numbers
▪ Word x Word:
One of the operands must be in AX . The other operand can be either in a register
or in memory.
After the multiplication the lower word is in AX and the higher word is in DX.
49
Multiplication of Unsigned Numbers
▪ Word x Byte:
• Similar to word x word, but AL contains byte operand and AH must be zero.
Ex: DATA Segment
DATA5 DB 6BH
DATA6 DW 12C3H
RESULT3 DW 2 DUP ?
...
MOV AL , DATA5 ; AL holds byte operand
SUB AH , AH ; AH must be cleared
MUL DATA6 ; byte in AL multiplied by word operand
MOV BX , OFFSET RESULT3 ; BX points the storage for product
MOV [BX] , AX ; AX holds lower word
MOV [BX]+2 , DX ; DX holds higher word
50
Division of Unsigned Numbers
▪ Byte / Byte:
• Numerator must be in AL and AH must be set to zero.
• Denominator cannot be immediate but can be in memory or in a register.
• After the division AL will have the quotient and AH will have the remainder.
Ex: DATA Segment
DATA7 DB 95
DATA8 DB 10
QUOT1 DB ?
REMAIN1 DB ?
; using direct mode
MOV AL , DATA7 ; AL holds numerator
SUB AH , AH ; AH must be cleared
DIV DATA8 ; divide AX by DATA8
MOV QUOT1 , AL ; quotient = AL = 09
MOV REMAIN1 , AH ; remainder = AH = 05
; using register addressing mode
MOV AL , DATA7 ; AL holds numerator
SUB AH , AH ; AH must be cleared
MOV BH , DATA8 ; move denominator to a register
DIV BH ; divide AX by BH
MOV QUOT1 , AL ; quotient = AL = 09
MOV REMAIN1 , AH ; remainder = AH = 05
; using the immediate addressing mode will give an error
MOV AL , DATA7
SUB AH , AH
DIV 10 ; X : immediate mode is not allowed
51
Division of Unsigned Numbers
▪ Word / Word:
• Numerator must be in AX and DX must be cleared
• Denominator can be in memory or in a register.
• After the division AX will have the quotient and DX will have the remainder
Ex: DATA Segment
A DW 10050
B DW 100
QUOT2 DW ?
REMAIN2 DW ?
CODE Segment
.......
MOV AX ,A ; AX holds numerator
SUB DX , DX ; DX must be cleared
MOV BX , B ; BX is used for denominator
DIV BX ; divide AX by BX
MOV QUOT2 , AX ; quotient = AX = 64H (100 )
MOV REMAIN2 , DX ; remainder = DX = 32H (50)
52
Division of Unsigned Numbers
▪ Word / Byte:
• Numerator must be in AX.
• Denominator can be in memory or in a register.
• After the division AL will have the quotient and AH will have the
remainder.
CODE Segment
MOV AX , 2055 ; AX holds numerator
MOV CL , 100 ; BX is used for denominator
DIV CL ; divide AX by CL
MOV QUO , AL ; AL holds the quotient = AL = 14H (20)
MOV REM , AH ; AH holds the remainder = AH = 37H (55)
53
Division of Unsigned Numbers
▪ Double-Word / Word:
• Numerator must be in AX and DX, least significant word in AX and most
significant word in DX.
• Denominator can be in memory or in a register.
• After the division AX will have the quotient and DX will have the remainder.
Ex: DATA Segment
DATA1 105432
DD
DATA2 10000
DW
QUOT DW ?
REMAIN DW
?
CODE Segment
:
MOV AX , WORD PTR DATA1 ; AX holds the lower word
MOV DX , WORD PTR DATA1+2 ; DX holds the higher word of the numerator
DIV DATA2
MOV QUOT , AX ; AX holds the quotient
MOV REMAIN , DX ; DX holds the remainder
“Divide Error”: If the denominator is zero (dividing any number by 00) and if the quotient is too large for the
assigned register, “Divide Error” message will be displayed.
54
References
▪ L e c t u r e N o te s o n M i c ro p ro c e s s o r s a n d I n te r f a c i n g
Devices, Department of Electrical and Electronics
E n g i n e e r i n g , I n s t i t u te o f A e r o n a u t i c a l E n g i n e e r i n g ,
India. [Link]
➢ 8 0 8 6 A r c h i te c t u r e ( 1 4 – 2 0 ) .
➢ Addressing Modes & Assembly (43 – 45).
➢ Instruction Set (pages 47 – 63).
➢ S t a c k O p e ra t i o n s ( p a g e 4 8 ) .
➢ Assembler Directives (pages 64 – 67).
➢ A s s e m b l y P ro g ra m s ( p a g e s 6 9 - 8 0 ) .
55
References
56