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    Experiment 2 - CSC 204L-1

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    shirazimmunirsets

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    Experiment 2 - CSC 204L-1

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    shirazimmunirsets
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    Experiment 2_CSC 204L-1

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    11 views6 pages

    Experiment 2 - CSC 204L-1

    Uploaded by

    shirazimmunirsets

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 6

    Independent University, Bangladesh (IUB)

    School of Engineering, Technologies and Science (SETS)


    Department of Computer Science & Engineering (CSE)
    Marks Lab Report No 02
    Allocated Obtained Course Code CSC204L/CCR204L
    Course Title Digital Circuit Lab Report
    Course Instructor
    Section
    Student Name
    Student ID
    Due Date Submission Date

    Experiment 2:
    a. Verification of universality of NAND gate and NOR gate.
    b. Verification of De Morgan’s Theorems.

    OBJECTIVE:
    • To verify the universality of NAND and NOR gates.
    • To simplify and modify Boolean logic functions by means of De Morgan’s theorem.

    APPARATUS:
    • IC Type 7400 Quadruple 2-input NAND gates
    • IC Type 7402 Quadruple 2-input NOR gates
    • IC Type 7408 Quadruple 2-input AND gate
    • IC Type 7432 Quadruple 2-input OR gate
    • IC Type 7404 Hex Inverters/ NOT gate
    • Digital Electronic Trainer Kit
    • Power Supply Unit

    THEORY:

    To prove that any Boolean function can be implemented using only NAND or NOR gates,
    we will show that the AND, OR, NOT operations (BASIC OPERATIONS) can be performed
    using only these gates. As any IC can be made with the basic gates, hence verifying that
    will clarify that the notion” NAND and NOR gates are universal gates” is true.

    NAND gate as a universal gate:

    Implementing NOT using NAND gate:


    2 inputs of a NAND gate connected to a single signal A gives an output Ā.
    Implementing AND using NAND gate:
    ̅̅̅̅. Inverting it will
    2 inputs of a NAND gate connected to 2 signals A and B gives an output AB
    give AB.

    Implementing OR using NAND gate:


    ̅ and B
    2 inputs of a NAND gate connected to 2 inverted signals A ̅ gives an output A+B.

    NOR gate as a universal gate:

    Implementing NOT using NOR gate:


    2 inputs of a NOR gate connected to a single signal A gives an output Ā.

    Implementing OR using NOR gate:


    2 inputs of a NOR gate connected to 2 signals A and B gives an output ̅̅̅̅̅̅̅
    A + B. Inverting it
    will give A+B.
    Implementing AND using NOR gate:
    ̅ and B
    2 inputs of a NOR gate connected to 2 inverted signals A ̅ gives an output AB.

    De Morgan’s Theorems
    (a) 𝐀𝐁 = 𝐀 + 𝐁
    (b) 𝐀 + 𝐁 = 𝐀. 𝐁

    Proof of equation (a)


    Verifying De Morgan’s First Theorem using Truth Table

    Left side Right side


    A B AB 𝐀𝐁 A 𝐀 B 𝐁 𝐀+𝐁
    0 0 0 1 0 1 0 1 1
    0 1 0 1 0 1 1 0 1
    1 0 0 1 1 0 0 1 1
    1 1 1 0 1 0 1 0 0

    Proof of equation (b)

    Verifying De Morgan’s Second Theorem using Truth Table

    Left side Right side


    A B A+B 𝑨+𝑩 A B AB 𝐀𝐁
    0 0 0 1 0 0 0 1
    0 1 1 0 0 1 0 0
    1 0 1 0 1 0 0 0
    1 1 1 0 1 1 1 0

    AND Operation:
    Symbol Truth table
    A B Q=A.B
    0 0 0
    0 1 0
    1 0 0
    1 1 1
    OR Operation:
    Symbol Truth table
    A B Q=A+B
    0 0 0
    0 1 1
    1 0 1
    1 1 1

    NOT Operation:
    Symbol Truth table
    A Q=Ā
    0 1
    1 0
    ** Presence of a small circle at the output side of any gate always denotes inversion

    NOR Operation:
    Symbol Truth table
    A B ̅̅̅̅̅̅̅̅
    Q=𝐀 +𝐁
    0 0 1
    0 1 0
    1 0 0
    1 1 0

    NAND Operation:
    Symbol Truth table
    A B ̅̅̅̅
    Q=𝐀𝐁
    0 0 1
    0 1 1
    1 0 1
    1 1 0

    Pin diagram:

    1. IC 7408 AND gate


    PIN diagram PIN description
    PIN no. Function PIN no. Function
    7 Ground 14 +Vcc
    1,2 Input 3 Output
    4,5 Input 6 Output
    9,10 Input 8 Output
    12,13 Input 11 Output
    2. IC 7432 OR gate
    PIN diagram PIN description
    PIN no. Function PIN no. Function
    7 Ground 14 +Vcc
    1,2 Input 3 Output
    4,5 Input 6 Output
    9,10 Input 8 Output
    12,13 Input 11 Output

    3. IC 7404 NOT gate


    PIN diagram PIN description
    PIN no. Function PIN no. Function
    7 Ground 14 +Vcc
    1 Input 2 Output
    3 Input 4 Output
    5 Input 6 Output
    9 Input 8 Output
    11 Input 10 Output
    13 Input 12 Output

    4. IC 7400 NAND gate


    PIN diagram PIN description
    PIN no. Function PIN no. Function
    7 Ground 14 +Vcc
    1,2 Input 3 Output
    4,5 Input 6 Output
    9,10 Input 8 Output
    12,13 Input 11 Output

    5. IC 7402 NOR gate


    PIN diagram PIN description
    PIN no. Function PIN no. Function
    7 Ground 14 +Vcc
    2,3 Input 1 Output
    5,6 Input 4 Output
    9,10 Input 8 Output
    12,13 Input 11 Output

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