Slus 177 B

UC1707, UC2707, UC3707
www.ti.com ............................................................................................................................................. SLUS177B – MARCH 1999 – REVISED SEPTEMBER 2008
DUAL CHANNEL POWER DRIVER

1FEATURES • Analog Shutdown With Optional Latch
• Two Independent Drivers • Low Quiescent Current
• 1.5 A Totem Pole Outputs • 5 V to 40 V Operation
• Inverting and Non-Inverting Inputs • Thermal Shutdown Protection
• 40 ns Rise and Fall Into 1000 pF • 16-Pin Dual-In-Line Package
• High-Speed, Power MOSFET Compatible • 20-Pin PLCC and CLCC Package
• Low Cross-Conduction Current Spike
DESCRIPTION
The UC1707 family of power drivers is made with a high-speed Schottky process to interface between low-level
control functions and high-power switching devices–particularly power MOSFETs. These devices contain two
independent channels, each of which can be activated by either a high or low input logic level signal. Each output
can source or sink up to 1.5 A as long as power dissipation limits are not exceeded.
Although each output can be activated independently with its own inputs, it can be forced low in common through
the action either of a digital high signal at the Shutdown terminal or a differential low-level analog signal. The
Shutdown command from either source can either be latching or not, depending on the status of the Latch
Disable pin.
Supply voltage for both VIN and VC can independently range from 5 V to 40 V.
These devices are available in two-watt plastic "bat-wing" DIP for operation over a 0°C to 70°C temperature
range and, with reduced power, in a hermetically sealed cerdip for –55°C to +125°C operation. Also available in
surface mount DW, Q, L packages.
TRUTH TABLE
(Each Channel) (1)
INV. N.I. OUT
H H L
L H H
H L L
L L L
(1) OUT = INV and N.I.

OUT = INV or N.I.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 1999–2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
UC1707, UC2707, UC3707
SLUS177B – MARCH 1999 – REVISED SEPTEMBER 2008 ............................................................................................................................................. www.ti.com
BLOCK DIAGRAM
CONNECTION DIAGRAMS
2 Submit Documentation Feedback Copyright © 1999–2008, Texas Instruments Incorporated
Product Folder Link(s): UC1707 UC2707 UC3707

UC1707, UC2707, UC3707
ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN Supply voltage N/J package 40 V
VC Collector supply voltage N/J package 40 V
Output current (each output, source or sink) steady-state N/J package ±500 mA
N package ±1.5
Peak transient A
J package ±1.0
N package 20
Capacitive discharge energy mJ
J package 15
Digital inputs (1) N/J-package 5.5 V
Analog stop inputs N/J package VIN
N package 2
Power dissipation at TA = 25°C W
J package 1
N package 5
Power dissipation at T (leads/case) = 25°C (1) W
J package 2
Operating temperature range –55 +125 °C
Storage temperature range –65 +150 °C
Lead temperature (soldering, 10 seconds) 300 °C
(1) All voltages are with respect to the four ground pins which must be connected together. All currents are positive into, negative out of the
specified terminal. Digital drive can exceed 5.5 V if input current is limited to 10 mA. Consult packaging section of databook for thermal
limitations and considerations of package.
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, these specifications apply for TA = –55°C to +125°C for the UC1707, –25°C to +85°C for the
UC2707, and 0°C to +70°C for the UC3707; VIN = VC = 20 V. TA = TJ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Supply current VIN = 40 V 12 15 mA
VC Supply current VC = 40 V, outputs low 5.2 7.5 mA
VC Leakage current VIN = 0, VC - 30 V, no load 0.05 0.1 mA
Digital input low level 0.8 V
Digital input high level 2.2 V
Input current VI = 0 –0.06 –1.0 mA
Input leakage VI = 5 V 0.05 0.1 mA
IO = –50 mA 2.0
VC – VO Output high sat. V
IO = –500 mA 2.5
IO = –50 mA 0.4
VO Output low sat. V
IO = –500 mA 2.5
Analog threshold VCM = 0 to 15 V 100 130 160 mV
Input bias current VCM = 0 –10 –20 µA
Thermal shutdown 155 °C
Shutdown threshold Pin 7 input 0.4 1.0 2.2 V
Latch disable threshold Pin 3 input 0.8 1.2 2.2 V
Copyright © 1999–2008, Texas Instruments Incorporated Submit Documentation Feedback 3

UC1707, UC2707, UC3707
TYPICAL SWITCHING CHARACTERISTICS

VIN = VC = 20 V, TA = 25°C. Delays measured to 10% output change.
PARAMETER TEST CONDITIONS OUTPUT CL = UNIT
From Inv. Input to Output open 1.0 2.2 nF
Rise time delay 40 50 60 ns
10% to 90% rise 25 40 50 ns
Fall time delay 30 40 50 ns
90% to 10% fall 25 40 50 ns
From N.I. Input to Output
Rise time delay 30 40 50 ns
10% to 90% rise 25 40 50 ns
Fall time delay 45 55 65 ns
90% to 10% fall 25 40 50 ns
VC cross-conduction current spike duration Output rise 25 ns
Output fall 0 ns
Analog shutdown delay Stop non-Inv. = 0 V 180 ns
Stop Inv. = 0 to 0.5 V 180 ns
Digital shutdown delay 2 V input on Pin 7 50 ns

UC1707, UC2707, UC3707
SIMPLIFIED INTERNAL CIRCUITRY
Figure 1. Typical Digital Input Gate
Figure 2. Typical Digital Input Gate Figure 3. Latch Disable

UC1707, UC2707, UC3707
SIMPLIFIED INTERNAL CIRCUITRY (continued)
Figure 4. Use of the Shutdown Pin
SHUTDOWN CIRCUIT DESCRIPTION

The function of the circuitry is to be able to provide a shutdown of the device. This is defined as functionality that
will drive both outputs to the low state. There are three different inputs that govern this shutdown capability.
• Analog Stop Pins — The differential inputs to this comparator provide a way to execute a shutdown.
• Latch Disable Pin — Assuming that the Shutdown pin is left open, a high on this pin disables the latching
functionality of the Analog Stop shutdown. A low on this pin enables the latching functionality of the Analog
Stop shutdown. If a shutdown occurs through the Analog Stop circuit while Latch Disable is high, then the
outputs will go low, but will return to normal operation as soon as the Analog Stop circuit allows it. If a
shutdown occurs through the Analog Stop circuit while Latch Disable is low, then the outputs will go low and
remain low even if the Analog Stop circuit no longer drives the shutdown. The outputs will remain "latched"
low (in shutdown) until the Latch Disable goes high and the Analog Stop circuit allows it to return from
shutdown or the VIN voltage is cycled to 0V and then returned above 5V.
• Shutdown Pin — This pin serves two purposes.
1. It can be used as an output of the Analog Stop circuit.
2. It can be used as an input to force a shutdown or to force the device out of shutdown. This pin can
override both the Analog Stop circuit as well as the Latch Disable Pin. When driving hard logic levels into
the Shutdown pin, the Latch Disable functionality will be overridden and the Latch Disable will not function
as it does when used in conjunction with the Analog Stop circuit. When the Shutdown pin is high, the
outputs will be in the low state (shutdown). When the Shutdown pin is low (hard logic low) the outputs will
operate normally, regardless of the state of the Latch Disable pin or the Analog Stop pins.
In order to use the Shutdown Pin with the Latch Disable functional it is necessary to use either a diode in series
with the Shutdown signal or to use an open collector pull-up so that the Shutdown pin is not pulled low. This
configuration will allow the Latch Disable function to work with the Shutdown pin.

UC1707, UC2707, UC3707
SIMPLIFIED INTERNAL CIRCUITRY (continued)

UG1707 SHUTDOWN TRUTH TABLE
ANALOG STOP PREVIOUS STATE OF
SHUTDOWN LATCH DISABLE OUTPUT
LOGIC OUTPUT
X 0 X X Follows Input Logic
X 1 X X Low (Shutdown)
1 Open X X Low (Shutdown)
(1)
0 Open 0 Shutdown Latched Shutdown
0 Open 0 Normal Follows Input Logic
0 Open 1 X Follows Input Logic
(1) If the output was previously in Shutdown and Latch Disable was low and stays low, then even if the Analog Stop Logic is changed or the
Shutdown pin is open, the outputs will remain in Shutdown.
Figure 5. Transformer Coupled Push-Pull MOSFET Drive Circuit
Figure 6. Current Limiting

UC1707, UC2707, UC3707
Figure 7. Over-Voltage Protection Figure 8. Power MOSFET Drive Circuit
Figure 9. Charge Pump Circuits

UC1707, UC2707, UC3707
Figure 10. Power Bipolar Drive Circuit
Figure 11. Transformer Coupled MOSFET Drive Circuit

UC1707, UC2707, UC3707
Figure 12. Power MOSFET Drive Circuit Using Negative Bias Voltage
and Level Shifting to Ground Reference PWM

PACKAGE OPTION ADDENDUM
www.ti.com 6-Jun-2024
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
5962-87619012A ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962- Samples
& Green 87619012A
UC1707L/
81032
5962-8761901EA ACTIVE CDIP J 16 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-8761901EA Samples
& Green UC1707J/80900
5962-8761901V2A ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962- Samples
& Green 8761901V2A
UC1707L
QMLV
5962-8761901VEA ACTIVE CDIP J 16 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-8761901VE Samples
& Green A
UC1707JQMLV
5962-8761903V2A ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962- Samples
& Green 8761903V2A
UC1707L-SP
5962-8761903VEA ACTIVE CDIP J 16 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-8761903VE Samples
& Green A
UC1707J-SP
5962-8761903VFA ACTIVE CFP W 16 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-8761903VF Samples
& Green A
UC1707W-SP
UC1707J ACTIVE CDIP J 16 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 UC1707J Samples
& Green
UC1707J883B ACTIVE CDIP J 16 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 UC1707J/883B Samples
& Green
UC1707L ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 UC1707L Samples
& Green
UC1707L883B ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 UC1707L/ Samples
& Green 883B
UC2707DW ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2707DW Samples
UC2707DWTR ACTIVE SOIC DW 16 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2707DW Samples
UC2707N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 UC2707N Samples
Addendum-Page 1
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
UC2707NG4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 UC2707N Samples
UC3707DW ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3707DW Samples
UC3707DWTR ACTIVE SOIC DW 16 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3707DW Samples
UC3707J ACTIVE CDIP J 16 25 Non-RoHS SNPB N / A for Pkg Type 0 to 70 UC3707J Samples
& Green
UC3707N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 UC3707N Samples
UC3707NG4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 UC3707N Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UC1707, UC1707-SP, UC3707, UC3707M :
• Catalog : UC3707, UC1707, UC3707M, UC3707

• Military : UC1707, UC1707
• Space : UC1707-SP
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product

• Military - QML certified for Military and Defense Applications
• Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com 10-Dec-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
UC2707DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
UC3707DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
Pack Materials-Page 1
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UC2707DWTR SOIC DW 16 2000 356.0 356.0 35.0
UC3707DWTR SOIC DW 16 2000 356.0 356.0 35.0
TUBE
T - Tube
height L - Tube length
W - Tube
width
B - Alignment groove width

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
5962-87619012A FK LCCC 20 55 506.98 12.06 2030 NA
5962-8761901V2A FK LCCC 20 55 506.98 12.06 2030 NA
5962-8761903V2A FK LCCC 20 55 506.98 12.06 2030 NA
5962-8761903VEA J CDIP 16 25 506.98 15.24 13440 NA
5962-8761903VFA W CFP 16 25 506.98 26.16 6220 NA
UC1707L FK LCCC 20 55 506.98 12.06 2030 NA
UC1707L883B FK LCCC 20 55 506.98 12.06 2030 NA
UC2707DW DW SOIC 16 40 507 12.83 5080 6.6
UC2707N N PDIP 16 25 506 13.97 11230 4.32
UC2707NG4 N PDIP 16 25 506 13.97 11230 4.32
UC3707DW DW SOIC 16 40 507 12.83 5080 6.6
UC3707N N PDIP 16 25 506 13.97 11230 4.32
UC3707NG4 N PDIP 16 25 506 13.97 11230 4.32
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UC1707, UC2707, UC3707

www.ti.com ............................................................................................................................................. SLUS177B – MARCH 1999 – REVISED SEPTEMBER 2008

DUAL CHANNEL POWER DRIVER

(1) OUT = INV and N.I.

2 Submit Documentation Feedback Copyright © 1999–2008, Texas Instruments Incorporated

Product Folder Link(s): UC1707 UC2707 UC3707

ABSOLUTE MAXIMUM RATINGS

Copyright © 1999–2008, Texas Instruments Incorporated Submit Documentation Feedback 3

TYPICAL SWITCHING CHARACTERISTICS

4 Submit Documentation Feedback Copyright © 1999–2008, Texas Instruments Incorporated

Product Folder Link(s): UC1707 UC2707 UC3707

SIMPLIFIED INTERNAL CIRCUITRY

Figure 1. Typical Digital Input Gate

Figure 2. Typical Digital Input Gate Figure 3. Latch Disable

Copyright © 1999–2008, Texas Instruments Incorporated Submit Documentation Feedback 5

SIMPLIFIED INTERNAL CIRCUITRY (continued)

Figure 4. Use of the Shutdown Pin

SHUTDOWN CIRCUIT DESCRIPTION

6 Submit Documentation Feedback Copyright © 1999–2008, Texas Instruments Incorporated

Product Folder Link(s): UC1707 UC2707 UC3707

SIMPLIFIED INTERNAL CIRCUITRY (continued)

Figure 5. Transformer Coupled Push-Pull MOSFET Drive Circuit

Figure 6. Current Limiting

Copyright © 1999–2008, Texas Instruments Incorporated Submit Documentation Feedback 7

Figure 7. Over-Voltage Protection Figure 8. Power MOSFET Drive Circuit

Figure 9. Charge Pump Circuits

8 Submit Documentation Feedback Copyright © 1999–2008, Texas Instruments Incorporated

Product Folder Link(s): UC1707 UC2707 UC3707

Figure 10. Power Bipolar Drive Circuit

Figure 11. Transformer Coupled MOSFET Drive Circuit

Copyright © 1999–2008, Texas Instruments Incorporated Submit Documentation Feedback 9

10 Submit Documentation Feedback Copyright © 1999–2008, Texas Instruments Incorporated

Product Folder Link(s): UC1707 UC2707 UC3707

OTHER QUALIFIED VERSIONS OF UC1707, UC1707-SP, UC3707, UC3707M :

• Catalog : UC3707, UC1707, UC3707M, UC3707

NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

Reel Width (W1)

Q3 Q4 Q3 Q4 User Direction of Feed

*All dimensions are nominal

TAPE AND REEL BOX DIMENSIONS

*All dimensions are nominal

B - Alignment groove width

*All dimensions are nominal

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