COA Course Pack Answers

Q1.
Q2.
Q3.
Q4.
Q5.
Q6.
Same as 17 question
Q7.
Q8.
For three, the one thing you need to pay attention to is arithmatic shifts to the right. Shift the numbers to
the right as you normally would, but in order to preserve the sign of the number, the most significant bit
(the bit farthest to the left) gets copied to the corresponding bit of the new number.
Q9.
Q10 Represent 25 H, 42 H and 2000 H into binary numbers.
1.
25H:
• 2 in hexadecimal is 0010 in binary.
Therefore, 25H in binary is 0010 0101.
2. 42H:
Therefore, 42H in binary is 0100 0010.
3. 2000H:
Therefore, 2000H in binary is 0010 0000 0000 0000.
So, the binary representations are:
• 25H in binary: 0010 0101

• 42H in binary: 0100 0010
• 2000H in binary: 0010 0000 0000 0000
Q11. What is difference between following two

instructions?MOV BL, 25 H and MOV BL,
[25 H]
In above instruction, BL is register available inside processor.
The two instructions you provided have different meanings in assembly language:
1. MOV BL, 25H:

• This instruction moves the immediate value 25H (hexadecimal) directly into the register BL .
• The value 25H is a constant, and it is loaded directly into the register without accessing memory.
• MOV BL, 25H ; Load the value 25H into register BL
MOV BL, 25H ; Load the value 25H into register BL
2. MOV BL, [25H]:

• This instruction moves the byte stored in the memory address specified by the immediate value 25H
into the register BL .
• It means that the content at the memory address 25H is read, and that data is loaded into the register
BL .
• MOV BL, [25H] ; Load the byte from memory address 25H into register BL
MOV BL, [25H] ; Load the byte from memory address 25H into register BL
In summary, the first instruction (MOV BL, 25H) directly loads the constant value 25H into the register BL, while the
second instruction ( MOV BL, [25H]) loads the byte from the memory address specified by 25H into the register BL. The
square brackets [ ] in the second instruction indicate a memory access operation.
Q12. In following assembly language program, identify that which type of addressing mode has been used in
each ofthe instructions.
In the provided assembly language program, let's identify the addressing modes used in
each instruction:
1. MOV BL, [2000H]:

• Addressing Mode: Direct Addressing Mode
• Explanation: The content at the memory address 2000H is moved into the
register BL.
2. MOV CL, [3000H]:
• Explanation: The content at the memory address 3000H is moved into the
register CL.
3. ADD BL, CL:
• Addressing Mode: Register Addressing Mode
• Explanation: The content of register CL is added to the content of register BL ,
and the result is stored in register BL.
4. ADD BL, 55H:
• Addressing Mode: Immediate Addressing Mode
• Explanation: The immediate value 55H is added to the content of register BL ,
and the result is stored in register BL.
5. MOV [4000], BL:
• Explanation: The content of register BL is moved to the memory address 4000H .
In summary:
• Direct Addressing Mode is used in instructions 1, 2, and 5.

• Register Addressing Mode is used in instruction 3.
• Immediate Addressing Mode is used in instruction 4
Q13. The following memory units are specified by the

number of words times the number of bits per word. How
many address lines and input-output data lines are needed in
each case?
(a) 2K x 16;
(b) 64K x 8;
(c) 16M x 32;
(d) 4G X 64.
Q14.How many 128 x 8 memory chips are needed to provide a memory
capacity of 4096 x 16?
Q15.
Show the value of all bits of a 12-bit register that hold the number
equivalent to decimal 215 in (a) binary; (b) binary-coded octal; (c) binary-
coded hexadecimal; (d) binary-coded decimal (BCD).
Q16.
Perform the arithmetic operations (+42) + (- 13) and (-42) - (- 13) in binary
using signed-2's complement representation for negative numbers.
a) (+42) +(-13)\
Q17.
A digital computer has a common bus system for 16 registers of 32 bits

each. The bus is constructed with multiplexers.
a. How many selection inputs are there in each multiplexer?
b. What size of multiplexers are needed?

c. How many multiplexers are there in the bus?
Q18.
The 8-bit registers AR, BR, CR and DR initially have the following values:
AR= 11110010, BR= 11111111, CR=10111001 and

DR=11101010. Determine the 8-bit values in each register
after execution of the following sequence of micro operations.
AR AR + BR
CR CR ^
DR, BR
BR +1 AR AR – CR
Q19.
A computer uses a memory unit with 256K words of 32 bits each. A binary
instruction code is stored in one word in memory. The instruction has four
parts: an indirect bit, an operation code, a register code part to specify one of
64 registers, and an address part.
A. How many bits are there in the operation code, the register code part, and
the address part?
B. Draw the instruction word format and indicate the number of bits in each
part.
C. How many bits are there in the data and address inputs of the memory?
Q21.A digital computer has a memory unit with a capacity of 16,384
words, 40 bits per word. The instruction code format consists of six
bits for the operation part and 14 bits for the address part (no indirect
mode bit). Two instructions are packed in one memory word and a
40-bit instruction register IR is available in the control unit. Formulate
a procedure for fetching and executing instructions for this computer.
Ans
Q22.The following program is stored in the memory unit of the basic

computer. Show contents of the AC and PC, at the end, after each
instruction is executed. All numbers listed below are in hexadecimal.
10 CLA
011 ADD 016
012 BUN 014
013 HLT
014 AND 017
015 BUN 013
016 C1A5
017 93C6
Q23. Write a program to evaluate the arithmetic statement:
X = (A + B) * (C + D)
a) Using a general register computer with three-address instructions.

b) Using a general register computer with two-address instructions.
c) Using a single-accumulator computer with one-address instructions.
d) Using a stack organized computer with zero-address operation
Q24. Explain the difference between hardwired control and
microprogramed control. Is it possible to have a hardwired
control associated with a control memory?
Hardwired Control Micro-programmed Control
Uses a finite number of gates

Uses control memory
(Combinational logic unit)
Generates only specific

results dictated by Generate control signals that
instructions used in the dictates results
gates
Possible results are as many

Outcomes are limited by
as can be generated as a
instructions possible by
combination of control
gates
signals
Logic unit must be Control memory can be

redesigned for different reprogrammed for different
results results
n some designs, there can be a combination of hardwired control and

control memory. This hybrid approach allows for flexibility in handling
certain aspects of control using hardwired logic while providing the ability
to modify or extend the control behavior using a control memory.
For example, a processor may have a hardwired control unit responsible for
handling basic and frequently used instructions, while a control memory is
employed for handling more complex or less frequently used instructions.
This combination allows for a balance between speed and flexibility.
Q25. The memory unit of a computer has 256K words of 32 bits each. The
computer has an instruction format with four fields: an operation code field,
a mode field to specify one of seven addressing modes, a register address
field to specify one of 60 processor registers, and a memory address. Specify
the instruction format and the number of bits in each field if the in
instruction is in one memory word.
Q26
.An instruction is stored at location 300 with its address field at
location 301. The address field has the value 400. A processor
register R 1 contains the number 200. Evaluate the effective address
if the addressing mode of the instruction is (a) direct; (b)
immediate; (c) relative; (d) register indirect; (e) index with R1 as the
index register.
Q28. The two-word instruction at address 200 and 201 is a "load
to AC" instruction with an address field equal to 500. The first word
of the instruction specifies the operation code and mode, and the
second word specifies the address part. PC has the value 200 for
fetching this instruction. The content of processor register R 1 is 400,
and the content of an index register XR is 100. AC receives the
operand after the instruction is executed. The figure lists a few
pertinent addresses and shows the memory content at each of these
addresses. Calculate the effective address and the operand that must
be loaded into AC for (a) Direct, (b) Immediate, (c) Indirect, (d)
Relative, (e) Indexed (f) Register (g) Register Indirect (h)
Autoincrement, (i) Autodecrement addressing mode.
Q34. Perform the arithmetic operations below with binary numbers and
with negative number in signed-2"s complement representation. Use seven
bits to accommodate each number together with its sign. In each case,
determine if there is an overflow by checking the carries into and out of the
sign bit position.
(a) (+35) + (+40)
(b) (-35) + (- 40)
Q35. Show the step-by-step multiplication process using Booth algorithm

when the following binary numbers are multiplied. Assume 5-bit registers
that hold signed numbers, the multiples and in both cases is + 15.
(a) (+15) X (+13)

(b) (+15) X (-13)
Q36.Explain the difference between the daisy chaining priority and parallel
priority interrupts. Draw the diagrams to explain their working.
Q37. A computer uses a memory unit with 256 K words of 32 bits each. A
binary instruction code is stored in one word of memory. The instruction has four
parts: an indirect bit, an operation code, a register code part to specify one of 64
registers and an address part. Draw the instruction word format and indicate the
number of bits in each part.

COA Course Pack Answers

Uploaded by

Copyright:

Available Formats

COA Course Pack Answers

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

COA Course Pack Answers

Uploaded by

Copyright:

Available Formats

Q1.

So, the binary representations are:

• 25H in binary: 0010 0101

Q11. What is difference between following two

In above instruction, BL is register available inside processor.

1. MOV BL, 25H:

2. MOV BL, [25H]:

1. MOV BL, [2000H]:

• Direct Addressing Mode is used in instructions 1, 2, and 5.

Q13. The following memory units are specified by the

A digital computer has a common bus system for 16 registers of 32 bits

a. How many selection inputs are there in each multiplexer?

b. What size of multiplexers are needed?

AR= 11110010, BR= 11111111, CR=10111001 and

Q22.The following program is stored in the memory unit of the basic

011 ADD 016

012 BUN 014

014 AND 017

015 BUN 013

a) Using a general register computer with three-address instructions.

Hardwired Control Micro-programmed Control

Uses a finite number of gates

Generates only specific

Possible results are as many

Logic unit must be Control memory can be

n some designs, there can be a combination of hardwired control and

(a) (+35) + (+40)

(b) (-35) + (- 40)

Q35. Show the step-by-step multiplication process using Booth algorithm

(a) (+15) X (+13)

You might also like