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    CPUOS

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    concepcionbitz

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    CPUOS

    Uploaded by

    concepcionbitz
    5 views3 pages

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    Copyright:

    © All Rights Reserved
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    5 views3 pages

    CPUOS

    Uploaded by

    concepcionbitz

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    You are on page 1of 3

    VICENTE E.

    CONCEPCION III

    BE501A

    03 Seatwork 2

    1. CPU Instruction View(1)

    This view contains the program instructions. These instructions are displayed as sequences of low level instruction
    mnemonics (assembler-level format) and not as binary code. This viewis done for clarity and makes code more
    readable.

    2. Program and Opcode Editor

    Create Program Tab

    This tab is where you create a new program. To do this, enter the name of the new program in the Program Name
    box and its base address in the Base Address box, then click the ADD button. The new program name you created
    will appear in the Program List view.

    3. Pipelining Instructions Tabs


    This is a part of the simulator that displays pipelining and caching elements of a computer. Pipelining is the process
    of accumulating and executing computer instructions and tasks from the processor via a logical pipeline. It allows
    storing, prioritizing, managing, and executing tasks and instructions in an orderly process. Caching refers to any
    storage managed to take advantage of locality of reference or shorten latency of the storage drive access. This is
    done by storing temporary data or instruction in the cache memory for later use.

    4. Program List View

    This viewis composed of the following buttons used for a program:

    • ShowProgram Data Memory


    • Remove Program
    • Remove All Programs
    • Create Program Instance

    Delete Program Instance

    5. Program Control Tabs and Help

    This part of the CPU Simulator helps control the program flow and its simulation speed.

    6. Special CPU Registers Information View

    This view shows the set of CPU registers that has pre defined specialist functions. These functions are the following:

    PC (Program Counter) - It contains the address of the next instruction to be executed. IR (Instruction Register) - It
    contains the instruction currently being executed.

    SR (Status Register) - It contains information pertaining to the result of the last executed instruction.

    SP (Stack Pointer) - This register points to the value maintained at the top of the program

    stack.

    BR(Base Register) It contains the current base address.

    MAR (Memory Address Register) - It contains the memory address currently being accessed.

    □ Status bits:

    OV: Overflow

    Z: Zero

    N: Negative

    7. Program Stack View

    The program stack view is another area that maintains temporary values as the instructions are executed. The stack
    is a LIFO (last in, first out) data structure. It is often used for efficient interrupt handling and sub-routine calk. Each
    program has its own individual stack. The CPU instructions PSH (push) and POP are used to store values on top of
    stack and pop values from top of stack, respectively.

    8. Compiler and Interrupts Tabs

    These are other controls that control the processor, interrupts, virtual operating system, and I/O settings. It has the
    function to adjust the settings of the processor.
    9. CPU Registers View and CPU Registers Editor

    The CPU register set view shows the contents of all the general-purpose registers, which are used to maintain
    temporary values as the program's instructions are executed. Registers are very fast memories that hold temporary
    values while the CPU executes instructions.

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