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    Module 5 Assembly Level Language

    Uploaded by

    akashi seijuro

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    © All Rights Reserved
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    Module 5 Assembly Level Language

    Uploaded by

    akashi seijuro
    2 views20 pages

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    Module-5-Assembly-Level-Language

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    2 views20 pages

    Module 5 Assembly Level Language

    Uploaded by

    akashi seijuro

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 20

    Module:5

    Assembly-level
    machine
    organization

    1
    ASSEMBLY LANGUAGE:

    • An assembly language is a type of low-level


    programming language that is intended to
    communicate directly with a computer’s hardware.

    • An assembly language is a type of programming


    language that translates high-level languages into
    machine language.

    • Unlike machine language, which consists of binary


    and hexadecimal characters, assembly languages
    are designed to be readable by humans.
    2
    ASSEMBLY vs MACHINE LANGUAGE:

    3
    INSTRUCTION & OPCODES:
    • An instruction code is a group of bits that
    instruct the computer to perform a specific
    operation.

    • The operation code of an instruction is a


    group of bits that define operations such as
    addition, subtraction, shift, complement, etc.

    • An opcode is a single instruction that can be


    executed by the CPU.
    https://paws.kettering.edu/~jhuggins/humor/opcodes.html
    4
    REGISTERS:
    • To speed up the processor operations, the
    processor includes some internal memory
    storage locations, called registers.

    • The registers store data elements for


    processing without having to access the
    memory. A limited number of registers are
    built into the processor chip.

    5
    PROCESSOR REGISTERS:
    • There are ten 32-bit and six 16-bit processor
    registers in IA-32 architecture. The registers
    are grouped into three categories.

    • The general registers are further divided


    into the following groups −

    6
    DATA REGISTERS:
    • Four 32-bit data registers are used for
    arithmetic, logical, and other operations.
    These 32-bit registers can be used in three
    ways:

     As complete 32-bit data registers: EAX, EBX, ECX,


    EDX.
     Lower halves of the 32-bit registers can be used as
    four 16-bit data registers: AX, BX, CX and DX.
     Lower and higher halves of the above-mentioned
    four 16-bit registers can be used as eight 8-bit data
    registers: AH, AL, BH, BL, CH, CL, DH, and DL.
    7
    DATA REGISTERS:
    • AX is the primary accumulator; it is used in
    input/output and most arithmetic instructions. For
    example, in multiplication operation, one operand is
    stored in EAX or AX or AL register according to the size
    of the operand.
    • BX is known as the base register, as it could be used
    in indexed addressing.
    • CX is known as the count register, as the ECX, CX
    registers store the loop count in iterative operations.
    • DX is known as the data register. It is also used in
    input/output operations. It is also used with AX register
    along with DX for multiply and divide operations involving
    large values.
    8
    POINTER REGISTERS:
    • The pointer registers are 32-bit EIP, ESP, and EBP
    registers and corresponding 16-bit right portions IP, SP,
    and BP. There are three categories of pointer registers −

     Instruction Pointer (IP) − The 16-bit IP register stores the offset


    address of the next instruction to be executed. IP in association with
    the CS register (as CS:IP) gives the complete address of the current
    instruction in the code segment.
     Stack Pointer (SP) − The 16-bit SP register provides the offset
    value within the program stack. SP in association with the SS
    register (SS:SP) refers to be current position of data or address
    within the program stack.
     Base Pointer (BP) − The 16-bit BP register mainly helps in
    referencing the parameter variables passed to a subroutine. The
    address in SS register is combined with the offset in BP to get the
    location of the parameter. BP can also be combined with DI and SI
    as base register for special addressing.
    9
    INDEX REGISTERS:
    The 32-bit index registers, ESI and EDI, and their 16-bit
    rightmost portions. SI and DI, are used for indexed
    addressing and sometimes used in addition and
    subtraction. There are two sets of index pointers:

     Source Index (SI) − It is used as source index for string


    operations.

     Destination Index (DI) − It is used as destination index


    for string operations.

    1
    0
    CONTROL REGISTERS:
    The 32-bit instruction pointer register and the 32-bit flags
    register combined are considered as the control registers.

    Many instructions involve comparisons and mathematical


    calculations and change the status of the flags and some
    other conditional instructions test the value of these status
    flags to take the control flow to other location.

    1
    1
    CONTROL REGISTERS:
    The common flag bits are:

    Overflow Flag (OF) − It indicates the overflow of a high-order


    bit (leftmost bit) of data after a signed arithmetic operation.

    Direction Flag (DF) − It determines left or right direction for


    moving or comparing string data. When the DF value is 0, the
    string operation takes left-to-right direction and when the value
    is set to 1, the string operation takes right-to-left direction.

    Interrupt Flag (IF) − It determines whether the external


    interrupts like keyboard entry, etc., are to be ignored or
    processed. It disables the external interrupt when the value is 0
    and enables interrupts when set to 1.

    1
    2
    CONTROL REGISTERS:
    The common flag bits are:

    Trap Flag (TF) − It allows setting the operation of the processor


    in single-step mode. The DEBUG program we used sets the trap
    flag, so we could step through the execution one instruction at a
    time.

    Sign Flag (SF) − It shows the sign of the result of an arithmetic


    operation. This flag is set according to the sign of a data item
    following the arithmetic operation. The sign is indicated by the
    high-order of leftmost bit. A positive result clears the value of SF
    to 0 and negative result sets it to 1.

    Zero Flag (ZF) − It indicates the result of an arithmetic or


    comparison operation. A nonzero result clears the zero flag to 0,
    and a zero result sets it to 1. 1
    3
    CONTROL REGISTERS:
    The common flag bits are:

    Auxiliary Carry Flag (AF) − It contains the carry from bit 3 to bit
    4 following an arithmetic operation; used for specialized
    arithmetic. The AF is set when a 1-byte arithmetic operation
    causes a carry from bit 3 into bit 4.

    Parity Flag (PF) − It indicates the total number of 1-bits in the


    result obtained from an arithmetic operation. An even number of
    1-bits clears the parity flag to 0 and an odd number of 1-bits sets
    the parity flag to 1.

    Carry Flag (CF) − It contains the carry of 0 or 1 from a high-


    order bit (leftmost) after an arithmetic operation. It also stores
    the contents of last bit of a shift or rotate operation.
    1
    4
    SEGMENT REGISTERS:
    Segments are specific areas defined in a program for
    containing data, code and stack. There are three main
    segments −

    Code Segment − It contains all the instructions to be executed.


    A 16-bit Code Segment register or CS register stores the
    starting address of the code segment.

    Data Segment − It contains data, constants and work areas. A


    16-bit Data Segment register or DS register stores the starting
    address of the data segment.

    Stack Segment − It contains data and return addresses of


    procedures or subroutines. It is implemented as a 'stack' data
    structure. The Stack Segment register or SS register stores the
    starting address of the stack. 1
    5
    ADDRESSING MODES:
    Register Addressing

    In this addressing mode, a register contains the operand.


    Depending upon the instruction, the register may be the
    first operand, the second operand or both.

    As processing data between registers does not involve


    memory, it provides fastest processing of data.

    1
    6
    ADDRESSING MODES:
    Immediate Addressing

    An immediate operand has a constant value or an


    expression. When an instruction with two operands uses
    immediate addressing, the first operand may be a register
    or memory location, and the second operand is an
    immediate constant. The first operand defines the length of
    the data.

    1
    7
    ADDRESSING MODES:
    Direct Memory Addressing

    In direct addressing mode, the offset value is specified


    directly as part of the instruction, usually indicated by the
    variable name. The assembler calculates the offset value
    and maintains a symbol table, which stores the offset
    values of all the variables used in the program.

    In direct memory addressing, one of the operands refers to


    a memory location and the other operand references a
    register.

    1
    8
    ADDRESSING MODES:
    Indirect Memory Addressing

    Indirect addressing is generally used for variables


    containing several elements like, arrays. Starting address
    of the array is stored in, say, the EBX register.

    The following code snippet shows how to access different


    elements of the variable.

    1
    9
    END OF MODULE

    20

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