Tcan 337

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TCAN330, TCAN332, TCAN334, TCAN337

TCAN330G, TCAN332G, TCAN334G, TCAN337G
SLLSEQ7E – DECEMBER 2015 – REVISED DECEMBER 2019
TCAN33x 3.3-V CAN Transceivers with CAN FD (Flexible Data Rate)

1 Features 3 Description
•
1 3.3-V Single supply operation The TCAN33x family of devices is compatible with
the ISO 11898 High Speed CAN (Controller Area
• Data rates up to 5 Mbps (TCAN33xG devices) Network) Physical Layer standard. TCAN330,
• Compatible with ISO 11898-2 TCAN332, TCAN334 and TCAN337 are specified for
• SOIC-8 and SOT-23 package options data rates up to 1 Mbps. Pending the release of the
• Operatinles: updated version of ISO 11898-2 including CAN FD,
additional timing parameters defining loop delay
– Normal mode (all devices) symmetry are specified for the TCAN330G,
– Low power standby mode with wake TCAN332G, TCAN334G and TCAN337G devices.
(TCAN334) The devices include many protection features
including driver and receiver Dominant Time Out
– Silent mode (TCAN330, TCAN337)
(DTO) providing CAN network robustness. Integrated
– Shutdown mode (TCAN330, TCAN334) 12 kV IEC-61000-4-2 ESD Contact Discharge
• Wide common mode range of operation ±12 V protection eliminates the need of additional
• Bus pin fault protection of ±14 V components for system level robustness.
• Total loop delay < 135 ns Device Information(1)
• Wide ambient operation temperature range: PART NUMBER PACKAGE BODY SIZE (NOM)
–40°C to 125°C TCAN330/G SOIC (8) 4.90 mm × 3.91 mm
• Optimized behavior when unpowered: TCAN332/G
TCAN334/G SOT-23 (8) 2.90 mm x 1.60 mm
– Bus and logic pins are high impedance (no TCAN337/G
load to operating bus or application)
(1) For all available packages, see the orderable addendum at
– Power up / down glitch free operation the end of the data sheet.
• Excellent EMC performance
Block Diagram
• Protection features:
SHDN/NC/FAULT VCC
– ESD Protection of bus terminals Note C 5 3
– HBM ESD Protection exceeds ±25 kV FAULT LOGIC

Note B
VCC
VCC
– IEC61000-4-2 ESD Contact discharge DOMINANT
VCC
TXD 1
protection exceeds ±12 kV TIME OUT
CANH
7
BIAS UNIT
– Driver dominant time out (TXD DTO)
UNDER
– Receiver dominant time out (RXD DTO) VOLTAGE
CANL
6
– Fault output pin (TCAN337 only)
Note C CONTROL
– Undervoltage protection on VCC 8 AND
MODE
– Thermal shutdown protection LOGIC
– Current limiting on bus pins Sleep Receiver

WAKE
Note A
DETECT
2 Applications MUX
Normal Receiver
RXD DOMINANT
TIME OUT
• 5-Mbps operation in CAN with flexible data rate 4
networks (TCAN33xG devices) 2

GND Copyright © 2016, Texas Instruments Incorporated
• 1-Mbps operation in highly loaded can networks A: Sleep Receiver and Wake Detect are device dependent options and are only available in TCAN334.
B: Fault Logic are only available in TCAN337.
• Industrial automation, control, sensors and drive C: Pin 5 and 8 functions are device dependent. Refer to Device Comparison Table.
systems
• Building, security and climate control automation
• Telecom base station status and control
• CAN Bus standards such as CANopen,
DeviceNet, NMEA2000, ARINC825, ISO11783,
CANaerospace
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SLLSEQ7E – DECEMBER 2015 – REVISED DECEMBER 2019 www.ti.com
Table of Contents
1 Features .................................................................. 1 10.1 Overview ............................................................... 18
2 Applications ........................................................... 1 10.2 Functional Block Diagram ..................................... 18
3 Description ............................................................. 1 10.3 Feature Description............................................... 19
10.4 Device Functional Modes...................................... 22
4 Revision History..................................................... 2
5 Description (continued)......................................... 3 11 Application and Implementation........................ 26
11.1 Application Information.......................................... 26
6 Device Options....................................................... 3
11.2 Typical Application ............................................... 26
7 Pin Configuration and Functions ......................... 4
11.3 System Examples ................................................. 28
8 Specifications......................................................... 5
12 Power Supply Recommendations ..................... 29
8.1 Absolute Maximum Ratings ...................................... 5
13 Layout................................................................... 30
8.2 ESD Ratings.............................................................. 5
13.1 Layout Guidelines ................................................. 30
8.3 Recommended Operating Conditions....................... 5
13.2 Layout Example .................................................... 31
8.4 Thermal Information .................................................. 5
8.5 Electrical Characteristics........................................... 6 14 Device and Documentation Support ................. 32
14.1 Related Links ........................................................ 32
8.6 Switching Characteristics .......................................... 8
14.2 Support Resources ............................................... 32
8.7 Typical Characteristics ............................................ 10
14.3 Trademarks ........................................................... 32
8.8 Typical Characteristics, TCAN330 Receiver........... 11
14.4 Electrostatic Discharge Caution ............................ 32
8.9 Typical Characteristics, TCAN330 Driver ............... 12
14.5 Glossary ................................................................ 32
9 Parameter Measurement Information ................ 13
15 Mechanical, Packaging, and Orderable
10 Detailed Description ........................................... 18
Information ........................................................... 32
4 Revision History
Changes from Revision D (April 2016) to Revision E Page
• Changed the Pin Configuration image appearance ............................................................................................................... 4

• Changed the titles of Figure 21 and Figure 22..................................................................................................................... 14
Changes from Revision C (April 2016) to Revision D Page
• Changed From: ARNIC825 To ARINC825 in the Applications list ......................................................................................... 1
Changes from Revision B (April 2016) to Revision C Page
• Removed the Preview Note from TCAN337 and TCAN337G in the Device Options table.................................................... 3
Changes from Revision A (January 2016) to Revision B Page
• Removed the Preview Note from all device except for TCAN337 and TCAN337G in the Device Comparison table ........... 3
• Changed FAULT Pin ICL MIN value From: 5 mA To: 4 mA in the Electrical Characteristics.................................................. 7
Changes from Original (December 2015) to Revision A Page
• Changed Features From: "Total Loop Delay < 150 ns" To: "Total loop delay < 135 ns" ...................................................... 1
• Changed VIT(SLEEP) To: VIT(STB) and added Test conditions in the Electrical Characteristics ................................................. 7
• Added –12 V < VCM < 12 V to tWK_FILTER in the Test Conditions of Switching Characteristics ............................................... 8
2 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated
Product Folder Links: TCAN330 TCAN332 TCAN334 TCAN337 TCAN330G TCAN332G TCAN334G TCAN337G
www.ti.com SLLSEQ7E – DECEMBER 2015 – REVISED DECEMBER 2019
5 Description (continued)
The use of single 3.3-V supply enables the transceivers to directly interface with 3.3-V CAN controllers/MCUs. In
addition, these devices are fully compatible with other 5-V CAN transceivers on the same bus.
These devices have excellent EMC performance due to matched Dominant and Recessive Common Modes.
Ultra low power Shutdown and Standby modes make these devices attractive for battery powered applications.
This family of devices is available in standard 8-pin SOIC packages for drop-in compatibility and in small SOT-23
packages for space-constrained applications.
6 Device Options
DEVICE PIN 5 PIN 8 DERATE DESCRIPTION

TCAN330 SHDN S 1 Mbps Shutdown and silent modes
TCAN332 NC NC 1 Mbps Normal mode only
TCAN334 SHDN STB 1 Mbps Shutdown and standby with wake
TCAN337 FAULT S 1 Mbps Fault output and silent mode
TCAN330G SHDN S 5 Mbps Shutdown and silent modes
TCAN332G NC NC 5 Mbps Normal mode only
TCAN334G SHDN STB 5 Mbps Shutdown and standby with wake
TCAN337G FAULT S 5 Mbps Fault output and silent mode
Copyright © 2015–2019, Texas Instruments Incorporated Submit Documentation Feedback 3

7 Pin Configuration and Functions
TCAN330 D, DCN Packages

8-Pin SOIC, SOT-23 TCAN334 D, DCN Packages
Top View 8-Pin SOIC, SOT-23
Top View
TX D 1 8 S
TX D 1 8 STB
GND 2 7 CA NH
GND 2 7 CA NH
VCC 3 6 CA NL
VCC 3 6 CA NL
RX D 4 5 SHDN
RX D 4 5 SHDN
No t to scale
No t to scale
TCAN332 D, DCN Packages

8-Pin SOIC, SOT-23 TCAN337 D, DCN Packages
Top View 8-Pin SOIC, SOT-23
Top View
TX D 1 8 NC
TX D 1 8 S
GND 2 7 CA NH
GND 2 7 CA NH
VCC 3 6 CA NL
VCC 3 6 CA NL
RX D 4 5 NC
RX D 4 5 FA ULT
No t to scale
No t to scale
Pin Functions
PIN
I/O DESCRIPTION
NAME TCAN330 TCAN332 TCAN334 TCAN337
CAN transmit data input (LOW for dominant and HIGH for recessive bus states),
TXD 1 1 1 1 I
integrated pull up
GND 2 2 2 2 GND Ground connection
VCC 3 3 3 3 Supply 3.3-V supply voltage
CAN receive data output (LOW for dominant and HIGH for recessive bus
RXD 4 4 4 4 O
states), tri-state
SHDN 5 — 5 — I Drive high for shutdown mode. Internal pull-down.
NC — 5 — — NC No Connect – Not internally connected
FAULT — — — 5 O Open drain fault output pin.
CANL 6 6 6 6 I/O Low level CAN bus line
CANH 7 7 7 7 I/O High level CAN bus line
S 8 — — 8 I Drive high for silent mode, integrated pull down
NC — 8 — — NC No Connect – Not internally connected
STB — — 8 — I Drive high for low power standby mode, integrated pull down
8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN MAX UNIT
Supply Voltage range, VCC –0.3 5 V
Voltage at any bus terminal (CANH or CANL), V(BUS) –14 14 V
Logic input terminal voltage range V(Logic_Input) –0.3 5 V
Logic output terminal voltage range, V(Logic_Output) –0.3 5 V
Logic output current, IO(LOGIC) 8 mA
Operating junction temperature range, TJ –40 150 °C
Storage temperature, Tstg 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to ground terminal.
8.2 ESD Ratings

VALUE UNIT
All pins except CANH and
Human-body model (HBM), per ±4000
CANL
ANSI/ESDA/JEDEC JS-001 (1)
Pins CANH and CANL ±25000
V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC V
All pins ±1500
specification JESD22-C101 (2)
CANH and CANL terminals to
IEC 61400-4-2 Contact Discharge ±12000
GND
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. .
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC Supply voltage 3 3.6 V
IOH(LOGIC) Logic terminal HIGH level output current –2
mA
IOL(LOGIC) Logic terminal LOW level output current 2
TA Operational free-air temperature –40 125 °C
8.4 Thermal Information

TCAN33x TCAN33x
THERMAL METRIC (1) D (SOIC) DCN (SOT-23) UNIT
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 114.4 154.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 58.7 76.6 °C/W
RθJB Junction-to-board thermal resistance 55.2 49.2 °C/W
ψJT Junction-to-top characterization parameter 11.7 11.9 °C/W
ψJB Junction-to-board characterization parameter 54.6 49.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W
VCC = 3.3 V, TJ = 27°C, RL = 60 Ω, SHDN, S and
PD Average power dissipation STB at 0 V, Input to TXD at 500 kHz, 50% duty cycle 65 65 mW
square wave, CL(RXD) = 15 pF
TSD Thermal shutdown temperature 175 175 °C
THYS Thermal shutdown hysteresis 5 5 °C
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

8.5 Electrical Characteristics

over operating free-air temperature range, TJ = –40°C to 150°C. All typical values are at 25°C and supply voltages of VCC =
3.3 V, RL = 60 Ω, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Supply
See Figure 18. TXD = 0 V, RL = 60 Ω,
CL = open, S, STB and SHDN = 0 V. 55
Typical Bus Load.
Dominant
See Figure 18. TXD = 0 V, RL = 50 Ω,
CL = open, S, STB and SHDN = 0 V. 60
Supply current Normal Mode High Bus Load.
See Figure 18. TXD = 0 V, S, STB and mA
Dominant with
SHDN = 0 V, CANH = -12 V, RL = open, 180
bus fault
CL = open
See Figure 18. TXD = VCC, RL = 50 Ω,
ICC Recessive 3.5
CL = open, S, STB and SHDN = 0 V
See Figure 18. TXD = VCC, RL = 50 Ω,
Supply Current: Silent Mode 2.5
CL = open, S = VCC
TA < 85°C, STB at VCC, RXD floating,
15
Supply Current: Standby Mode TXD at VCC
STB at VCC, RXD floating, TXD at VCC 20
µA
TA < 85°C, SHDN at VCC, RXD floating,
1
Supply Current: Shutdown Mode TXD at VCC
SHDN = VCC, RXD floating, TXD at VCC 2.5
Rising under voltage detection on VCC for protected
2.2 2.6
mode
UV(VCC) V
Falling under voltage detection on VCC for protected
1.65 2 2.5
mode
VHYS(UVVCC) Hysteresis voltage on UV(VCC) 200 mV
Driver
CANH See Figure 31 and Figure 19, TXD = 0 2.45 VCC
VO(D) Bus output voltage (dominant) V, S, STB and SHDN = 0 V, RL = 60 Ω, V
CANL CL = open 0.5 1.25
See Figure 31 and Figure 19, TXD =

VO(R) Bus output voltage (recessive) VCC, STB, SHDN = 0 V, S = 0 V or VCC 1.85 V
(1)
, RL = open (no load)
See Figure 31 and Figure 19, TXD = 0
V, S, STB and SHDN = 0 V, 50 Ω ≤ RL ≤ 1.6 3
65 Ω, CL = open
VOD(D) Differential output voltage (dominant) V
See Figure 31 and Figure 19, TXD = 0
V, S, STB and SHDN = 0 V, 45 Ω ≤ RL < 1.5 3
50 Ω, CL = open
VCC, S, STB and SHDN = 0 V, RL = 60 –120 12
Ω, CL = open
TA < 85°C, See Figure 31 and Figure 19,
VOD(R) Differential output voltage (recessive) TXD = VCC, S, STB and SHDN = 0 V, RL –50 50 mV
= open (no load), CL = open
VCC, S, STB and SHDN = 0 V, RL = –50 100
open (no load), CL = open
Output symmetry (dominant and recessive) See Figure 31 and Figure 19, S, STB
V(SYM) –400 400 mV
(CANHREC + CANLREC – CANHDOM – CANLDOM) and SHDN = 0 V, RL = 60 Ω, CL = open
See Figure 26, V(CANH) = –12 V, CANL =
–200
open, TXD = 0 V
IOS(DOM) Short-circuit steady-state output current, Dominant mA
See Figure 26, V(CANL) = 12 V, CANH =
200
open, TXD = 0 V
See Figure 26, –12 V ≤ VBUS ≤ 12 V,
IOS(REC) Short-circuit steady-state output current, Recessive –5 5 mA
VBUS = CANH = CANL, TXD = VCC
(1) The bus output voltage (recessive) will be the same if the device is in normal mode with S terminal LOW or if the device is in silent
mode with the S terminal is HIGH.
Electrical Characteristics (continued)

over operating free-air temperature range, TJ = –40°C to 150°C. All typical values are at 25°C and supply voltages of VCC =
3.3 V, RL = 60 Ω, (unless otherwise noted)
Receiver
Input threshold voltage, normal modes and selective
VIT 500 900
wake modes
mV
Hysteresis voltage for input threshold, normal See Figure 20 and Table 7
VHYS 120
modes and selective wake modes
VCM Common Mode Range: normal and silent modes –12 12 V
–2 V < VCM < 7 V
400 1150 mV
See Figure 20 and Table 7
VIT(STB) Input Threshold, standby mode
–12 V < VCM < 12 V
400 1350 mV
See Figure 20 and Table 7
TA < 85°C, CANH = CANL = 3.3 V, VCC
6
to GND via 0-Ω and 47-kΩ resistor
IIOFF(LKG) Power-off (unpowered) bus input leakage current µA
CANH = CANL = 3.3 V, VCC to GND via
12
0-Ω and 47-kΩ resistor
CI Input capacitance to ground (CANH or CANL) 20
pF
CID Differential input capacitance 10
RID Differential input resistance TXD = VCC, Normal Mode 30 80
kΩ
RIN Input resistance (CANH or CANL) TXD = VCC, Normal mode 15 40
Input resistance matching: [1 – (RIN(CANH) /
RIN(M) V(CANH) = V(CANL) –3% 3%
RIN(CANL))] × 100 %
TXD Terminal (CAN Transmit Data Input)
VIH HIGH level input voltage 2 V
VIL LOW level input voltage 0.8 V
IIH HIGH level input leakage current TXD = VCC = 3.6 V –2.5 0 3 µA
IIL LOW level input leakage current TXD = 0 V, VCC = 3.6 V –4 0 0 µA
ILKG(OFF) Unpowered leakage current TXD = 3.6 V, VCC = 0 V –2 0 2.5 µA
I(CAP) Input Capacitance 2.5 pF
RXD Terminal (CAN Receive Data Output)
VOH HIGH level output voltage See Figure 20, IO = –2 mA 0.8 x VCC V
VOL LOW level output voltage See Figure 20, IO = 2 mA 0.2 0.4 V
ILKG(OFF) Unpowered leakage current RXD = 3.6 V, VCC = 0 V –1 0 1 µA
STB/S/SHDN Terminals
VIH HIGH level input voltage 2 V
VIL LOW level input voltage 0.8 V
IIH HIGH level input leakage current STB, S, SHDN = VCC = 3.6 V –3 0 10 µA
IIL LOW level input leakage current STB, S, SHDN = 0 V, VCC = 3.6 V –4 0 1 µA
ILKG(OFF) Unpowered leakage current STB, S, SHDN = 3.6 V, VCC = 0 V –3 0 5 µA
FAULT Pin (Fault Output), TCAN337 only
ICH Output current high level FAULT = VCC, See Figure 28 –10 µA
ICL Output current low level FAULT = 0.4 V, See Figure 28 4 12 mA

8.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
Device Switching Characteristics
Total loop delay, driver input (TXD) to
See Figure 23, S, STB and SHDN = 0 V,
tPROP(LOOP) receiver output (RXD), recessive to 100 135 ns
RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF
dominant and dominant to recessive
See Figure 23, S, STB and SHDN = 0 V,
Total Loop delay in highly loaded
tPROP(LOOP) RL = 120 Ω, CL = 200 pF, 120 180 ns
network
CL(RXD) = 15 pF
tBUS_SYM_2 2 Mbps transmitted recessive bit width See Figure 24, S or STB = 0 V, RL = 60 435 530 ns
Ω, CL = 100 pF, CL(RXD) = 15 pF,
tREC_SYM_2 2 Mbps received recessive bit width 400 550 ns
tBIT = 500 ns
2 Mbps receiver timing symmetry TCAN330G, TCAN332G, TCAN334G
ΔtSYM_2 –65 40 ns
(tREC_SYM_2 - tBUS_SYM_2) and TCAN337G only
tBUS_SYM_5 5 Mbps transmitted recessive bit width See Figure 24, S or STB = 0 V, RL = 60 155 210 ns
Ω, CL = 100 pF, CL(RXD) = 15 pF,
tREC_SYM_5 5 Mbps received recessive bit width 120 220 ns
tBIT = 200 ns
5 Mbps receiver timing symmetry TCAN330G, TCAN332G, TCAN334G
ΔtSYM_5 –45 15 ns
(tREC_SYM_5 - tBUS_SYM_5) and TCAN337G only
See Figure 21 and Figure 22.
tMODE Mode change time RL = 60 Ω, CL = 100 pF, 5 10 µs
CL(RXD) = 15 pF
Time for device to return to normal
tUV_RE-ENABLE Re-enable time after UV event operation from UV(VCC) under voltage 1000 µs
event
Bus time to meet Filtered Bus See Figure 33, Standby mode.
tWK_FILTER 0.5 4 µs
Requirements for Wake Up Request –12 V < VCM < 12 V
Driver Switching Characteristics
Propagation delay time, HIGH TXD to
tpHR 25
Driver Recessive
Propagation delay time, LOW TXD to
tpLD 20
Driver Dominant See Figure 19, S, STB and SHDN = 0 V.
ns
RL = 60 Ω, CL = 100 pF,
tsk(p) Pulse skew (|tpHR - tpLD|) 5
tr Differential output signal rise time 17
tf Differential output signal fall time 9
(1) See Figure 25,
tTXD_DTO Driver dominant time out 1.2 2.6 3.8 ms
RL = 60 Ω, CL = 100 pF
Receiver Switching Characteristics
Propagation delay time, bus recessive
tpRH 62
input to high RXD output
Propagation delay time, bus dominant See Figure 20, CL(RXD) = 15 pF CANL =
tpDL 56 ns
input to RXD low output 1.5 V, CANH = 3.5 V
tr Output signal rise time (RXD) 7
tf Output signal fall time (RXD) 6
(2)
tRXD_DTO Receiver dominant time out See Figure 27, CL(RXD) = 15 pF 1.6 3 5 ms
(1) The TXD dominant time out (tTXD_DTO) disables the driver of the transceiver once the TXD has been dominant longer than tTXD_DTO,
which releases the bus lines to recessive, preventing a local failure from locking the bus dominant. The driver may only transmit
dominant again after TXD has been returned HIGH (recessive). While this protects the bus from local faults, locking the bus dominant, it
limits the minimum data rate possible. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst
case, where five successive dominant bits are followed immediately by an error frame. This, along with the tTXD_DTO minimum, limits the
minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11/ tTXD_DTO = 11 bits / 1.2 ms = 9.2 kbps.
(2) The RXD timeout (tRXD_DTO) disables the RXD output in the case that the bus has been dominant longer than tRXD_DTO, which releases
RXD pin to the recessive state (high), thus preventing a dominant bus failure from permanently keeping the RXD pin low. The RXD pin
will automatically resume normal operation once the bus has been returned to a recessive state. While this protects the protocol
controller from a permanent dominant state, it limits the minimum data rate possible. The CAN protocol allows a maximum of eleven
successive dominant bits (on RXD) for the worst case, where five successive dominant bits are followed immediately by an error frame.
This, along with the tRXD_DTO minimum, limits the minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11 /
tRXD_DTO = 11 bits / 1.6 ms = 6.9 kbps.
TXD fault stuck dominant, example PCB Fault is repaired & transmission
failure or bad software capability restored
TXD (driver) tTXD_DTO Driver disabled freeing bus for other nodes
Normal CAN %XV ZRXOG EH ³VWXFN GRPLQDQW´ EORFNLQJ FRPPXQLFDWLRQ IRU WKH
communication whole network but TXD DTO prevents this and frees the bus for
communication after the time tTXD_DTO.
CAN
Bus tTXD_DTO
Signal
Communication from Communication from
other bus node(s) repaired node
FAULT is signaled to link layer / protocol. Fault indication is removed.
TXDDTO
Flag
RXD
(receiver)
Communication from Communication from Communication from

local node other bus node(s) repaired local node
Figure 1. Example Timing Diagram for TXD DTO and FAULT Pin
Normal CAN Bus Fault stuck dominant, example CANH Fault is repaired and normal
communication short to supply and CAN L short to GND. communication returns
CAN Bus
Signal
RXD RXD mirrors

RXD WITH RXD
tRXD_DTO bus
(reciever)
DTO
RXD output is returned recessive (high) and

FAULT cleared
FAULT is signaled to link layer / protocol.
signal is given
RXDDTO
FLAG
Figure 2. Example Timing Diagram for RXD DTO and FAULT Pin

8.7 Typical Characteristics
21 0.16
RL = Open
Driver Low-Level Output Current (mA)

20.8 0.14 RL = 60 :
Supply Current (RMS) (mA)
20.6 0.12
20.4 0.1
20.2 0.08
20 0.06
19.8 0.04
19.6 0.02
19.4 0
0 200 400 600 800 1000 0 1 2 3 4
Frequency (kbps) D001
VO(CANL) - Low-Level Output Voltage (V) D002
VCC = 3.3 V Normal Mode Temp = 25°C VO = 0.5 to 3.3 V Normal Mode Temp = 25°C
60 Ω Load VCC = 3.3 V
Figure 3. Supply Current (RSM) vs Frequency Figure 4. Driver Low-Level Output Current vs Low-level
Output Voltage
160 3.0
RL = Open
Driver High-Level Output Current (mA)
140 RL = 60 :
2.5
120
Dominant Voltage (V)
2.0
100
80 1.5
60
1.0
40
0.5 VCC = 3 V
20 VCC = 3.3 V
VCC = 3.6 V
0 0.0
0 1 2 3 4 -40 -25 -10 5 20 35 50 65 80 95 110 125
VO(CANH) - High-Level Output Voltage (V) D003
Free-Air Temperature (qC) D004
VO = 0.5 to 3.3 V Normal Mode Temp = 25°C VO = 0.5 to 3.3 V Normal Mode Temp = 25°C
VCC = 3.3 V VCC = 3.3 V 60 Ω Load
Figure 5. Driver High-Level Output Current vs High-level Figure 6. Dominant Voltage (VOD) vs Free-Air Temperature
Output Voltage
8.8 Typical Characteristics, TCAN330 Receiver
68 61
67 60
Propagation Delay Time (ns)
Propagation Delay Time (ns)

66
59
65
64 58
63 57
62 56
61
55
60 VCC = 3 V VCC = 3 V
59 VCC = 3.3 V 54 VCC = 3.3 V
VCC = 3.6 V VCC = 3.6 V
58 53
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Figure 7. Receiver Bus Recessive Input to High RXD Output Figure 8. Receiver Bus Dominant Input to Low RXD Output
Propagation Delay Time vs Free-Air Temperature Propagation Delay Time vs Free-Air Temperature
9 6.6
8 6.5
6.4
7
Receiver Rise Time (ns)
Receiver Fall Time (ns)
6.3
6
6.2
5 6.1
4 6
5.9
3
5.8
2
VCC = 3 V 5.7 VCC = 3 V
1 VCC = 3.3 V VCC = 3.3 V
5.6
VCC = 3.6 V VCC = 3.6 V
0 5.5
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Figure 9. Receiver Rise Time vs Free-Air Temperature Figure 10. Receiver Fall Time vs Free-Air Temperature

8.9 Typical Characteristics, TCAN330 Driver
35 35
30 30
Prapagation Delay Time (ns)
Prapagation Delay Time (ns)

25 25
20 20
15 15
10 10
VCC = 3 V VCC = 3 V
5 VCC = 3.3 V 5 VCC = 3.3 V
VCC = 3.6 V VCC = 3.6 V
0 0
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Figure 11. Driver High TXD Input to Driver Recessive Output Figure 12. Driver Low TXD Input to Driver Dominant Output
Propagation Delay Time vs Free-Air Temperature Propagation Delay Time vs Free-Air Temperature
35 16
Differential Output Signal Rise Time (ns)
30 Differential Output Signal Fall Time (ns) 14
12
25
10
20
8
15
6
10
4
VCC = 3 V VCC = 3 V
5 VCC = 3.3 V 2 VCC = 3.3 V
VCC = 3.6 V VCC = 3.6 V
0 0
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Figure 13. Differential Output Signal Rise Time vs Free-Air Figure 14. Differential Output Signal Fall Time vs Free-Air
Temperature Temperature
9 100
Total Loop Delay Recessive to Dominant (ns)
VCC = 3 V
8 VCC = 3.3 V 90
VCC = 3.6 V 80
7
70
6
Pulse Skew (ns)
60
5
50
4
40
3
30
2 20 VCC = 3 V
1 10 VCC = 3.3 V
VCC = 3.6 V
0 0
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Figure 15. Pulse Skew (|tpHR - tpLD|) vs Free-Air Temperature Figure 16. Total Loop Delay Recessive to Dominant
tPROP(LOOP1) vs Free-Air Temperature
Typical Characteristics, TCAN330 Driver (continued)

98
Total Loop Delay Dominant to Recessive (ns)

96
94
92
90
88
86
84
VCC = 3 V
82 VCC = 3.3 V
VCC = 3.6 V
80
-40 -20 0 20 40 60 80 100 120 140
Figure 17. Total Loop Delay Dominant to Recessive tPROP(LOOP2) vs Free-Air Temperature
9 Parameter Measurement Information

CANH
TXD
RL CL
CANL
Figure 18. Supply Test Circuit
CANH VCC
TXD 50% 50%
TXD
RL CL VOD 0V
VO(CANH) tpLD tpHR
CANL 90%
0.9V
VO(CANL) VOD
10% 0.5V
tR tF
Figure 19. Driver Test Circuit and Measurement

Parameter Measurement Information (continued)
CANH 1.5 V
0.9 V
+ IO VID
RXD 0.5 V
VID 0V
+
± tpDL
tpRH
CL_RXD VO VOH
CANL 90%
VO(RXD)
50%
±
10%
VOL
tR tF
Figure 20. Receiver Test Circuit and Measurement
CANH
VIH VIH
TXD
0V RL CL
SHDN/S/STB 50% S 50%
CANL
SHDN/S/STB 0V 0V
VI
tMODE tMODE
RXD
+
VOH
VO CL_RXD
RXD 50% CANH - CANL

±
500mV
VOL
Figure 21. tMODE Test Circuit and Measurement, from Normal to Shutdown, Standby or Silent Mode
VIH VIH
TXD TXD
CANH
TXD
VI RL CL
0V 0V
200 ns 200 ns
CANL
SHDN/S/STB VIH VIH
VI
SHDN/S/STB 50% S 50%
RXD
0V 0V
+
tMODE tMODE
VO CL_RXD
VOH VOH
±
RXD 50% 900 mV

CANH - CANL
VOL
Figure 22. tMODE Test Circuit and Measurement, from Shutdown, Standby or Silent to Normal Mode

CANH
VCC
TXD
VI RL CL
TXD 50%
CANL
0V
tPROP(LOOP1) tPROP(LOOP2)
RXD
+
VO VOH
CL_RXD
± RXD 50%
VOL
Figure 23. tPROP(LOOP) Test Circuit and Measurement
VI
70%
TXD
30% 30%
CANH
0V
TXD 5 x tBIT tBIT

VI RL
CANL
CANH - CANL 900mV
500mV
RXD
tBUS_SYM
VO CL_RXD
VOH
70%
RXD
30%
VOL
tREC_SYM
Figure 24. Loop Delay Symmetry Test Circuit and Measurement


CANH VIH
TXD
TXD
RL CL VOD 0V
VOD(D)
CANL
0.9 V
VOD
0.5 V
0V
tTXD_DTO
Figure 25. TXD Dominant Time Out Test Circuit and Measurement
CANH IOS 200 s
TXD
IOS VBUS
CANL VBUS VBUS

0V
or
0V
VBUS
VBUS
Figure 26. Driver Short-Circuit Current Test and Measurement
VID(D)
CANH 0.9 V
+ VID
RXD 0.5 V
VID 0V
+
±
CANL CL_RXD VO
VOH
RXD 50%
±
0V
tRXD_DTO
Figure 27. RXD Dominant Timeout Test Circuit and Measurement
IFAULT
FAULT TXD
DTO
RXD
+ DTO
±
Thermal
Shutdown
UV
GND Lockout
Figure 28. FAULT Test and Measurement

10 Detailed Description
10.1 Overview
This family of CAN transceivers is compatible with the ISO11898-2 High-Speed CAN (controller area network)
physical layer standard. They are designed to interface between the differential bus lines in CAN and the CAN
protocol controller.
10.2 Functional Block Diagram
SHDN / NC / FAULT VCC

Note C
5 3
FAULT LOGIC
VCC
Note B
VCC
VCC
DOMINANT
TXD TIME OUT
1 7
CANH
BIAS UNIT
Under
Voltage
6
CANL
8 Note C
S / NC / STB CONTROL and
MODE
LOGIC
Sleep Receiver
Note A
WAKE
DETECT
MUX
Normal Receiver
4 DOMINANT
RXD TIME OUT
GND
Copyright © 2016, Texas Instruments Incorporated
A. Sleep Receiver and Wake Detect are device dependent options and are only available in TCAND334.
B. Fault Logic is only available in TCAND337.
C. Pin 5 and 8 functions are device dependent. Refer to Device Options.
10.3 Feature Description

10.3.1 TXD Dominant Timeout (TXD DTO)
During normal mode (the only mode where the CAN driver is active), the TXD DTO circuit prevents the
transceiver from blocking network communication in the event of a hardware or software failure where TXD is
held dominant longer than the timeout period tTXD_DTO. The DTO circuit timer starts on a falling edge on TXD.
The DTO circuit disables the CAN bus driver if no rising edge is seen before the timeout period expires. This
frees the bus for communication between other nodes on the network. The CAN driver is re-activated when a
recessive signal is seen on TXD pin, thus clearing the TXD DTO condition. The receiver and RXD pin still reflect
the CAN bus, and the bus pins are biased to recessive level during a TXD dominant timeout.
10.3.2 RXD Dominant Timeout (RXD DTO)

All devices have a RXD DTO circuit that prevents a bus stuck dominant fault from permanently driving the RXD
output dominant (low) when the bus is held dominant longer than the timeout period tRXD_DTO. The RXD DTO
timer starts on a falling edge on RXD (bus going dominant). If no rising edge (bus returning recessive) is seen
before the timeout constant of the circuit expires (tRXD_DTO), the RXD pin returns high (recessive). The RXD
output is re-activated to mirror the bus receiver output when a recessive signal is seen on the bus, clearing the
RXD dominant timeout. The CAN bus pins are biased to the recessive level during a RXD DTO.
10.3.3 Thermal Shutdown

If the junction temperature of the device exceeds the thermal shutdown threshold, the device turns off the CAN
driver circuits thus blocking the TXD-to-bus transmission path. The shutdown condition is cleared when the
junction temperature of the device drops below the thermal shutdown temperature of the device. If the fault
condition that caused the thermal shutdown is still present, the temperature may rise again and the device will
enter thermal shut down again. Prolonged operation with thermal shutdown conditions may affect device
reliability. The thermal shutdown circuit includes hysteresis to avoid oscillation of the driver output.
During thermal shutdown the CAN bus drivers are turned off, thus no transmission is possible from TXD to the
bus. The CAN bus pins are biased to recessive level during a thermal shutdown and the receiver to RXD path
remains operational.
10.3.4 Undervoltage Lockout and Unpowered Device

The VCC supply terminal has under voltage detection which will place the device in protected mode if the supply
drops below the UVLO threshold. This protects the bus during an under voltage event on VCC by placing the bus
into a high impedance biased to ground state and the RXD terminal into a tri-stated (high impedance) state.
During undervoltage the device does not pass any signals from the bus. If the device is in normal mode and VCC
supply is lost the device will transition to a protected mode.
The device is designed to be an "ideal passive" or “no load” to the CAN bus if the device is unpowered. The bus
terminals (CANH, CANL) have low leakage currents when the device is unpowered, so the device does not load
the bus. This is critical if some nodes of the network are unpowered while the rest of the of network remains
operational. Logic pins also have low leakage currents when the device is unpowered, so the device does not
load other circuits which may remain powered.
Table 1. Undervoltage Protection 3.3-V Single Supply Devices

VCC DEVICE STATE BUS RXD
GOOD Operational Per Operating Mode Per Operating Mode
BAD Protected Common mode bias to GND High Impedance
UNPOWERED Unpowered High Impedance (no load) High Impedance

10.3.5 Fault Pin (TCAN337)

If one or more of the faults (TXD-Dominant Timeout, RXD dominant Timeout, Thermal Shutdown or
Undervoltage Lockout) occurs, the FAULT pin (open-drain) turns off, resulting in a high level when externally
pulled up to VCC supply.
VCC
P
FAULT TXD
FAULT
DTO
Input
RXD
DTO
Thermal
Shutdown
UV
GND Lockout
Figure 29. FAULT Pin Function Diagram and Application
10.3.6 Floating Pins

The device has internal pull ups and pull downs on critical terminals to place the device into known states if the
pin floats. See Table 1 for details on pin bias conditions.
Table 2. Pin Bias

PIN PULL UP or PULL DOWN COMMENT
Weakly biases TXD toward recessive to prevent bus blockage or TXD DTO
TXD Pull up
triggering.
STB Pull down Weakly biases STB terminal towards normal mode.
S Pull down Weakly biases S terminal towards normal mode.
SHDN Pull down Weakly biases SHDN terminal towards normal mode.
The internal bias should not be relied on by design, especially in noisy environments, but should be considered a
fall back protection. Special care needs to be taken when the device is used with MCUs using open drain
outputs. TXD is weakly internally pulled up. The TXD pull up strength and CAN bit timing require special
consideration when this device is used with an open drain TXD output on the microprocessor's CAN controller.
An adequate external pull up resistor must be used to ensure that the TXD output of the microprocessor
maintains adequate bit timing input to the CAN transceiver.
10.3.7 CAN Bus Short Circuit Current Limiting

The device has several protection features that limit the short circuit current when a CAN bus line is shorted.
These include CAN driver current limiting (dominant and recessive). The device has TXD dominant time out
which prevents permanently having the higher short circuit current of dominant state in case of a system fault.
During CAN communication the bus switches between dominant and recessive states, thus the short circuit
current may be viewed either as the current during each bus state or as a DC average current. For system
current and power considerations in the termination resistors and common mode choke ratings the average short
circuit current should be used. The percentage dominant is limited by the TXD dominant time out and CAN
protocol which has forced state changes and recessive bits such as bit stuffing, control fields, and interframe
space. These ensure there is a minimum recessive amount of time on the bus even if the data field contains a
high percentage of dominant bits.
The short circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short
circuit currents. The average short circuit current may be calculated with the following formula:
IOS(AVG) = %Transmit x [(%REC_Bits x IOS(SS)_REC ) + (%DOM_Bits x IOS(SS)_DOM)] + [%Receive x IOS(SS)_REC] (1)
Where:
• IOS(AVG) is the average short circuit current
• %Transmit is the percentage the node is transmitting CAN messages
• %Receive is the percentage the node is receiving CAN messages
• %REC_Bits is the percentage of recessive bits in the transmitted CAN messages
• %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages
• IOS(SS)_REC is the recessive steady state short circuit current
• IOS(SS)_DOM is the dominant steady state short circuit current
The short circuit current and possible fault cases of the network should be taken into consideration when sizing
the power ratings of the termination resistance and other network components.
10.3.8 ESD Protection

The bus pins of the TCAN33x family possess on-chip ESD protection against ±25-kV human body model (HBM)
and ±12-kV IEC61000-4-2 contact discharge. The IEC-ESD test is far more severe than the HBM-ESD test. The
50% higher charge capacitance, CS, and 78% lower discharge resistance, RD of the IEC model produce
significantly higher discharge currents than the HBM-model.
As stated in the IEC 61000-4-2 standard, contact discharge is the preferred test method; although IEC air-gap
testing is less repeatable than contact testing, air discharge protection levels are inferred from the contact
discharge test results.
RC RD
40
50M 330Ω 35
30 10kV IEC
Current - A
(1M) (1.5k)
25
High-Voltage 150pF Device
Pulse CS Under 20
Generator (100pF) Test 15
10
5 10kV HBM
0
0 50 100 150 200 250 300
Time - ns
Figure 30. HBM and IEC-ESD Models and Currents in Comparison (HBM Values in Parenthesis)
10.3.9 Digital Inputs and Outputs

All the devices in this family are single 3.3-V nominal supply devices. The digital logic input and output levels for
these devices have TTL threshold levels.

10.4 Device Functional Modes

10.4.1 CAN Bus States
The CAN bus has two logical states during operation: recessive and dominant. See Figure 31 and Figure 32.
Recessive bus state is when the high resistive internal input resistors of each node's receiver bias the bus to a
common mode of about 1.85 V across the bus termination resistors. Recessive is equivalent to logic high and is
typically a differential voltage on the bus of about 0 V. Recessive state is also the idle state.
Dominant bus state is when the bus is driven differentially by one or more drivers. Current is induced to flow
through the termination resistors and generate a differential voltage on the bus. Dominant is equivalent to logic
low and is a differential voltage on the bus greater than the minimum threshold for a CAN dominant. A dominant
state overwrites the recessive state.
During arbitration, multiple CAN nodes may transmit a dominant bit at the same time. In this case the differential
voltage of the bus will be greater than the differential voltage of a single driver.
The host microprocessor of the CAN node will use the TXD terminal to drive the bus and will receive data from
the bus on the RXD pin.
Transceivers with low power Standby Mode have a third bus state where the bus terminals are weakly biased to
ground via the high resistance internal resistors of the receiver. See Figure 31 and Figure 32.
Standby and Shutdown

Normal and Silent Modes Modes
Typical Bus Voltage
CANH
CANH
Vdiff 1.85 V
A
RXD
Bias
Vdiff
CANL Unit B
CANL
A. Normal and Silent Modes

Recessive Dominant Recessive Time, t
B. Standby and Shutdown Modes
Figure 31. Bus States (Physical Bit Figure 32. Simplified Recessive Common Mode
Representation) Bias Unit and Receiver
The devices have four main operating modes:

1. Normal mode (all devices)
2. Silent mode (TCAN330, TCAN337)
3. Standby mode with wake (TCAN334)
4. Shutdown mode (TCAN330, TCAN334)
Table 3. CAN Transceivers with Silent Mode

S Device MODE DRIVER RECEIVER RXD PIN
Reduced Power Silent
HIGH Disabled (OFF) (1) Enabled (ON)
(Listen) Mode Mirrors Bus State (2)
LOW/NC Normal Mode Enabled (ON) Enabled (ON)
(1) See Figure 31 for bus state.

(2) Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.
Table 4. CAN Transceivers with Standby Mode with Wake

STB Device MODE DRIVER RECEIVER RXD Terminal
High (Recessive) until
Ultra Low Current Standby Low Power Receiver and
HIGH Disabled (OFF) (1) WUP, then filtered mirrors
Mode Bus Monitor Enabled (ON)
of Bus State (2)
(3)
LOW/NC Normal Mode Enabled (ON) Enabled (ON) Mirrors Bus State

(2) Standby Mode RXD behavior: See Figure 33.
Table 5. CAN Transceivers with Shutdown Mode

SHDN Device MODE DRIVER RECEIVER RXD Terminal
HIGH Lowest Current Disabled (OFF) (1) Disabled (OFF) High (Recessive)
(2)
LOW/NC Normal Mode Enabled (ON) Enabled (ON) Mirrors Bus State

10.4.2 Normal Mode

This is the normal operating mode of the device. The CAN driver and receiver are fully operational and CAN
communication is bi-directional. The driver is translating a digital input on TXD to a differential output on CANH
and CANL. The receiver is translating the differential signal from CANH and CANL to a digital output on RXD.
10.4.3 Silent Mode

This is the silent or receive only mode of the device. The CAN driver is disabled but the receiver is fully
operational. CAN communication is unidirectional and only flows from the CAN bus through the receive path of
the transceiver to the CAN protocol controller via the RXD output pin. The receiver is translating the differential
signal from CANH and CANL to a digital output on RXD.
10.4.4 Standby Mode with Wake

This is the low power mode of the device. The CAN driver and main receiver are turned off and bi-directional
CAN communication is not possible. The low power receiver and bus monitor are enabled to allow for RXD Wake
Requests via the CAN bus. A wake up request will be output to RXD (driven low) as shown in Figure 33. The
local CAN protocol microprocessor should monitor RXD for transitions (high to low) and reactivate the device to
normal mode based on the RXD Wake Request. The CAN bus pins are weakly pulled to GND during this mode,
see Figure 32.
10.4.5 Bus Wake via RXD Request (BWRR) in Standby Mode

The TCAN334 with low power standby mode, offers a wake up from the CAN bus mechanism called bus wake
via RXD Request (BWRR) to indicate to a host microprocessor that the bus is active and it should wake up and
return to normal CAN communication.
This device uses the multiple filtered dominant wake-up pattern (WUP) from ISO11898-5 to qualify bus traffic into
a request to wake the host microprocessor. The bus wake request is signaled to the microprocessor by a falling
edge and low corresponding to a “filtered” bus dominant on the RXD terminal (BWRR).
The wake up pattern (WUP) consists of a filtered dominant bus, then a filtered recessive bus time followed by a
second filtered bus time. Once the WUP is detected the device will start issuing wake up requests (BWRR) on
the RXD terminal every time a filtered dominant time is received from the bus. The first filtered dominant initiates
the WUP and the bus monitor waits on a filtered recessive; other bus traffic does not reset the bus monitor. Once
a filtered recessive is received, the bus monitor waits on a filtered dominant and again; other bus traffic does not
reset the bus monitor. Immediately upon receiving of the second filtered dominant, the bus monitor recognizes
the WUP and transitions to BWRR mode. In this mode, RXD is driven low for all dominant bits lasting for longer
than tWK_FILTER. The RXD output during BWRR matches the classical 8-pin CAN devices, such as the
TCANA1040A-Q1 device, that used the single filtered dominant on the bus as the wake up request mechanism
from ISO11898-5.

For a dominant or recessive to be considered filtered, the bus must be in that state for more than tWK_FILTER time.
Due to variability in the tWK_FILTER the following scenarios are applicable. Bus state times less than tWK_FILTER(MIN)
are never detected as part of a WUP and thus no BWRR is generated. Bus state times between tWK_FILTER(MIN)
and tWK_FILTER(MAX) may be detected as part of a WUP and a BWRR may be generated. Bus state times more
than tWK_FILTER(MAX) are always detected as part of a WUP and thus a BWRR is always generated.
See Figure 33 for the timing diagram of the WUP. The pattern, tWK_FILTER time used for the WUP and BWRR
prevent noise and bus stuck dominant faults from causing false wake requests. If the device is switched to
normal mode, or an under voltage event occurs on VCC the BWRR will be lost.
Wake Up Pattern (WUP) Wake Request via RXD
Filtered Waiting for Filtered Waiting for Filtered

Dominant Filtered Recessive Filtered Dominant
Recessive Dominant
Bus
Bus VDiff
• tWK_FILTER • tWK_FILTER • tWK_FILTER • tWK_FILTER
RXD
Figure 33. Wake Up Pattern (WUP) and Bus Wake via RXD Request (BWRR)
10.4.6 Shutdown Mode

This is the lowest power mode of all of the devices. The CAN driver and receiver are turned off and bi-directional
CAN communication is not possible. It is not possible to receive a remote wake request via the CAN bus in this
mode. The CAN bus pins are pulled to GND during this mode as shown in Figure 31.
10.4.7 Driver and Receiver Function Tables
Table 6. Driver Function Table

BUS OUTPUTS (2)
DEVICE MODE TXD (1) INPUT DRIVEN BUS STATE (3)
CANH CANL
L H L Dominant
Normal
H or Open Z Z Biased Recessive
Silent X Z Z Biased Recessive
Standby X Z Z Weak Pull to GND
Shutdown X Z Z Weak Pull to GND
(1) H = high level, L = low level, X = irrelevant.

(2) H = high level, L = low level, Z = high Z receiver bias.
(3) For Bus state and bias see Figure 31 and Figure 32.
Table 7. Receiver Function Table Normal and Standby Modes

CAN DIFFERENTIAL INPUTS
DEVICE MODE BUS STATE RXD PIN (1)
V(ID) = V(CANH) – V(CANL)
V(ID) ≥ 0.9 V Dominant L
Normal or Silent 0.5 V < V(ID) < 0.9 V ? ?
V(ID) ≤ 0.5 V Recessive H
V(ID) ≥ 1.15 V Dominant
Standby 0.4 V < V(ID) < 1.15 V ? See Figure 33
V(ID) ≤ 0.4 V Recessive
Shutdown Any Recessive H
Any Open (V(ID) ≈ 0 V) Open H
(1) I = high level, L = low level, ? = indeterminate.

11 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
11.1 Application Information

11.1.1 Bus Loading, Length and Number of Nodes
The ISO 11898 standard specifies a data rate up to 1 Mbps, maximum CAN bus cable length of 40 m, maximum
drop line (stub) length of 0.3 m and a maximum of 30 nodes. However, with careful network design, the system
may have longer cables, longer stub lengths, and many more nodes to a bus. Many CAN organizations and
standards have scaled the use of CAN for applications outside the original ISO 11898 standard. They have made
system level trade-offs for data rate, cable length, and parasitic loading of the bus. Examples of some of these
specifications are ARINC825, CANopen, CAN Kingdom, DeviceNet and NMEA200.
A high number of nodes requires a transceiver with high input impedance and wide common mode range such
as the TCAN33x CAN family. ISO 11898-2 specifies the driver differential output with a 60-Ω load (two 120- Ω
termination resistors in parallel) and the differential output must be greater than 1.5 V. The TCAN33x devices are
specified to meet the 1.5-V requirement with a 50-Ω load across a common mode range of –12 V to 12 V
through a 330-Ω coupling network. This network represents the bus loading of 120 TCAN33x transceivers based
on their minimum differential input resistance of 40 kΩ.
For CAN network design, margin must be given for signal loss across the system and cabling, parasitic loadings,
network imbalances, ground offsets and signal integrity, thus a practical maximum number of nodes may be
lower. Bus length may also be extended beyond the original ISO 11898 standard of 40 m by careful system
design and data rate tradeoffs. For example, CANopen network design guidelines allow the network to be up to
1 km with changes in the termination resistance, cabling, number of nodes and data rate.
This flexibility in CAN network design is one of the key strengths of the various extensions and additional
standards that have been built on the original ISO 11898 CAN standard.
11.2 Typical Application
VCC
SHDN/ 3
FAULT
5
VIN VIN VOUT VCC TCAN33x
S / STB CANH
8 7
3-V Voltage CAN Transceiver
Regulator 3-V MCU
(e.g. TPSxxxx)
RXD
RXD
4
TXD
TXD
1
CANL
6
2 Optional:
GND Terminating
Node
Figure 34. Typical 3.3-V Application
Typical Application (continued)

11.2.1 Design Requirements
11.2.1.1 CAN Termination

The ISO 11898 standard specifies the interconnect to be a twisted-pair cable (shielded or unshielded) with 120-Ω
characteristic impedance (ZO). Resistors equal to the characteristic impedance of the line should be used to
terminate both ends of the cable to prevent signal reflections. Unterminated drop lines (stubs) connecting nodes
to the bus should be kept as short as possible to minimize signal reflections. The termination may be on the
cable or in a node, but if nodes may be removed from the bus the termination must be carefully placed so that it
is not removed from the bus.
11.2.2 Detailed Design Procedure

Termination is typically a 120-Ω resistor at each end of the bus. If filtering and stabilization of the common mode
voltage of the bus is desired, then split termination may be used (see Figure 8). Split termination uses two 60-Ω
resistors with a capacitor in the middle of these resistors to ground. Split termination improves the
electromagnetic emissions behavior of the network by eliminating fluctuations in the bus common mode voltages
at the start and end of message transmissions.
Care should be taken in the power ratings of the termination resistors used. Typically the worst case condition
would be if the system power supply was shorted across the termination resistance to ground. In most cases the
current flow through the resistor in this condition would be much higher than the transceiver's current limit.
Node n
Node 1 Node 2 Node 3 (with termination)
MCU or DSP
MCU or DSP MCU or DSP MCU or DSP
CAN
CAN CAN CAN Controller
Controller Controller Controller
CAN Transceiver
CAN Transceiver CAN Transceiver CAN Transceiver
RTERM
RTERM
Figure 35. Typical CAN Bus

Typical Application (continued)
Standard Termination Split Termination
CANH CANH
RTERM/2
CAN CAN
RTERM
Transceiver Transceiver
CSPLIT
RTERM/2
CANL CANL
Figure 36. CAN Bus Termination Concepts
11.2.3 Application Curves
1 Mbps Temp = 25°C VCC = 3.3 V 5 Mbps Temp = 25°C VCC = 3.3 V
60 Ω Load 60 Ω Load
Figure 37. TXD, CANH/L and RXD Waveforms Figure 38. TXD, CANH/L and RXD Waveforms
11.3 System Examples

11.3.1 ISO11898 Compliance of TCAN33x Family of 3.3-V CAN Transceivers Introduction
Many users value the low power consumption of operating their CAN transceivers from a 3.3-V supply. However,
some are concerned about the interoperability with 5 V supplied transceivers on the same bus. This report
analyzes this situation to address those concerns.
System Examples (continued)

11.3.2 Differential Signal
CAN is a differential bus where complementary signals are sent over two wires and the voltage difference
between the two wires defines the logical state of the bus. The differential CAN receiver monitors this voltage
difference and outputs the bus state with a single ended logic level output signal.
NOISE MARGIN
900 mV Threshold
RECEIVER DETECTION WINDOW 75% SAMPLE POINT
500 mV Threshold
NOISE MARGIN
Figure 39. Typical Differential Output Waveform
The CAN driver creates the differential voltage between CANH and CANL in the dominant state. The dominant
differential output of the TCAN33x is greater than 1.5 V and less than 3 V across a 60-Ω load as defined by the
ISO11898 standard. These are the same limiting values for 5 V supplied CAN transceivers. The bus termination
resistors drive the recessive bus state and not the CAN driver.
A CAN receiver is required to output a recessive state when less than 500 mV of differential voltage exists on the
bus, and a dominant state when more than 900 mV of differential voltage exists on the bus. The CAN receiver
must do this with common-mode input voltages from –2 V to 7 V. The TCAN33x family receivers meet these
same input specifications as 5 V supplied receivers.
11.3.3 Common-Mode Signal and EMC Performance

A common-mode signal is an average voltage of the two signal wires that the differential receiver rejects. The
common-mode signal comes from the CAN driver, ground noise, and coupled bus noise. Since the bias voltage
of the recessive state of the device is dependent on VCC, any noise present or variation of VCC has an effect on
this bias voltage seen by the bus. The TCAN33x family has the recessive bias voltage set higher than 0.5 x VCC
to match common mode in recessive mode to dominant mode. This results in superior EMC performance.
12 Power Supply Recommendations

To ensure reliable operation at all data rates and supply voltages, each supply should be decoupled with a 100-
nF ceramic capacitor located as close to the VCC supply pins as possible. The TPS76333 is a linear voltage
regulator suitable for the 3.3 V supply.

13 Layout
13.1 Layout Guidelines

TCAN33x family of devices incorporates integrated IEC 61000-4-2 ESD protection. Should the system requires
additional protection against ESD, EFT or surge, additional external protection and filtering circuitry may be
needed.
In order for the PCB design to be successful, start with design of the protection and filtering circuitry. Because
ESD and EFT transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high frequency
layout techniques must be applied during PCB design.
Design the bus protection components in the direction of the signal path. Do not force the transient current to
divert from the signal path to reach the protection device. Below is a list of layout recommendations when
designing a CAN transceiver into an application.
• Transient Protection on CANH and CANL: Transient Voltage Suppression (TVS) and capacitors (D1, C5 and
C7 shown in Figure 40) can be used for additional system level protection. These devices must be placed as
close to the connector as possible. This prevents the transient energy and noise from penetrating into other
nets on the board.
• Bus Termination on CANH and CANL: Figure 40 shows split termination where the termination is split into two
resistors, R5 and R6, with the center or split tap of the termination connected to ground through capacitor C6.
Split termination provides common mode filtering for the bus. When termination is placed on the board
instead of directly on the bus, care must be taken to ensure the terminating node is not removed from the
bus, as this causes signal integrity issues if the bus is not properly terminated on both ends.
• Decoupling Capacitors on VCC: Bypass and bulk capacitors must be placed as close as possible to the supply
pins of transceiver (examples are C2 and C3).
• Ground and power connections: Use at least two vias for VCC and ground connections of bypass capacitors
and protection devices to minimize trace and via inductance.
• Digital inputs and outputs: To limit current of digital lines, serial resistors may be used. Examples are R1, R2,
R3 and R4.
• Filtering noise on digital inputs and outputs: To filter noise on the digital I/O lines, a capacitor may be used
close to the input side of the I/O as shown by C1, C8 and C4.
• Fault Output Pin (TCAN337 only): Because the FAULT output pin is an open drain output, an external pullup
resistor is required to pull the pin voltage high for normal operation (R7).
• TXD input pin: If an open-drain host processor is used to drive the TXD pin of the device, an external pullup
resistor between 1 kΩ and 10 kΩ must be used to help drive the recessive input state of the device (weak
internal pullup resistor).
13.2 Layout Example
TXD R1 1 8 R3 S/STB
C1 C4
C5
GND 2 7 R5
U1
D1
J1
TCAN33x C6
C2
C3
R6
C7
VCC 3 6
RXD R2 4 5 R4 SHDN
C8
VCC R7
FAULT
Figure 40. Layout Example

14 Device and Documentation Support
14.1 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 8. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
TCAN330 Click here Click here Click here Click here Click here
TCAN330G Click here Click here Click here Click here Click here
14.2 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
14.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
14.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
14.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
15 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TCAN330D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TC330
TCAN330DCNR ACTIVE SOT-23 DCN 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 330
TCAN330DCNT ACTIVE SOT-23 DCN 8 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 330
TCAN330DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TC330
TCAN330GD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TC330
TCAN330GDCNR ACTIVE SOT-23 DCN 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 330
TCAN330GDCNT ACTIVE SOT-23 DCN 8 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 330
TCAN330GDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TC330
Addendum-Page 1
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 2
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com 7-Feb-2024
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TCAN330DCNR SOT-23 DCN 8 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TCAN330DCNT SOT-23 DCN 8 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TCAN330DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TCAN330GDCNR SOT-23 DCN 8 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TCAN330GDCNT SOT-23 DCN 8 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TCAN330GDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TCAN332DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TCAN332GDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TCAN334DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
Pack Materials-Page 1
Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1

Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TCAN334GDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TCAN337DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TCAN337GDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TCAN330DCNR SOT-23 DCN 8 3000 202.0 201.0 28.0
TCAN330DCNT SOT-23 DCN 8 250 202.0 201.0 28.0
TCAN330DR SOIC D 8 2500 340.5 336.1 25.0
TCAN330GDCNR SOT-23 DCN 8 3000 202.0 201.0 28.0
TCAN330GDCNT SOT-23 DCN 8 250 202.0 201.0 28.0
TCAN330GDR SOIC D 8 2500 340.5 336.1 25.0
TCAN332DCNR SOT-23 DCN 8 3000 202.0 201.0 28.0
TCAN332DCNT SOT-23 DCN 8 250 202.0 201.0 28.0
TCAN332DR SOIC D 8 2500 340.5 336.1 25.0
TCAN332GDR SOIC D 8 2500 340.5 336.1 25.0
TCAN334DCNR SOT-23 DCN 8 3000 202.0 201.0 28.0
TCAN334DCNT SOT-23 DCN 8 250 202.0 201.0 28.0
TCAN334DR SOIC D 8 2500 340.5 338.1 20.6
TCAN334GDR SOIC D 8 2500 340.5 338.1 20.6
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TCAN337DCNR SOT-23 DCN 8 3000 202.0 201.0 28.0
TCAN337DCNT SOT-23 DCN 8 250 202.0 201.0 28.0
TCAN337DR SOIC D 8 2500 340.5 336.1 25.0
TCAN337GDR SOIC D 8 2500 340.5 338.1 20.6
TUBE
T - Tube
height L - Tube length
W - Tube
width
B - Alignment groove width

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
TCAN330D D SOIC 8 75 507 8 3940 4.32
TCAN330GD D SOIC 8 75 507 8 3940 4.32
TCAN332D D SOIC 8 75 507 8 3940 4.32
TCAN332GD D SOIC 8 75 507 8 3940 4.32
TCAN334D D SOIC 8 75 507 8 3940 4.32
TCAN334GD D SOIC 8 75 507 8 3940 4.32
TCAN337D D SOIC 8 75 507 8 3940 4.32
TCAN337GD D SOIC 8 75 507 8 3940 4.32
PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1
.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]
4X (0 -15 )
4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK
EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND
NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
8X (.061 )
[1.55] SYMM
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
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is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
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TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

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Product Order Technical Tools & Support &

Folder Now Documents Software Community

TCAN330, TCAN332, TCAN334, TCAN337

TCAN33x 3.3-V CAN Transceivers with CAN FD (Flexible Data Rate)

– HBM ESD Protection exceeds ±25 kV FAULT LOGIC

– Current limiting on bus pins Sleep Receiver

networks (TCAN33xG devices) 2

• Changed the Pin Configuration image appearance ............................................................................................................... 4

Changes from Revision C (April 2016) to Revision D Page

• Changed From: ARNIC825 To ARINC825 in the Applications list ......................................................................................... 1

Changes from Revision B (April 2016) to Revision C Page

Changes from Revision A (January 2016) to Revision B Page

Changes from Original (December 2015) to Revision A Page

2 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated

DEVICE PIN 5 PIN 8 DERATE DESCRIPTION

Copyright © 2015–2019, Texas Instruments Incorporated Submit Documentation Feedback 3

7 Pin Configuration and Functions

TCAN330 D, DCN Packages

TCAN332 D, DCN Packages

4 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated

8.2 ESD Ratings

8.3 Recommended Operating Conditions

8.4 Thermal Information

Copyright © 2015–2019, Texas Instruments Incorporated Submit Documentation Feedback 5

8.5 Electrical Characteristics

See Figure 31 and Figure 19, TXD =

6 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated

Electrical Characteristics (continued)

Copyright © 2015–2019, Texas Instruments Incorporated Submit Documentation Feedback 7

8.6 Switching Characteristics

8 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated

FAULT is signaled to link layer / protocol. Fault indication is removed.

Communication from Communication from Communication from

RXD RXD mirrors

RXD output is returned recessive (high) and

Copyright © 2015–2019, Texas Instruments Incorporated Submit Documentation Feedback 9

8.7 Typical Characteristics

Driver Low-Level Output Current (mA)

10 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated

8.8 Typical Characteristics, TCAN330 Receiver

Propagation Delay Time (ns)

Receiver Fall Time (ns)

Copyright © 2015–2019, Texas Instruments Incorporated Submit Documentation Feedback 11

8.9 Typical Characteristics, TCAN330 Driver

Prapagation Delay Time (ns)

30 Differential Output Signal Fall Time (ns) 14

12 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated

Typical Characteristics, TCAN330 Driver (continued)

Total Loop Delay Dominant to Recessive (ns)

9 Parameter Measurement Information

Figure 18. Supply Test Circuit

Figure 19. Driver Test Circuit and Measurement

Copyright © 2015–2019, Texas Instruments Incorporated Submit Documentation Feedback 13

Parameter Measurement Information (continued)

Figure 20. Receiver Test Circuit and Measurement

RXD 50% CANH - CANL

SHDN/S/STB 50% S 50%

RXD 50% 900 mV

14 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated