Bec 3
Bec 3
Bec 3
of E&C, BMSCE
OPERATIONAL AMPLIFIER
Op-Amp (operational amplifier) is defined as direct-coupled high-gain amplifier and is used to
perform a wide variety of linear as well as nonlinear functions.
Op-Amp (operational amplifier) is basically an amplifier available in the IC form. The word
“operational” is used because the amplifier can be used to perform a variety of mathematical
operations such as addition, subtraction, integration, differentiation etc.
An Op-Amp is a versatile device that can be used to amplify dc as well as ac signals.
Figure 1 below shows the symbol of an Op-Amp.
+VCC
V1 (Inverting input)
Vo(output)
V2 (non-inverting input)
-VEE
It has two inputs and one output. The input marked “-” is known as Inverting input and the
input marked “+” is known as Non-inverting input.
Vi V0
t t
The output voltage Vo= -AVi is amplified but is out of phase with respect to the input signal by
1800.
If a voltage Vi is fed at the non-inverting input (Keeping the inverting input at ground)
as shown below.
Vi V0
t t
The output voltage Vo= AVi is amplified and in-phase with the input signal.
If two different voltages V1 and V2 are applied to an ideal Op-Amp as shown below.
V1
VO
V2
The output voltage will be Vo = A (V1 – V2) i.e the difference of the tow voltages is amplified.
Hence an Op-Amp is also called as a High gain differential amplifier.
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
Input stage: It consists of a dual input, balanced output differential amplifier. Its function
is to amplify the difference between the two input signals. It provides high differential gain
and high input impedance.
Intermediate stage: The overall gain requirement of an Op-Amp is very high. Since the input
stage alone cannot provide such a high gain. Intermediate stage is used to provide the required
additional voltage gain.It consists of another differential amplifier with dual input, and
unbalanced (single ended) output.
Buffer and Level shifting stage: As the Op-Amp amplifies D.C signals also, the small D.C. quiescent
voltage level of previous stages may get amplified and get applied as the input to the next stage
causing distortion the final output. Hence the level shifting stage is used to bring down the D.C. level
to ground potential, when no signal is applied at the input terminals. Buffer is usually an emitter
follower used for impedance matching.
Output stage- It consists of a push-pull complementary amplifier which provides large A.C.
output voltage swing and high current sourcing and sinking along with low output impedance.
Parameters of Op-amp:
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
1. Input offset voltage (Vio): the voltage that must be applied between the two input
terminals of an opamp to null the output. It can be positive or negative value. Smaller
the value, better are the terminals matched. For 741C precision opamp it is 150µV
maximum, for 741C it is 6mV dc maximum.
2. Input offset current: the algebraic difference between the currents into inverting and
non-inverting terminals is referred to as input offset current.
Iio = IB1 − IB2
IB1 is the current into non-inverting terminal and IB2 is the current into inverting terminal
(they are the base currents of the transistors of the first differential amplifier). Smaller the
value, better are the terminals matched. For 741C precision opamp it is 6nA, for 741C it is
200nA.
3. Input bias current: it is the average current that flows into inverting and non-
inverting terminals of the opamp.
IB1 + IB2
IB =
2
For 741C precision opamp it is ±7nA, for 741C it is 500nA.
5. Common Mode Rejection Ratio (CMRR): Ratio of differential voltage gain (large
signal voltage gain) to common mode voltage gain
A Vocm
CMRR = A d , Acm =
cm Vicm
Acm is very small and Ad is very large. CMRR is large and is expressed in dB. For 741C, it is
90dB, For 741C precision opamp, it is 120dB (better ability to reject common mode voltages
such as electrical noise). Higher the value of CMRR, better is the matching between the two
input terminals and smaller is the output common mode voltage.
6. Large signal voltage gain: Opamp amplifies difference voltage between two input
terminals.
Output voltage
voltage gain =
differential input voltage
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
V0
A=
Vid
Under the test conditions, RL>=2KΩ and V0=±10V, the Large signal voltage gain for
741C is 200,000 typically.
7. Output resistance: Equivalent resistance that can be measured between output
terminal of the Op-amp and the ground. It is 75Ω for 741C.
8. Slew rate: It is the maximum rate of change of output voltage per unit of time.
Expressed in V/µs.
dV0
SR = |max
dt
SR indicates how rapidly output of the Op-amp can change in response to changes in
input frequency. SR changes with the gain and is normally specified for unity gain.
SR is an important parameter of Op-amp for selecting it for ac applications especially
high frequencies (Eg. oscillator, comparator, filters). For 741C it is 0.5 V/µs. LM 318
has SR of 70 V/µs.
1.Inverting Amplifier
An inverting amplifier is one whose output is amplified and is out of phase by 1800 with
respect to the input.
By KCL we have
i1 i2
Vi 0 0 Vo
R1 Rf
Vi V
o
R1 Rf
Rf
VO Vi
R1
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
3.Integrator
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
4.Differentiator
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
5.Voltage follower
Voltage follower is one whose output is equal to the input.The voltage follower configuration
shown above is obtained by short circuiting “Rf” and open circuiting “R1” connected in the
usual non-inverting amplifier.
Thus all the output is fed back to the inverting input of the op-Amp.
Rf
V0 1 Vi When Rf = 0 short circuiting
R1
0
VO 1 Vi
VO Vi Therefore the output voltage will be equal and in-phase with the input voltage. Thus
voltage follower is nothing but a non-inverting amplifier with a voltage gain of unity.
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
6. Inverting Adder
Inverting adder is one whose output is the inverted sum of the constituent inputs.
By KCL we have i f i1 i2 i3
0 VO V1 0 V2 0 V3 0
Rf R1 R2 R3
VO V V V
1 2 3
Rf R 1 R2 R3
V V V
VO R f 1 2 3
R 1 R2 R3
If R1 = R2 = R3 =R then
Rf
VO V1 V2 V3
R
If Rf = R then
VO = -[ V1 + V2 + V3 ]
Hence it can be observed that the output is equal to the inverted sum of the inputs.
SUBTRACTOR
Now, let us find the expression for output voltage V0 of the above circuit
using superposition theorem using the following steps –
Step 1
Firstly, let us calculate the output voltage V01 by considering only.
For this, eliminate V2 by making it short circuit. Then we obtain the modified circuit
diagram as shown in the following figure −
Now, using the voltage division principle, calculate the voltage at the non-inverting
input terminal of the op-amp.
Now, the above circuit looks like a non-inverting amplifier having input voltage Vp Therefore,
the output voltage V01 of above circuit will be
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
Substitute, the value of Vp in above equation, we obtain the output voltage V01 by
considering only V1, as –
Step 2
In this step, let us find the output voltage, V02 by considering only V2. Similar to that
in the above step, eliminate V1 by making it short circuit. The modified circuit
diagram is shown in the following figure.
You can observe that the voltage at the non-inverting input terminal of the op-amp will be
zero volts. It means, the above circuit is simply an inverting op-amp. Therefore, the output
voltage V02 of above circuit will be –
Step 3
In this step, we will obtain the output voltage V0 of the subtractor circuit by adding the
output voltages obtained in Step1 and Step2. Mathematically, it can be written as
Substituting the values of V01 and V02 in the above equation, we get −
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
Thus, the op-amp based subtractor circuit discussed above will produce an output, which is
the difference of two input voltages V1 and V2, when all the resistors present in the circuit
are of same value.
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
Hartley Oscillator
The circuit diagram of Hartley Oscillator is as shown in figure below. It uses two
inductors placed across common capacitor C and the center of two inductors ins tapped. The tank
circuit is made up of L1 , L2 and C and is given by.
1
f
2 LT C
where LT = L1 + L2 + 2M
When the circuit is turned ON, the capacitor is charged. When this capacitor is fully charged,
it discharges through coils L1 and L2 setting up oscillations of frequency determined by
expression .
The output voltage of the amplifier appears across L2 and feedback voltage across L1. The
voltage across L1 is 1800 out of phase with the voltage developed across L2.
A phase shift of 1800 is produced by the transistor and a further phase shift of 1800 is produced
by L1-L2 voltage divider circuit. In this way feedback is properly phased to produce continuous
undamped oscillations.
Basic Electronics Notes by Sowmya Sunkara, Asst. Prof. Dept. of E&C, BMSCE
CRYSTAL OSCILLATOR