Philips Chassis Tcm3.1a-La
Philips Chassis Tcm3.1a-La
Philips Chassis Tcm3.1a-La
TCM3.1A
LA
Click
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©
Copyright 2009 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by JA/JY 0963 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18520
2009-Mar-27
EN 2 1. TCM3.1A LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
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Technical Specifications and Connections TCM3.1A LA 2. EN 3
13 - n.c. E_06532_002.eps
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14 - n.c.
15 - DDC_SCL DDC clock j Figure 2-4 VGA Connector
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
1 - Video Red 0.7 VPP / 75 Ω j
18 - +5V j
2 - Video Green 0.7 VPP / 75 Ω j
19 - HPD Hot Plug Detect j
3 - Video Blue 0.7 VPP / 75 Ω j
20 - Ground Gnd H
4 - n.c.
5 - Ground Gnd H
Cinch: Video CVBS - In, Audio - In 6 - Ground Red Gnd H
Ye - Video CVBS 1 VPP / 75 Ω jq 7 - Ground Green Gnd H
Wh - Audio L 0.5 VRMS / 10 kΩ jq 8 - Ground Blue Gnd H
Rd - Audio R 0.5 VRMS / 10 kΩ jq 9 - +5VDC +5 V j
10 - Ground Sync Gnd H
Mini Jack: Audio Head phone - Out 11 - n.c.
Bk - Head phone 32 - 600 Ω / 10 mW ot 12 - DDC_SDA DDC data j
13 - H-sync 0-5V j
2.3.2 Rear Connections 14 - V-sync 0-5V j
15 - DDC_SCL DDC clock j
HDMI 1 & 2: Digital Video, Digital Audio - In
1 - D2+ Data channel j PC Audio: Mini Jack: VGA Audio - In
2 - Shield Gnd H Bk - Audio L/R 0.5 VRMS / 10 kΩ jq
3 - D2- Data channel j
4 - D1+ Data channel j Aerial - In
5 - Shield Gnd H - - IEC-type (EU) Coax, 75 Ω D
6 - D1- Data channel j
2009-Mar-27
EN 4 3. TCM3.1A LA Precautions, Notes, and Abbreviation List
• All ICs and many other semiconductors are susceptible to Due to lead-free technology some rules have to be respected
electrostatic discharges (ESD w). Careless handling by the workshop during a repair:
during repair can reduce life drastically. Make sure that, • Use only lead-free soldering tin. If lead-free solder paste is
during repair, you are connected with the same potential as required, please contact the manufacturer of your soldering
the mass of the set by a wristband with resistance. Keep equipment. In general, use of solder paste within
components and tools also at this same potential. workshops should be avoided because paste is not easy to
• Be careful during measurements in the high voltage store and to handle.
section. • Use only adequate solder tools applicable for lead-free
• Never replace modules or other components while the unit soldering tin. The solder tool must be able:
is switched “on”. – To reach a solder-tip temperature of at least 400°C.
• When you align the set, use plastic rather than metal tools. – To stabilize the adjusted temperature at the solder-tip.
This will prevent any short circuits and the danger of a – To exchange solder-tips for different applications.
circuit becoming unstable. • Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
3.3 Notes Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
3.3.1 General To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Measure the voltages and waveforms with regard to the • Mix of lead-free soldering tin/parts with leaded soldering
chassis (= tuner) ground (H), or hot ground (I), depending tin/parts is possible but PHILIPS recommends strongly to
on the tested area of circuitry. The voltages and waveforms avoid mixed regimes. If this cannot be avoided, carefully
shown in the diagrams are indicative. Measure them in the clear the solder-joint from old tin and re-solder with new tin.
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
2009-Mar-27
Precautions, Notes, and Abbreviation List TCM3.1A LA 3. EN 5
It should be noted that on the European Service website, 0/6/12 SCART switch control signal on A/V
“Alternative BOM” is referred to as “Design variant”. board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3
The third digit in the serial number (example: format
AG2B0335000001) indicates the number of the alternative AARA Automatic Aspect Ratio Adaptation:
B.O.M. (Bill Of Materials) that has been used for producing the algorithm that adapts aspect ratio to
specific TV set. In general, it is possible that the same TV remove horizontal black bars; keeps
model on the market is produced with e.g. two different types the original aspect ratio
of displays, coming from two different suppliers. This will then ACI Automatic Channel Installation:
result in sets which have the same CTN (Commercial Type algorithm that installs TV channels
Number; e.g. 28PW9515/12) but which have a different B.O.M. directly from a cable network by
number. means of a predefined TXT page
By looking at the third digit of the serial number, one can ADC Analogue to Digital Converter
identify which B.O.M. is used for the TV set he is working with. AFC Automatic Frequency Control: control
If the third digit of the serial number contains the number “1” signal used to tune to the correct
(example: AG1B033500001), then the TV set has been frequency
manufactured according to B.O.M. number 1. If the third digit is AGC Automatic Gain Control: algorithm that
a “2” (example: AG2B0335000001), then the set has been controls the video input of the feature
produced according to B.O.M. no. 2. This is important for box
ordering the correct spare parts! AM Amplitude Modulation
For the third digit, the numbers 1...9 and the characters A...Z AP Asia Pacific
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be AR Aspect Ratio: 4 by 3 or 16 by 9
indicated by the third digit of the serial number. ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
Identification: The bottom line of a type plate gives a 14-digit bars without discarding video
serial number. Digits 1 and 2 refer to the production centre (e.g. information
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers ATSC Advanced Television Systems
to the Service version change code, digits 5 and 6 refer to the Committee, the digital TV standard in
production year, and digits 7 and 8 refer to production week (in the USA
example below it is 2006 week 17). The 6 last digits contain the ATV See Auto TV
serial number. Auto TV A hardware and software control
system that measures picture content,
MADE IN BELGIUM
and adapts image parameters in a
MODEL : 32PF9968/10
220-240V ~ 50/60Hz dynamic way
128W AV External Audio Video
PROD.NO: AG 1A0617 000001 VHF+S+H+UHF AVC Audio Video Controller
S BJ3.0E LA AVIP
B/G
Audio Video Input Processor
Monochrome TV system. Sound
10000_024_090121.eps carrier distance is 5.5 MHz
090121
BLR Board-Level Repair
BTSC Broadcast Television Standard
Figure 3-1 Serial number (example) Committee. Multiplex FM stereo sound
system, originating from the USA and
3.3.7 Board Level Repair (BLR) or Component Level Repair used e.g. in LATAM and AP-NTSC
(CLR) countries
B-TXT Blue TeleteXT
If a board is defective, consult your repair procedure to decide C Centre channel (audio)
if the board has to be exchanged or if it should be repaired on CEC Consumer Electronics Control bus:
component level. remote control bus on HDMI
If your repair procedure says the board should be exchanged connections
completely, do not solder on the defective board. Otherwise, it CL Constant Level: audio output to
cannot be returned to the O.E.M. supplier for back charging! connect with an external amplifier
CLR Component Level Repair
3.3.8 Practical Service Precautions ComPair Computer aided rePair
CP Connected Planet / Copy Protection
CSM Customer Service Mode
• It makes sense to avoid exposure to electrical shock.
CTI Color Transient Improvement:
While some sources are expected to have a possible
manipulates steepness of chroma
dangerous impact, others of quite high potential are of
transients
limited current and are sometimes held in less regard.
CVBS Composite Video Blanking and
• Always respect voltages. While some may not be
Synchronization
dangerous in themselves, they can cause unexpected
DAC Digital to Analogue Converter
reactions that are best avoided. Before reaching into a
DBE Dynamic Bass Enhancement: extra
powered TV set, it is best to test the high voltage insulation.
low frequency amplification
It is easy to do, and is a good service precaution.
DDC See “E-DDC”
D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz
DFI Dynamic Frame Insertion
DFU Directions For Use: owner's manual
DMR Digital Media Reader: card reader
DMSD Digital Multi Standard Decoding
DNM Digital Natural Motion
2009-Mar-27
EN 6 3. TCM3.1A LA Precautions, Notes, and Abbreviation List
DNR Digital Noise Reduction: noise uses 8 bit or 10 bit data words, and has
reduction feature of the set a maximum data rate of 270 Mbit/s,
DRAM Dynamic RAM with a minimum bandwidth of 135
DRM Digital Rights Management MHz.
DSP Digital Signal Processing ITV Institutional TeleVision; TV sets for
DST Dealer Service Tool: special remote hotels, hospitals etc.
control designed for service LS Last Status; The settings last chosen
technicians by the customer and read and stored
DTCP Digital Transmission Content in RAM or in the NVM. They are called
Protection; A protocol for protecting at start-up of the set to configure it
digital audio/video content that is according to the customer's
traversing a high speed serial bus, preferences
such as IEEE-1394 LATAM Latin America
DVB-C Digital Video Broadcast - Cable LCD Liquid Crystal Display
DVB-T Digital Video Broadcast - Terrestrial LED Light Emitting Diode
DVD Digital Versatile Disc L/L' Monochrome TV system. Sound
DVI(-d) Digital Visual Interface (d= digital only) carrier distance is 6.5 MHz. L' is Band
E-DDC Enhanced Display Data Channel I, L is all bands except for Band I
(VESA standard for communication LPL LG.Philips LCD (supplier)
channel and display). Using E-DDC, LS Loudspeaker
the video source can read the EDID LVDS Low Voltage Differential Signalling
information form the display. Mbps Mega bits per second
EDID Extended Display Identification Data M/N Monochrome TV system. Sound
(VESA standard) carrier distance is 4.5 MHz
EEPROM Electrically Erasable and MIPS Microprocessor without Interlocked
Programmable Read Only Memory Pipeline-Stages; A RISC-based
EMI Electro Magnetic Interference microprocessor
EPLD Erasable Programmable Logic Device MOP Matrix Output Processor
EU Europe MOSFET Metal Oxide Silicon Field Effect
EXT EXTernal (source), entering the set by Transistor, switching device
SCART or by cinches (jacks) MPEG Motion Pictures Experts Group
FDS Full Dual Screen (same as FDW) MPIF Multi Platform InterFace
FDW Full Dual Window (same as FDS) MUTE MUTE Line
FLASH FLASH memory NC Not Connected
FM Field Memory or Frequency NICAM Near Instantaneous Compounded
Modulation Audio Multiplexing. This is a digital
FPGA Field-Programmable Gate Array sound system, mainly used in Europe.
FTV Flat TeleVision NTC Negative Temperature Coefficient,
Gb/s Giga bits per second non-linear resistor
G-TXT Green TeleteXT NTSC National Television Standard
H H_sync to the module Committee. Color system mainly used
HD High Definition in North America and Japan. Color
HDD Hard Disk Drive carrier NTSC M/N= 3.579545 MHz,
HDCP High-bandwidth Digital Content NTSC 4.43= 4.433619 MHz (this is a
Protection: A “key” encoded into the VCR norm, it is not transmitted off-air)
HDMI/DVI signal that prevents video NVM Non-Volatile Memory: IC containing
data piracy. If a source is HDCP coded TV related data such as alignments
and connected via HDMI/DVI without O/C Open Circuit
the proper HDCP decoding, the OSD On Screen Display
picture is put into a “snow vision” mode OTC On screen display Teletext and
or changed to a low resolution. For Control; also called Artistic (SAA5800)
normal content distribution the source P50 Project 50: communication protocol
and the display device must be between TV and peripherals
enabled for HDCP “software key” PAL Phase Alternating Line. Color system
decoding. mainly used in West Europe (color
HDMI High Definition Multimedia Interface carrier= 4.433619 MHz) and South
HP HeadPhone America (color carrier PAL M=
I Monochrome TV system. Sound 3.575612 MHz and PAL N= 3.582056
carrier distance is 6.0 MHz MHz)
I2 C Inter IC bus PCB Printed Circuit Board (same as “PWB”)
I2 D Inter IC Data bus PCM Pulse Code Modulation
I2 S Inter IC Sound bus PDP Plasma Display Panel
IF Intermediate Frequency PFC Power Factor Corrector (or Pre-
IR Infra Red conditioner)
IRQ Interrupt Request PIP Picture In Picture
ITU-656 The ITU Radio communication Sector PLL Phase Locked Loop. Used for e.g.
(ITU-R) is a standards body FST tuning systems. The customer
subcommittee of the International can give directly the desired frequency
Telecommunication Union relating to POD Point Of Deployment: a removable
radio communication. ITU-656 (a.k.a. CAM module, implementing the CA
SDI), is a digitized video format used system for a host (e.g. a TV-set)
for broadcast grade video. POR Power On Reset, signal to reset the uP
Uncompressed digital component or PTC Positive Temperature Coefficient,
digital composite signals can be used. non-linear resistor
The SDI signal is self-synchronizing, PWB Printed Wiring Board (same as “PCB”)
2009-Mar-27
Precautions, Notes, and Abbreviation List TCM3.1A LA 3. EN 7
2009-Mar-27
EN 8 4. TCM3.1A LA Mechanical Instructions
4. Mechanical Instructions
Index of this chapter: By positioning the TV face down on the (ESD protective) foam
4.1 Service Positions bars, a stable situation is created to perform measurements
4.2 Cable Dressing and Taping and alignments. By placing a mirror under the TV, the screen
4.3 Assy/Panel Removal can be monitored.
4.4 Set Re-assembly
Notes:
• Figures below can deviate slightly from the actual situation, 1
due to the different set executions.
For easy servicing of this set, there are a few possibilities Required for sets
1
created: 42"
The foam bars (order code 3122 785 90580 for two pieces) can
be used for all types and sizes of Flat TVs.
See figure Figure 4-1 for details. Sets with a display of 42" and E_06532_018.eps
171106
larger, require four foam bars [1]. Ensure that the foam bars
are always supporting the cabinet and never only the display.
Caution: Failure to follow these guidelines can seriously Figure 4-1 Foam bars
damage the display!
5cm
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Mechanical Instructions TCM3.1A LA 4. EN 9
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EN 10 4. TCM3.1A LA Mechanical Instructions
Caution: It is mandatory to remount screws at their original 1. Unplug all connectors on the SSB.
position during re-assembly. Failure to do so may result in 2. Remove all screws (screw #1) that hold the board.
damaging the SSB. Refer to Figure 4-5 for details. 3. The SSB can now be taken out of the set, together with the
side connector cover.
4.3.1 Rear Cover
4.3.7 LCD Panel
Warning/Notes:
• Disconnect the mains power cord before rear cover Description below is based upon the 42" model with LG display.
removal. Disassembly method of other LCD panels is comparable to the
• It is not necessary to remove the stand while removing the one described below. See also “Mechanical layout” drawings.
rear cover. 4. Unplug and remove all cables.
• Re-use the original screws when re-assembling the TV. 5. Remove the Main Supply Panel and Small SIgnal Board as
described earlier.
6. Remove all metal brackets that are mounted on the panel
1. Remove all screws of the rear cover.
(be aware of the different screws used, see figure “Used
Important: Be sure to re-use the same screws when
remounting the rear cover, as these screws have a 30 screws”):
– Two VESA holder brackets at the top (screw #2).
degrees thread instead of the common used 45 degrees
– Two SSB holder brackets (screws #2 and #3).
thread.
2. Lift the rear cover from the TV. Make sure that wires and – Two central holder brackets (screw #2).
– One PSU holder bracket (screw#1).
flat coils are not damaged while lifting the rear cover from
7. Remove the stand [1] (screw #5).
the set.
8. Remove the subframe of the stand [2] (screw #2).
9. Remove the brackets [3] (screw #3) that secure the LCD
4.3.2 Speakers
panel, and remove screws #4 at the bottom of the LCD.
10. The LCD panel can now be lifted from the front cabinet.
Each speaker unit is mounted (in rubber) with two screws.
When defective, replace the whole unit.
B u tto n S ID E AV
b ra c k e t
IP B b ra c k e t
IR - L e n s
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Mechanical Instructions TCM3.1A LA 4. EN 11
S ID E AV
B u tto n
b ra c k e t
S S B b ra c k e t B
IR - L E D
A C -In B ra c k e t S ta n d
2 * Speaker
b ra c k e t
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IP B b ra c k e t
SSB
B u tto n
S id e AV b ra c k e t
IR - L e n s
S ta n d
2 * Speaker A C -In B ra c k e t b ra c k e t
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EN 12 5. TCM3.1A LA Service Modes, Error Codes, and Fault Finding
• All picture settings at 50% (brightness, colour, contrast). S/N NVM USB Copy content To be copied /
Remarks
• All sound settings at 50%, except volume at 25%.
1 Display settings White Point alignment, Yes
• All service unfriendly modes (if present) are disabled. RGB
2 Personal settings eg. Brightness, colour, Yes
How to Activate SDM hue, equalizer, band,
head phone volume, child
Use the standard RC-transmitter and key in the code “062596”, lock, time, picture for-
directly followed by the “MENU” (or HOME) button. mat...
After activating this mode, “SDM” will appear in the upper right 3 Channel List Channel preset Yes
corner of the screen (when a picture is available). 4 Options list Option code Yes
5 AGC and AFC SSB specific No.
alignment
How to Navigate 6 HDCP key No.
When the “MENU” (or HOME) button is pressed on the RC 7 Model 22PFL1234D/10 Yes
transmitter, the set will toggle between the SDM and the normal 8 Production serial nbr. BA1A0837123456 Yes
user menu (with the SDM mode still active in the background). 9 Software Version TXM21E 1.00 No. Read and display.
10 Option Code 009 yes
How to Exit SDM (used display)
Switch the set to STAND-BY via the RC-transmitter. 11 Codes 011 000 000 000 000 No. Error detection
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Service Modes, Error Codes, and Fault Finding TCM3.1A LA 5. EN 13
How to Navigate
By means of the “Arrow up/down” button on the RC-transmitter,
one can navigate through the menus.
Contents of CSM
The contents are displayed on two pages:
2009-Mar-27
EN 14 5. TCM3.1A LA Service Modes, Error Codes, and Fault Finding
Introduction The error code buffer contains all detected errors since the last
ComPair (Computer Aided Repair) is a Service tool for Philips time the buffer was erased. The buffer is written from top to
Consumer Electronics products. and offers the following: bottom (or left to right), new errors are logged at the top/left
1. ComPair helps to quickly get an understanding on how to side, and all other errors shift one position to the bottom/right.
repair the chassis in a short and effective way. When an error occurs, it is added to the list of errors, provided
2. ComPair allows very detailed diagnostics and is therefore the list is not full. When the error buffer is full, then the new error
capable of accurately indicating problem areas. No is not added, and the error buffer stays intact (history is
knowledge on I2C or UART commands is necessary, maintained).
because ComPair takes care of this. To prevent that an occasional error stays in the list forever, the
3. ComPair speeds up the repair time since it can error is removed from the list after more than 50 hrs. of
automatically communicate with the chassis (when the uP operation/
is working) and all repair information is directly available.
4. ComPair features TV software up possibilities. There is a simple blinking LED procedure for board level repair
(home repair) the so called LAYER 1 errors, next to the existing
Specifications errors which are LAYER 2 errors:
ComPair consists of a Windows based fault finding program • LAYER 1 errors are one digit errors
and an interface box between PC and the (defective) product. • LAYER 2 errors are two digit errors.
The ComPair II interface box is connected to the PC via an
USB cable. For the TV chassis, the ComPair interface box and When is LAYER 1 or 2 available:
the TV communicate via a bi-directional cable via the service • In CSM mode: When entering CSM: error LAYER 1 will be
connector(s). displayed by blinking LED. Only the latest error is shown.
The ComPair fault finding program is able to determine the • In SDM mode: When SDM is entered via Remote Control
problem of the defective television, by a combination of code or the hardware pins, LAYER 2 is displayed via
automatic diagnostics and an interactive question/answer blinking LED.
procedure.
Error display on screen:
How to Connect • In CSM, no error codes are displayed on screen.
This is described in the chassis fault finding database in • In SAM, the complete error list is shown.
ComPair.
TO TV
If possible, check the entire contents of the error buffer. In
TO TO TO
some situations, an error code is only the result of another error
UART SERVICE I2C SERVICE UART SERVICE
CONNECTOR CONNECTOR CONNECTOR
code and not the actual cause (e.g. a fault in the protection
detection circuitry can also lead to a protection).
ComPair II
Multi
In case of non-intermittent faults, clear the error buffer before
RC in function
RC out
starting to repair (before clearing the buffer, write down the
Optional Power Link/ Mode
content, as this history can give significant information). This to
Switch Activity I2C RS232 /UART
ensure that old error codes are no longer present.
2009-Mar-27
Service Modes, Error Codes, and Fault Finding TCM3.1A LA 5. EN 15
5.4.4 Error Codes 5.5 The Blinking LED Procedure (LAYER-2 codes)
Take notice that some errors need several minutes before they 5.5.1 Introduction
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
The software is capable of identifying different kinds of errors.
check if the front LED is blinking or if an error is logged.
Because it is possible that more than one error can occur over
time, an error buffer is available that is capable of storing the
Table 5-3 Layer 1 code overview (multi chassis overview) last five errors that occurred. This is useful if the OSD is not
working properly.
Code (*) Board
1 (not used in this chassis)
Errors can also be displayed by the blinking LED procedure.
2 SSB
The method is to repeatedly let the LED pulse with as many
3 Display supply
pulses as the error code number, followed by a time period of
4 Platform supply (not used in this chassis)
1.5 seconds in which the LED is “off”. Then this sequence is
5 Display-box (when split architecture) (not used in this chassis)
repeated.
6 Reserve (not used in this chassis)
E.g. error code 4 will result in four times the sequence LED “on”
7 Fan (not used in this chassis)
for 0.25 seconds / LED “off” for 0.25 seconds. After this
8 LED Backlight panel DIM (not used in this chassis)
sequence the LED will be “off” for 1.5 seconds. Any RC
command terminates this sequence.
Note: (*) For this chassis, only Layer1 error codes “2” and “3”
are applicable! Displaying the entire error buffer
The entire error buffer can be displayed when service mode
“SDM” is entered (by remote control command
Table 5-4 Layer-2 code overview 062596<MENU>). When in protection, this sequence will not
work, but than LAYER-1 error code should suffice.
Layer 2 Error Detection Type Remarks In order to avoid confusion with RC signal reception blinking,
error code Description Method this blinking procedure is terminated when a RC command is
0 No Error N/A N/A N/A received.
14 General I2C I2C Bus Spontaneous Communication Error
blinking on I2C bus
5.5.2 How to Activate
15 Tuner I2C Bus Error Log Communication Error
+ blinking in SDM with Tuner
16 Demodulator I2C Bus Error Log Communication Error Use one of the following methods:
+ blinking in SDM with TDA9886T
• Activate the CSM. The blinking front LED will show only
2
17 Audio amplifier I C Bus Error Log Communication Error
+ blinking in SDM with Audio amplifier
the latest LAYER-1 error.
18 NVM EEPROM I2C Bus Spontaneous Communication Error
• Activate the SDM. The blinking front LED will show the
blinking with EEPROM entire contents of the LAYER-2 error buffer.
2009-Mar-27
EN 16 5. TCM3.1A LA Service Modes, Error Codes, and Fault Finding
Yes
Yes
Check 33V is
OK? check the
U2,Q13
No
Is No
Q14,C184,C197 check
,L54 shorted to D2,R184,R178
earth?
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Service Modes, Error Codes, and Fault Finding TCM3.1A LA 5. EN 17
No
Check the voltage of Check
U17.8~11,it 24v? L139,L140
Yes
Yes Change the
Check the voltage of No Check the Q24
software of U10 &
U17.31 & U17.23,is it OK? &,is it OK?
U8
Yes
No colour
No YES YES
Reset Check
To Tuner Input Check E2PROM
Local system cable & antenna U21
YES
Fine Frequency
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EN 18 5. TCM3.1A LA Service Modes, Error Codes, and Fault Finding
5.7.1 Introduction To upgrade the HDMI EDID, pin 7 of the EDID NVM [1] has to
be short circuited to ground. See ComPair for further
instructions.
It is possible for the user to upgrade the main software via the
USB port. A description on how to upgrade the main software
can be found in the DFU and below.
To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has
to be short circuited to ground. See ComPair for further
instructions.
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Y
Please don ÿt shut off the pow er
T he softw are update m ay takes 3 to 5 N
N
m inutes Is U SB file version > Is U SB file version <=
Erasing... End
set SW set SW
Layout 3
Y Y
D isplay U SB sw D isplay U SB sw
new er than the T V equal/older than the
Please donÿt shut off pow er
sw .Prom pt user to T V sw.Prom pt user to
T he softw are update m ay takes 3 to 5 com firm com firm
m inutes
U pgrading...18%
See Layout 1
See Layout 2
Layout 4
N
N
Proceed?
Softw are update Y
failed! W ould you T V auto erase
Valid auto-run
like to try again Y and upgrade
file
softw are
Layout 5
See Layout 3 See Layout 4
T V auto restart Y N
the set, prom pt Prom pt user to
Successful ?
user to rem ove try again
U SB
See Layout 5
N Y
EN D R etry?
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EN 20 6. TCM3.1A LA Alignments
6. Alignments
Index of this chapter: 6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)
6.1 General Alignment Conditions
6.2 Hardware Alignments Purpose: To keep the tuner output signal constant as the input
6.3 Software Alignments signal amplitude varies.
6.4 Option Settings
6.5 Reset of Repaired SSB
The AGC alignment is done automatically (standard value:
“12”). Store settings and exit SAM
6.1 General Alignment Conditions
6.3.2 White Point
Perform all electrical adjustments under the following
conditions: • Press the “Menu/Home” button on the RC, and then select
• Power supply voltage (depends on region): “Picture”. Set the picture settings as follows:
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%). Picture Setting
– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%). Smart Picture Personal
– EU: 230 VAC / 50 Hz (± 10%). Colour Temperature Cool
– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%). Dynamic Contrast Off
– US: 120 VAC / 60 Hz (± 10%). Dynamic Backlight Off
• Connect the set to the mains via an isolation transformer Colour Enhancement Off
with low internal resistance. Light Sensor Off
• Allow the set to warm up for approximately 15 minutes.
• Measure voltages and waveforms in relation to correct • Activate SAM mode and select “RGB Align”.
ground (e.g. measure audio signals in relation to
AUDIO_GND). White point alignment LCD screens:
Caution: It is not allowed to use heat sinks as ground. • Use a 100% white screen on HDMI-1 as input signal and
• Test probe: Ri > 10 MΩ, Ci < 20 pF. set the following values:
• Use an isolated trimmer/screwdriver to perform – “Colour temperature”: “Cool”.
alignments. – All “R/G/B_Gain” values to: “127”.
– All “R/G/B_Offset” values to: “240”.
6.1.1 Alignment Sequence
In case colour analyser can be used:
• First, set the correct options: see also section Option codes • Measure with a calibrated contactless colour analyser in
• Warming up (>15 minutes). the centre of the screen. Consequently, the measurement
• Start the alignments. needs to be done in a dark environment.
• Adjust the correct x,y coordinates by means of decreasing
the value of one or two other white points to the correct x,y
6.2 Hardware Alignments coordinates (see Table 6-1). Tolerance dx, dy: ± 0.004.
Only the “Cool” colour temperature needs to adjust.
Not applicable. • When finished, select “Store” in the “RGB Align” sub menu,
and press “OK” on the RC to store the aligned values to the
NVM.
6.3 Software Alignments • Restore the initial picture settings after the alignments.
Put the set in SAM mode (see chapter 5. Service Modes, Error Table 6-1 White D alignment values
Codes, and Fault Finding). The SAM menu will now appear on
the screen. Select the appropriate alignment and go to one of Value Cool (11000K) Normal (9000K) Warm (6500K)
the sub menus with the “arrow right” button. The alignments are x 0.278 0.289 0.314
explained below. y 0.278 0.291 0.319
The following items can be aligned:
• Tuner AGC.
• White point. In case no colour analyser is available, the default values
• ADC calibration of VGA and YPbPr inputs. can be used. This is the next best solution. The default values
are average values coming from production.
To store the data: • Select the “Cool” colour temperature.
• When displayed, select “Store” in the related sub menu and • Set the RED, GREEN and BLUE default values according
press the “OK” button on the RC. Screen text will change to the values in the “White tone default settings” table.
from “DO” to “OK” • When finished, select “Store” in the “RGB Align” sub menu,
• Press the MENU/House button on the RC. and press “OK” on the RC to store the aligned values to the
• Switch the set to Stand-by mode. NVM.
• Restore the initial picture settings after the alignments.
For the next alignments, supply the following test signals via a
video generator to the RF input: Table 6-2 White tone default settings
• EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz White Tone 32" 42" 47"
• US/AP-NTSC models: an NTSC M/N TV-signal with a Colour Temp R G B R G B R G B
signal strength of at least 1 mV and a frequency of 61.25 Normal auto adjusted
MHz (channel 3). Cool * * * * * * * * *
• LATAM models: an NTSC M TV-signal with a signal Warm auto adjusted
strength of at least 1 mV and a frequency of 61.25 MHz
(channel 3).
(*) Default values were not available at the time of publishing.
They will be published as soon as they become available.
2009-Mar-27
Alignments TCM3.1A LA 6. EN 21
6.3.3 Auto ADC • The new option setting is only active after the TV is
switched “off/on” with the mains switch (the NVM is then
Purpose: For correct gray- and colour scale values of the VGA read again).
and YPbPr inputs.
6.5 Reset of Repaired SSB
How to align the VGA/PC input:
1. Provide a 1 024 × 768 @ 60 Hz test signal with White/
When a repaired SSB will be used in an other TV, it is very
Black squares to the VGA input.
important that the correct info is written into the NVM w.r.t.
2. Select “Auto ADC” in the SAM menu.
12NC of the SSB, production serial number of the TV, 12NC of
3. Press the “Arrow right” button on the RC.
display and PSU, etc.
4. Press “OK” on the RC.
To set all this, the ComPair tool can be used, or the NVM can
5. Wait until OSD shows “Auto ADC - OK”.
be edited directly via the NVM editor (in SAM). Find below the
addresses of these items. Use the decimal values.
How to align the YPbPr inputs (CVI-1 and CVI-2): In case of a display replacement, reset the “Operation hours” to
1. Provide a 1 024 × 768 @ 60 Hz test signal with 100% 8 “0”, or to the operation hours of the replacement display.
step colour bar to the YPbPr input.
2. Rest is the same as for the VGA input.
Table 6-3 NVM addresses of “reset items”
Display Option
Code
39mm
PHILIPS 040
27mm
MODEL:
32PF9968/10
PROD.SERIAL NO:
AG 1A0620 000001
(CTN Sticker)
E_06532_038.eps
240108
(*) This display code can be found on the side sticker (see
figure above) and/or on the rear sticker.
Select this sub menu to set all options at once by selecting the
correct model number. The so-called “Project ID” represents a
number of different options, all related to that model number.
By toggling the “arrow left/right” buttons on the RC, the correct
model number can be selected.
• After changing the option (or Project ID), save it by leaving
the sub menu via the “Menu/House” button on the RC.
2009-Mar-27
EN 22 7. TCM3.1A LA Circuit Descriptions
7. Circuit Descriptions
Index of this chapter: 7.1 Introduction
7.1 Introduction
7.3 Power Supply
Key components of this chassis are:
7.2 Video and Audio Processing - MT822x
• MT8221 Mediatek Scaler IC.
• R8C11Renesas Stand-by microprocessor.
• TEDE8 Tuner.
Notes: • TDA9886 IF Demodulator.
• Only new circuits (circuits that are not published recently) • WM8501 D/A Converter.
are described. • STA333BW Audio Amplifier.
• Figures can deviate slightly from the actual situation, due
to different set executions.
7.1.1 Architecture Overview
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
• For details about the chassis block diagrams refer to
9. Block Diagrams) and circuit diagrams (see chapter
chapter 9. Block Diagrams. An overview of the MT8221
10. Circuit Diagrams and PWB Layouts). Where
necessary, a separate drawing for clarification is given. architecture can be found in Figure 7-1.
DC-DC POWER
12V to 5V SUPPLY CONNECTOR MT22 BLOCK DIAGRAM_V0.2
ON OFF
VCC
SIF
SAW-D94
R08C11 53D TDA9
EEPROM TUNER
KEY POWER ON 886T
TX,RX M24C64MN TDQG4-601A VIF
STANDBY IR SAW-K72
70M
I2C ATV CVBS
PANEL
TUNER I2C
RX SCL TV_CVBS
TX SDA SIF
LVDS OUT LVDS
KEY BOARD
KEY
IR
MT8221/22R VIDEO
OUT
ADC CLASS D
VIDEO
CVBS DECODER AMP
FLASH MEMOFR SWITCH
3D COMB FILTER
64Mbit Y IF
SCALER AUDIO
LVDS TRANSIMITER AMP for
I2S
HDMI RECEIVER 19” R
DAC
AUDIO DECODER
DDR1 DDR IF
Media player˖Mpeg2/4ˈDivx R0/L0 OUT
AUDIO
AVIˈMp3,JpegˈRM R1/L1 OUT
AMP for
Game R2/L2 OUT L
ADC 19”
I2S IN AUDIO
CRYSTAL
SWTICH
CVBS IN
RGB
TV CVBS OUT
CVBS CVBS
YPbPr
EDID
CVBS
RGB
HDM2 HDM3 SPDIF AV IN VGA YPbPr SCART1 SCART2 PC AUDIO AV OUT USB HEAD PHONE
CEC
18520_200_090311.eps
090311
2009-Mar-27
Circuit Descriptions TCM3.1A LA 7. EN 23
The MediaTek MT822x is an ultra high integrated single chip Block Diagram
for flat panel TV. It supports multimedia video/audio input and
S ta n d b y
A C IN
output format up to full HDTV. EMC
F ilte r circu it
B rid g e re ctifie r
F ilte r circu it
circu it
3 .3 V
IC 3 / T2
It includes an advanced 3D comb filter/TV decoder to retrieve
MCU
the best image from popular composite signals and embedded PS - ON
HDTV/VGA decoders for high bandwidth input signals. 1 2 V R e la y K 1 O p to
co u p le r S tartup
S ig nal
The new 4th generation advanced motion adaptive and motion
estimation de-interlacer converts accordingly the interlaced V CC
P F C C ircu it PWM
video into a progressive one with overlay of a 2D graphic B rid g e re ctifie r IC 1 C ircu it 24V
F ilte r circu it L1 395V IC 2
processor. T1
Independent two flexible scalers provide wide adoption to 12V o p erating v o ltag e
C ircu it
various LCD panels for two different video sources at the same IN V E R TE R
BL-ON
T4
time. H V tra n sfo rm e r
C o n tro l a n d
d rivecircu it
PDIM
The on-chip audio processor decodes the analogue signals
from the tuner with lip sync control, delivering high quality post-
processed sound effects to the audio amplifier stage. H ig h Vo lta g e F e e d b a ck circu it
P ro te ctio n circu it
A C o u tp u t
An on-chip microprocessor reduces the system BOM and 18520_211_090319.eps
090319
shortens the schedule of UI design by high level C
programming.
Figure 7-2 Block diagram IPL32L PSU
Consult the Service Spare Part portal for the order codes of Table 7-2 Control signals
these boards.
Control signal Comments Output
Below some background info on the PSUs is given, to ease the PS-ON 3.3V >= ON >= 2.0V AC power output ON
troubleshooting process in case of power supply problems 0.7V >= OFF >= 0V AC power output OFF
BL_ON 5.0V >= ON >= 2.0V The inverter is working
7.3.1 Diversity 1.0V >= OFF >= 0V The inverter is switched OFF
DIMP High level: 2V ~ 5.0V HD: OPC dimming, 140Hz
The only type of power supply used in this platform is the Low level: 0V ~ 0.7V FHD: PWM, 103.4Hz
H V p art f ailure
(IC p ro tec tio n
circuit).
18520_212_090319.eps
090319
2009-Mar-27
EN 24 7. TCM3.1A LA Circuit Descriptions
P F C o u tp u t P F C o u tp u t
395V IN V E R T E R +H V 395V IN V E R T E R +H V
AC P F C IC IC OZ9926A AC P F CIC IC L6501
R e la y R e la y
In p u t In p u t
L6562A (O2) -H V U C 28060 (M IC R O S E M I) -H V
(ST) E NA B LE (T I) E NA B LE
P W M P ow er P W M P ow er
S upply IC S upply IC
24V 24V
P S -O N
FA 5571 P S -O N
FA 5571
(F U JI) (F U JI)
S T B P ow er S T B P ow er
S upply IC S upply IC
3 .3 V 3 .3 V
F S Q 510 F S Q 510
(FA IR C H ILD (FA IR C H ILD
18520_214_090319.eps 18520_213_090319.eps
090319 090319
Figure 7-4 Block diagram IPL42L PSU Figure 7-5 Block diagram IPL47L PSU
Output Voltage Tolerance Min. current Max. current Load regulation Output Voltage Tolerance Min. current Max. current Load regulation
+3V3 +/- 5% 5 mA 300 mA +/- 5% +3V3 +/- 5% 5 mA 300 mA +/- 5%
24V +/- 5% 0.5 A 2.5 A +/- 5% 24V +/- 5% 0.5 A 2.5 A +/- 5%
2009-Mar-27
IC Data Sheets TCM3.1A LA 8. EN 25
8. IC Data Sheets
Index of this chapter: This chapter shows the internal block diagrams and pin
8.1 Diagram B01, LD1117 (IC U4) configurations of ICs that are drawn as “black boxes” in the
8.2 Diagram B01, RT8110 (IC U13) electrical diagrams (with the exception of “memory” and “logic”
8.3 Diagram B01, MP1593 (IC U14) ICs).
8.4 Diagram B01, PQ1CX41 (IC U20)
8.5 Diagram B02, MX25L3205 (IC U10)
8.6 Diagram B02, MT8221 (IC U11)
8.7 Diagram B03, RT9199 (IC U1)
8.8 Diagram B04, TDA9885 (IC U2)
8.9 Diagram B07, WM8501 (IC U9)
8.10 Diagram B09, RC4558 (IC U26/U37)
8.11 Diagram B09, LM833D (IC U27)
8.12 Diagram B10, STA333BW (IC U17)
DPAK
F_15710_166.eps
230905
2009-Mar-27
EN 26 8. TCM3.1A LA IC Data Sheets
Block Diagram
DRIVE VCC
VCC
V CC Power-
Regulator On Reset IOC
POR
0.8V REF OC R OC
+ PHASE
UVP Soft-Start
0.5V - -
and Fault
+ -
Logic
SSE + 1.5V
S1L PH_M
SS UGATE
+ EO Gate VCC
+Gm + BOOT
FB - + Control
- Logic LGATE
PWM
GND
Oscillator
Pin Configuration
(TOP VIEW)
UGATE
PHASE
LGATE
GND
8 7 6 5
1 2 3 4
DRIVE
FB
BOOT
VCC
18520_312_090326.eps
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2009-Mar-27
IC Data Sheets TCM3.1A LA 8. EN 27
Block Diagram
IN 2
INTERNAL CURRENT
REGULATORS SENSE
AMPLIFIER + 5V
OSCILLATOR
SLOPE
COMP --
1 BS
40/385KHz
CLK M1
+ + S Q
R Q
3 SW
0.7V -- SHUTDOWN -- CURRENT
COMPARATOR COMPARATOR
EN 7 M2
LOCKOUT
-- COMPARATOR
1.8V
2.3V/
2.6V + + -- 4 GND
Pin Configuration
TOP VIEW
BS 1 8 SS
IN 2 7 EN
SW 3 6 COMP
GND 4 5 FB
EXPOSED PAD
ON BACKSIDE
18520_307_090325.eps
CONNECT TO PIN 4 090325
2009-Mar-27
EN 28 8. TCM3.1A LA IC Data Sheets
Block Diagram
Pin Configuration
18520_313_090327.eps
090327
2009-Mar-27
IC Data Sheets TCM3.1A LA 8. EN 29
Block Diagram
additional 4Kb
Address
X-Decoder
Generator
Memory Array
SI Data
Register
Y-Decoder
SRAM
Buffer
Sense Output
Mode State Amplifier Buffer
CS#, ACC, Logic Machine HV
WP#,HOLD# Generator
SO
Pin Configuration
PIN DESCRIPTION
SYMBOL DESCRIPTION
16-PIN SOP (300 mil)
CS# Chip Select
SI Serial Data Input
HOLD# 16 SCLK SO/PO7(1) Serial Data Output or Parallel Data
1
SI output/input
VCC 2 15
SCLK Clock Input
NC 3 14 PO6
HOLD#(2) Hold, to pause the serial communication
PO2 4 13 PO5
(HOLD# is not for parallel mode)
PO1 5 12 PO4
WP#/ACC Write Protection: connect to GND;
PO0 6 11 PO3
12V for program/erase acceleration:
CS# 7 10 GND
connect to 12V
SO/PO7 8 9 WP#/ACC
VCC + 3.3V Power Supply
GND Ground
PO0~PO6 Parallel data output/input (PO0~PO6 can
be connected to NC in serial mode)
NC No Internal Connection
Note:
1. PO0~PO7 are not provided on 8-LAND SON package.
2. HOLD# is recommended to connect to VCC during
parallel mode.
18520_308_090325.eps
090325
2009-Mar-27
EN 30 8. TCM3.1A LA IC Data Sheets
MUX
ADC
Switches VGAD
PIP Path
ADC
DRAM
VGA
MDDi DS
HDMIx3
Digital Path OSD
Dithering DSP
18520_300_090311.eps
090311
2009-Mar-27
IC Data Sheets TCM3.1A LA 8. EN 31
Block Diagram
VCNTL VIN
Current Limit
Thermal Protection
+
REFEN
EA VOUT
-
GND
Pin Configuration
(TOP VIEW)
VIN 8 VCNTL
GND 2 7 VCNTL
REFEN 3 6 VCNTL
VOUT 4 5 VCNTL
SOP-8
VIN 8 NC
GND 2 7 NC
GND
REFEN 3 6 VCNTL
VOUT 4 5 NC
2009-Mar-27
EN 32 8. TCM3.1A LA IC Data Sheets
Block Diagram
external
VIF-PLL reference crystal
filter
(1)
TOP TAGC VAGC VPLL REF AFC
9 14 16 19 15 21
CAGC neg CBL
VIF2 2
VIDEO TRAPS 17 CVBS video output 2 V (p-p)
VIF1 1 VIF-PLL
4.5 to 6.5 MHz [1.1 V (p-p) without trap
TDA9885
TDA9886
8 AUD
SINGLE REFERENCE QSS MIXER/ AUDIO PROCESSING
SIF2 24 5 DEEM
INTERCARRIER MIXER AND AND SWITCHES
SIF1 23 AM-DEMODULATOR de-emphasis
network
MAD
NARROW-BAND FM-PLL 6 AFD
OUTPUT
SUPPLY SIF-AGC I2C-BUS TRANSCEIVER DETECTOR CAF
PORTS
CAGC
20 18 13 3 22 11 10 7 12 4
VP AGND n.c. OP1 OP2 SCL SDA DGND SIOMAD FMPLL
FM-PLL filter
Pin Configuration
VIF1 1 24 SIF2
VIF2 2 23 SIF1
OP1 3 22 OP2
FMPLL 4 21 AFC
DEEM 5 20 VP
AFD 6 19 VPLL
TDA9885
TDA9886
DGND 7 18 AGND
AUD 8 17 CVBS
TOP 9 16 VAGC(1)
SDA 10 15 REF
SCL 11 14 TAGC
2009-Mar-27
IC Data Sheets TCM3.1A LA 8. EN 33
Block Diagram
Pin Configuration
18520_311_090325.eps
090325
2009-Mar-27
EN 34 8. TCM3.1A LA IC Data Sheets
Block Diagram
SCHEMATIC (EACH AMPLIFIER)
VCC+
IN−
IN+
OUT
VCC−
Pin Configuration
(TOP VIEW)
1OUT 1 8 VCC+
1IN− 2 7 2OUT
1IN+ 3 6 2IN−
VCC− 4 5 2IN+
18520_309_090325.eps
090326
2009-Mar-27
IC Data Sheets TCM3.1A LA 8. EN 35
Pin Configuration
Output 1 1 8 VCC
2 1 7 Output 2
Inputs 1
3 6
2 Inputs 2
VEE 4 5
(Top View)
18520_306_090325.eps
090225
2009-Mar-27
EN 36 8. TCM3.1A LA IC Data Sheets
Block Diagram
SA
I2C
OUT1A
OUT1B
SDI POWER OUT2A
BICKI
Channel mapping
CONTROL
STATUS
RESET
EQ, Tone, DDX3A
INT LINE Volumes… DDX3B
DDX4A/TWARNEXT
PWDN DDX4B/EAPD
Processor
XTI
PLL
PLL_FILTER
Pin Configuration
GND_SUB 1 36 Vdd_DIG
SA 2 35 GND_DIG
TEST MODE 3 34 SCL
VSS 4 33 SDA
VCC_REG 5 32 INT_LINE
OUT2B 6 31 RESET
GND2 7 30 SDI
VCC2 8 29 LRCKI
OUT2A 9 28 BICKI
OUT1B 10 27 XTI
VCC1 11 26 PLL_GND
GND1 12 25 PLL_FILTER
OUT1A 13 24 PLL_Vdd
GND_REG 14 23 POWRDN
Vdd 15 22 GND_DIG
CONFIG 16 21 VDD_DIG
OUT3B/DDX3B 17 20 TWARN/OUT4B
OUT3A/DDX3A 18 19 EAPD/OUT4A 18520_310_090325.eps
090325
2009-Mar-27
7.
6.
5.
4.
3.
2.
1.
6.
5.
4.
3.
2.
1.
E KEYBOARD CONTROL
J
P601
P602
KEY
3.3V
3.3V
GND
GND
IR_IN
IR_IN
ADIN1
ADIN1
GPIO_11
GPIO_11
LED-RED
LED-RED
TO
IR LED PANEL
P1
BACKLIGHT
1. GPIO_11
2. LED_RED
3. GND
4. IR_IN
5. +3.3V
WIRING DIAGRAM 32" (CLICK)
9. Block Diagrams
IPB
A
Wiring Diagram 32" (Click)
P3
1. HV2
2. HV2
RIGHT SPEAKER
MAIN POWER SUPPLY
P4
1. HV1
2. HV1
Block Diagrams
P2
INLET
11. DIM
1 +24V
3. COM
5. COM
9. COM
7. +3.3VSB
P1
T3.15A
3. N
1. L
TCM3.1A LA
8. N.C.
6. COM
2. +24V
4. +24V
10. P_ON
12. BL_ON
9.
EN 37
2009-Mar-27
LCD DISPLAY
P22 (B01)
11. BP-ADJ 12. PB-ON/OFF
B
P17 (B10)
1. LVDSVDD 2. LVDSVDD
3. LVDSVDD 4. LVDSVDD
5. GND 6. GND
7. GND 8. GND
9. E4P 10. E4N
11. E3P 12. E3N
13. ECKP 14. ECKN
15. E2P 16. E2N
17. E1P 18. E1N
19. EOP 20. E0N
21. DCR 22. SEL LVDS
23. NC 24. BIT SEL
25. VBR EX 27. VBR OUT
27. O4P 29. O4N
31. O3P 33. O3N
33. O2P 35. O3P
LEFT SPEAKER
P15 (B11)
7. ADIN1
6. KEY
5. GPIO_11
4. LED_RED
P25 (B10) 3. GND
1. OUT_L-
2. OIRI_IN
2. OUT_L+
1. 5VSB
3. OUT_R+
4. OUT_R-
TO
BACKLIGHT
090324
18520_400_090313.eps
7.
6.
5.
4.
3.
2.
1.
6.
5.
4.
3.
2.
1.
E KEYBOARD CONTROL
J
P601
P602
KEY
3.3V
3.3V
GND
GND
IR_IN
IR_IN
ADIN1
ADIN1
GPIO_11
GPIO_11
LED-RED
LED-RED
TO
IR LED PANEL
P1
BACKLIGHT
1. GPIO_11
2. LED_RED
3. GND
4. IR_IN
5. +3.3V
WIRING DIAGRAM 42" (CLICK)
P902
A
1. HV2
2. HV2
Wiring Diagram 42" (Click)
IPB
P901
1. HV1
RIGHT SPEAKER
2. HV1
P801
3. N
P802
1. L
TCM3.1A LA
11. DIM
1 +24V
3. COM
5. COM
9. COM
INLET
7. +3.3VSB
T5.0A
8. N.C.
6. COM
2. +24V
4. +24V
10. P_ON
12. BL_ON
9.
EN 38
2009-Mar-27
LCD DISPLAY
P22 (B01)
11. BP-ADJ 12. PB-ON/OFF
B
P17 (B10)
1. LVDSVDD 2. LVDSVDD
3. LVDSVDD 4. LVDSVDD
5. GND 6. GND
7. GND 8. GND
9. E4P 10. E4N
11. E3P 12. E3N
13. ECKP 14. ECKN
15. E2P 16. E2N
17. E1P 18. E1N
19. EOP 20. E0N
21. DCR 22. SEL LVDS
23. NC 24. BIT SEL
25. VBR EX 27. VBR OUT
27. O4P 29. O4N
31. O3P 33. O3N
33. O2P 35. O3P
LEFT SPEAKER
P15 (B11)
7. ADIN1
6. KEY
5. GPIO_11
4. LED_RED
P25 (B10) 3. GND
1. OUT_L-
2. OIRI_IN
2. OUT_L+
1. 5VSB
3. OUT_R+
4. OUT_R-
TO
BACKLIGHT
090324
18520_401_090313.eps
7.
6.
5.
4.
3.
2.
1.
6.
5.
4.
3.
2.
1.
E KEYBOARD CONTROL
J
P601
P602
KEY
3.3V
3.3V
GND
GND
IR_IN
IR_IN
ADIN1
ADIN1
GPIO_11
GPIO_11
LED-RED
LED-RED
TO
IR LED PANEL
P1
BACKLIGHT
1. GPIO_11
2. LED_RED
3. GND
4. IR_IN
5. +3.3V
WIRING DIAGRAM 47" (CLICK)
P901
A
1. HV2
2. HV2
Wiring Diagram 47" (Click)
IPB
P902
1. HV1
2. HV1
RIGHT SPEAKER
MAIN POWER SUPPLY
Block Diagrams
P803
INLET
11. DIM
1 +24V
3. COM
5. COM
9. COM
P801
7. +3V3VSB
3. N
T5.0A
1. L
8. N.C.
6. COM
2. +24V
4. +24V
10. P_ON
12. BL_ON
TCM3.1A LA
9.
EN 39
2009-Mar-27
LCD DISPLAY
P22 (B01)
11. BP-ADJ 12. PB-ON/OFF
B
P17 (B10)
1. LVDSVDD 2. LVDSVDD
3. LVDSVDD 4. LVDSVDD
5. GND 6. GND
7. GND 8. GND
9. E4P 10. E4N
11. E3P 12. E3N
13. ECKP 14. ECKN
15. E2P 16. E2N
17. E1P 18. E1N
19. EOP 20. E0N
21. DCR 22. SEL LVDS
23. NC 24. BIT SEL
25. VBR EX 27. VBR OUT
27. O4P 29. O4N
31. O3P 33. O3N
33. O2P 35. O3P
LEFT SPEAKER
P15 (B11)
7. ADIN1
6. KEY
5. GPIO_11
4. LED_RED
P25 (B10) 3. GND
1. OUT_L-
2. OIRI_IN
2. OUT_L+
1. 5VSB
3. OUT_R+
4. OUT_R-
TO
BACKLIGHT
090324
18520_402_090313.eps
Block Diagrams TCM3.1A LA 9. EN 40
Block Diagram
BASS
YPBPR2 Y/C
GAME PORT
RF IN SCART2-OPTION
I2C
12V-52"6A
AV3 RESET
EN25B32
VGA H/V
MODE
ADDRESS AC~220V
KEY
LED
AV4
IR
RT9199 24C32
CEC
RESET
MUTE RT916 3.3VSB
POWER/ON
R8C/11
DDR SDRAM 6
MT8222/21 SERVICE
POWER_PROTECK SHORT_PROTECK
DATA
switch 12V/5VPANEL-1~2A
CVBSOUT
HV AC2KV
CPU
5VRF-200mA
LD1117
5.2VM- 4A
3.3V
DC-DC SHORT_PROTECK 5VRF
5VUSB-2A 12V 5.2VM
CONFINE RT8110+
SCART1 MOS
1.1V
1.2V
12VM
2.6VDDR
2.6VDDR-500mA
LD1117
3.3V-500mA DELAY
HDMI1 1.2V-200mA
edid LD1117 LD1117
ESD
RC4558 1.1V-500mA
PQ1CX41
HDMI2
edid
RC4558
inductance LCD PANEL
edid EDID
HDMI3
VGA
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 41
F F
E E
D D
C C
B B
A A
8 7 6 5 4 3 2 1
18520_541_090313.eps
090313
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 42
18520_550_090313.eps
090313
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 43
18520_551_090313.eps
090313
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 44
D811 D812
RL255 RL255
Z125 3A/600V 3A/600V Z41
I I
F
Z128
I ! F
VBUS
P801
L809
! ! ! C808 C809 L801
3
!
+
C845 0.47U 0.47U
3 N L808
!
4
D818
4
470P
V
6 BYV29-600 R860
LIF-JLB1359 Z26
5R VBUS
!
I
2
~
1 L ! R830
560V !
C828
C823
0.47U ! R836 Z27
I
D804
5
N1
7
~
0.22U L804 US10KB80R T
NC
!
8
4 N2
1
AGND 9
2
PGND PGND
2
1
! C843 3
1
C830 C840 C840A
F801
!
-
10 120U 120U
! 470P 0.047U
Z2 5.0A Z44
450V 450V
I I 2
11
I
Z32
PGND I I I I I
2
2
1
PGND
2
PGND
1
2
1
PGND
K801 K801A
Z43 Z7 Z8 Z9 Z10
I I I I I
3
3V
4
3
4
R814 R815
4
4
3
510K 510K
R841
39K R804
C811 C812
Z36
10R
Z38
I
C825 R817 I
Q802
L807 D822 1U 4R7 1U SK3568
R812 0.1U
4700UH 4148WS 1M 12A/500V
400V
PGND 510K R807
Z37
R813 I 47R
C
PGND PGND Z40
I
Z42
I
B
D808 R811 R861 R806
E
1N4007
! 1M 470K Z29
I
Q805 E
2222AL
47R Z39
I
E
U806 R805
1U L6562A Z35
10R
R847 I
Q809 Q801 C833
D815
1N4007 ! R822
4R7
R810
1M 12K7
C816 C814
0.1U
1
2
INV
COMP
VCC
GD
8
7
Z34
I
2907AL E
SK3568
12A/500V
220P
B
R848 3 6 R872
12K C R839
MULT GND
100R 27K
4 5 D802
PGND Z30
I CS ZCD 18V R837
0.15R
Z28 PGND
I
PGND PGND
PGND
Z31 Z33
I I PGND
C817
R840
22K 0.01U C815 R886
50V 680P 1K
Z127
I HOT
C822
VC 0.1U
COLD
C
Q811
!
B
2907AL PGND Q808
D D816
R885 BC847A R820 D
1N4007 4K7 Z123 Z45 75R
I
Z124
I
4 1 I
C
R868
R881
B
10K 2
3 Z46
470R Z18
P_ON
I
I
R887 BL_ON
0.01U
27K Z16
I I
39K
47P
AGND R875
R827 R835
D829 AGND 4K7 R874
PGND PGND
4K7
FR104 10M
! 47K
DIM Z17
I
P802
11 12
R826
4K7
C847 C826 R858
C844
1000P
! Z48
D806
YG902C
AGND
9 10
NC 0.022U 47K R873 PGND I 7 8
C802 AGND
C835 47R +3.3VSB/0.2A
10U 5 6
0.1U Z126
I
Z119
25V I T801 3 1
U805 2 3 4
6 7
FA5571N PGND
ND 1 2
1 8 5 8
ZCD VH PGND PGND D810 L803 AGND
RL255 C827 R808 L806
2 7 4 9 2.2UH
FB NC L802 NS 1000P 100R Z20
I
Z19
I +24V/2A
Z14
I
Z130
3 6 R871 I
VAL? 3 10
IS VCC
68R Z122
Q803
NP2
4 5 I
1 12 R876 470U
35V C
I
R870
R866
27K PGND ! R877
1K
D824
FR104 AGND
AGND
R802
220K Z50
E
PGND Z49
I
1K Z117
I
I
AGND
AGND
C832 R859 4 1 Z51
C836 D819 C821
R856 I
2 U808
TL431
R846A R846
4K7 4K7
AGND
Z4
I
! AGND AGND
R819 R825
C806 R862 C841
! 4U7
450V
22K
390K 1500P
Z110
2R7
R809
C842
I 10R
220P
R801 PGND
AGND
B R803 2R7
B
22K D809 L805
PGND Z67
T802 SR160 Z111 NC Z15
D813 I I I
HER108 5 GND 6
Z115
I
U801 Z109
I
ND
C839
4 16V 7
NC D807
1 8 4V7
GND1 VSS C838
2 7 VC
! 3 8
470U
VOL?
GND2 D 16V
PGND 3 6 2 DRAIN 9
D814 R865 NS
VFB FR104 AGND
Z106 Z105 Z108 4R7 NP AGND
4 5 I I I
1 VC+ 10
SYNC VCC R850
FSQ510 200R
C818 R867
D801 AGND
5V6 1K C803 PGND
D803 C819
0.022U
20V 0.1U 22U
50V
R855
! AGND
27K
R853 R853A
PGND PGND
PGND PGND PGND 5K1 240K
R880
Z25 6K8 Z107
U804
I I
1
Z112
R838
4 I
1K2
R854 C820
R864 D820 10K
6K8 0.15U
4148WS Z114
3 2 I
PS2561
3
Z113
U807
!
I
PGND PGND
1
Z1
I
PGND TL431_1V25
2
R852
3K
A
AGND A
AGND
8 7 6 5 4 3 2 1
18520_542_090313.eps
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2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 45
R941
0R
F VBUS F
D904
R912 Z92
4148WS R948
100R I
Z94
I 10R
Z93
I
R902
+24V/2A
4R7 Z54
I B
E
Q916 Q901
! T904
BT3906 SK3561
C R949 C P901
R926
Q908 1K
2K2
B R911
BT3904 10K 2
C908 R925
1U 100R Z55 E Z61
I
Z91
I
2 3 Z24
I 6
GND1
5 I
1
ND
E 7 4
Q920 Q911 VCC
2N7002 B
BT3906 8 3
AGND DRAIN
C Q902
HDR2 9
GND
2 D903 SK3561
NP
R923 Z95 4148WS R947
Z96 Z97
NS
100R I I 10R I
AGND 10
VC+
1
C901
E 33P
T901
B Q919
1 4 Z84
I Z87
I
E C
Q907
C911
1U ! R946
1K
C
BT3906
E
R908
0.022U
2K2
B R910
C930
BT3904 10K C906
R909 E 0.022U
100R Z56
I
Z62
I Z86
I
E
Q915 Q910 C913
0.022U
PGND
C931
2N7002 B
BT3906 470P R942
2 3 Z85 C905
C
I
100R 0.022U
Z88
I
LDR2
AGND D907
R913 Z98
4148WS R951 AGND
100R I
Z100
I 10R
Z101
I
C902
33P
C
Q905 Q904
R904
E
2K2
B Q917 SK3561
BT3904 P902
R905 B
BT3906
E
100R Z57 Z60
1 4 Z23
2
I I R950 C I
R914 1K
E 10K 1
Q913 Q909
B
BT3906 R975 R973
2N7002 Z99
D916
C
6
GND1
5
I
200R 200R BAV70L
ND
HDR1 0.47U
D 7 4
R938 D
! R935
VCC
C912 2 1
AGND
8
DRAIN
3 T903 200R 200R 3
Q903
D908 SK3561 R939
9
GND
2 R937
NP
R922 4148WS Z103
R952 200R 200R
Z104
NS
100R Z102
I I 10R I
10
VC+
1 R944 R945
R940 10K 10K
C R936
E 200R
Q906
R907
200R
2K2
B C910 Q918
BT3904 T902 BT3906 Y3
R906 1U B
R916
100R Z58
E Z59
I
! R953 C
1
200R
R920
200R Z89
I
I
HOT
2N7002 B
BT3906
R921 R919
C
220R 220R
C903 LDR1 R954
0.47U PGND 100R
AGND R971 R970
200R 200R
1 24 R960 R963
C LX2 LX1 200R 200R R964 C
2K2
C907
1U
HDR2 AGND 2 23 AGND
Z72
I R959 R961
I
Z64
HDR2 HDR1 HDR1 200R 200R
R901 D901
3 22 56R 4148WS AGND
BST2 BST1
Z74
VREF I
AGND +24V/2A
C914
AGND
LDR1 Z65
I 4 21 1U
C909
LDR1 VREF 0.47U
LDR2 Z66
I 5 20 AGND D913
BAV70L
2
LDR2 VIN
AGND 1 2 C921
R977 RW977
3 6 19 3
1000P
75K 2K
1
GNDA ENA BL_ON
AGND 7 18 Z75
I C923
R957 RPT ADIM R969
0.1U
AGND
75K R956 R932
(56K For AUO)
47K 8 17 47K
(39K For AUO)
56K Z82
I
B
I
Z68
CT UVLS AGND
B
C922
C917A
C917 9 16 0.01U
220P 47P
R934
SYNC OVPT AGND
D905
R927 4148WS
33K
10 Z76
I
Z77
I
4K7
Z78
I
0.01U NC
R928
10K
VSEN_POL ISEN 13 AGND AGND I
R903
Q924
BT3906 B
I Z81
I
Z83
I B 10K C
4K7
2
B R976
E Q923
AGND AGND AGND 4K7
R958 RW978 BT3904 R918 E
R915 C918 R931 1K8 470R 4K7
C916
Z70 2K2 Z71
10K D902
I I 4700P 0.047U (2k4 For AUO)
AGND 4148WS
AGND
R978 AGND
A R924
A
C920 1K8 AGND
100K 0.022U AGND AGND AGND
AGND AGND
8 7 6 5 4 3 2 1
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090313
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 46
15820_552_090313.eps
090313
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 47
15820_553_090313.eps
090313
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 48
F F
E E
D D
C C
B B
A A
8 7 6 5 4 3 2 1
18520_544_090313.eps
090313
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 49
F F
E E
D D
C C
B B
A A
8 7 6 5 4 3 2 1
18520_545_090313.eps
090313
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 50
15820_554_090313.eps
090313
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 51
15820_555_090313.eps
090313
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 52
SSB: DC/DC
8 7 6 5 4 3 2 1
B01 DC - DC
12_M
GND
+24/12V GND NC 5V_M +3V3 R104
T
C137 5VSB 4 3 U13 about 1mm 16V C101
C132 22K
1000P GND R103 RT8110 1000U
GND
GND
1000P 0R
T
Z243 Q1
VBR_EXT
R453 6 5 VBR_OUT 1 8
1K 3.3/5VSB 3.3/5VSB BOOT PHASE D13N03LT
R106 R11 5V_M
R451 100R 8 7 R8 2 7 G2 D2B
Z4 GND PW-ON R110 DRIVE UGATE 0R
GND
4K7 NC SW GND 4 5 Z15
R452 R115 L59 T L60 1K 10K C L15 GND C100 NC
4K7 100R 10 9 GND 3 6 S2 D2A 1000U L23 T
120R BL-ON/OFF PB-ON/OFF PB-ADJ BL-ADJUST 120R NC B FB GND 3 6 15UH
16V 200R
R128 12 11 D8 R111 4 5 G1 D1B
C L58 E VCC LGATE 2 7 C7
UP34 1K Q9 120R Z5 T LL4148 0R 4U7 L22
B C144 C139 S1 D1A C166 200R
BT3904 T Q3 1 8
0.1U C135 0.1U R109 R249 BT3904 0.01U
E C543 R114 C
1000P Z7 22K 100R PWM0 C165
C268 1000P C555 4K7 B
1000P 0.1U
47U C163 GND
GND GND GND 6V3 Q8
GND GND BT3904 E 1U
C269 R124
C4 33P
GND C143 GND R126 1K2
E GND 1U GND 470P E
10R
R129
GND 220R
U20 C5
12_M 1000P
PQ1CX41H2ZPQ
12_M GND
L21 1 8 C161 Z244
VOUT VB DV10 C87 T
220R 0.01U L1 470U GND
2 7 Z13 D4
VIN GND2 12/24V_AUDIO SR34 15UH 16V
T
3 6 L16 C145 C146
C105 OADJ GND1 33UH 220P 0.1U L137 U14
C152 C151 DV10 R122
100U 4 5 GND 200R MP1593DN C156
100P 0.1U 5K6 C524
C150 16V CONTROL COMP 1 8 0.1U
L138 C158 BS SS 10U
0.1U 13-PQ1CX4-1HB R117 0.1U NC
200R 2 7
10K IN EN R121
C148 C104 110K
GND GND GND GND 0.01U 470U 3 6 C159 C157
10V C472 SW COMP GND GND 1U 0.1U
470U 4 5
GND GND 35V GND FB
GND
C147 R118
10K R116 GND C160 C162 12_M
D 100P D
D5 12K GND 8200P 100P C168
SR23 R123 0.1U
12K4
GND C149
GND
3900P
GND GND
GND R134 R136
R752 GND R102 100K 3K9 5V_M
0R 5VSB 47K
D7
5V_M 5V_M1 GND
LL4148 Q7 D12
Q57 5VSB BT3904 LL4148
U4 R130
A03401A C R101
LD1117S33 2K2
5V_M B
10K
R96
D
S
R120 10K
4
E R105
22K C541 R143 12_M 4K7
GND/ADJ
Q6 GND
G
10K BT3904
VIN
R731 T R144
10K R98 R100
47K R697 NC C 8K2 D13
1
470K SW 10K
B R99 LL4148
C 680R R131
Q4 R119 Q10 B POWERON/OFF E 1K
BT3904 4K7 BT3904
C E R97
C D33 C155 C154 10K D10 D11 C
B LL4148 0.1U GND LL4148
0.1U LL4148 GND +3V3
R710 5V_DDR
E GND 10K
C556
4U7 C106 C102 R137 R135
GND GND 100U 100U 3K9 R132 2K7
16V 16V GND GND 1K8 R133
4K7
GND
GND GND
R3
5V_M
U3 0R NC
R5 R4 LD1117S
2R7 2R7 C129 R9 GND C3
S-NC S-NC R698 NC
NC 0.1U 120R 10U
470K
4
C142
4
1 8
B 220R S2 D2A
NC B
5V_DDR R139 2 7
C126
3 VIN
2 OUT
1GND/ADJ
G2 D2B T
22K 0.1U
NC 3 6 NC C140
S1 D1A Z12 AV12
SW 0.1U
C94 C345 4 5
C133 C93 G1 D1B
0.1U
4 4
47U R138
0.22U 47U C170
R107 6V3 4K7 1U
6V3 C134 Q2
910R 0.1U NC A04803 NC
S-200 GND U5
NC GND LD1117S12
C103 C141 C128
GND 0.1U
GND 100U 0.1U GND
16V NC
GND
A A
8 7 6 5 4 3 2 1
18520_500_090312.eps
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2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 53
DDRV
R482
B02 MT822x Processor R462 R464
10K
10K NC
100R R481
GND NC C40 C384 C385 C386 C387 C388 C389 C390 C391 C392 C393 C394 C395
10K NC
AV12_LVDSPLL
P10 C88 4U7 0.1U 0.1U 3300P 0.1U 0.1U 4700P 0.1U 0.1U 4700P 0.1U 0.1U 0.1U
GND 470U
LVDS_TPPIN
AV12_LVDS
AV33_LVDS
AV33_LVDS
SPI_CS1#
ORESET#
4 VSCL_T 10V
SPI_SCK
SPI_CS#
GPIO_9
GPIO_8
GPIO_7
GPIO_6
GPIO_5
GPIO_4
GPIO_3
GPIO_2
GPIO_1
GPIO_0
SPI_SO
GPIO_11
GPIO_10
SPI_SI
PWM3
PWM2
OCKN
DV10
OCKP
ECKN
ECKP
U0RX
DV33
U0TX
T
DV10
DV33
UP35
UP34
UP33
UP31
UP30
Z101 VSDA_R
O0N
O1N
O2N
O3N
O4N
OIRI
3
O0P
O1P
O2P
O3P
O4P
E0N
E1N
E2N
E3N
E4N
E0P
E1P
E2P
E3P
E4P
ICE
INT
F +3V3
F
T
2 Z102
GND
AV12 AV12_PLLSYS AV12 AV12_PLLADC
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
1 R311 +3V3 DV33
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
C565 100R L43
C566 L44 L42
GPIO11
GPIO10
GPIO9
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VDD33_2_1
DVDD10_3_2
DVDD10_3_1
O0N
O0P
O1N
O1P
O2N
O2P
AVDD33_LVDSA
OCKN
OCKP
O3N
O3P
O4N
O4P
AVDD12_LVDS
E0N
E0P
E1N
E1P
E2N
E2P
AVDD33_LVDSB
ECKN
ECKP
E3N
E3P
E4N
E4P
TP
AVDD12_VPLL
DVDD10_4
VDD33_1_1
UP35
UP34
UP33
UP31
UP30
TXD0
RXD0
IR_
INT0_
SPI_CS1
SPI_SCK
SPI_SI
SPI_SO
SPI_CS0
PRST#
ICE
PWM3
PWM2
T
10P 220R
U0RX
10P 220R
U0TX
EPAD_GND Z100 220R
257
GND C372
GND GND C109 C376 C402 C371 C32
GND C379 C378 C33 3300P
R286 C34 100U 3300P 0.1U 0.1U 3300P 10U
3300P 4U7
PWM1
PWM1 100R 4U7 16V
DV10 64 PWM0
DVDD10_2_3 PWM0 +3V3
129 63 SPDIFOUT
DDRV 130 DVDD10_2_2 SPDIF_OUT 62
RDQ0 U1TX
T T
131 RDQ0 TXD1 61 Z16
RDQ1 U1RX
132 RDQ1 RXD1 60 Z17 GND
OSCL0 GND GND
RDQ2 133 VCC2IO_2_8 HW_SCL 59 OSDA0
134 RDQ2 HW_SDA 58 R465 DV10
RDQ3 GPIO_25
135 RDQ3 GPIO25 57 1K
RDQ4 GPIO_24
136 RDQ4 GPIO24 56 NC
GPIO_23
137 VCC2IO_2_7 GPIO23 55
RDQ5 GPIO_22
138 RDQ5 GPIO22 54
RDQ6 GPIO_21
139 RDQ6 GPIO21 53 R466 C373 C375 C377 C380 C381 C374 C382
RDQ7 GPIO_20 C396 C35 C383
140 RDQ7 GPIO20 52 1K C125 4U7 3300P 0.1U 4700P 0.1U 3300P 0.1U 0.1U
VCC2IO_3 I2S_ADIN
0.1U 0.1U
RDQS0 141 51 AOSDATA0 AV33_DAC 220U C124
142 RDQS0 I2S_AOSDATA0 50 AOBCK 6V3 470U
143 VCC2IO_2_6 I2S_AOBCLK 49
E RDQM0 AOLRCK 10V E
144 RDQM0 I2S_AOLRCK 48
DV10 AOMCLK
145 DVDD10_2_1 I2S_AOMCLK 47
RDQM1 DV33 C348 GND
146 RDQM1 VDD33_1 46 C42 GND
VCC2IO_2_5 DVDD10_3
DV10 1U NC 4U7
GND
RDQS1 147 45 AR0
RDQS1 AR1 AV12 AV12_PLL +3V3
GND
148 44 AL0 C403 AV12 AV12 AV12D_RGB
149 VCC2IO_2_4 AL1 43
RDQ8
RDQ8 AVICM2
1U NC
RDQ9 150 42 AR2 L41 L40
151 RDQ9 AR2 41 AL2 C399 220R 220R
152 VCC2IO_2_3 AL2 40
RDQ10 AR3 C38 0.1U
153 RDQ10 AR3 39
RDQ11 AL3 4U7 C369 C370 C368
154 RDQ11 AL3 38 AV33_DAC 0.1U C367
RDQ12
RDQ12 AVDD33_ADAC C30 0.1U 3300P C27 0.1U
155 37 AV33_ADCREF 4U7 4U7
156 VCC2IO_2_2 AVDD33_REFP_AADC 36 C110 C31 C107
RDQ13 AUD_R
157 RDQ13 AIN_R 35 100U 4U7 100U
RDQ14 AUD_L GND GND
158 RDQ14 U11 AIN_L 34 16V 16V
RDQ15 AUD_VMID
159 RDQ15 MT8222 VMID 33
AV12_MEMPLL AV33_ADC
160 AVDD12_MEMPLL_1 AVDD33_AADC 32
13-MT8222-ARB;13-MT8221-AMB GND GND
RCLK0# 161 VCC2IO_1_1 AVDD12_APLL 31 AV12_PLLSYS GND GND
162 RCLK0# AVDD12_SYSPLL 30
RCLK0 AV12_PLLADC
163 RCLK0 AVDD12_ADCPLL 29 AV12 AV12_LVDS AV12 AV12_USB
VCC2IO_2_1 AVDD12_PSPLL AV12 AV12_MEMPLL +3V3
RCKE 164 28 AV12_PLL
165 RCKE AVDD12_DMPLL 27 L45
RA12 XTALI L37
166 RA12 XTALI 26 220R L36
RA11 XTALO 220R
167 RA11 XTALO 25 AV33_XTL 220R
168 VCC2IO_2 AVDD33_XTAL 24
RA9 ADIN5 C37 C359 C364 C24
RA8 169 RA9 ADIN5 23 C528 C525 C363 C526 C25 C362
D RA8 ADIN4
ADIN4_1 10U 0.1U 0.1U 10U 10U D
RA7 170 22 ADIN3_1 10U 10U 0.1U 10U 0.1U
171 RA7 ADIN3 21 16V 16V 16V
RA6 ADIN2
172 RA6 ADIN2 20 C108
RA5 ADIN1
173 RA5 ADIN1 19 ADIN0 100U
RA4
174 RA4 ADIN0 18 16V
RWE# AV33_SIFDIG
175 RWE# AVDD33_DIG 17
RCAS# MPX1
176 RCAS# MPX1 16 GND
RRAS# MPX2_N GND GND GND
177 RRAS# MPX2_N 15
DDRV RCS# MPX2_P
178 RCS# MPX2_P 14
RBA0 AV33_SIF AV12 AV12_LVDSPLL AV12 AV12_HDMI AV12 AV12A_RGBB
179 RBA0 AVDD33_SIF 13
RBA1 AV33_CVBS
RA10 180 RBA1 AVDD33_CVBS 12 CVBS_BYPASS R459
RA10 CVBS_BYPASS1 0R L47 L38 L39
GND
R458 RA0 181 11 CVBS_TP
RA0 CVBS_BYPASS0 220R 220R 220R
RA1 182 10 CVBS0P_1
1K RA1 CVBS0N
DV10 183 9 CVBS0N_1 C26 C361 C29 C360 C366
184 DVDD10 CVBS0P 8
C28
RA2 CVBS1 C23 C365 C529 4U7 0.1U 4U7 0.1U 3300P
185 RA2 CVBS1P 7 10U 10U
RA3
RA3 CVBS2P
CVBS2 0.1U 10U
DDRV 186 6 CVBS3 16V
MEM_VREF_1 187 VCC2IO_1 CVBS3P 5 CVBS4
188 RVREF0 CVBS_SY0 4
DV10 CVBS5
189 DVDD10_2 CVBS_SC0 3
DV33 CVBS6
190 VDD33_2 CVBS_SY1 2
VGASDA CVBS7
191 VGA_SDA CVBS_SC1 1 GND GND
VGASCL
192 VGA_SCL GND
AVDD12_DIG_RGB
AVDD12_HDMI_3
R457
C397
AVDD33_HDMI
AVDD12_RGB
AVDD33_VGA
AVDD33_USB
AVDD12_USB
HDMI_SDA1
HDMI_SDA0
HDMI_SCL2
HDMI_SCL1
HDMI_SCL0
R145
HDMI_CEC
DVDD10_1
C
USB_DM0
USB_DM1
PWR5V_2
PWR5V_1
PWR5V_0
USB_VRT
USB_DP0
USB_DP1
820K L28 C
RX2_CB
RX1_CB
RX0_CB
RX2_0B
RX2_1B
RX2_2B
RX1_0B
RX1_1B
RX1_2B
RX0_0B
RX0_1B
RX0_2B
GND
HSYNC
VSYNC
L31 L30
RX2_C
RX1_C
RX0_C
RX2_0
RX2_1
RX2_2
RX1_0
RX1_1
RX1_2
RX0_0
RX0_1
RX0_2
COM1
COM0
SOY1
SOY0
PR1P
PR0P
220R
PB1P
PB0P
COM
SOG
220R 220R
Y1P
Y0P
GP
XTALI XTALO
RP
BP
C398
1000P C527 C36 C353 C39 C15 C356
GND X4 C14
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
10U 4U7 C16 C354 10U 0.1U
C173 27M 10U 0.1U 4U7
C174 10U 0.1U
33P 33P 16V
MEM_VREF
R456
VGASOG
VGAGND
OPWR0_5V
OPWR2_5V
USBVRT
USB_DM0_1
USB_DM1_2
AV33_VGA
RX2_CB
RX1_CB
RX0_CB
OPWR1_5V
USB_DP0_1
USB_DP1_2
AV33_USB
RX2_0B
RX2_1B
RX2_2B
RX1_0B
RX1_1B
RX1_2B
RX0_0B
RX0_1B
RX0_2B
YPBPR0_GND
AV12_USB
YPBPR1_GND
0R NC
RX2_C
RX1_C
RX0_C
RX2_0
RX2_1
RX2_2
RX1_0
RX1_1
RX1_2
RX0_0
RX0_1
RX0_2
AV12_HDMI
AV12A_RGBB
GRNP
DV10
PR0P
PB0P
REDP
HDMIDDCSDA_1
SOY0
HDMIDDCSCL_1
BLUP
AV12D_RGB
HDMIDDCSDA_2
VGAHSYNC#_1
GND
PB1P
PR1P
CEC
VGAVSYNC#_1
HDMIDDCSCL_2
HDMIDDCSDA_0
Y0P
HDMIDDCSCL_0
GND
Y1P
AV33_HDMI
AV33_HDMI
+3V3 +3V3 AV33_VGA +3V3 AV33_SIF +3V3 AV33_ADC
+3V3 L26
L27 L32 L33
R463 220R
1% 220R 220R 220R
5K1
GND +3V3 C10 C349 C355 C20
C347 C8 C350 C19 C18 C17 C357
GND 4U7 0.1U C9 10U 0.1U 4U7
0.047U CVBS0P 4U7 0.1U 4U7 10U 0.1U
L141 R472 R474 Z25 CVBS0P_1 4U7
+3V3
10K 10K T
120R
U10 C405 U21
Z23 C346
B MX25L3205 33P Z22 M24C32MN
NC R473 Z24 0.047U GND B
3V3_F
CVBS0N_1 CVBS0N
10K R467 T T T 8 1 GND GND GND
VCC E0/NC C404
1 16 SPI_SCK_1 100R 0.1U NC
HOLD# SCLK 7 2
WC E1/NC T
C406 2 15 SPI_SO OSCL0 R468 100R
VCC SI 6 3 C171 Z27 +3V3 AV33_DAC +3V3 AV33_LVDS +3V3 AV33_SIFDIG +3V3 AV33_ADCREF
0.1U OSDA0 R469 100R SCL E2/NC
3 14 Z18 1U
NC PO6 5 4 L29 L46 L34 L35
3V3_F
SPI_CS# 7 10 1K
CS# GND
SPI_SI 8 9 FRESET#
SO WP#/ACC GND
GND GND GND
GND
RESET R397
R744
ORESET# 10K
USB_DM0_1 22R USB_DM0 R733
1K
VGAVSYNC#_1 VGAVSYNC#
R745 T
USB_DP0_1 22R USB_DP0 GND
R734 Z136 A
A 1K C507
R746 VGAHSYNC#_1 VGAHSYNC# 0.1U
USB_DM1_2 22R NC USB_DM1_1
R739
R747 47R
22R NC SPI_SCK_1 SPI_SCK
USB_DP1_2 USB_DP1_1 GND
8 7 6 5 4 3 2 1
18520_501_090312.eps
090312
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 54
F F
(DDR SD-RAM with termination) VTT
R671 R668
150R 22R
MEM_VREF MEM_DQ0 RDQ0
U33 5 4 5 4
C46 C420 MEM_DQ1 RDQ1
U18 MEM_VREF 49 2 MEM_DQ0 4U7 6 3 6 3
VREF DQ0 0.1U
M12L64164A 4 MEM_DQ1 MEM_DQ2 RDQ2
DQ1 7 2 7 2
5 MEM_DQ2
DQ2 MEM_DQ3 RDQ3
MEM_ADDR0 29 7 MEM_DQ3
MEM_ADDR0 23 2 MEM_DQ0 A0 DQ3 8 1 8 1
A0 DQ0 MEM_ADDR1 30 8 MEM_DQ4
MEM_ADDR1 24 4 MEM_DQ1 A1 DQ4
A1 DQ1 MEM_ADDR2 31 10 MEM_DQ5 GND R669 R654
MEM_ADDR2 25 5 MEM_DQ2 A2 DQ5
A2 DQ2 MEM_ADDR3 32 11 MEM_DQ6 150R 22R
MEM_ADDR3 26 7 MEM_DQ3 A3 DQ6
29 A3 DQ3 MEM_ADDR4 35 13 MEM_DQ7 MEM_DQ4 RDQ4
MEM_ADDR4 8 MEM_DQ4 A4 DQ7
30 A4 DQ4 MEM_ADDR5 36 54 MEM_DQ8 5 4 5 4
MEM_ADDR5 10 MEM_DQ5 A5 DQ8 C421
31 A5 DQ5 MEM_ADDR6 37 56 MEM_DQ9 MEM_DQ5 RDQ5
MEM_ADDR6 11 MEM_DQ6 A6 DQ9 3300P
32 A6 DQ6 MEM_ADDR7 38 57 MEM_DQ10 6 3 6 3
MEM_ADDR7 13 MEM_DQ7 A7 DQ10
A7 DQ7 MEM_ADDR8 39 59 MEM_DQ11 MEM_DQ6 RDQ6
MEM_ADDR8 33 42 MEM_DQ8 A8 DQ11
A8 DQ8 MEM_ADDR9 40 60 MEM_DQ12 7 2 7 2
MEM_ADDR9 34 44 MEM_DQ9 A9 DQ12
A9 DQ9 MEM_ADDR10 28 62 MEM_DQ13 MEM_DQ7 RDQ7
MEM_ADDR10 22 45 MEM_DQ10 A10/AP DQ13
A10/AP DQ10 MEM_ADDR11 41 63 MEM_DQ14 1 1
E MEM_ADDR11 35 47 MEM_DQ11 A11 DQ14 8 8 E
A11 DQ11 65 MEM_DQ15 GND
48 MEM_DQ12 DQ15 R497 150R MEM_DQS0 RDQS0
DQ12 R493
DQ13
50 MEM_DQ13
14 R496 150R MEM_DQM0 RDQM0 22R
51 MEM_DQ14 NC R490 22R
DQ14 17 C429 R491 150R MEM_DQM1 RDQM1
R489 22R
MEM_CLK0 38 53 MEM_DQ15 NC1 R495 150R RDQS1
CLK DQ15 MEM_CLK0 45 19 MEM_DQS1 R488 22R
CK NC2 0.1U MEM_DQ0
MEM_CLK0# 46 25 R498 150R
CK NC3 MEM_ADDR12 R492 150R MEM_DQ8
37 36 MEM_CLKEN 44 42
MEM_CLKEN DDRV CKE NC7
CKE NC1 43 DDRV
40 NC4
NC2 50 R662 R667
NC5
MEM_CS# 24 53 GND 150R 22R
CS NC6
MEM_RAS# 23 MEM_DQ9 RDQ8
MEM_CS# 19 1 RAS
CS VDD MEM_CAS# 22 1 5 4 5 4
MEM_RAS# 18 14 CAS VDD
RAS VDD1 MEM_WE# 21 18 MEM_DQ10 RDQ9
MEM_CAS# 17 27 WE VDD1
CAS VDD2 33 6 3 6 3
MEM_WE# 16 3 VDD2 C428
WE VDDQ 3 MEM_DQ11 RDQ10
9 VDDQ 3300P
VDDQ1 MEM_DQS0 16 9 7 2 7 2
43 LDQS VDDQ1
VDDQ2 MEM_DQS1 51 15 MEM_DQ12 RDQ11
49 UDQS VDDQ2
VDDQ3 55 1 1
MEM_DQM0 15 VDDQ3 8 8
LDQM 61
MEM_DQM1 39 VDDQ4 R665 R666
UDQM MEM_DQM0 20
54 LDM 150R 22R
VSS MEM_DQM1 47 34 GND
28 UDM VSS RDQ12
VSS1 48
41 VSS2 5 4 5 4
VSS2 66
MEM_BA0 20 52 VSS1 MEM_DQ13 RDQ13
A13 VSSQ MEM_BA0 26 6 C113 C422
MEM_BA1 21 6 BA0 VSSQ1 C44 6 3 6 3
A12 VSSQ1 MEM_BA1 27 12 100U
VSSQ2
12 BA1 VSSQ2
52 4U7 0.1U MEM_DQ14 RDQ14
D 46 VSSQ 16V 7 2 7 2 D
VSSQ3 58
VSSQ3 MEM_DQ15 RDQ15
64
VSSQ4 8 1 8 1
SDRAM ADD GND HY5DU281622FT R661 R655
GND 150R 22R
GND MEM_WE# RWE#
5 4 5 4
C423 MEM_CAS# RCAS#
3300P 6 3 6 3
MEM_RAS# RRAS#
7 2 7 2
8 1 8 1
R660 R656
GND
150R 22R
MEM_CS# RCS#
5 4 5 4
C425 MEM_BA0 RBA0
0.1U 6 3 6 3
MEM_BA1 RBA1
DDRV +3V3 7 2 7 2
MEM_ADDR10 RA10
DDRV 8 1 8 1
GND R664 R657
150R 22R
C C80 8 1 MEM_ADDR7 RA7
C114 U1
47U VTT R484 5 4 C
47U RT9199 R719
6V3 22R RCLK0 C424 7 2 MEM_ADDR6 RA6
6V3 0R NC VTT
MEM_CLK0
3300P
1 8 L80 R487 6 3
VIN NC3 C111 1K 6 3 MEM_ADDR5
220R RA5
MEM_VREF 2 7 R721 47U SDRAM ADD SDRAM 75R R483 7 2
GND NC2 6V3
GND MEM_VREF 100R 5 4 MEM_ADDR4 RA4
NC R485
3 6 0R SDEAM NC 8 1
GND REFEN VCNTL 22R
C413 SDRAM NC GND R663 R658
4 5 0.1U C575 R499 22R
VOUT NC1 MEM_CLK0# RCLK0# 150R
C412 10U 1K 8 1 MEM_ADDR12 RA12
R720 C415 1000P NC SDRAM 75R
SDRAM NC 5 4
0R NC C47 0.1U MEM_CLKEN 7 2 MEM_ADDR11
RCKE C426 RA11
4U7 6 3
C430 R486 0.1U 6 3 MEM_ADDR9 RA9
0.1U 22R 7 2
GND 5 4 MEM_ADDR8 RA8
GND 8 1
GND GND
R670 R659
GND 150R 22R
MEM_ADDR0 RA0
5 4 5 4
C45 C427 MEM_ADDR1 RA1
4U7 3300P 6 3 6 3
MEM_ADDR2 RA2
7 2 7 2
B MEM_ADDR3 RA3 B
8 1 8 1
DDRV
GND
C89 C112 C43 C414 C417 C416 C418 C419 C408 C409 C410 C411
470U 100U 4U7 0.1U 0.1U 0.1U 0.1U 3300P 3300P 3300P 3300P 0.1U
10V 16V
GND
A A
8 7 6 5 4 3 2 1
18520_502_090312.eps
090312
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 55
SSB: Tuner
8 7 6 5 4 3 2 1
B04 TUNER
F Z1 Z2 F
5VOUT
5VOUT
APLS EU TCL AP
R160
22K
R167 R166
4K7 4K7 R153 R161
4K7 12K C208
IF-OUT
AGC
AGC
0.01U
SDA
MB1
MB2
SDA
NC1
NC3
NC4
D16
SCL
SCL
C187
NC
X3 C186 R156
AS
AS
BP
BT
BT
IF
BA277 1500P TV-RF-AGC
4M 0.1U 100K
NC
10
11
11
Q12 R159
BT3904 22K GND
Z39 R158
T
R756 NC GND
R168 330R
T
GND Z38 0R C C182
NC 10K
Z35 B OP2 0.01U
GND T C188
NC
E 0.47U
R755
GND 0R C201 9885 NC
R169 0.01U C204 5VOUT
Z36 NC C177
Z33 T T Z37 10K NC 20P GND L50
T
NC 0.22U
T
E 5V-IF Z34 D6 1000UR E
BA277 R165 5V-IF
470R
L52 C49 C213 RF-AGC CVBS
1000UR 0.1U C205 BA277 GND C117
10U D15
0.01U 100U
C118 GND C189 16V
24
23
22
21
20
19
18
17
16
15
14
13
47U
6V3 C211 0.01U
0.1U R727
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
REF
TAGC
NC
C212 R174 0R 1 2 3 4 5 R162
L51 4K7 NC GND
1U R154 220R
IN/GND
1UH
OUT1
OUT2
100R
GND
C214 SDA_TV NC R170 R190
IN
3300P R189 5VOUT 0R 75R
GND NC TV-CVBS TV1-V
SIOMAD
GND R155 0R GND
FMPLL
NC
DGND
GND
DEEM
100R SCL_TV X7 SAW-D9453D LATAM NC AP-ADD
U2
VIF1
VIF2
AUD
TOP
SDA
OP1
AFD
SCL
C438 L-45-SAW937-0M0 E
0.01U GND
C179 R180 B
47P C180 X2
10
11
12
33R TDA9885T
12_M 47P R181 R186 SAW-3953D/K7270M C Q13
U6
4 4
2K2 2K2
BC857C
IN/GND
LD1117S50 R187
OUT1
OUT2
GND
IN
5V-IF 5K6
GND/ADJ1
L62 R172
OUT 2
Z160
VIN 3
0R 10K C199
R48 T GND C432
22R 1000P 1 2 3 4 5 0.01U
33V GND MPX2
2W 12_IF
D R184 2
D
22K TV_AUDIO
C116 D17 L-45-SAWM39-530
100U BA277 GND
16V L48 R182 R173
C206 C202 12K
1000UR D2 0R
33V 0.01U 0.1U R152 NC C185
C178 Z32 Z31
C176 2K2 0.47U
5V-IF C431 0.01U T T
0.1U
GND 1000P C191
R178 R151
C193 47K R179 GND L55 1000P
L54 L61 0R NC R191
0.1U 1000UH 100K 1000UH NC C209 100R
0.56UH 0.01U SCL_TV
D28 R188 C210 C190 R163
0BAV99 5K6 390P 1000P GND 2K2 R157
R150 NC 100R
12K GND Q14 SDA_TV
TV-RF-AGC BC846B
2
270P
6V3 1000P
GND 5VOUT
GND
C GND C
GND
GND
Far from signal R509 C62
C203
0.1U 22K 0.01U
5V-IF 5VOUT MPX2_P
5VOUT C
MPX2 B
GND
Q15
C61
+3V3 R383 E BC846B 0.01U
R177 R176 R171 MPX2_N
4K7 4K7 L49 82R R503 0R
2.2UH 10R C215 NC
TV1-V CVBS0P L63 R507
5
TV-CVBS X1
220P B GND
4
220P 4M5
3
1
L-ADD L-ADD
CVBS0N R501 E R514
SCL_TV 5VOUT R195 0R 100R TV1-V
R516 GND GND
1
1K
6
2
GND 10K L-ADD L-ADD(NC) L-ADD
L-ADD J1
C207 0R NC
B U30 0.1U R515
UM6K1N B
2
R500 C 220R
12-UM6K1N-0BX 4K7 R196 L-ADD J2
OP2 B 0R NC
C119 C120 Q18 0R
47U R512 R513 47U L-ADD BC846B L-ADD
C434 C433 GND 6V3 6V3
E
L-NC J3
39K 39K
33P 33P TV_AUDIO MPX1 GND 0R NC
GND GND
R511 J4
100R C435
C439 0R NC
22P 22P GND
R510 GND
OSCL0 GND GND 100R
OSDA0
GND
A A
8 7 6 5 4 3 2 1
18520_503_090312.eps
090312
2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 56
SSB: HDMI
8 7 6 5 4 3 2 1
B05 HDMI
P5
MNT-HOLE2
6
MNT-HOLE1
F 5 F
P16
GND GND
1 RX0_2
RX2+ R45 R31
RX0_2 1 2 RX0_0 GND-1
GND1 2 1 2 4
USB_DP0
3 RX0_2B R35 R33 DPOS-1
3 5V_M
RX2- RX0_2B 1 2 RX0_0B 1 2 USB_DM0 C219
4 RX0_1 DNEG-1 L65 L64
RX1+ 2 0.1U
R36 R30 C91 120R 120R
RX0_1 1 2 RX0_C
5 1 2 VCC-1
1
GND2 100U NC +3V3
6 RX0_1B 16V U12
RX1- R200
2
R34 R32 TPS2550
RX0_1B RX0_CB F1 F2
RX0_0 1 2 1 2 100K 6 1
7 C90 OUT IN
RX0+
1
47U
GND3 8 R47 R22 R201
GND GND GND 6V3 5 2
ILIM GND 10K
9 RX0_0B
RX0- R199
1
R52 R541
RX0_C 10K C217 4 3 100R PWM1
10
GND
RXC+ +3V3 GND FAULT EN
0.1U
2
11 R197
GND4 OPWR0_5V GND 13-TPS255-0DB 0R
NC C218
RXC- 12 RX0_CB R540 R713 0.1U
R537 100R GND R198 R202
100R HDMISCL_0 HDMIDDCSCL_0 10K 100R 24K
E 13 HDMI_CEC_3V3
HDMISDA_0 HDMIDDCSDA_0
PWM3 E
NC1 GND
NC2 14 R536 100R UP33
T
Z103
GND
GND
15 HDMISCL_0 C444 P13
DDCCLK GND
HDMISDA_0 10P C469
DDCDA 16 C445 1 RX2_2 1000P
RX2+
10P
17 R561 GND1 2 R46 R38
GND5 Q20 RX2_2 1 2 RX2_0
1K GND 1 2
VCC 18 BT3904 3 RX2_2B
R148 RX2-
C
1K GND R42 R40
19 HDMICAB0 RX1+ 4 RX2_1 RX2_2B 1 2 RX2_0B 1 2
HPD B
Z104 1000P
RX2_1 1 2 RX2_C 1 2
R542 6 RX2_1B
R539 RX1-
100K GND
1
47K 7 RX2_0 R41 R39
RX0+ GND RX2_1B RX2_CB
R564 1 2 1 2
100R U22 GND3 8
R563 AT24C02 R51
GND R538
1
T
VCC A0 RX0-
C443 R557
7 2 10K
2
0.1U 10 RX2_C
GND
R57 WP A1 RXC+
D R562 6 3 11 D
1
T
R53 100R
R54 R549 100R
GND Z42 T 13 HDMI_CEC_3V3 HDMISCL_2 HDMIDDCSCL_2
GND NC1
Z46 T 14
HDMISDA_2 HDMIDDCSDA_2
T NC2
2
Z44
T
Z107 R548 100R UP35
15 HDMISCL_2
DDCCLK C447
GND GND
DDCDA 16 HDMISDA_2 10P
C448
17 R559 10P
GND5 GND
1K Q21
P14 VCC 18 BT3904 R254
GND C
19 1K
1 RX1_2 GND
RX2+ R25 HPD B
R24
RX1_2 1 2 RX1_0 20 C452
2 1 2
T
GND1 NC20 Z108 E 1000P
3 RX1_2B R28 R27 21 R558 R552
RX2- NC21 100K GND 47K
RX1_2B 1 2 RX1_0B 1 2
RX1+ 4 RX1_1
R29 R23 GND
RX1_1 U23
1
5 1 2 RX1_C 1 2
GND2 GND R545 R551 AT24C02
100R Z48
C 6 RX1_1B 47K 8 1
C
T
RX1- R44 R26 R94 VCC A0
C446
RX1_1B 1 2 RX1_CB 1 2
1
RX1_0 7 2 0.1U
7 GND WP A1
RX0+ R544 R550
10K 100R 6 3
2
GND3 8 SCL A2
1
R56 Z50
RX1_0B 5 4
9 SDA GND
T
RX0- R530 GND
R55 R50
10K Z47 T
2
10 RX1_C
GND
RXC+ GND
Z51 T
11 T
GND4 OPWR1_5V Z49
2
RXC- 12 RX1_CB R529
100R HDMISCL_1 R525 100R HDMIDDCSCL_1 GND GND
13 HDMI_CEC_3V3 HDMISDA_1 HDMIDDCSDA_1
NC1
P11
NC2 14 R524 100R UP30
T
Z105
+3V3
RX0_2 19 20
15 HDMISCL_1 C449
DDCCLK
10P RX0_2B 17 18 OSCL0
DDCDA 16 HDMISDA_1 C442 +3V3SB
5V_M
10P RX0_1 15 16 OSDA0
17 R532 +3V3
GND5 Q19
1K GND RX0_1B 13 14 GND
VCC 18 BT3904
R149
B C
1K GND GND 11 12 HDMI_CEC_3V3
19 R113 B
HPD B
33K
C337 RX0_0 9 10 HDMISCL_0
20 R112 R565
NC20 E 1000P
T
R521 AT24C02
GND 100R R527 Z40 RX0_CB 1 2 OPWR0_5V
47K 8 1
T
VCC A0
GND R87 C441
7 2 0.1U
WP A1 NC
R520 R526
100R 6 3
1
10K SCL A2
2
Z41
5 4
SDA GND
T
Z53
GND GND
A A
8 7 6 5 4 3 2 1
18520_504_090312.eps
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 57
1
NC
VGASCL0_IN 10
5 1 R307
VOUT2 VOUT1 C329
RXD0_EXT 4 R321 0R NC 220U
10K GND
16V
VSYNC0 14 NC 2 NC
GND
2
VGA5V_EXT0 9 GND P12
L71 4 3 C50 10 NC
CE VIN C279 GND 47U
BLUE 120R BLUE0 3 12
0.1U 16V
0 NC NC
HSYNC0 13 8
C291
C2 4
8 0.1U USB_DP0
L69 47U NC 7
5 1 16V USB_DP1 3
GREEN 120R GREEN0 2 VOUT2 VOUT1 NC USB_DM0 6
0 USB_DM1 2
VGASDA0_IN 12 2 R305
GND VCC_0 5
0R NC 1
VCC_1
7 GND
L70 4 3 F13
2
CE VIN
2
RED 120R RED0 1 F14 9
E 0 GND 11 E
U35
TXD0_EXT 11 R49
Z75 T RT9701
1
R231 R229 T NC-13-RT9701-PBB NC
75R NC Z74 6
75R R66 T
1 2 Z73 GND
R67 T
17
1
Z72
1
NC T
F9 Z71 R304
R230 Z70 T NC
GND 75R Z69 T GND 47-VGA019-XX0
2
F10
R577 L72 T R326
Z68 GND
VGAHSYNC# 560R 120R T 100R
NC Z67
GND R65 Z66 T USB_DP1_1 NC USB_DP1 P36
R578 L66 1 2
Z19
560R VCC_0 VCC_1
Z3
VGAVSYNC# 120R
T
R725
T T T
1 2
GND R570 R569 HPOUTL1 100R USB_DM0 USB_DM1
Z6
Z20
T
D32 VGA_PLUGPWR0 10K 22K 3 4
1
1
USB_DP0
3
R567 R571 BAV70 NC USB_DP1
Z21
Z10
F8 F7
T T
2K2 2K2 Z65 U25 R576 R505 5 6
R568 10K GND
100R NC GND
Z11
T AT24C02
Z26
R61 R572 Z64
T
100R USB_DM1_1 USB_DM1
2
NC 1 8 7 8
T
100R A0 VCC
R68 2 7 R726 NC
GND NC VGAROMWP0
2 A1 WP
2
HPOUTR1 100R
C230 3 6
0.1U A2 SCL
D 4 5 NC D
GND GND SDA
5V_M
T Z61 Z57
GND T Z62
C56 T
T Z63 R206 L123
VGASDA0 8K2 2U2
VGA_L 120R Z56 P7
VGASCL0 2
R205 C58 L124 T
8K2 2U2
C225 R228 VGA_R 120R
REDP 0.01U 68R 3
RED
Z55 T
R203 1
R204 22K 47-MIC012-XX0
C227 22K C551 C544
C224 10P
L133 C55 R210 470P 470P
0.01U 2U2 GND
VGAGND YPBPR2_R 120R 8K2 Y2_R
VGAVSYNC# GND GND
GND GND GND
L131 C57 R209
YPBPR2_L 120R 2U2 8K2 Y2_L C222
10P
C229 R226
C 0.01U R319
68R BLUE R207 R208 C
BLUP C548 C550 VSCL_T 100R
22K 22K TXD0_EXT
470P 470P GND
2
100R
C234
10P F38 F39
C66 R214
GND YPBPR1_R 2U2 8K2 Y1_R
R147
GND
1
C223 R225 C63 R213
4700P 0R 2U2
VGASOG YPBPR1_L 8K2 Y1_L
GND
C226 R227
0.01U 68R
GRNP GREEN R212
22K
P39
C228 R211 GND R233 Z59
10P 22K 75R P9
C220 R216 C233
1 0.047U 100R 47P T 6
B GND GND USB_DP1 SY1_IN B
CVBS6 L68 120R
2 2
GND USB_DM1 CVBS7 L67 120R SC1_IN
1
C68 R224 3 5
C70 R222 VCC_1 F12
2U2 2U2 8K2 C231 R232 Z58
1
AV1R_IN 8K2 AV2R_IN AV2_R 4
AV1_R 0.047U 100R F11 R60 T
NC C232 R215 7
47P R69
R223 75R
C71 R221 C69 1
2
2U2 8K2 AV2L_IN 2U2 8K2 AV2_L
AV1L_IN AV1_L GND
GND 3
2
T 4
R217 R218
22K 22K R219 R220 Z60
GND
22K 22K
GND
A A
8 7 6 5 4 3 2 1
18520_505_090312.eps
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2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 58
1
13 2
VGND
WHITE
Z152
3 SCT1_FB_IN R259
R75
T T
BLNK 3 10K
R272 NC NC
14 PR1/R_IN L78 C259
Z153
R F22
68R 0.01U
6 PR1/R_IN 120R PR1P
2
4
DATAGND
RED
RGND 15 R270
8 C258 GND
75R
5 15P
DATA
9 PB1/B_IN
Z151
G 16 Y1/G_IN
T
R271
BLUE 75R
6 R714
CLKOUT SCT1_FS_IN 0R
17 1 R273 C260
GGND Y1/G_IN L77 0.01U
7 68R
GREEN 120R PB1P
Z144
E 7 SCT1_FS_IN Z76 E
T T T
SWITCH 5 R253
C257
T
Z146
0R NC
1
1
B 18 PB1/B_IN 15P
1
F15 R72 R74 C261
SCT1_FB_IN SOY1
R269
Z145
8 YPBPR2_L GND C264 0R 4700P
1
AIL 15P SOY1
R73 R70
BGND 19 NC NC
NC NC L83 R275 F23 R252
C263
9 F17 68R 0.01U 75R
2
F16
2
AGND 120R Y1P
2
NC
AOL 20 SCT1_AUL_OUT Z147
2
R277
T
10 YPBPR2_R R274
AIR GND 75R C262
100R GND
AOR 21 SCT1_AUR_OUT 0.01U YPBPR1_GND
GND
R276
NC 47-SCA014-XX0G GND 0R
+3V3
R255 R257 C248 GPIO_6 R240 33R NC 2 13
L76 DIN FORMAT
10R 100R 0.047U
120R
+3V3
SCT1_AV_IN CVBS3 GPIO_5 R234 33R NC 3 12
BCLK DEEMPH
DACVL
NC
NC NC NC 4 11 R247
ENABLE DVDD C238 10K
2
R258 NC
F18 C247 C249 5 10 0.1U R235
75R C236
22P NC 47P VMID DGND NC R243 10K
NC 0.1U C235 NC
NC NC C237 0.1U 6 9 10K
R71 ROUT LOUT NC
NC 1U NC
NC 7 8
GND AGND AVDD
GND
1
ADCVA
C
NC C239
R267 R265 C255 GND 1U
GND GND 100R 0.01U NC
0R C240
YPBPR0_GND DA_AUL
0.1U
NC
R268 C241
GND GND 75R 1U
C266 GND NC DA_AUR
L75 R266
68R 0.01U
R78 120R Y0P
F20 C254
2
R77 R260
F19 F21 0R 4700P
GND SOY0
R76 C256
NC 15P
T
NC NC
Z82 15P R264 C253
1
L74
1
A A
GND GND
8 7 6 5 4 3 2 1
18520_506_090312.eps
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 59
SHIELD 11
F F
GND GND
1 AV2_IN Z88
VIN
T C288 C271
VOUT 12 SCT2_AV_OUT
2200P 2200P
2 C270
BLNKGND P31 Z191 C289 2200P
AV2R_IN_1 R316 C273 2200P
VGND 13 1 L88 Z175
RED 120R 100R 0.047U
Z86 CVBS5 P27 1 T T
3 L89
BLNK T NC 2.2UH
NC NC 2 HPOUTR1
R 14 SCT2_R/C_IN AV2L_IN_1
3 R297 C287 L90
4 75R 47P 2.2UH HPOUTL1
DATAGND WHITE SCT2_R/C_IN NC NC 3
RGND 15 2 Z87 Z173
6 9
T
T 5 8 Z177
5 GND
DATA 5 SCT2_R/C_IN R1 L85 R296 C272 4 7 T
16 0R 120R 100R 0.047U
G YELLOW AV2_IN CVBS4
Z196 Z178
6 T T 4
CLKOUT HPDET# GND C290
2
Z89 R287 C267 0.1U
17
T
GGND 75R 47P
T
7 SCT2_FS_IN GND R84 F24
SWITCH NC Z176
E GND R579 R315 E
18 GND
B 1K 100R
GND GPIO_10
1
8 AV2L_IN_1
AIL
BGND 19
L142 GND +3V3
9 2.2UH
AGND
NC
AOL 20 AUL_OUT0_1 L132
AV2L_IN_1 120R AV2L_IN
10 AV2R_IN_1
AIR L143
2.2UH AUR_OUT0_1
AOR 21
NC L135
AV2R_IN_1 120R AV2R_IN
T T
NC C586 C588
Z245 2200P 2200P Z172 5V_M
Z246 NC NC C547
C585 C545 T
C587
2200P 2200P 470P 470P
NC C1
NC 100U
16V R301 R300 R299
NC C278
GND 4K7 4K7 4K7
GND GND GND 0.1U R298 NC NC NC
Z165 NC 4K7
Z166
D P4 T T
NC D
P38
Z91 R735
1 T 10
RED R753 100R
P35 GND L92
AUR_OUT0_1 1K AUR_OUT0 GAME_DA2 120R NC GPIO_22
1
2 HPDET# AV1L_IN NC
Z181 R736
1 2 6 T
AV1R_IN L93 100R
Z90 NC
3 3 4 2 GAME_DA1 120R GPIO_24
T R754 HPOUTL1
WHITE Z171 NC
AUL_OUT0_1 1K AUL_OUT0 R737
R310 C284 5 6 7 T
4 HPOUTR1 AV1_IN L94 100R
10K 0.1U GAME_LOAD NC
5V_M 7 8 3 120R GPIO_25
Z92 Z186 NC
5 8 R738
YELLOW T C54 T L95 100R
1U NC NC
4 GAME_CLK 120R GPIO_23
6 GND R79 R81 NC
C437 F28 F30 C275 C276 C277 C274
9 NC NC 4700P 4700P 4700P
4700P
1
2
1
C 47U
GND NC NC NC NC
B GND CVBS_BYPASS 5
R325 Q30
75R BT3904
SCT2_AV_OUT E 6V3 11
F29 F31
2
1
2
R318 R317 NC
C 220R R80 R82 C
15K NC
NC
R519 GND
0R ADIN4_1 GND
GND
GND NC
R294
GND 33K ADIN4
SCT2_FS_IN
GND NC
1
1
F25 R295
R83 10K
C281 NC NC
Z169 22P F27
T
2
A A
8 7 6 5 4 3 2 1
18520_507_090312.eps
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 60
F F
C533
C540 100U R602
12_M 10U 16V
R612 10R HPOUTL1
16V
100R AUL_OUT0
R600 12_MA C
U27 A_MUTE R603 1K Q36 R335
R611 U26 33K B 4K7
33K 13-LM833D-00B BT3904
RC4558 C532
R340 1 8 C457 E
1 8 R617 10U 1OUT VCC C539 R597
C535 C460 C536 16V 0.1U 100U
R608 R609 1OUT VCC+ 15K
10U 0.1U 10U AL2 100R AL21
C463 2 7 GND 16V GND
10R HPOUTR1
AL3 100R 10K 2 7 AUR_OUT0 1IN- 2OUT
C465 GND 16V 100P C462 100P
1IN- 2OUT 3 6
C
100P C464 100P A_MUTE
16V 3 6 0.022U 1IN+ 2IN- B
1IN+ 2IN- C456 Q33 GND
C296 C459 C294 1000P 4 5 BT3904
GND 2IN+ R599 R336
0.022U 1000P 4 5 R334 E
VCC- 2IN+ R616 1K 4K7
R338 R606 13K LM358
GND 33K
13K 33K C534 GND
GND R598 R339
R607 C537 R610 R630 GND 10U 15K
10U AR2 100R AR21 GND
AR3 100R GND 10K 33K R627
16V C96 33K
16V C458 R629 C293
1000P C95 33K C468 22U
C467 0.022U C455
C295 22U 16V
GND
0.1U R333 1000P 0.1U
0.022U R337 16V
13K 13K
R628
E 33K E
GND GND GND GND GND
GND
GND
12/24V_AUDIO 12_M
R347 12_M R396
D19 33K R387 C581
LL4148 100R 4U7 1K MICOUT_L
GND
R728 R729 U37
+12V 5V-IF C492 C563 RC4558
0R 0R 220U 120P
NC R303 R384 1 8 C562
12_M R749 16V C576 R346 1OUT VCC+ C580 R404
47K 5K1 0.1U MICOUT_R
10R AV1L_IN 4U7 1K 2 7 4U7 1K
1IN- 2OUT GND
D25 R594 C572 120P
LL4148 D21 3 6
1K R140 1IN+ 2IN- R417 R418
BAV70 820R C564
1000P 4 5 22K 22K
1
C466 C92 VCC- 2IN+
C538 330U
0.1U C122 10U C461 R345
100U 16V R715 R593 16V A_MUTE GND 5K1
0.1U Q53 R386
3
E R348
16V 100R 1K C577
BT3906 GND 33K
B AV1R_IN GND 4U7 1K
D GNDGND D
GND GND GND
2
GND C R306 C53 R373
OFF_MUTE GND 100K
C59 R595 R95 C568 10U C330 33K
10U 100K +3V3SB 820R 1000P 0.1U
R366
+3V3 R142
33K
GND
100K
GND
GND GND GND
GND
GND
R390
GND 10K R389
R385 100R
10K A_MUTE PWDN
D20 +12V
+12V R349 LL4148 R365 C +12V
R588 R586 R584 100R 10K Q43
22K 22K 22K GPIO_21 B
R589 R587 BT3904
R585
22K 22K 22K E
D100 R581
MCU_M LL4148
R432 10K
C121 C495 GND 10K
10U 1000P NC MUX_CTL2
R583 16V MUX_CTL3 R580
R590
22K 22K R435 10K C
C GPIO_20 Q32
10K NC B
C GND GND +12V GPIO_8 B Q24 BT3904
BT3904 C
E
+12V R146 R624 NC
E
22K 22K
C494
C574 1000P GND
Y1_L GND
1000P
VGA_L 16 1 R141 C123 NC
AV2_L VDD Y0B 0.1U
22K
Y2_L 15 2 GND
Y2A Y2B GND
14 3 MUX1-R
Y1A ZB
MUX1-L 12_M R244
13 4 12_MA
ZA Y3B +12V 0R GND
Q100
12 5 R620 U16
Y1_R Y0A Y1B NC BT3904 22K +12V HEF4052B
11 6
Y3A E
E
C
VGA_R 16 1
10 7 R604 VDD Y0B
A0 VEE C76 10R
B
AV2_R 10U 15 2
9 8 C502 MUX1-L Y2A Y2B AUD_ROUT
Y2_R A1 VSS R246 0.1U
C453 1K8 AV1_L
0.1U 14 3
Y1A ZB +12V
R631 MICOUT_L AUD_LOUT
MUX_CTLC0 C216 13 4 C67
100R U15 ZA Y3B R341
HEF4052B 10U 10U
GND GND 12 5 AUD_LOUT 1K2 AUD_L
MUX_CTLC1 C MUX1-R Y0A Y1B
B MCU_M Q101 C454 B
B AV1_R 11 6 0.1U R332
BT3904 MICOUT_R Y3A E C75 1K2
R632 AUD_ROUT AUD_R
100R R127 E 10 7 10U
A0 VEE
4K7 C60
9 8 10U
R633 A1 VSS
GND GND 100R
MUX_CTL2
+12V +12V GND
R426 R748
MUX_CTL3 100R 0R
R635 NC
R582
10K
10K GND
MUX_CTLC0
MUX_CTLC1
R638
R637 C 10K C
10K GPIO_7 Q39
GPIO_1 Q38 B
B BT3904
BT3904
E
E
C471
C493 1000P GND
1000P GND
A A
GND
GND
8 7 6 5 4 3 2 1
18520_508_090312.eps
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2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 61
GND
C499 33P NC C571
AOMCLK 1000P
C498 33P AOSDATA0 C323 1 2
0.1U Z187
R644 GND
T
GND GND R641 R362 3 4
100R
GND
100R 3R3
GND
U17 GND
AMP_3V3 5 6
STA333BW R378 Z118
STA335 0R NC
T
R367 AMP_SA 7 8 LVDSVDD
C496 100K AMP_3V3 GND
C301 C302 36 1 E4P_1 E4N_1
33P VDD_DIG2 GND_SUB 9 10
C497 D27 1000P 0.1U R370
33P LL4148 35 2 R379 E3P_1 E3N_1 3K3
R372 GND_DIG SA 11 12
100R 0R
AMP_SCL
GND
OSCL0 34 3 ECKP_1 ECKN_1
GND SCL TESTMODE 13 14 C573
OSDA0 R371 AMP_SDA 33 4 C300 AMP_12/24V E2P_1 E2N_1 0.1U
SDA VSS 15 16
100R C473 Z116 0.1U GND
4U7 Z109 32 5 E1P_1 E1N_1 Z132
T
INT 16V T INT_LINE VCC_REG 17 18 Z131 1K2
Z130 T R377
31 6 OUT2B E0P_1 E0N_1 T
R250 R723 RESET OUT2B R696 T +3V3
19 20
100R 100R 30 7 GPIO_9 1K ROT/DCR SEL_LVDS
R368 C85 C522 R647 GND
SDI GND2 C523 21 22
33R 1U 10K
C505 C
R363 29 8 220U NC ODSEL BIT_SEL
LRCKL VCC2 220U
1000P B 33R 35V 35V 23 24 Z133 T
9 Z135 VBR_EXT
Q42 R364 28 OUT2A C504 VBR_OUT R652
T
E E BICKL OUT2A 25 26 E
BT3904 33R 0.1U 100R
GND
GND 10 OUT1B C324
GND NC R369 27 0.1U O4P_1 O4N_1
XT1 OUT1B 27 28
GND C308 33R
4700P 26 11 C84 O3P_1 O3N_1
PLLGND VCC1 AMP_12/24V 29 30
L105 680P C326 1U
GND
GND
120R 0.1U 25 12 OCKP_1 OCKN_1
C305 PLL_FILTER GND1 31 32
GND R164
C79 24 13 OUT1A 12/24V_AUDIO NC O2P_1 O2N_1
D101 PLL_VDD OUT1A 0.22R Z117
LL4148 R353 10U 33 34
2K2 PWDN 23 14 C322 C325 T O1P_1 O1N_1
POWERDN GND_REG 0.1U L139 35 36
0.1U 200R
L104 22 15 O0P_1 O0N_1
VSS_DIG VDD R360 37 38
120R L140
0R NC
GND
GND
AMP_3V3 21 16 AMP_CF AMP_3V3 200R
R352 VDD_DIG CONFIG 39 40
10K C309 C569
0.1U R361 20 17
OUT4B OUT3B 1U C570 T
3R3 R351 0.1U P17 T
L103 18 NC Z93
120R 19 0R Z128
OUT4A OUT3A
+3V3
C78
10U GND
GND GND
R12 L13 L3
0R NC 33R 33R
D E4P_1 E4P O4N_1 O4P D
R21 3 2 3 2
0R NC E4P_1 C169 10P O4P_1 C491 10P E4N_1 E4N O4P_1 O4N
5V_M 4 1 4 1
U28 E3P_1 C246 10P O3P_1 C490 10P E3P_1 E3P O3P_1 O3P
R20 A04803 LVDSVDD 3 2 3 2
0R ECKP_1 C327 OCKP_1 C489 E3N_1 E3N O3N_1 O3N
12_M 1 8 10P 10P
S2 D2A
L12 4 1 L2 4 1
2 7 E2P_1 C280 10P O2P_1 C488 10P 33R L11 33R L5
+3V3 G2 D2B 33R 33R
3 6 E1P_1 C475 10P O1P_1 C487 10P ECKP_1 ECKP OCKP_1 OCKP
R380
S1 D1A 3 2 3 2
22K
4 5 E0P_1 C407 10P O0P_1 C486 10P ECKN_1 ECKN OCKN_1 OCKN
G1 D1B 4 1 4 1
R381 R374
R382 4K7 E4N_1 C336 10P O4N_1 C485 10P E2P_1 E2P O2P_1 O2P
470K
10K 3 2 3 2
E3N_1 C328 10P O3N_1 C484 10P E2N_1 E2N O2N_1 O2N
R732 C86
1K C
L10 4 1 L4 4 1
ADIN5 Q45 0.22U ECKN_1 C479 10P OCKN_1 C483 10P
B
BT3904 33R L9 33R L7
D26 33R 33R
LL4148 E2N_1 C478 10P O2N_1 C482 10P
E E1P_1 E1P O1P_1 O1P
R391 O1N_1 3 2 3 2
E1N_1 C477 10P C481 10P O1N_1 O1N
4K7 E1N_1 E1N
4 1 4 1
E0N_1 C476 10P O0N_1 C480 10P O0P_1 O0P
E0P_1 E0P
3 2 3 2
C E0N_1 E0N O0N_1 O0N C
GND 4 1 L6 4 1
GND GND L8
33R 33R
Z115
T Z112
T Z113
P25 T Z114
T
NC/OUT_L- L17
1 L18 OUTR+/SUBW+ 22UH
OUT2A
OUTL+/OUT_L+ 22UH OUT1A
2 CLICK NC
OUTL-/OUT_R+
C303 C319
3 C313 0.1U
NC/OUT_R- 0.1U 330P
C314 C83 CLICK NC R16
4 C320
AMP_12/24V 1000P 0.47U 6R8
P23
R13
22R CLICK&32"PS NC Z110
1000P
CLICK NC
C318
0.1U
CLICK NC Audio VMID control
T C316
R18 C306 R653
330P
C315 R355 6R8 R354 3 1000P CLICK NC CLICK NC 200R
R359 R356 C310 C82 AUD_VMID
1000P 0R 0.1U 0R CLICK NC
C521 C518 3K3 3K3 NC 0.47U R639 NC
220U 2 CLICK NC
C
220U C304 C317 OFF_MUTE 10K
B 35V GND 0.1U GND B C77 C503
35V GND 0.1U GND R14 GND 1 R15 Q40 10U B
T CLICK NC R17 NC 0.1U
R19 22R C321 22R E BT3904
C307 C81 Z111 6R8 CLICK NC NC
0.47U 6R8 1000P CLICK NC
C520 1000P CLICK NC
C519
220U 220U GND GND GND
R357
35V 35V 3K3 C312 C299
C311
330P 0.1U L20
0.1U
L19 R712 CLICK NC 22UH OUT2B
R358 22UH OUT1B 0R OUT2A
GND 3K3 OUTR-/SUBW- CLICK NC
NC
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 62
+3V3SB +3V3SB
F F
R443 R285
ADIN2 47K 47K KEY 12_M Z225 Z226 Z227 P21
12/24V_AUDIO
T T T
Q49 Q47 +3V3SB
BT3904 C R398 BT3904 C R392
1K NC 1K OIRI_IS 1
B OIRI_IS B C561 MODE
R446 +3V3SB R183 R284
R444 NC 1000P 2
R724 100R E 33K 1K
1K
E
100R IR_MCU R711 GND NC TXD_PBS
OIRI 3
100R
NC GND RXD_PBS
+3V3SB
+3V3SB 4
C513 R430 CWSS
C558 R393 C559 U29 R419 0.1U 100R
R445 5
POWERON/OFF
1000P 4K7 1000P AT24C02 10K C511 MCU_RESET
4K7 NC D3
NC NC 0.1U 8V2 6
CEC1
CEC1
Z221
ORESET#
Z218
VGAHSYNC#
1 8 E
T
A0 VCC T C515 Q54 7
0.1U BT3906
2 7 R424 B T T T
GND GND A1 WP R403 100R GND
GND C PWR_DETECT Z222
3 6 PBS_SCL 10K R400
A2 SCL NC Z223
GND 10K Z224
4 5 PBS_SDA R425 R399
GND SDA 100R
R421 22K
C338
22P 4K7
GND
CEC_OUT
T NC GND
E 5VSB R431 +3V3SB E
CEC_IN
Z217 C339 100R
R450 22P R695 GND
PC_H
0R NC 10K
GND U8
Z203
24
23
22
21
20
19
18
17
+3V3SB U32 R433 R8C11
T RT9166-33 10K
Z202 R751
P07/AN0
IVCC
P30/CNTR0#/CMP10
AVSS
P31/TZOUT/CMP11
AVCC/VREF
P32/INT2/CNTR1/CMP12
P33/INT3#/TCIN
C332 NC T R694
L122 +3V3SB MCU_M 0R
120R 0.1U 2 10K
3 +3V3SB
OUT IN 5VSB
GND
R415 R401
1 C98 25 R422 10K 10K
C344 C99 C331 47U P06/AN1 5V_M
47U R420 10K
1U 0.1U 6V3 5K1 26
6V3 NC NC P05/AN2 PC_V VGAVSYNC#
16 R716
SHORT_PROTECT 27 P45/INT0#
R405 100R R416
P04/AN3 PWR_DETECT
1K 15 R411 10K
28 P10/KI0#/AN8/CMPO0
MODE R402 4K7
GND MODE R704
100R 14 R705
KEY 29 P11/KI1#/AN9/CMPO1 C508 100R
R449 R448 R406
10K P03/AN4 PBS_SDA 0.1U 5K6 NC
10K 100R 13 R407
ADIN4 30 P12/KI2#/AN10/CMPO2 NC
R412 P02/AN5 100R GND
100R 12 R408 PBS_SCL E Q58
ADIN3 31 P13/KI3#/AN11 BT3906
D R414 P01/AN6 100R D
100R 11 R409 U1RX B NC
TXD_PBS 32 P14/TXD0
R413 100R C
P17/INT1#/CNTR0
P37/RXD10/RXD1
P00/AN7/TXD11 U1TX P34
100R 10 R410
P15/RXD0
RXD_PBS 100R Z220 4
9 LED_RED R706
T
XOUT/P47
P16/CLK0
10K
XIN/P46
R718 3
RESET
R717
CWSS
Z199 Z197 0R NC
VCC
VSS
100R NC
Z200 Z198 Q59 2
T T T T BT3904
R707
8
P32 R447 NC C 1
GPIO_4 10K
+3V3SB 100R B
L112 IR_MCU
120R 1 CWSS NC T NC
E
PBS_SDA L113 Z219
2 Z214 Z215
120R T T +3V3SB C554
PBS_SCL L114 R440
L111 1000P
MCU_RESET
3 +3V3SB
120R C510 120R 1M NC GND
TXD_PBS
10P 4 2
C512 L110
0.1U 120R RXD_PBS GND
5 C516
C509 R427
3 10P
10P F35 5K1 X5
1
1
P8 1 R93 16M
47-MIC012-XX0 C514 C517
C 10P
C340 0.1U C
GND C341
Z216 10P 10P
T
2
2
IR PASSTHROUGH
GND
F36 R92
Z229
GND GND Z230 P3
T T
3
5VSB
+3V3SB
1
C506 2
F37
GND GND 10P
R429 1
Z206
10K
NC Z205 +3V3SB U36 R90
Z204 Z207 MAX809 NC
R428 L117 NC
10K T T T T L108
2
NC 120R OIRI_IN 120R
R423 C342 C343 3 2
6K8 P15 VCC RESET
TO_STB
100P 100P GND
2
Z211
2
KEY L115 120R T 16V C72 F32
T
6 0.1U 1
ADIN1 R281 Z234
100R 7 R89
F34 C582 NC F33
1
R283 F100
1000P
1
100R
1
C542 R91
1000P GND
GND
2
C334 R125
2
A A
8 7 6 5 4 3 2 1
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PART 1
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PART 2
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 64
PART 1
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 65
PART 2
18520_556b_090313.eps
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2009-Mar-27
Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 66
PART 1
18520_557a_090313.eps
PART 2
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 67
PART 1
18520_557a_090313
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 68
PART 2
18520_557b_090313.eps
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 69
F F
E E
R602
22K K1
P601
vol+ 12 11
7 R601
3K3 vol-
6 KEY 10 9
R603
5 5K6 menu 8 7
R605 ch+
4 6 5
9K1
ch- 4 3
3 R604
1.2K POWER
D 2 2 1 D
C1
1 0.1U
R606
0R
P602
C C
+3.3V 6
IR_IN 5
GND 4
LED_RED 3
GPIO_11 2
ADIN1 1
B B
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 70
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 71
IR Panel
8 7 6 5 4 3 2 1
J IR Panel
F F
IR
G1
VCC
E E
GND
100R
100R
R6
R5
10U
C1
4K7
R9
P1
R7
22K
5 +3.3V
4 IR_IN
6V3
D D
C3
47U
10U
3 GND
C2
2 LED_RED
R10
R3
1K
1 GPIO_11
1K
Q2
R1 C C R4
4K7 Q1 1K
B B
BT3904 E E BT3904
C C
1 3 D1
R11
R W
4K7
R52 C 2
4K7 Q5
B
B B
BT3904 E
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.1A LA 10. EN 72
Layout IR Panel
Personal Notes:
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090121
2009-Mar-27