Cao Part A
Cao Part A
Cao Part A
net
Shift Operation
Logical AND Operation
Logical OR Operation
Logical NOT Operation
Logical NOR Operation
32. What are the decisions making instructions used in MIPS assembly Language?
There are two decision making instruction used in MIPS assembly Language such as
BEQ – Branch is equal
BNE – Branch is not equal
33. Give the CPU performance equation. OR Write the formula for CPU execution time for
a program
CPU execution time for a program = CPU clock cycle for a program X clock cycle time
OR
𝐶𝑃𝑈 𝐶𝑙𝑜𝑐𝑘 𝐶𝑦𝑐𝑙𝑒𝑠 𝑓𝑜𝑟 𝑎 𝑃𝑟𝑜𝑔𝑟𝑎𝑚
𝐶𝑃𝑈 𝐸𝑥𝑒𝑐𝑢𝑡𝑖𝑜𝑛 𝑇𝑖𝑚𝑒 𝑓𝑜𝑟 𝑎 𝑃𝑟𝑜𝑔𝑟𝑎𝑚 =
𝐶𝑙𝑜𝑐𝑘 𝑟𝑎𝑡𝑒
34. Write the formula for CPU clock cycles required for a program.
𝐶𝑃𝑈 𝐶𝑙𝑜𝑐𝑘 𝐶𝑦𝑐𝑙𝑒 = 𝐼𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛 𝑓𝑜𝑟 𝑎 𝑃𝑟𝑜𝑔𝑟𝑎𝑚 ∗ 𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝐶𝑙𝑜𝑐𝑘 𝐶𝑦𝑐𝑙𝑒 𝑝𝑒𝑟 𝐼𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛
35. What is superscalar execution?
In this type of execution, multiple functional units are used to create parallel paths through which
different instructions can be executed in parallel. so it is possible to start the execution of several
instructions in every clock cycle. This mode of operation is called superscalar execution.
36. What is RISC and CISC?
The processors with simple instructions are called as Reduced Instruction Set Computers(RISC).
The processors with more complex instructions are called as Complex Instruction Set Computers
(CISC).
37. List out the methods used to improve system performance.
The methods used to improve system performance are
Processor clock
Basic Performance Equation
Pipelining
Clock rate
Mr.S.Siddharthan, Assistant Professor, Department of ECE
6
www.AUNewsBlog.net
www.AUNewsBlog.net
Instruction set
Compiler
38. What is the assembly language notation? Give example.
To represent machine instructions and program assembly Language format is used. For
example: The statement specifies an instruction that causes the transfer described below, from
memory location LOC to processor registerR1. Move LOC, R1. The contents of LOC are
unchanged by the execution of this instruction, but the old contents of register R1 are
overwritten.
39. Define addressing modes and its various types.
The different ways in which the location of a operand is specified in an instruction is referred to
as addressing modes:
Types:
Register addressing mode
Base and displacement addressing mode
Immediate addressing mode
PC - Relative addressing mode
Pseudodirect addressing mode
Or
Immediate mode
Register mode
Absolute mode
Indirect mode
Index mode
Base with index
Base with index and offset
Relative mode
Auto-increment mode
Auto-decrement mode
40. What is meant by little endian and Big Endian?
Big endian are systems in which the Most Significant byte of the word is stored in the smallest
address given and the least significant byte is stored in largest
Address Value
1000 90
1001 AB
1002 12
1003 CD
Little endian are systems are those in which the least significant byte is stored in smallest address
Address Value
1000 CD
1001 12
1002 AB
1003 90
41. Define MIPS.
MIPS is a microprocessor without interlocked pipeline stages is a Reduced Instruction set
Computer (RISC) Instruction Set Architecture (ISA) developed by MIPS technologies. Million
Instructions per Second (MIPS) is a measurement of program execution speed based on the
number of millions of instructions.
𝐼𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛 𝑐𝑜𝑢𝑛𝑡
𝑀𝐼𝑃𝑆 =
𝐸𝑥𝑒𝑐𝑢𝑡𝑖𝑜𝑛 𝑇𝑖𝑚𝑒 ∗ 106
42. What is meant by data transfer Instruction?
Data transfer Instruction is a command that moves data between memory and registers.
43. Define Address.
Address is a value used to delineate the location of a specific data element within the memory
array
44. What is meant by memory?
Memory is a storage area in which programs are kept. When they are running and that contains
the data needed by the running program.
45. What are the technologies used for building processors and memory?
Transistor
Integrated Circuit
Silicon crystal
46. What is meant by bandwidth?
It is also called as Throughput. It is one of the parameter to measure the performance of the
system. It is number of tasks completed per unit time.
47. Define CPU Time and its types.
It is the actual time for the CPU spends for computing a specific task. It is also called as CPU
execution time
Types:
User CPU Time
System CPU Time
48. What is meant by alignment restriction?
Alignment restriction is a requirement that data be aligned in memory on natural boundaries.
48. Differentiate between RISC and CISC.
RISC CISC
Emphasis on hardware Emphasis on software
Includes multi-clock complex instructions Single-clock, reduced instruction only
Memory-to-memory: "LOAD" and "STORE" Register to register: "LOAD" and "STORE"
incorporated in instructions are independent instructions
Small code sizes, high cycles per second Low cycles per second, large code sizes.
Transistors used for storing complex Spends more transistors on memory registers
instructions
49. Differentiate between Assembler and Compiler.
Assembler: A computer program that takes computer instructions and converts them into a
pattern of bits that the computer can understand and perform by it certain operations.
Compiler: This is a special program that processes statements written in a programming
language and turns them into machine language that a computer's processor uses.
50. What do you understand by Interleaved DMA?
A Stack is a type of data container/ data structure that implements the LAST-IN-FIRST-OUT
(LIFO) strategy for inserting and recovering data.
This is a very useful strategy, related to many types of natural programming tasks. For instance:
Keeping track of nested invocation calls in a procedural programming language, Evaluating
arithmetic expressions and To eliminate the need for direct implementation of recursion.
51. What are the five classic components of a computer?
The five classic components of a computer are input, output, memory, datapath, and control,
with the last two sometimes combined and called the processor.
52. Define Instruction Set Architecture.
The instruction set architecture, or simply architecture of a computer is the interface between the
hardware and the lowest-level software. It includes anything programmers need to know to make
a binary machine language program work correctly, including instructions, I/O devices, and so
on.
53. Define Application Binary Interface.
Typically, the operating system will encapsulate the details of doing I/O, allocating memory, and
other low-level system functions so that application programmers do not need to worry about
such details. The combination of the basic instruction set and the operating system interface
provided for application programmers is called the application binary interface (ABI).
54. Define Moore’s Law.
Moore‘s Law has provided so much more in resources that hardware designers can now build
much faster multiplication and division hardware. Whether the multiplicand is to be added or not
is known at the beginning of the multiplication by looking at each of the 32 multiplier bits.
55. Define Auto-decrement addressing mode.
The Effective Address of the operand is the contents of a register in the instruction.
After accessing the operand, the contents of this register is automatically decremented to point to
the next item in the list.
Mode Assembler Syntax Addressing Function
EA=[Ri];
Auto-decrement -(Ri)
Decrement Ri
Here the constant X refers to the new address and the contents of index register define the
offset to the operand.
The sum of two values is given explicitly in the instruction and the other is stored in
register.
Eg: Add 20(R1) , R2 (or) EA=>1000+20=1020
Index Mode Assembler Syntax Addressing Function
Index X(Ri) EA=[Ri]+X
Base with Index (Ri,Rj) EA=[Ri]+[Rj]
Base with Index and
X(Ri,Rj) EA=[Ri]+[Rj] +X
offset
Register mode
The operand is the contents of the processor register.
The name (address) of the register is given in the instruction.
Absolute Mode (Direct Mode)
The operand is in new location.
The address of this location is given explicitly in the instruction.
Example: MOVE LOC,R2
The above instruction uses the register and absolute mode.
The processor register is the temporary storage where the data in the register are accessed
using register mode.
The absolute mode can represent global variables in the program.
23. How the subtraction can be performed using adder circuit in ALU?
In ALU adder circuit itself we can perform the subtraction.
Take complement of the oPerand and add with another operand. It will produce
the subtraction value.
Add unsigned, (addu), add immediate unsigned (addiu) do not cause exceptions on
overflow.
255 and M=0, the value ( is represented. When E(= 0 and M (0 , demurral values are represented.
When E(= 2555 and M(0, the value represented is called Not a number.
33. Write the Add/subtract rule for floating point numbers.
Choose the number with the smaller exponent and shift its mantissa right a number of
steps equal to the difference in exponents.
Set the exponent of the result equal to the larger exponent.
Perform addition/subtraction on the mantissa and determine the sign of the result
Normalize the resulting value, if necessary.
34. Write the multiply rule for floating point numbers.
Add the exponent and subtract 127.
Multiply the mantissa and determine the sign of the result.
Normalize the resulting value , if necessary.
35. What is the purpose of guard bits used in floating point arithmetic
Although the mantissa of initial operands is limited to 24 bits, it is important to retain extra bits,
called as guard bits.
36. What are the ways to truncate the guard bits?
There are several ways to truncate the guard bits:
Chooping
Von Neumann rounding
Rounding
37. Define carry save addition(CSA) process.
Instead of letting the carries ripple along the rows, they can be saved and introduced into the next
roe at the correct weighted position. Delay in CSA is less than delay through the ripple carry
adder.
38. What are generate and propagate function? The generate function is given by Gi=xiyi and
The propagate function is given as Pi=xi+yi. 16. What is floating point numbers? In some
cases, the binary point is variable and is automatically adjusted as computation proceeds. In such
case, the binary point is said to float and the numbers are called floating point numbers.
39. In floating point numbers when so you say that an underflow or overflow has occurred?
In single precision numbers when an exponent is less than -126 then we say that an underflow
has occurred. In single precision numbers when an exponent is less than +127 then we say that
an overflow has occurred.
40. What are the difficulties faced when we use floating point arithmetic?
Mantissa overflow: The addition of two mantissas of the same sign may result in a carryout of
the most significant bit Mantissa underflow: In the process of aligning mantissas, digits may
flow off the right end of the mantissa.
Exponent overflow: Exponent overflow occurs when a positive exponent exceeds the maximum
possible value.
Exponent underflow: It occurs when a negative exponent exceeds the maximum possible
exponent value.
41. In conforming to the IEEE standard mention any four situations under which a
processor sets exception flag.
Underflow: If the number requires an exponent less than -126 or in a double precision, if the
number requires an exponent less than -1022 to represent its normalized form the underflow
occurs.
Overflow: In a single precision, if the number requires an exponent greater than -127 or in a
double precision, if the number requires an exponent greater than +1023 to represent its
normalized form the underflow occurs.
Divide by zero: It occurs when any number is divided by zero.
Invalid: It occurs if operations such as 0/0 are attempted.
42. Why floating point number is more difficult to represent and process than
integer?(CSE May/June 2007)
An integer value requires only half the memory space as an equivalent. IEEE double-precision
floating point value. Applications that use only integer based arithmetic will therefore also have
significantly smaller memory requirement A floating-point operation usually runs hundreds of
times slower than an equivalent integer based arithmetic operation.
43. Give the booth’s recoding and bit-pair recoding of the computer.
1000111101000101(CSE May/June 2006)
44 .Draw the full adder circuit and give the truth table (CSE May/June 2007)
UNIT IV PARALLELISM
Instruction-level-parallelism – Parallel processing challenges – Flynn's classification – Hardware
multithreading – Multicore processors
Two methods are find to increase the scale up such methods are
Strong scaling
Weak scaling
What is strong scaling?
In these methods speed up achieved on a multiprocessor without increasing the size of the
problem.
“Strong scaling means measuring speed up while keeping the problem size fixed”.
What is weak scaling?
In this method speed up is achieved on a multiprocessor while increasing the size of the
problem proportionally to the increase in the number of processors.
Write Flynn’s classification for parallel hardware.
Flynn’s classification divides parallel hardware into four groups based on the number of
instruction streams and the number of data streams.
Single Instruction stream and Single Data stream(SISD)
Single Instruction stream Multiple Data stream (SIMD)
Multiple Instruction stream and Single Data stream(MISD)
Multiple Instruction stream and Multiple data stream(MIMD)
What is SISD?
Single Instruction stream and Single Data stream is a uniprocessor in m I=mD=1.
Conventional machines with a single CPU capable only of scalar arithmetic fall into this
category.
What is SIMD?
Single Instruction stream Multiple Data streams the same instruction is applied to many data
stream as in a vector processor. Here mI=1,mD>1, it has single program control unit and many
independent execution units.
What are the advantages of SIMD?
Cost of the control unit over dozens of execution unit.
It has reduced instruction bandwidth and space.
It needs only one copy of the code that is being executed simultaneously.
What are drawbacks of SIMD?
SIMD method is not suitable for case or switch condition data because depending on
what data it has execution unit must perform a different operation.
What is MISD?
Multiple Instruction stream Single Data stream processor is a stream processor that
perform a series of computations on a single data stream in a pipelined fashion. Here
mI>1,mD=1, fault tolerant computers where several CPU’s process the same data using different
programs are MISD.
What is MIMD?
Multiple Instruction stream Multiple Data stream is a multiprocessors, which are
computers with more than one CPU and the ability to execute several programs simultaneously.
What is data level parallelism?
Data level parallelism is a kind of parallelism achieved by performing the same operation
on independent data.
What are basic principles of vector architecture?
Basic principle of vector architecture is to collect data elements from memory, put the
data into a large set of register, operate on them sequentially in registers using pipelined
execution units and then write the results back.
What is strip mining?
In vector architecture if the loops are larger than we add bookkeeping code to iterate full
length vector operations and to handle the leftovers. This process is called strip mining.
What is vector lane?
Vector lane is one or more vector functional units and a portion of the vector register file.
Inspired by lanes on highways that increase traffic speed and multiple lanes execute vector
operations simultaneously.
What is hardware multithreading?
Hardware multithreading allows multiple threads to share the functional units of a single
processor in an overlapping fashion to try to utilize the hardware resources efficiently.
What are the approaches involved in hardware multithreading process?
There are two main approaches to hardware multithreading such as,
Fine grained multithreading
Coarse grained multithreading