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4.3 Intel 8253/54 - Programmable Interval Timer

The Intel 8253 and 8254 are Programmable Interval Timers (PTIs) designed for
microprocessors to perform timing and counting functions using three 16-bit registers.
Each counter has 2 input pins, i.e. Clock & Gate, and 1 pin for “OUT” output. To operate
a counter, a 16-bit count is loaded in its register. On command, it begins to decrement the
count until it reaches 0, then it generates a pulse that can be used to interrupt the CPU.
The following table differentiates the features of 8253 and 8254,
8253 8254
Its operating frequency is 0 - 2.6 MHz Its operating frequency is 0 - 10 MHz
It uses N-MOS technology It uses H-MOS technology
Read-Back command is not available Read-Back command is available
Reads and writes of the same counter Reads and writes of the same counter
cannot be interleaved. can be interleaved.
The most prominent features of 8253/54 are as follows −

 It has three independent 16-bit down counters.
 It can handle inputs from DC to 10MHz.
 These three counters can be programmed for either binary or BCD count.
 It is compatible with almost all microprocessors.
 8254 has a powerful command called READ BACK command, which allows the
user to check the count value, the programmed mode, the current mode, and the
status of the counter.
EE8551 MICROPROCESSOR AND MICROCONTROLLER

8254 Architecture:
Figure 4.2.2 Architecture of 8254

[Source: “Microprocessor Architecture Programming and Application” by R.S. Gaonkar, page- ]
8254 Pin Description
Figure 4.2.3 Pin diagram of 8254


In the above figure, there are three counters, a data bus buffer, Read/Write control logic,
and a control register. Each counter has two input signals - CLOCK & GATE, and one
output signal - OUT.
Data Bus Buffer
It is a tristate, bi-directional, 8-bit buffer, which is used to interface the 8253/54 to
the system data bus. It has three basic functions −
 Programming the modes of 8253/54.
 Loading the count registers.
 Reading the count values.
Read/Write Logic
It includes 5 signals, i.e. RD, WR, CS, and the address lines A0 & A1. In the
peripheral I/O mode, the RD and WR signals are connected to IOR and IOW,
respectively. In the memory mapped I/O mode, these are connected to MEMR and
MEMW. Address lines A0 & A1 of the CPU are connected to lines A0 and A1 of the
8253/54, and CS is tied to a decoded address. The control word register and counters are
selected according to the signals on lines A0 & A1.
A
A0 Result
1
0 0 Counter 0
0 1 Counter 1
1 0 Counter 2
Control Word
1 1
Register
X X No Selection
Control Word Register

This register is accessed when lines A0 & A1 are at logic 1. It is used to write a
command word, which specifies the counter to be used, its mode, and either a read or
write operation. Following table shows the result for various control inputs.

A1 A0 RD WR CS Result
0 0 1 0 0 Write Counter 0
1 1 1 0 0 Write Control Word
0 0 0 1 0 Read Counter 0
1 1 0 1 0 No operation
X X 1 1 0 No operation
X X X X 1 No operation
Counters
Each counter consists of a single, 16 bit-down counter, which can be operated in
either binary or BCD. Its input and output is configured by the selection of modes stored
in the control word register. The programmer can read the contents of any of the three
counters without disturbing the actual count in process.

Figure 4.2.3 Control wordof 8254

Intel 8253/54 - Operational Modes

8253/54 can be operated in 6 different modes. In this chapter, we will discuss these
operational modes.
Mode 0 ─ Interrupt on Terminal Count
 It is used to generate an interrupt to the microprocessor after a certain interval.
 Initially the output is low after the mode is set. The output remains LOW after the
count value is loaded into the counter.
 The process of decrementing the counter continues till the terminal count is
reached, i.e., the count become zero and the output goes HIGH and will remain
high until it reloads a new count.
 The GATE signal is high for normal counting. When GATE goes low, counting is
terminated and the current count is latched till the GATE goes high again.
Mode 1 – Programmable One Shot
 It can be used as a mono stable multi-vibrator.
 The gate input is used as a trigger input in this mode.
 The output remains high until the count is loaded and a trigger is applied.

Mode 2 – Rate Generator

 The output is normally high after initialization.
 Whenever the count becomes zero, another low pulse is generated at the output
and the counter will be reloaded.
Mode 3 – Square Wave Generator
 This mode is similar to Mode 2 except the output remains low for half of the timer
period and high for the other half of the period.
Mode 4 − Software Triggered Mode
 In this mode, the output will remain high until the timer has counted to zero, at
which point the output will pulse low and then go high again.
 The count is latched when the GATE signal goes LOW.
 On the terminal count, the output goes low for one clock cycle then goes HIGH.
This low pulse can be used as a strobe.
Mode 5 – Hardware Triggered Mode
 This mode generates a strobe in response to an externally generated signal.
 This mode is similar to mode 4 except that the counting is initiated by a signal at
the gate input, which means it is hardware triggered instead of software triggered.
 After it is initialized, the output goes high.
 When the terminal count is reached, the output goes low for one clock cycle.

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ROHINI COLLEGE OF ENGINEERING & TECHNOLOGY

4.3 Intel 8253/54 - Programmable Interval Timer

Its operating frequency is 0 - 2.6 MHz Its operating frequency is 0 - 10 MHz

It uses N-MOS technology It uses H-MOS technology

Read-Back command is not available Read-Back command is available

The most prominent features of 8253/54 are as follows −

EE8551 MICROPROCESSOR AND MICROCONTROLLER

Figure 4.2.2 Architecture of 8254

8254 Pin Description

Figure 4.2.3 Pin diagram of 8254

EE8551 MICROPROCESSOR AND MICROCONTROLLER

Control Word Register

EE8551 MICROPROCESSOR AND MICROCONTROLLER

1 1 1 0 0 Write Control Word

EE8551 MICROPROCESSOR AND MICROCONTROLLER

Figure 4.2.3 Control wordof 8254

Intel 8253/54 - Operational Modes

EE8551 MICROPROCESSOR AND MICROCONTROLLER

Mode 2 – Rate Generator

EE8551 MICROPROCESSOR AND MICROCONTROLLER

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