Infineon IRF7904 DataSheet v01 01 en

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PD - 96919B

IRF7904PbF
HEXFET® Power MOSFET
Applications
l Dual SO-8 MOSFET for POL VDSS RDS(on) max ID
Q1 16.2m:@VGS = 10V
Converters in Notebook Computers, Servers,
Graphics Cards, Game Consoles
30V 7.6A
and Set-Top Box Q2 10.8m:@VGS = 10V 11A

Benefits
l Very Low RDS(on) at 4.5V VGS
*   '
l Low Gate Charge
l Fully Characterized Avalanche Voltage 6   6'
and Current 6   6'
l 20V VGS Max. Gate Rating
*   6'
l Improved Body Diode Reverse Recovery
l 100% Tested for RG SO-8
l Lead-Free

Absolute Maximum Ratings


Parameter Q1 Max. Q2 Max. Units
VDS Drain-to-Source Voltage 30 V
VGS Gate-to-Source Voltage ± 20
ID @ TA = 25°C Continuous Drain Current, VGS @ 10V 7.6 11
ID @ TA = 70°C Continuous Drain Current, VGS @ 10V 6.1 8.9 A
IDM Pulsed Drain Current c 61 89
PD @TA = 25°C Power Dissipation 1.4 2.0 W
PD @TA = 70°C Power Dissipation 0.9 1.3
Linear Derating Factor 0.011 0.016 W/°C
TJ Operating Junction and -55 to + 150 °C
TSTG Storage Temperature Range

Thermal Resistance
Parameter Q1 Max. Q2 Max. Units
RθJL g
Junction-to-Drain Lead 20 20 °C/W
RθJA Junction-to-Ambient fg 90 62.5

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07/10/06
IRF7904PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
BVDSS Drain-to-Source Breakdown Voltage Q1&Q2 30 ––– ––– V VGS = 0V, ID = 250µA
∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient Q1 ––– 0.024 ––– V/°C Reference to 25°C, ID = 1mA
Q2 ––– 0.024 –––
Q1 ––– 11.4 16.2 VGS = 10V, ID = 7.6A e
RDS(on) Static Drain-to-Source On-Resistance ––– 14.5 20.5 mΩ VGS = 4.5V, ID = 6.1A e
Q2 ––– 8.6 10.8 VGS = 10V, ID = 11A e
––– 10 13 VGS = 4.5V, ID = 8.8A e
VGS(th) Gate Threshold Voltage Q1&Q2 1.35 ––– 2.25 V Q1: VDS = VGS, ID = 25µA
∆VGS(th)/∆TJ Gate Threshold Voltage Coefficient Q1 ––– -5.0 ––– mV/°C Q2: VDS = VGS, ID = 50µA
Q2 ––– -5.0 –––
IDSS Drain-to-Source Leakage Current Q1&Q2 ––– ––– 1.0 µA VDS = 24V, VGS = 0V
Q1&Q2 ––– ––– 150 VDS = 24V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage Q1&Q2 ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage Q1&Q2 ––– ––– -100 VGS = -20V
gfs Forward Transconductance Q1 17 ––– ––– S VDS = 15V, ID = 6.1A
Q2 23 ––– ––– VDS = 15V, ID = 8.8A
Qg Total Gate Charge Q1 ––– 7.5 11
Q2 ––– 14 21
Qgs1 Pre-Vth Gate-to-Source Charge Q1 ––– 2.2 ––– Q1
Q2 ––– 3.7 ––– VDS = 15V
Qgs2 Post-Vth Gate-to-Source Charge Q1 ––– 0.6 ––– nC VGS = 4.5V, ID = 6.1A
Q2 ––– 1.1 –––
Qgd Gate-to-Drain Charge Q1 ––– 2.5 ––– Q2
Q2 ––– 4.8 ––– VDS = 15V
Qgodr Gate Charge Overdrive Q1 ––– 2.2 ––– VGS = 4.5V, ID = 8.8A
Q2 ––– 4.4 –––
Qsw Switch Charge (Qgs2 + Qgd) Q1 ––– 3.1 –––
Q2 ––– 5.9 –––
Qoss Output Charge Q1 ––– 4.5 ––– nC VDS = 16V, VGS = 0V
Q2 ––– 9.1 –––
RG Gate Resistance Q1 ––– 3.2 4.8 Ω
Q2 ––– 2.9 4.4
td(on) Turn-On Delay Time Q1 ––– 6.9 ––– Q1
Q2 ––– 7.8 ––– VDD = 15V, VGS = 4.5V
tr Rise Time Q1 ––– 7.3 ––– ID = 6.1A
Q2 ––– 10 ––– ns
td(off) Turn-Off Delay Time Q1 ––– 10 ––– Q2
Q2 ––– 15 ––– VDD = 15V, VGS = 4.5V
tf Fall Time Q1 ––– 3.2 ––– ID = 8.8A
Q2 ––– 4.6 ––– Clamped Inductive Load
Ciss Input Capacitance Q1 ––– 910 –––
Q2 ––– 1780 ––– VGS = 0V
Coss Output Capacitance Q1 ––– 190 ––– pF VDS = 15V
Q2 ––– 390 ––– ƒ = 1.0MHz
Crss Reverse Transfer Capacitance Q1 ––– 94 –––
Q2 ––– 180 –––
Avalanche Characteristics
Parameter Typ. Q1 Max. Q2 Max. Units
EAS Single Pulse Avalanche Energy d ––– 140 250 mJ
IAR Avalanche Current c ––– 6.1 8.8 A
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current Q1 ––– ––– 1.8 A MOSFET symbol
(Body Diode) Q2 ––– ––– 2.5 showing the
ISM Pulsed Source Current Q1 ––– ––– 61 A integral reverse
(Body Diode)c Q2 ––– ––– 88 p-n junction diode.
VSD Diode Forward Voltage Q1 ––– ––– 1.0 V TJ = 25°C, IS = 6.1A, VGS = 0V e
Q2 ––– ––– 1.0 TJ = 25°C, IS = 8.8A, VGS = 0V e
trr Reverse Recovery Time Q1 ––– 11 17 ns Q1 TJ = 25°C, IF = 6.1A,
Q2 ––– 16 24 VDD = 15V, di/dt = 100A/µse
Qrr Reverse Recovery Charge Q1 ––– 2.6 3.9 nC Q2 TJ = 25°C, IF = 8.8A,
Q2 ––– 6.9 10 VDD = 15V, di/dt = 100A/µs e
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IRF7904PbF
Typical Characteristics

Q1 - Control FET Q2 - Synchronous FET


100 100
VGS
TOP 10V
8.0V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)


5.0V
4.5V
4.0V
3.5V VGS
10 10 TOP 10V
3.0V
BOTTOM 2.5V 8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
2.5V BOTTOM 2.5V
1 1

2.5V
≤ 60µs PULSE WIDTH ≤ 60µs PULSE WIDTH
Tj = 25°C Tj = 25°C
0.1 0.1
0.1 1 10 100 0.1 1 10 100

VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics


100 100
VGS
TOP 10V
8.0V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)


5.0V
4.5V
4.0V
3.5V
3.0V
BOTTOM 2.5V VGS
TOP 10V
8.0V
10 10 5.0V
4.5V
2.5V 4.0V
3.5V
3.0V
BOTTOM 2.5V
2.5V
≤ 60µs PULSE WIDTH ≤ 60µs PULSE WIDTH
Tj = 150°C Tj = 150°C
1 1
0.1 1 10 100 0.1 1 10 100

VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 3. Typical Output Characteristics Fig 4. Typical Output Characteristics


100.0 100.0
ID, Drain-to-Source Current(Α)

ID, Drain-to-Source Current(Α)

10.0 10.0
TJ = 150°C TJ = 150°C

TJ = 25°C TJ = 25°C
1.0 1.0

VDS = 15V VDS = 15V


≤ 60µs PULSE WIDTH ≤ 60µs PULSE WIDTH
0.1 0.1
1.0 2.0 3.0 4.0 5.0 1.0 2.0 3.0 4.0 5.0

VGS, Gate-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V)

Fig 5. Typical Transfer Characteristics Fig 6. Typical Transfer Characteristics


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IRF7904PbF Typical Characteristics

Q1 - Control FET Q2 - Synchronous FET


10000 10000
VGS = 0V, f = 1 MHZ VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd Crss = Cgd
Coss = Cds + Cgd Coss = Cds + Cgd
C, Capacitance (pF)

C, Capacitance (pF)
1000 Ciss Ciss

1000
Coss

100 Crss Coss

Crss

10 100
1 10 100 1 10 100

VDS, Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)


Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Capacitance vs. Drain-to-Source Voltage

12 12
ID= 6.1A VDS = 24V ID= 8.8A VDS= 24V
VGS, Gate-to-Source Voltage (V)

VGS, Gate-to-Source Voltage (V)


10 VDS= 15V 10 VDS= 15V

8 8

6 6

4 4

2 2

0 0
0 5 10 15 20 0 5 10 15 20 25 30 35
QG Total Gate Charge (nC) QG Total Gate Charge (nC)

Fig 9. Typical Gate Charge vs. Gate-to-Source Voltage Fig 10. Typical Gate Charge vs. Gate-to-Source
Voltage
1000 1000
OPERATION IN THIS AREA OPERATION IN THIS AREA
LIMITED BY R DS (on) LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)

100 100
1msec
1msec 100µsec 100µsec
10 10

10msec 10msec

1 1
100msec
100msec

0.1 TA = 25°C 0.1 TA = 25°C


Tj = 150°C Tj = 150°C
Single Pulse Single Pulse
0.01 0.01
0.01 0.10 1.00 10.00 100.00 0.01 0.10 1.00 10.00 100.00
VDS , Drain-toSource Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 11. Maximum Safe Operating Area Fig 12. Maximum Safe Operating Area
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Typical Characteristics
IRF7904PbF
Q1 - Control FET Q2 - Synchronous FET
1.5 1.5
RDS(on) , Drain-to-Source On Resistance

ID = 7.6A

RDS(on) , Drain-to-Source On Resistance


ID = 11A
VGS = 10V VGS = 10V
(Normalized)

(Normalized)
1.0 1.0

0.5 0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 -60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C) TJ , Junction Temperature (°C)
Fig 13. Normalized On-Resistance vs. Temperature Fig 14. Normalized On-Resistance vs. Temperature
100.0 100.0
ISD, Reverse Drain Current (A)

ISD, Reverse Drain Current (A)

TJ = 150°C TJ = 150°C
10.0 10.0

1.0 1.0 TJ = 25°C

TJ = 25°C

VGS = 0V VGS = 0V
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2
VSD, Source-to-Drain Voltage (V) VSD, Source-to-Drain Voltage (V)
Fig 15. Typical Source-Drain Diode Forward Voltage Fig 16. Typical Source-Drain Diode Forward Voltage
( Ω)

( Ω)

40 25
RDS (on), Drain-to -Source On Resistance m

RDS (on), Drain-to -Source On Resistance m

ID = 7.6A ID = 11A
35
20
30

25 15 TJ = 125°C

TJ = 125°C
20
10
15 TJ = 25°C

TJ = 25°C
10 5
2.0 4.0 6.0 8.0 10.0 2.0 4.0 6.0 8.0 10.0

VGS, Gate-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V)

Fig 17. Typical On-Resistance vs.Gate Voltage Fig 18. Typical On-Resistance vs.Gate Voltage
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IRF7904PbF Typical Characteristics

Q1 - Control FET Q2 - Synchronous FET


8 12

10
6
ID , Drain Current (A)

ID , Drain Current (A)


8

4 6

4
2
2

0 0
25 50 75 100 125 150 25 50 75 100 125 150

TJ , Ambient Temperature (°C) TJ , Ambient Temperature (°C)


Fig 19. Maximum Drain Current vs. Ambient Temp. Fig 20. Maximum Drain Current vs. Ambient Temp.

2.6 2.2

VGS(th) Gate threshold Voltage (V)


VGS(th) Gate threshold Voltage (V)

2.2
1.8

ID = 250µA
1.8 ID = 250µA

1.4

1.4

1.0 1.0
-75 -50 -25 0 25 50 75 100 125 150 -75 -50 -25 0 25 50 75 100 125 150

TJ , Temperature ( °C ) TJ , Temperature ( °C )
Fig 21. Threshold Voltage vs. Temperature Fig 22. Threshold Voltage vs. Temperature

600 1200
EAS, Single Pulse Avalanche Energy (mJ)

EAS, Single Pulse Avalanche Energy (mJ)

I D I D
500 TOP 0.34A TOP 0.57A
1000
0.48A 0.77A
BOTTOM 6.1A BOTTOM 8.8A
400 800

300 600

200 400

100 200

0 0
25 50 75 100 125 150 25 50 75 100 125 150
Starting TJ, Junction Temperature (°C) Starting TJ , Junction Temperature (°C)

Fig 23. Maximum Avalanche Energy vs. Drain Current Fig 24. Maximum Avalanche Energy vs. Drain Current
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IRF7904PbF
100
D = 0.50
0.20
10 0.10
Thermal Response ( ZthJA )

0.05
0.02
1 0.01
Ri (°C/W) τi (sec)
R1 R2 R3
R1 R2 R3
τJ τC
τJ τ 17.122 0.018925
0.1 τ1 τ2 τ3
τ1 τ2 τ3 53.325 0.74555
Ci= τi/Ri 19.551 39.2
Ci= i/Ri
0.01
Notes:
SINGLE PULSE 1. Duty Factor D = t1/t2
( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthja + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100

t1 , Rectangular Pulse Duration (sec)

Fig 25. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient (Q1)


100
D = 0.50

10 0.20
Thermal Response ( ZthJA )

0.10
0.05
1 0.02
0.01
Ri (°C/W) τi (sec)
R1 R2 R3
R1 R2 R3
τJ τC
0.1 τJ τ
10.908 0.02108
τ1 τ2 τ3
τ1 τ2 τ3 34.35 1.1482
Ci= τi/Ri 17.15 39.7
Ci= i/Ri
0.01
Notes:
SINGLE PULSE 1. Duty Factor D = t1/t2
( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthja + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100

t1 , Rectangular Pulse Duration (sec)

Fig 26. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient (Q2)

Fig 27. Layout Diagram


www.irf.com 7
IRF7904PbF
Driver Gate Drive
D.U.T P.W.
Period D=
P.W.
Period
+

ƒ VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚
-
„ +
Recovery
Current
Body Diode Forward
Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied


• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices


Fig 28. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 29a. Unclamped Inductive Test Circuit Fig 29b. Unclamped Inductive Waveforms

LD
VDS VDS
90%
+
VDD -

D.U.T 10%
VGS VGS
Pulse Width < 1µs
Duty Factor < 0.1% td(on) tr td(off) tf

Fig 30a. Switching Time Test Circuit Fig 30b. Switching Time Waveforms
Current Regulator
Id
Same Type as D.U.T.
Vds

50KΩ Vgs
12V .2µF
.3µF
-

D.U.T. +VDS

Vgs(th)
VGS

-3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 31a. Gate Charge Test Circuit Fig 31b. Gate Charge Waveform
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IRF7904PbF

SO-8 Package Outline


Dimensions are shown in milimeters (inches)

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SO-8 Part Marking

(;$03/(7+,6,6$1,5) 026)(7
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www.irf.com 9
IRF7904PbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)

TERMINAL NUMBER 1

12.3 ( .484 )
11.7 ( .461 )

8.1 ( .318 )
7.9 ( .312 ) FEED DIRECTION

NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

330.00
(12.992)
MAX.

14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.

Notes:
 Repetitive rating; pulse width limited by „ When mounted on 1 inch square copper board.
max. junction temperature. Rθ is measured at TJ approximately 90°C.
‚ Starting TJ = 25°C, Q1: L = 7.7mH
RG = 25Ω, IAS = 6.1A; Q2: L = 6.5mH
RG = 25Ω, IAS = 8.8A.
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.

Data and specifications subject to change without notice.


This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/2006
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IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
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characteristics (“Beschaffenheitsgarantie”) . contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon WARNINGS
Technologies hereby disclaims any and all Due to technical requirements products may
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The data contained in this document is exclusively
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to evaluate the suitability of the product for the
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