Atf 34143
Atf 34143
Atf 34143
Preliminary Data
ATF-34143
150
0V -3 Std +3 Std
60
100
40
50
–0.6 V 20
0 0
0 2 4 6 8 29 30 31 32 33 34 35
VDS (V) OIP3 (dBm)
Figure 1. Typical/Pulsed I-V Curves[6]. Figure 2. OIP3 @ 2 GHz, 4 V, 60 mA.
(VGS = -0.2 V per step) LSL=29.0, Nominal=31.8, USL=35.0
120 120
Cpk = 2.69167 Cpk = 2.99973
Std = 0.04 Std = 0.15
100 9 Wafers 100 9 Wafers
Sample Size = 450 Sample Size = 450
80 80
40 40
20 20
0 0
0 0.2 0.4 0.6 0.8 16 16.5 17 17.5 18 18.5 19
NF (dB) GAIN (dB)
Notes:
7. Distribution data sample size is 450 8. Measurements made on production Circuit losses have been de-embedded
samples taken from 9 different wafers. test board. This circuit represents a from actual measurements.
Future wafers allocated to this product trade-off between an optimal noise
may have nominal values anywhere match and a realizeable match based
within the upper and lower spec limits. on production test requirements.
3
Figure 5. Block diagram of 2 GHz producution test board used for Noise Figure, Associated Gain, P1dB, and OIP3 measure-
ments. This circuit represents a trade-off between an optimal noise match and associated impedance matching circuit
losses. Circuit losses have been de-embedded from actual measurements.
4
0.6
20 20
15 15
P1dB 0.4
P1dB
10 10
0.2
5 3V 5 3V 3V
4V 4V 4V
0 0 0
0 20 40 60 80 100 120 140 0 20 40 60 80 100 120 0 20 40 60 80 100 120
IDSQ (mA) IDSQ (mA) CURRENT (mA)
Figure 6. OIP3 and P1dB vs. IDS and VDS Figure 7. OIP3 and P1dB vs. IDS and VDS Figure 8. Noise Figure vs. Current (Id)
Tuned for NF @ 4 V, 60 mA at 2 GHz. Tuned for NF @ 4 V, 60 mA at 900 MHz. and Voltage (VDS) at 2 GHz.
0.7 20 25
0.6
ASSOCIATED GAIN (dB)
15
0.5
15
0.4
10
0.3
10
0.2
5
5
0.1 3V 3V 3V
4V 4V 4V
0 0 0
0 20 40 60 80 100 120 0 20 40 60 80 100 120 0 20 40 60 80 100 120
CURRENT (mA) CURRENT (mA) CURRENT (mA)
Figure 9. Noise Figure vs. Current (Id) Figure 10. Associated Gain vs. Current Figure 11. Associated Gain vs. Current
and Voltage (VDS) at 900 MHz. (Id) and Voltage (VD) at 2 GHz. (Id) and Voltage (VD) at 900 MHz.
1.2 25
1.0
20
0.8
Fmin (dB)
Ga (dB)
0.6 15
0.4
10
60 mA 60 mA
0.2 40 mA 40 mA
20 mA 20 mA
0 5
0 2.0 4.0 6.0 0 1.0 2.0 3.0 4.0 5.0 6.0
FREQUENCY (GHz) FREQUENCY (GHz)
Figure 12. Fmin vs. Frequency and Figure 13. Associated Gain vs.
Current at 4 V. Frequency and Current at 4 V.
Notes:
1. Measurements made on a fixed toned production test board that was tuned for optimal gain match with reasonable noise figure at 4 V,
60 mA bias. This circuit represents a trade-off between optimal noise match, maximum gain match, and a realizable match based on
production test board requirements. Circuit losses have been de-embedded from actual measurements.
2. P1dB measurements are performed with passive biasing. Quicescent drain current, IDSQ, is set with zero RF drive applied. As P1dB is
approached, the drain current may increase or decrease depending on frequency and dc bias point. At lower values of IDSQ the device
is running closer to class B as power output approaches P1dB. This results in higher PAE (power added efficiency) when compared to
a device that is driven by a constant current source as is typically done with active biasing. As an example, at a VDS = 4 V and
IDSQ = 10 mA, Id increases to 62 mA as a P1dB of +19 dBm is approached.
5
NF (dB)
Ga (dB)
3.0
85 °C 20
25 25 °C 2.5
-40 °C
15
23 2.0
15 0.5 P1dB
10 1.5
21
1.0
19 5
0.5
10 0 17 0 0
0 2000 4000 6000 8000 0 2000 4000 6000 8000 0 20 40 60 80 100 120 140
FREQUENCY (GHz) FREQUENCY (MHz) IDSQ (mA)
Figure 14. Fmin and Ga vs. Frequency Figure 15. P1dB, IP3 vs. Frequency and Figure 16. NF, Gain, OP1dB and OIP3
and Temperature at VDS = 4 V, IDS = 60 mA. Temperature at VDS = 4 V, IDS = 60 mA. vs. IDS at 4 V and 3.9 GHz Tuned for
Noise Figure.
30 5.0 25 25
GAIN (dB), OP1dB, and OIP3 (dBm)
27 4.5
20 20
24 4.0
NOISE FIGURE (dB)
21 3.5
15 15
P1dB (dBm)
P1dB (dBm)
18 Gain 3.0
OP1dB
15 OIP3 2.5 10 10
NF
12 2.0
5 5
9 1.5
6 1.0 3V 3V
0 4V 0 4V
3 0.5
0 0 -5 -5
0 20 40 60 80 100 120 0 50 100 150 0 50 100 150
IDSQ (mA) IDS (mA) IDS (mA)
Figure 17. NF, Gain, OP1dB and OIP3 Figure 18. P1dB vs. IDS Active Bias Figure 19. P1dB vs. IDS Active Bias
vs. IDS at 4 V and 5.8 GHz Tuned for Tuned for NF @ 4V, 60 mA at 2 GHz. Tuned for min NF @ 4V, 60 mA at
Noise Figure. 900 MHz.
Note:
1. P1dB measurements are performed with passive biasing. Quicescent drain current, IDSQ, is set with zero RF drive applied. As P1dB is
approached, the drain current may increase or decrease depending on frequency and dc bias point. At lower values of IDSQ the device
is running closer to class B as power output approaches P1dB. This results in higher PAE (power added efficiency) when compared to
a device that is driven by a constant current source as is typically done with active biasing. As an example, at a VDS = 4 V and
IDSQ = 10 mA, Id increases to 62 mA as a P1dB of +19 dBm is approached.
6
80 80
50
60
Pout (dBm), G (dB),
Pout (dBm), G (dB),
40
PAE (%)
40
PAE (%)
30
20 20
10
Pout 0 Pout
0 Gain Gain
PAE PAE
-10 -20
-30 -20 -10 0 10 20 -30 -20 -10 0 10 20
Pin (dBm) Pin (dBm)
Figure 20. Swept Power Tuned for Figure 21. Swept Power Tuned for
Power at 2 GHz, VDS = 4 V, IDSQ = 120 mA. Power at 2 GHz, VDS = 4 V, IDSQ = 60 mA.
Notes:
1. P1dB measurements are performed with passive biasing. Quicescent drain current, IDSQ, is set with zero RF drive applied. As P1dB is
approached, the drain current may increase or decrease depending on frequency and dc bias point. At lower values of IDSQ the device
is running closer to class B as power output approaches P1dB. This results in higher PAE (power added efficiency) when compared to
a device that is driven by a constant current source as is typically done with active biasing. As an example, at a VDS = 4 V and
IDSQ = 10 mA, Id increases to 62 mA as a P1dB of +19 dBm is approached.
2. PAE(%) = ((Pout – Pin) / Pdc) x 100
3. Gamma out is the reflection coefficient of the matching circuit presented to the output of the device.
7
10
1.0 0.11 0.84 31 0.13 17.8 S21 MAG
Notes:
1. Fmin values below 2 GHz have been extrapolated.
2. Fmin values are mathematically derived based on sixteen noise figure measurements made at sixteen different impedance states using
an ATF NP5 test system. Actual noise figure measurements obtained in a circuit will be greater than Fmin due to mismatches and
circuit losses.
3. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the
end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated
through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the
carrier. Two 0.020 inch diameter via holes are placed within 0.010 inch from each source lead contact point, one via on each side of
that point.
8
Notes:
1. Fmin values below 2 GHz have been extrapolated.
2. Fmin values are mathematically derived based on sixteen noise figure measurements made at sixteen different impedance states using
an ATF NP5 test system. Actual noise figure measurements obtained in a circuit will be greater than Fmin due to mismatches and
circuit losses.
3. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the
end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated
through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the
carrier. Two 0.020 inch diameter via holes are placed within 0.010 inch from each source lead contact point, one via on each side of
that point.
9
15
1.0 0.14 0.80 31 0.13 18.9
1.5 0.17 0.73 49 0.11 17.4 10 MAG
S21
1.8 0.20 0.70 60 0.10 16.9
5
2.0 0.22 0.66 67 0.09 16.4
2.5 0.28 0.60 85 0.07 15.6 0
6.0 0.69 0.38 -144 0.05 10.9 Figure 25. MSG/MAG and |S21|2 vs.
Frequency at 4 V, 40 mA.
7.0 0.81 0.39 -111 0.11 9.9
8.0 0.94 0.43 -82 0.20 9.1
9.0 1.06 0.51 -57 0.32 8.5
10.0 1.19 0.62 -40 0.47 8.1
Notes:
1. Fmin values below 2 GHz have been extrapolated.
2. Fmin values are mathematically derived based on sixteen noise figure measurements made at sixteen different impedance states using
an ATF NP5 test system. Actual noise figure measurements obtained in a circuit will be greater than Fmin due to mismatches and
circuit losses.
3. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the
end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated
through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the
carrier. Two 0.020 inch diameter via holes are placed within 0.010 inch from each source lead contact point, one via on each side of
that point.
10
6.0 0.81 0.39 -137 0.07 11.1 Figure 26. MSG/MAG and |S21|2 vs.
Frequency at 4 V, 60 mA.
7.0 0.96 0.42 -104 0.14 10.0
8.0 1.10 0.47 -76 0.26 9.2
9.0 1.25 0.54 -53 0.41 8.6
10.0 1.39 0.62 -37 0.60 8.2
Notes:
1. Fmin values below 2 GHz have been extrapolated.
2. Fmin values are mathematically derived based on sixteen noise figure measurements made at sixteen different impedance states using
an ATF NP5 test system. Actual noise figure measurements obtained in a circuit will be greater than Fmin due to mismatches and
circuit losses.
3. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the
end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated
through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the
carrier. Two 0.020 inch diameter via holes are placed within 0.010 inch from each source lead contact point, one via on each side of
that point.
11
Noise Parameter presented with Γo. If the reflec- Typically for FETs, the higher Γo
Applications Information tion coefficient of the matching usually infers that an impedance
Fmin values at 2 GHz and higher network is other than Γo, then the much higher than 50Ω is required
are based on measurements while noise figure of the device will be for the device to produce Fmin. At
the Fmins below 2 GHz have been greater than Fmin based on the VHF frequencies and even lower
extrapolated. The Fmin values are following equation. L Band frequencies, the required
impedance can be in the vicinity
based on a set of 16 noise figure NF = Fmin + 4 Rn |Γs – Γo | 2
measurements made at 16 of several thousand ohms.
Zo (|1 + Γo| 2) (1 – Γs| 2) Matching to such a high imped-
different impedances using an
ATN NP5 test system. From these Where Rn /Zo is the normalized ance requires very hi-Q compo-
measurements, a true Fmin is noise resistance, Γo is the opti- nents in order to minimize circuit
calculated. Fmin represents the mum reflection coefficient losses. As an example at 900 MHz,
true minimum noise figure of the required to produce Fmin and Γs is when airwwound coils (Q > 100)
device when the device is pre- the reflection coefficient of the are used for matching networks,
sented with an impedance source impedance actually the loss can still be up to 0.25 dB
matching network that trans- presented to the device. The which will add directly to the
forms the source impedance, losses of the matching networks noise figure of the device. Using
typically 50Ω, to an impedance are non-zero and they will also muiltilayer molded inductors with
represented by the reflection add to the noise figure of the Qs in the 30 to 50 range results in
coefficient Γo. The designer must device creating a higher amplifier additional loss over the airwound
design a matching network that noise figure. The losses of the coil. Losses as high as 0.5 dB or
will present Γo to the device with matching networks are related to greater add to the typical 0.15 dB
minimal associated circuit losses. the Q of the components and Fmin of the device creating an
The noise figure of the completed associated printed circuit board amplifier noise figure of nearly
amplifier is equal to the noise loss. Γo is typically fairly low at 0.65 dB. A discussion concerning
figure of the device plus the higher frequencies and increases calculated and measured circuit
losses of the matching network as frequency is lowered. Larger losses and their effect on ampli-
preceding the device. The noise gate width devices will typically fier noise figure is covered in
figure of the device is equal to have a lower Γo as compared to Hewlett-Packard Application
Fmin only when the device is narrower gate width devices. 1085.
12
EQUATION La=0.1 nH R
EQUATION Lb=0.1 nH
EQUATION Lc=0.8 nH R=0.1 OH
EQUATION Ld=0.6 nH
LOSSYL
EQUATION Rb=0.1 OH
EQUATION Ca=0.15 pF L=Lb
EQUATION Cb=0.15 pF R=Rb
L LOSSYL LOSSYL L
GATE_IN SOURCE
L=Lb L=Lb L=La *.5
L=Lc
R=Rb R=Rb
D
C=Cb C
C C=Ca
G
S
L LOSSYL LOSSYL L
SOURCE DRAIN_OUT
L=La L=Lb L=Lb L=Ld
R=Rb R=Rb
* STATZMODEL
MESFET MODEL *
= FET
IDS model Gate model Parasitics Breakdown Noise
NFET=yes DELTA=.2 RG=1 GSFWD=1 FNC=01e+6
PFET= GSCAP=3 RD=Rd GSREV=0 R=.17
IDSMOD=3 CGS=cgs pF RS=Rs GDFWD=1 P=.65
VTO=–0.95 GDCAP=3 LG=Lg nH GDREV=0 C=.2
BETA= Beta GCD=Cgd pF LD=Ld nH VJR=1
LAMBDA=0.09 LS=Ls nH IS=1 nA
ALPHA=4.0 CDS=Cds pF IR=1 nA
B=0.8 CRF=.1 IMAX=.1
TNOM=27 RC=Rc XTI=
IDSTC= N=
VBI=.7 EG=
D
EQUATION Cds=0.01 * W/200
EQUATION Beta=0.06 * W/200
EQUATION Rd=200W
NFETMESFET
EQUATION Rs=.5 * 200/W
EQUATION Cgs=0.2 * W/200
XX
G MODEL=FET
EQUATION Cgd=0.04 * W/200
EQUATION Lg=0.03 * 200/W
S
EQUATION Ld=0.03 * 200/W
XX
S
EQUATION Ls=0.01 * 200/W
EQUATION Rc=500 * 200/W W=800 µm
13
Package Dimensions
Outline 43 (SOT-343/SC-70 4 lead)
1.30 (.051) REF
1.15
2.60 (.102)
2.00 ± 0.05 1.30 ± 0.02 1.30 (.051)
0.60 TYP
1.15
0.55 (.021) TYP 0.85 (.033)
2.00 ± 0.05
1.25 ± 0.02
0.375 TYP
x.xx REF
0.90 ± 0.05
0.29 ± 0.050
0.01 0.6° 0.13 TYP
0.30 TYP
CARRIER
TAPE
8 mm
4PX 4PX 4PX 4PX
USER
FEED
DIRECTION
COVER TAPE
Tape Dimensions
For Outline 4T
P D P2
P0
F
W
C
D1
t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS)
8° MAX. K0 5° MAX.
A0 B0
www.hp.com/go/rf
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
CAVITY LENGTH A0 2.24 ± 0.10 0.088 ± 0.004 For technical assistance or the location of
WIDTH B0 2.34 ± 0.10 0.092 ± 0.004 your nearest Hewlett-Packard sales
DEPTH K0 1.22 ± 0.10 0.048 ± 0.004 office, distributor or representative call:
PITCH P 4.00 ± 0.10 0.157 ± 0.004
BOTTOM HOLE DIAMETER D1 1.00 + 0.25 0.039 + 0.010 Americas/Canada: 1-800-235-0312 or
PERFORATION DIAMETER D 1.55 ± 0.05 0.061 ± 0.002 408-654-8675
PITCH P0 4.00 ± 0.10 0.157 ± 0.004
POSITION E 1.75 ± 0.10 0.069 ± 0.004 Far East/Australasia: Call your local HP
sales office.
CARRIER TAPE WIDTH W 8.00 ± 0.30 0.315 ± 0.012
THICKNESS t1 0.255 ± 0.013 0.010 ± 0.0005
Japan: (81 3) 3335-8152
COVER TAPE WIDTH C 5.4 ± 0.10 0.205 ± 0.004
TAPE THICKNESS Tt 0.062 ± 0.001 0.0025 ± 0.00004 Europe: Call your local HP sales office.
DISTANCE CAVITY TO PERFORATION F 3.50 ± 0.05 0.138 ± 0.002
(WIDTH DIRECTION) Data subject to change.
CAVITY TO PERFORATION P2 2.00 ± 0.05 0.079 ± 0.002 Copyright © 1999 Hewlett-Packard Co.
(LENGTH DIRECTION)
5968-????E (5/99)