Btech Cse 7 8 Sem Compiler Design 71905 Nov 2019
Btech Cse 7 8 Sem Compiler Design 71905 Nov 2019
Btech Cse 7 8 Sem Compiler Design 71905 Nov 2019
of Pages : 02
Total No. of Questions : 18
B.Tech.(CSE) (2012 to 2017 E-III) (Sem.–7,8)
B.Tech. (IT)
COMPILER DESIGN
Subject Code : BTCS-913
M.Code : 71905
Time : 3 Hrs. Max. Marks : 60
INSTRUCTION TO CANDIDATES :
1. SECTION-A is COMPULSORY consisting of TEN questions carrying T WO marks
each.
2. SECTION-B contains FIVE questions carrying FIVE marks each and students
have to attempt any FOUR questions.
3. SECTION-C contains T HREE questions carrying T EN marks each and students
have to attempt any T WO questions.
SECTION-A
Answer briefly :
5. Write at least two differences between LR (0) parsers, SLR (1) parsers, CLR (1) and
LALR Parsers.
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SECTION-B
11. Differentiate between top down and bottom up parsing. Show the steps of a shift reduce
parser on input (a,(a,a)) using the following grammar :
S (L) | a
L L, S | S
SECTION-C
16. Explain in detail the process of compilation. Illustrate the output of each phase of
compilation for the input “a = (b+c) * (b+c) * 2”.
17. What is the need of symbol table. Explain various data structures used for its storage.
18. Given the CFG G = {S, {S, U, V, W}, {a, b, c, d}, P} with P given as shown below :
S UVW
U (S) | aSb| d
V aV |
V cW |
NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any
page of Answer Sheet will lead to UMC against the Student.
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