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P650RE6(-G) / P651RE6(-G) / P650RE3(-G) / P651RE3(-G)

Preface

Notebook Computer

P650RE6(-G) / P651RE6(-G) / P650RE3(-G) / P651RE3(-G)

Service Manual

Preface
I
Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.

This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface

Version 1.0
November 2015

Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and /or registered trademarks of their respective companies.

II
Preface

About this Manual


This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.

It is organized to allow you to look up basic information for servicing and/or upgrading components of the P650RE6(-
G) / P651RE6(-G) / P650RE3(-G) / P651RE3(-G) series notebook PC.

The following information is included:

Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Appendix A, Part Lists

Preface
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS

III
Preface

IMPORTANT SAFETY INSTRUCTIONS


Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit as follows:
• AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19.5V, 9.23A (180 Watts) minimum AC/DC Adapter.
Preface

FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.

IV
Preface

Instructions for Care and Operation


The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:

1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.

2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on

Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.

3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.

V
Preface

4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.

Use only approved brands of Unplug the power cord before


peripherals. attaching peripheral devices.

Power Safety
Preface

The computer has specific power requirements:


• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
 unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies.
you have turned off the
power, and discon-
nected all peripherals Do not plug in the power Do not use the power cord if Do not place heavy objects
and cables (including cord if you are wet. it is broken. on the power cord.
telephone lines and
power cord). It is advis-
able to also remove
your battery in order to
prevent accidentally
turning the machine
on.

VI
Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Battery Guidelines
The following can also apply to any backup batteries you may have.

Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.

Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.

Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.

VII
Preface

Related Documents
You may also need to consult the following manual for additional information:

User’s Manual on CD/DVD


This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.

System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Securely attach any peripherals you want to use with the
computer (e.g. keyboard and mouse) to their ports.
Preface

5. Attach the AC/DC adapter to the DC-In jack at the rear of the
computer, then plug the AC power cord into an outlet, and 135°
connect the AC power cord to the AC/DC adapter.
6. Use one hand to raise the lid/LCD to a comfortable viewing angle
Figure 1
Opening the Lid/LCD/
(do not exceed 135 degrees); use the other hand (as illustrated in Computer with AC/DC
Figure 1) to support the base of the computer (Note: Never lift the Adapter Plugged-In
computer by the lid/LCD).
7. Press the power button to turn the computer “on”.

Shut Down
Note that you should always shut your computer down by
choosing the Shut down command in Windows (see be-
low). This will help prevent hard disk or system problems.

Click the icon in the Start Screen and


choose Shut down from the menu.
Or
Right-click the Start button at the bottom of the Start
Screen or the Desktop and choose Shut down or sign out
> Shut down from the context menu.

VIII
Preface

Contents
Introduction ..............................................1-1 Main Board ................................................................................... A-5
HDD .............................................................................................. A-6
Overview .........................................................................................1-1 LCD ............................................................................................... A-7
Specifications ..................................................................................1-2 LCD (Sharp) .................................................................................. A-8
External Locator - Top View with LCD Panel Open ......................1-4
External Locator - Front & Right Side Views .................................1-5 Schematic Diagrams................................. B-1
External Locator - Left Side & Rear View .....................................1-6 System Block Diagram ...................................................................B-2
External Locator - Bottom View .....................................................1-7 Processor 1/7 ...................................................................................B-3
Mainboard Overview - Top (Key Parts) .........................................1-8 Processor 2/7 ...................................................................................B-4
Mainboard Overview - Bottom (Key Parts) ....................................1-9 Processor 3/7 ...................................................................................B-5
Mainboard Overview - Top (Connectors) .....................................1-10 Processor 4/7 ...................................................................................B-6
Mainboard Overview - Bottom (Connectors) ...............................1-11 Processor 5/7 ...................................................................................B-7
Disassembly ...............................................2-1 Processor 6/7 ...................................................................................B-8

Preface
Processor 7/7 ...................................................................................B-9
Overview .........................................................................................2-1
DDR4 CHA SO-DIMM_0 ............................................................B-10
Maintenance Tools ..........................................................................2-2 DDR4 CHA SO-DIMM_1 ............................................................B-11
Connections .....................................................................................2-2
DDR4 CHB SO-DIMM_0 ............................................................B-12
Maintenance Precautions .................................................................2-3
DDR4 CHB SO-DIMM_1 ............................................................B-13
Disassembly Steps ...........................................................................2-4 Panel, Inverter ...............................................................................B-14
Removing the Keyboard ..................................................................2-5
Redriver ........................................................................................B-15
Removing the Battery ......................................................................2-6
Mini DP Port E .............................................................................B-16
Removing the Hard Disk Drive .......................................................2-8
Mini DP Port F ..............................................................................B-17
Removing the System Memory (RAM) ........................................2-10
HDMI Connector ..........................................................................B-18
Removing the M.2 SSD Module ...................................................2-13
VGA PCI Express .........................................................................B-19
Removing the Wireless LAN Module ...........................................2-14
VGA Frame Buffer Partition ........................................................B-20
Wireless LAN, Combo, 3G & LTE Module Cables .....................2-15
Frame Buffer Partition A ..............................................................B-21
Removing and Installing the 3G/SATA Module ...........................2-16 Frame Buffer Partition B ..............................................................B-22
Part Lists ..................................................A-1 Frame Buffer Partition A_B .........................................................B-23
Part List Illustration Location ........................................................ A-2 GPU Frame Buffer Partition .........................................................B-24
Top ................................................................................................. A-3 Frame Buffer Partition C ..............................................................B-25
Bottom ............................................................................................ A-4 Frame Buffer Partition D ..............................................................B-26

IX
Preface

Frame Buffer Partition C_D ......................................................... B-27 PEX_VDD, 3V3_AON, 3V3_RUN .............................................B-59
GPU Decoupling .......................................................................... B-28 NVVDD Phase 1 & 2 ...................................................................B-60
DACA Interface & XTAL ............................................................ B-29 FBVDDQ ......................................................................................B-61
IFP I/O Interface ........................................................................... B-30 VCC_Core & VCCSA ..................................................................B-62
Misc - GPIO, I2C and ROM ........................................................ B-31 VCore & VCCSA Output Stage ...................................................B-63
GPU NVVDD, FBVDDQ, and GND ........................................... B-32 VCCGT .........................................................................................B-64
PCH 1/9 ........................................................................................ B-33 VCCGT Output Stage ...................................................................B-65
PCH 2/9 ........................................................................................ B-34 P650RE Audio Board A ...............................................................B-66
PCH 3/9 ........................................................................................ B-35 P650RE Power Board ...................................................................B-67
PCH 4/9 ........................................................................................ B-36 P650RE HDD Board .....................................................................B-68
PCH 5/9 ........................................................................................ B-37 P650RE LED Board .....................................................................B-69
PCH 6/9 ........................................................................................ B-38 Finger Sensor Board .....................................................................B-70
PCH 7/9 ........................................................................................ B-39 P650RE Click Board .....................................................................B-71
PCH 8/9 ....................................................................................... B-40 P650RE USB Board 1/3 ...............................................................B-72
Preface

PCH 9/9 ........................................................................................ B-41 P650RE USB Board 2/3 ...............................................................B-73


USB3.0 ......................................................................................... B-42 P650RE USB Board 3/3 ...............................................................B-74
USB Charger ................................................................................ B-43 P670RE USB Board 1/3 ...............................................................B-75
M.2 3G + M.2 SATA ................................................................... B-44 P670RE USB Board 2/3 ...............................................................B-76
M.2 WLAN+BT, PCIE4X SSD ................................................... B-45 P670RE USB Board 3/3 ...............................................................B-77
Realtek ALC892 ........................................................................... B-46 P670RE LED Board .....................................................................B-78
TPA2008D2 ................................................................................. B-47 P655RE Power Board ...................................................................B-79
Subwoofer .................................................................................... B-48 P655RE LED Board .....................................................................B-80
KBC-ITE IT8587 ......................................................................... B-49 Updating the FLASH ROM BIOS......... C-1
TPM, CCD, TP ............................................................................. B-50
Download the BIOS ........................................................................C-1
Fan, LID, KB, LED ...................................................................... B-51
Unzip the downloaded files to a bootable CD/DVD or
Connector ..................................................................................... B-52
USB Flash drive ..............................................................................C-1
DDR 1.2V / 0.6VS ....................................................................... B-53
Set the computer to boot from the external drive ...........................C-1
VDD3, VDD5 ............................................................................... B-54
Use the flash tools to update the BIOS ...........................................C-2
5V, 5VS, 3.3V, 3.3VS, 3.3VA ..................................................... B-55
Restart the computer (booting from the HDD) ...............................C-2
Power 1.0V, VCCIO .................................................................... B-56
AC_In, Charger ............................................................................ B-57
1.0DX_VCCSTG/VCCSFR_OC/2.5V ........................................ B-58

X
Introduction

Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the P650RE6(-G) / P651RE6(-G) / P650RE3(-G) /
P651RE3(-G) series notebook computer. Information about operating the computer (e.g. getting started, and the Setup
utility) is in the User’s Manual. Information about dri-vers (e.g. VGA & audio) is also found in the User’s Manual. The
manual is shipped with the computer.

Operating systems (e.g. Windows 8.1, etc.) have their own manuals as do application softwares (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.

1.Introduction
The P650RE6(-G) / P651RE6(-G) / P650RE3(-G) / P651RE3(-G) series notebook is designed to be upgradeable. See
Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please take
note of the warning and safety information indicated by the “” symbol.

The balance of this chapter reviews the computer’s technical specifications and features.

Overview 1 - 1
Introduction

Specifications Processor Options Security

i7-6820HK (2.70GHz) Security (Kensington® Type) Lock Slot


 8MB Smart Cache, 14nm, DDR4-2133MHz, TDP 45W BIOS Password
Support Intel® XTU over-clocking technology on i7-6820HK Intel PTT for Systems Without TPM Hardware
Latest Specification Information
(Factory Option) TPM 2.0
The specifications listed in this section are i7-6700HQ (2.60GHz)
(Factory Option) Fingerprint Reader Module
correct at the time of going to press. Certain 6MB Smart Cache, 14nm, DDR4-2133MHz,
items (particularly processor types/speeds) TDP 45W Video Adapter Options
may be changed, delayed or updated due to
the manufacturer's release schedule. Check Core Logic Microsoft Hybrid Graphics Mode or Discrete Graphics
with your service center for details. Mode
Intel® HM170 Express Chipset
Supports up to 4 Active Displays
G-SYNC Support
LCD Options
NVIDIA® G-SYNC™ Technology is support- Intel Integrated GPU
1.Introduction

ed by some LCD panels and GTX 970M/ 15.6" (39.62cm), 16:9, QFHD (3840x2160)/FHD
Intel® HD Graphics 530
980M series video adapters only (contact (1920x1080)
Dynamic Frequency
your distributor or supplier for details).
BIOS Intel Dynamic Video Memory Technology
Microsoft DirectX®12 Compatible
AMI BIOS (64Mb SPI Flash-ROM)

Memory NVIDIA® Discrete GPU


 Four 260 Pin SO-DIMM Sockets Supporting DDR4 2133MHz NVIDIA® GeForce GTX 970M
CPU Speed & Computer in DC Mode Memory (Factory Option) 6GB GDDR5 Video RAM
Note that when the computer is in DC mode (pow- Memory Expandable from 4GB (minimum) up to 64GB Or
ered by the battery only) the CPU may not run at (maximum) (Factory Option) 3GB GDDR5 Video RAM
full speed. This is a design feature implemented in Microsoft DirectX®12 Compatible
order to protect the battery.
 Audio
SO-DIMM Memory Types
High Definition Audio Compliant Interface
All SO-DIMM memory modules installed in the
system should be identical (the same size and S/PDIF Digital Output
brand) in order to prevent unexpected system be- Two Speakers
havior. Sound Blaster X-Fi MB5
ANSP™ 3D sound technology on headphone output
Do not mix SO-DIMM memory module sizes and
brands otherwise unexpected system problems Built-In Array Microphone
may occur.
Note: External 5.1CH Audio Output Supported by Headphone,
Microphone and S/PDIF Out Jacks

1 - 2 Specifications
Introduction

Storage Interface Environmental Spec

(Factory Option) Two SATA M.2 2280 SSDs supporting Four USB 3.0 Ports (Including one AC/DC Powered USB Temperature
RAID level 0/1 port) Operating: 5°C - 35°C
Or One HDMI-Out Port Non-Operating: -20°C - 60°C
(Factory Option) One PCIe Gen3 x4 M.2 2280 SSD Two Mini DisplayPorts (1.2) Relative Humidity
Two changeable 2.5" (6cm) 7.0mm (h) SATA (Serial) Hard One S/PDIF Out Jack Operating: 20% - 80%
Disk Drives/Solid State Drives (SSD) supporting RAID level One Headphone/Speaker-Out Jack Non-Operating: 10% - 90%
0/1 One Microphone-In Jack
Or One RJ-45 LAN Jack Power
One changeable 2.5" (6cm) 9.5mm (h) SATA (Serial) Hard One DC-In Jack Embedded 4-Cell Polymer Battery Pack, 60WH
Disk Drive/Solid State Drive (SSD)
Or M.2 Slots Full Range AC/DC Adapter
One changeable 2.5" (6cm) 7.0mm/9.5mm (h) SATA (Serial) AC Input: 100 - 240V, 50 - 60Hz
Slot 1 for Combo WLAN and Bluetooth Module
Hard Disk Drive/Solid State Drive (SSD) DC Output: 19.5V, 9.23A (180W)

1.Introduction
Slot 2 for SATA or PCIe Gen3 x4 SSD
Pointing Device Slot 3 for SATA SSD Dimensions & Weight
Or
Built-in Touchpad (scrolling key functionality integrated) 385mm (w) * 271mm (d) * 25mm (h)
(Factory Option) Slot 3 for 3G/4G Module
2.6kg (Barebone with 60WH Battery)
Keyboard Note: (Factory Option) LTE-1/LTE-2 Antenna
Or
Full-size Winkey Illuminated White-LED Keyboard (with 385mm (w) * 271mm (d) * 28.8mm (h)
numeric keypad)  2.6kg (Barebone with 60WH Battery)
M.2 SSD Limitation
Communication Or
When slot 3 has an M.2 SATA SSD installed, then
385mm (w) * 271mm (d) * 26.9mm (h)
Built-In Gigabit Ethernet LAN slot 2 will not be available for M.2 PCIe SSDs.
2.7kg (Barebone with 60WH Battery)
2.0M FHD PC Camera Module
(Factory Option - Model A Only) M.2 3G/4G Module
Card Reader
WLAN/ Bluetooth M.2 Modules:
(Factory Option) Intel® Wireless-AC 8260 Wireless LAN Embedded Multi-In-1 Push-Push Card Reader
(802.11ac) + Bluetooth 4.1 MMC (MultiMedia Card) / RS MMC
(Factory Option) Intel® Wireless-N 7265 Wireless LAN SD (Secure Digital) / Mini SD / SDHC/ SDXC
(802.11b/g/n) + Bluetooth 4.0
(Factory Option) Intel® Wireless-AC 3165 Wireless LAN
(802.11ac) + Bluetooth 4.0
(Factory Option) Qualcomm® Atheros Killer™ Wireless-AC
1535 Wireless LAN (802.11ac) + Bluetooth 4.1
(Factory Option) Third-Party Wireless LAN 802.11b/g/n +
Bluetooth 4.0

Specifications 1 - 3
Introduction

Figure 1
External Locator - Top View with LCD Panel Open
Top View

1. PC Camera
2. *PC Camera LED
*When the PC 3 2 1 3
camera is in use,
the LED will be
illuminated.
3. Built-In Array
Microphone
4. LCD
1.Introduction

5. Speakers 4
6. Power Button
7. Keyboard
8. Touchpad &
Buttons
9. Fingerprint
Reader (Optional) 5 5

8
9

1 - 4 External Locator - Top View with LCD Panel Open


Introduction

External Locator - Front & Right Side Views Figure 2


Front View
1. LED Indicator

FRONT VIEW

1.Introduction
Figure 3
Right Side View
1. S/PDIF-Out Jack
RIGHT SIDE VIEW 2. Microphone-In
Jack
3. Headphone-Out
Jack
6
1 3 4. Multi-in-1 Card
2 4 5
7 8 Reader
5. USIM Card
Reader (for 3G/
4G USIM Cards)
6. USB 3.0 Ports
7. RJ-45 LAN Jack
8. Security Lock
Slot

External Locator - Front & Right Side Views 1 - 5


Introduction

External Locator - Left Side & Rear View


Figure 4
Left Side View
1. Vent
2. HDMI-Out Port /
3. Powered USB 3.0 LEFT SIDE VIEW
Port
4. Mini DisplayPorts

1 2 3 4 4
1.Introduction

Figure 5 REAR VIEW


Rear View
1. Vent 2 3
2. DC-In Jack 1
3. USB 3.0 Port

1 - 6 External Locator - Left Side & Rear View


Introduction

External Locator - Bottom View


Figure 6
Bottom View
1. Vent

1
1
1
1

1.Introduction
1

1

Overheating

To prevent your com-


puter from overhea-
ting, make sure no-
thing blocks any vent
while the computer is
in use.

External Locator - Bottom View 1 - 7


Introduction

Figure 7 Mainboard Overview - Top (Key Parts)


Mainboard Top
Key Parts

1. Memory Slots
DDR4 SO-DIMM
2. KBC-ITE IT8587
3. CMOS Battery
1.Introduction

1 3

1 - 8 Mainboard Overview - Top (Key Parts)


Introduction

Mainboard Overview - Bottom (Key Parts) Figure 8


Mainboard Bottom
Key Parts

1. Mini-Card
Connector (WLAN
Module)
2. Mini-Card
4 Connector (M.2
3G/SATA Module)
3. Mini-Card
Connector (M.2
PCIE/SATA SSD

1.Introduction
1
Module)
4. GPU-GTX970M
5 5. Memory Slots
6
DDR4 SO-DIMM
6. CPU

3
2

Mainboard Overview - Bottom (Key Parts) 1 - 9


Introduction

Figure 9 Mainboard Overview - Top (Connectors)


Mainboard Top
Connectors
4 5
1. HDMI-Out Port
2. Powered USB
Port 3.0
Connector
3. Mini Display Port
4. USB Port 3.0 10
Connector
5. DC-In Jack 4
6. Keyboard Cable
1.Introduction

Connector 4
7. TP Connector 1
8. Speaker
Connector 2
9. HDD Connector
10. RJ-45 LAN Jack 3 6 8
7
3

1 - 10 Mainboard Overview - Top (Connectors)


Introduction

Mainboard Overview - Bottom (Connectors) Figure 10


Mainboard Bottom
Connectors
5
1. Multi-in-1 Card
11 Reader
2. Battery Connector
3. Fan Connector
4. LCD Cable
4 Connector
5. CCD Connector

1.Introduction
3

1
2

Mainboard Overview - Bottom (Connectors) 1 - 11


Introduction
1.Introduction

1 - 12
Introduction

1.Introduction
Mainboard Overview - Bottom (Connectors) 1 - 13
Introduction
1.Introduction

1 - 14 Mainboard Overview - Bottom (Connectors)


Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the P650RE6(-G) / P651RE6(-G) / P650RE3(-G) /
P651RE3(-G) series notebook’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless oth-
erwise indicated).

We suggest you completely review any procedure before you take the computer apart.

Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are

2.Disassembly
repeated here for your convenience.

To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a  
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.

A box with a  will also provide any possible helpful information. A box with a  contains warnings.

An example of these types of boxes are shown in the sidebar.



Warning

Overview 2 - 1
Disassembly

NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly

Connections
Connections within the computer are one of four types:

Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.

2 - 2 Overview
Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re- 
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines and
damaged. power cord). It is advis-
5. Be careful with power. Avoid accidental shocks, discharges or explosions. able to also remove

2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. your battery in order to
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. prevent accidentally
6. Peripherals – Turn off and detach any peripherals. turning the machine
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. on.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.

Overview 2 - 3
Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Keyboard:


1. Remove the keyboard page 2 - 5
To remove the Battery:
1. Remove the battery page 2 - 6
To remove the HDD:
2.Disassembly

1. Remove the battery page 2 - 6


2. Remove the HDD page 2 - 8
To remove the System Memory:
1. Remove the battery page 2 - 6
2. Remove the system memory page 2 - 10
To remove the M.2 SSD:
1. Remove the battery page 2 - 6
2. Remove the SSD page 2 - 13
To remove the Wireless LAN Module:
1. Remove the battery page 2 - 6
2. Remove the WLAN page 2 - 14
To remove and install the 3G/SATA Module:
1. Remove the battery page 2 - 6
2. Remove the 3G page 2 - 16
3. Remove the SATA page 2 - 17
4. Install the 3G/SATA page 2 - 18

2 - 4 Disassembly Steps
Disassembly

Removing the Keyboard Figure 1


1. Turn off the computer, turn it over. Keyboard Removal
2. Remove screws 1 - 2 from the bottom of the computer.
3. Open it up with the LCD on a flat surface before pressing at point 3 to release the keyboard module (use the spe- a. Remove the screws from
the bottom of the compu-
cial eject stick 4 to do this) while releasing the keyboard in the direction of the arrow 5 as shown (Figure 1a).
ter and then eject the
4. Carefully lift the keyboard 6 up, being careful not to bend the keyboard ribbon cable 7 . Disconnect the key- keyboard using a special
board ribbon cable 7 from the locking collar socket by using a flat-head screwdriver to pry the locking collar pins eject stick to push the
8 away from the base (Figure 1b). keyboard out while re-
5. Carefully lift the keyboard 6 off the computer (Figure 1c). leasing the keyboard as
shown.
a. b. Lift the keyboard up and
b. disconnect the keyboard
ribbon cable from the

2.Disassembly
6 locking collar socket.
3 c. Remove the keyboard.

1 7
8
2 
7 Re-inserting the Key-
board
8 8 When re-inserting the
keyboard firstly, align the
keyboard tabs at the bot-
c. tom of the keyboard with
the slots in the case.

5 
3 4. Eject Stick
6. Keyboard
6
4 • 2 Screws

Removing the Keyboard 2 - 5


Disassembly

Figure 2 Removing the Battery


Battery Removal 1. Turn the computer off, and turn it over.
2. Remove the SD card cover 16 and screws 2 - 15 (Figure 2a).
a. Remove the SD cover
and screws.
3. Carefully lift the bottom case 16 up in the direction of the arrow 17 and remove it (Figure 2b).
b. Remove the bottom case. 4. The battery will be visible at point 18 on the computer (Figure 2c).
c. Locate the battery.
4 5
a. 2 b.
3
12
17
6 16
2.Disassembly

13
1 14
 11 15 7
Screw Size

Note that the size of


10 9 8
screws 2 & 5 is
M2.5 x 8L.

c.

 16
1. SD Card Cover
16. Bottom Case
18
• 14 Screws

2 - 6 Removing the Battery


Disassembly

5. Carefully disconnect the cable 19 , then remove screws 20 - 22 (Figure 3b).


Figure 3
6. Lift the battery 23 off the computer (Figure 3e).
Battery Removal
7. Reinsert the bottom case starting from point 24 as shown (Figure 3f) to avoid damaging the rear eSATA/USB 3.0
(cont’d.)
port. Tighten the screws to secure the bottom case in place.
d. Disconnect the cable and
remove the screws.
d. e. e. Lift the battery off the
22 19
computer.
f. Reinsert the bottom case
20 and tighten the screws.

2.Disassembly
21

23

f.

24


24. Battery

• 4 Screws

Removing the Battery 2 - 7


Disassembly

Figure 4 Removing the Hard Disk Drive


HDD Assembly The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
Removal or 7mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as
outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Locate the HDD.
b. Remove the screws.
Hard Disk Disassembly Process
1. Turn off the computer, and remove the battery (page 2 - 6).
2. The HDD will be visible at point 1 on the mainboard (Figure 4a).
3. Remove screws 2 - 5 from the HDD assembly (Figure 4b).

a.
2.Disassembly


HDD System Warning

New HDD’s are blank. Before you


begin make sure:

You have backed up any data you


1 want to keep from your old HDD.

You have all the CD-ROMs and


FDDs required to install your oper-
ating system and programs.
b.
If you have access to the internet,
5 download the latest application and
 hardware driver updates for the op-
erating system you plan to install.
6. Hard Disk Copy these to a removable medi-
um.
• 4 Screws

2
3 4

2 - 8 Removing the Hard Disk Drive


Disassembly

4. Slightly lift and pull the hard disk in the direction of arrow 6 (Figure 5c).
5. Lift the hard disk assembly 7 out of the bay 8 (Figure 5d). Figure 5
6. Remove screws 9 - 16 and bracket 17 from the hard disk 18 (Figure 5e). HDD Assembly
Removal (cont’d.)
7. Reverse the process to install a new hard disk (do not forget to replace the screws).
c. Slightly lift and pull the
c. d. HDD in the direction of
the arrow.
d. Lift the HDD assembly
6 out of the bay.
7 e. Remove the screws and
bracket from the HDD.
8

2.Disassembly
e. 10
14 11
 17 15
Installing 9.5mm or 7mm HDD

Note that the hard disks pictured on the following pages are all 9
7mm(h) hard disk drive.
13
In some cases 9.5mm(h) hard disk drives will be installed. It can be 12
installed on either upper or lower slot.
16 
There are two hard disk drive options:
7. HDD Assembly
Two changeable 2.5" (6cm) 7.0mm (h) SATA (Serial) Hard Disk
17. HDD Bracket
Drives/Solid State Drives (SSD) supporting RAID level 0/1 18
18. HDD
Or
One changeable 2.5" (6cm) 9.5mm (h) SATA (Serial) Hard Disk
Drive/Solid State Drive (SSD)
• 8 Screws
18
For more information, contact your distributor/supplier, and bear in
mind your warranty terms.

Removing the Hard Disk Drive 2 - 9


Disassembly

Figure 6 Removing the System Memory (RAM)


RAM-1 Module
Removal
The computer has four memory sockets for 260 pin Small Outline Dual In-line Memory Modules (SO-DIMM) support-
ing DDR4 2133 MHz. The main memory can be expanded up to 64GB. The total memory size is automatically detected
a. The RAM modules will by the POST routine once you turn on your computer.
be visible at point 1 . Memory-1 Upgrade Process
b. Remove the screws
and lift the shielding 1. Turn off the computer, turn it over, remove the keyboard (page 2 - 5).
plate out. 2. The RAM modules will be visible at point 1 after removing the shielding plate (Figure 6a).
3. Remove screws 2 - 5 and lift the shielding plate 6 off the computer (Figure 6b).

a. b.
2.Disassembly

5
2
 1
Contact Warning 4
3
Be careful not to touch
the metal pins on the
module’s connecting
edge. Even the cleanest
hands have oils which
can attract particles, and
degrade the module’s 6
performance.


6. RAM Shielding Plate

• 4 Screws

2 - 10 Removing the System Memory (RAM)


Disassembly

4. Gently pull the two release latches ( 7 & 8 ) on the sides of the memory socket in the direction indicated by the Figure 7
arrows (Figure 8c). The RAM module 9 will pop-up (Figure 8d), and you can then remove it. RAM-1 Module
5. Pull the latches to release the second module if necessary. Removal (cont’d)
6. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
7. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot c. Pull the release lat-
as it will go. DO NOT FORCE IT; it should fit without much pressure. ches.
8. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. d. Remove the module.

c. d.

7 7
9 

2.Disassembly
Contact Warning

Be careful not to touch


the metal pins on the
8 8
module’s connecting
edge. Even the clean-
est hands have oils
which can attract parti-
cles, and degrade the
module’s performance.


9. RAM Module

Removing the System Memory (RAM) 2 - 11


Disassembly

Figure 8 Memory-2 Upgrade Process


RAM-2 Module 1. Turn off the computer, turn it over, remove the battery (page 2 - 6).
Removal 2. The RAM-2 modules will be visible at point 1 on the mainboard (Figure 8a).
3. Gently pull the two release latches ( 2 & 3 ) on the sides of the memory socket in the direction indicated by the
a. The RAM modules arrows (Figure 8b). The RAM module 4 will pop-up (Figure 8c), and you can then remove it.
will be visible at point 4. Pull the latches to release the second module if necessary.
1 on the main- 5. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
board.
b. Pull the release lat-
6. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
ches. as it will go. DO NOT FORCE IT; it should fit without much pressure.
c. Remove the module. 7. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
8. Replace the bottom cover and the screws (see page 2 - 6).
9. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
2.Disassembly

 c.
a. b.
Contact Warning

Be careful not to touch


the metal pins on the
module’s connecting 2
edge. Even the clean-
2
est hands have oils
which can attract parti- 4
1
cles, and degrade the
module’s performance.

3 3


4. RAM Module

2 - 12 Removing the System Memory (RAM)


Disassembly

Removing the M.2 SSD Module Figure 9


M.2 SSD Module
1. Turn off the computer, turn it over, remove the battery (page 2 - 6).
Removal
2. The M.2 SSD module will be visible at point 1 on the mainboard (Figure 9a).
3. Remove the screw 2 (Figure 9b)
a. Locate the M.2 SSD.
4. The M.2 SSD module 3 (Figure 9c) will pop-up, and you can remove it from the computer. b. Remove the screw.
c. The M.2 SSD module
a. c. will pop up.

2.Disassembly
1

b.

3 
3.M2 SSD Module

• 1 Screw

Removing the M.2 SSD Module 2 - 13


Disassembly

Figure 10 Removing the Wireless LAN Module


Wireless LAN
1. Turn off the computer, turn it over, remove the battery (page 2 - 6).
Module Removal
2. The Wireless LAN module will be visible at point 1 on the mainboard (Figure 10a).
3. Carefully disconnect the cables 2 & 3 , and then remove the screw 4 (Figure 10b)
a. Locate the WLAN.
b. Disconnect the cables
4. The Wireless LAN module 5 (Figure 10c) will pop-up, and you can remove it from the computer.
and remove the screw.
c. The WLAN module will a. c.
pop up.

Note: Make sure you


5
reconnect the antenna 1
2.Disassembly

cable to the “1 + 2”
socket (Figure 10b).

b.

 4
5.Wireless LAN Module 3

• 1 Screw

2 - 14 Removing the Wireless LAN Module


Disassembly

Wireless LAN, Combo, 3G & LTE Module Cables


Note that the cables for connecting to the antennae on WLAN, WLAN & Bluetooth Combo, 3G and LTE modules are
not labelled. The cables/covers (each cable will have either a black or transparent cable cover) are color coded for iden-
tification as outlined in the table below.

Antenna Cable Cover


Module Type Cable Color
Type Type

WM 1 Black
WLAN/WLAN & Bluetooth
WM 2 Gray Transparent
Combo
WM 3 White

2.Disassembly
LTE 1 Black
LTE Broadband Black
LTE 2 Gray

3G 1 Black
3G Broadband Black
3G 2 Gray

Cable 1 is usually connected to antenna 1 (Main) on the module, and cable 2 to antenna 2 (Aux).

Wireless LAN, Combo, 3G & LTE Module Cables 2 - 15


Disassembly

Removing and Installing the 3G/SATA Module


Figure 11
3G Module Removal 3G Module Removal Procedure
1. Turn off the computer, remove the battery (page 2 - 6).
a. Locate the module. 2. Locate the module, it is visible at point 1 (Figure 11a).
b. Disconnect the cables and
3. Carefully disconnect the cables 2 & 3 , and then remove the screw 4 from the module (Figure 11b).
remove the screw.
c. The module will pop-up. 4. The module 3 will pop-up (Figure 11c).
d. Lift the module up off the 5. Lift the module 5 up and off the computer (Figure 11d).
socket.
a. c.
2.Disassembly

b. d.

4 5

5. 3G Module
3

• 1 Screw

2 - 16 Removing and Installing the 3G/SATA Module


Disassembly

SATA Module Removal Procedure Figure 12


1. Turn off the computer, remove the battery (page 2 - 6). SATA Module
2. Locate the module, it is visible at point 1 (Figure 12a). Removal
3. Remove the screw 2 from the module (Figure 12b).
4. The module 3 will pop-up (Figure 12c). a. Locate the module.
5. Lift the module 3 up and off the computer (Figure 12d). b. Disconnect the cables and
remove the screw.
c. The module will pop-up.
a. b. d. Lift the module up off the
socket.

2.Disassembly
1

c. d.


3 3. SATA Module

• 1 Screw

Removing and Installing the 3G/SATA Module 2 - 17


Disassembly

Figure 13 3G/SATA Installation Procedure


3G/SATA Module 1. Place the thermal pad 1 on the module as shown (Figure 13a).
Installation 2. Insert the module 2 in the computer (Figure 13b).
3. Tighten the screw 3 to secure it in place (Figure 13c).
a. Place the thermal pad.
b. Insert the module. a. b.
c. Tighten the screw.

1 1
2
Top Top

1 1
2.Disassembly

Bottom Bottom

c.

 
1. Thermal Pad Thermal Pad
2. M2 SATA Module
Be sure to place the thermal pad’s adhesive side down onto
the module surface.
• 1 Screw
The thermal pad needs to be cut (along the two markers as
shown) to fit the corresponding size of the module.

2 - 18 Removing and Installing the 3G/SATA Module


Appendix A:Part Lists
This appendix breaks down the P650RE6(-G) / P651RE6(-G) / P650RE3(-G) / P651RE3(-G) series notebook’s con-
struction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings.

Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.

Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the

A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1
Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
Part
Location
Top page A - 3
Bottom page A - 4
Main Board page A - 5
HDD page A - 6
LCD page A - 7
A.Part Lists

LCD (Sharp) page A - 8

A - 2
Top

㚧ẋ㕁 Figure A - 1

A.Part Lists
Top

Top A - 3
Bottom

Figure A - 2
A.Part Lists

Bottom

A - 4 Bottom
Main Board

Figure A - 3
Main Board

A.Part Lists
Main Board A - 5
HDD

Figure A - 4
A.Part Lists

HDD

A - 6 HDD
LCD

Figure A - 5
LCD

A.Part Lists
⽭枰⃰怠ĴňIJİōŕņĮIJİ⣑䶂
ㇵ⎗ẍ怠ġōŕņġĮij⣑䶂ġ

暨天↢Ĵňİōŕņġ㧉䳬
ġ⽭怠㬌ĴňIJİōŕņĮIJ⣑䶂ġġ

LCD A - 7
LCD (Sharp)

Figure A - 6
A.Part Lists

LCD (Sharp)

⽭枰⃰怠ĴňIJİōŕņĮIJİ⣑䶂
ㇵ⎗ẍ怠ġōŕņġĮij⣑䶂ġ

暨天↢Ĵňİōŕņġ㧉䳬
ġ⽭怠㬌ĴňIJİōŕņĮIJ⣑䶂ġġ

A - 8 LCD (Sharp)
Schematic Diagrams

Appendix B: Schematic Diagrams


This appendix has circuit diagrams of the P650RE6(-G) / P651RE6(-G) / P650RE3(-G) / P651RE3(-G) notebook’s
PCB’s. The following table indicates where to find the appropriate schematic diagram.

Diagram - Page Diagram - Page Diagram - Page Diagram - Page


System Block Diagram - Page B - 2 GPU Frame Buffer Partition - Page B - 24 Realtek ALC892 - Page B - 46 P650RE HDD Board - Page B - 68 Table B - 1
Processor 1/7 - Page B - 3 Frame Buffer Partition C - Page B - 25 TPA2008D2 - Page B - 47 P650RE LED Board - Page B - 69 SCHEMATIC
Processor 2/7 - Page B - 4 Frame Buffer Partition D - Page B - 26 Subwoofer - Page B - 48 Finger Sensor Board - Page B - 70 DIAGRAMS

B.Schematic Diagrams
Processor 3/7 - Page B - 5 Frame Buffer Partition C_D - Page B - 27 KBC-ITE IT8587 - Page B - 49 P650RE Click Board - Page B - 71

Processor 4/7 - Page B - 6 GPU Decoupling - Page B - 28 TPM, CCD, TP - Page B - 50 P650RE USB Board 1/3 - Page B - 72

Processor 5/7 - Page B - 7 DACA Interface & XTAL - Page B - 29 Fan, LID, KB, LED - Page B - 51 P650RE USB Board 2/3 - Page B - 73

Processor 6/7 - Page B - 8 IFP I/O Interface - Page B - 30 Connector - Page B - 52 P650RE USB Board 3/3 - Page B - 74

Processor 7/7 - Page B - 9 Misc - GPIO, I2C and ROM - Page B - 31 DDR 1.2V / 0.6VS - Page B - 53 P670RE USB Board 1/3 - Page B - 75

DDR4 CHA SO-DIMM_0 - Page B - 10 GPU NVVDD, FBVDDQ, and GND - Page B - 32 VDD3, VDD5 - Page B - 54 P670RE USB Board 2/3 - Page B - 76 
DDR4 CHA SO-DIMM_1 - Page B - 11 PCH 1/9 - Page B - 33 5V, 5VS, 3.3V, 3.3VS, 3.3VA - Page B - 55 P670RE USB Board 3/3 - Page B - 77
Version Note
DDR4 CHB SO-DIMM_0 - Page B - 12 PCH 2/9 - Page B - 34 Power 1.0V, VCCIO - Page B - 56 P670RE LED Board - Page B - 78
The schematic dia-
DDR4 CHB SO-DIMM_1 - Page B - 13 PCH 3/9 - Page B - 35 AC_In, Charger - Page B - 57 P655RE Power Board - Page B - 79
grams in this chapter
Panel, Inverter - Page B - 14 PCH 4/9 - Page B - 36 1.0DX_VCCSTG/VCCSFR_OC/2.5V - Page B - 58 P655RE LED Board - Page B - 80 are based upon ver-
Redriver - Page B - 15 PCH 5/9 - Page B - 37 PEX_VDD, 3V3_AON, 3V3_RUN - Page B - 59 sion 6-7P-P65RC-003.
Mini DP Port E - Page B - 16 PCH 6/9 - Page B - 38 NVVDD Phase 1 & 2 - Page B - 60 If your mainboard (or
other boards) are a lat-
Mini DP Port F - Page B - 17 PCH 7/9 - Page B - 39 FBVDDQ - Page B - 61
er version, please
HDMI Connector - Page B - 18 PCH 8/9 - Page B - 40 VCC_Core & VCCSA - Page B - 62 check with the Service
VGA PCI Express - Page B - 19 PCH 9/9 - Page B - 41 VCore & VCCSA Output Stage - Page B - 63 Center for updated di-
VGA Frame Buffer Partition - Page B - 20 USB3.0 - Page B - 42 VCCGT - Page B - 64
agrams (if required).
Frame Buffer Partition A - Page B - 21 USB Charger - Page B - 43 VCCGT Output Stage - Page B - 65

Frame Buffer Partition B - Page B - 22 M.2 3G + M.2 SATA - Page B - 44 P650RE Audio Board A - Page B - 66

Frame Buffer Partition A_B - Page B - 23 M.2 WLAN+BT, PCIE4X SSD - Page B - 45 P650RE Power Board - Page B - 67

B - 1
Schematic Diagrams

System Block Diagram


5 4 3 2 1

1.35V(VDDQ),1.5VS
P650 AUDIO BOARD
6-71-P65R8-D02 SHEET 65
P650RE Skylake System Block Diagram SHEET 52

VDD3,VDD5
P650 POWER SW BOARD SHEET 53
6-71-P65RC-D01 SHEET 66 6-7P-P65RC-004
5V,3.3V,5VS,3VS,
P650 HDD BOARD
<=4.5" PCIE*16 6-71-P65R0-D03 SHEET 54
D 6-71-P65RN-D01 SHEET 67 27 MHz DDR4/1.2V/1866, 2133MHz D
VDD1.0,VCCIO
P650 LED BOARD GTX970M 3GB H-processor <=4.5"
SHEET 55

6-71-P65R4-D02 SHEET 68 (GTX980M 4GB) AC_IN,CHARGER


SHEET 18~31 PROCESSOR DDR4 SHEET 56
P650 F/P BOARD BGA1440 SO-DIMM*4
<=6" 1.0DX_VCCSTG/VCCSFR_OC
6-71-P650F-D01B 㱧䓐 SHEET 69 SHEET 9,10,11,12
Mini DP SHEET 15,16 SHEET 2,3,4,5,6,7,8 VPP 2.5V
SHEET 17
SYSTEM SMBUS SHEET 57
P650 CLICK BOARD
B.Schematic Diagrams

6-71-P65R2-D02 SHEET 70
HDMI2.0(P8409A) PEX_VDD/IFPAB_IOVDD
eDP DMI*4 /3V3 SHEET 58
P650 USB BOARD 5.1 channel
SHEET 71~73
<=7" NVVDD
6-71-P65R3-D02A <=6" SHEET 59~60
P670 USB BOARD PANEL PS8331B
6-71-P67R3-D02A SHEET 74~76 SHEET 13 SHEET 3 SPDIF MIC HP
FBVDDQ
SHEET 60
OUT IN OUT
Sheet 1 of 79 C P670 LED BOARD VCC_CORE & VCCSA C

6-71-P67R4-D01 SHEET 77 H Platform AUDIO BOARD 3D SHEET 61~62


System Block 32.768KHz
Controller SHEET 65 surround
VCCGT
Diagram Hub (PCH-H)
SV3H612
SHEET 63~64

TOUCH PAD SPI(Option) SHEET 45


TPM2.0 24MHz
SHEET 48
(Option) TPA2008D2 Front L
SHEET49 (RESERVE) Front R
SHEET 49 INT MIC Azalia Codec SHEET 46
23x23mm FCBGA SHEET 45
EC REALTEK
ITE 8587A 33 MHz LPC ALC892
APA2607QBI
(512KB ROM) SHEET 32~40 SHEET 45 SUBWOOFER
BIOS SHEET 47
SPI
SHEET 48 24 MHz
SHEET 32 AZALIA LINK For P670Sx
INT. K/B EC SMBUS
B B

SHEET 48
THERMAL SMART SMART PCIE 100 MHz
SENSOR FANx3 BATTERY <8" <8"
AC-IN <8"
INT. Backlight K/B RT5 NGFF PCIE NGFF PCIE
SHEET 2 SHEET 50 SHEET 56
SOCKET SOCKET
SHEET 50 USB 3.0 USB 2.0 SSD PCIE4X WLAN+BT Realtek
5 Gbps 480 Mbps SHEET 44 (USB8) RTL8411B
2"~7" PORT 0
SATA III 6.0Gb/s M KEY SHEET 44 LAN CARD
3"~9" A KEY SHEET 71 READER
PORT 2 PORT 3
25
PORT 1 1"~12" SHEET 75 (P67) MHz
NGFF PCIE P650
LAN BOARD
SATA HDD SATA HDD SOCKET USB3.0 FINGER PRINTER
7mm 7mm 3G/M.2 SATA PORT1 CCD (USB7) USB3.0 USB3.0 2IN1
ON CLICK BOARD RJ-45
SHEET 34
(USB1) (USB9) PORT4 PORT3 SHEET 71
SOCKET
USB3.0 SHEET 42 SHEET 49 (USB4) (USB3) SHEET 75 SHEET 71
HDD BOARD PORT2 SHEET 75
SHEET 67 (Charging)
FingerPrint SHEET 72 SHEET 73 (P67) (P67)
A (USB6) SHEET 76 SHEET 77 A
SHEET 43 USB3.0 (P67) (P67)
B KEY PORT5 SHEET 69 12 MHz
(USB4)
P655SEQ POWER SW BOARD
6-71-P655C-DR1 SHEET 78
SHEET 47
(Optional) SIM
ONLY P65 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
SHEET 73 [01]BLOCK DIAGRAM
P655SEQ LED BOARD Size Document Number Rev
6-71-P6554-DR2A SHEET 79 A3 P650RE 6-7P-P65RC-004 003

Date: W ednesday, July 08, 2015 Sheet 1 of 79


5 4 3 2 1

B - 2 System Block Diagram


Schematic Diagrams

Processor 1/7
5 4 3 2 1

?
SKYLAKE_HALO
U113C
BGA1440

E25 B25 PEG_TX_0 C784 0.22u_10V_X5R_04


18 PEG_RX0 PEG_RXP[0] PEG_TXP[0] PEG_TX0 18
D25 A25 PEG_TX#_0 C782 0.22u_10V_X5R_04
D 18 PEG_RX#0 PEG_RXN[0] PEG_TXN[0] PEG_TX#0 18 D
E24 B24 PEG_TX_1 C788 0.22u_10V_X5R_04
18 PEG_RX1 PEG_RXP[1] PEG_TXP[1] PEG_TX1 18
F24 C24 PEG_TX#_1 C785 0.22u_10V_X5R_04
18 PEG_RX#1 PEG_RXN[1] PEG_TXN[1] PEG_TX#1 18
E23 B23 PEG_TX_2 C779 0.22u_10V_X5R_04
18 PEG_RX2 PEG_RXP[2] PEG_TXP[2] PEG_TX2 18
D23 A23 PEG_TX#_2 C778 0.22u_10V_X5R_04
18 PEG_RX#2 PEG_RXN[2] PEG_TXN[2] PEG_TX#2 18
E22 B22 PEG_TX_3 C781 0.22u_10V_X5R_04
18 PEG_RX3 PEG_RXP[3] PEG_TXP[3] PEG_TX3 18
F22 C22 PEG_TX#_3 C780 0.22u_10V_X5R_04
18 PEG_RX#3 PEG_RXN[3] PEG_TXN[3] PEG_TX#3 18
E21 B21 PEG_TX_4 C775 0.22u_10V_X5R_04
18 PEG_RX4 PEG_RXP[4] PEG_TXP[4] PEG_TX4 18
D21 A21 PEG_TX#_4 C764 0.22u_10V_X5R_04
18 PEG_RX#4 PEG_RXN[4] PEG_TXN[4] PEG_TX#4 18
E20 B20 PEG_TX_5 C777 0.22u_10V_X5R_04
18 PEG_RX5 PEG_RXP[5] PEG_TXP[5] PEG_TX5 18
F20 C20 PEG_TX#_5 C776 0.22u_10V_X5R_04
18 PEG_RX#5 PEG_RXN[5] PEG_TXN[5] PEG_TX#5 18
E19 B19 PEG_TX_6 C761 0.22u_10V_X5R_04
18 PEG_RX6 PEG_RXP[6] PEG_TXP[6] PEG_TX6 18

B.Schematic Diagrams
D19 A19 PEG_TX#_6 C760 0.22u_10V_X5R_04
18 PEG_RX#6 PEG_RXN[6] PEG_TXN[6] PEG_TX#6 18
E18 B18 PEG_TX_7 C763 0.22u_10V_X5R_04
18 PEG_RX7 PEG_RXP[7] PEG_TXP[7] PEG_TX7 18
F18 C18 PEG_TX#_7 C762 0.22u_10V_X5R_04
18 PEG_RX#7 PEG_RXN[7] PEG_TXN[7] PEG_TX#7 18
D17 A17 PEG_TX_8 C756 0.22u_10V_X5R_04
18 PEG_RX8 PEG_RXP[8] PEG_TXP[8] PEG_TX8 18
E17 B17 PEG_TX#_8 C753 0.22u_10V_X5R_04
18 PEG_RX#8 PEG_RXN[8] PEG_TXN[8] PEG_TX#8 18
F16 C16 PEG_TX_9 C759 0.22u_10V_X5R_04
18 PEG_RX9 PEG_RXP[9] PEG_TXP[9] PEG_TX9 18
E16 B16 PEG_TX#_9 C757 0.22u_10V_X5R_04
18 PEG_RX#9 PEG_RXN[9] PEG_TXN[9] PEG_TX#9 18
D15 A15 PEG_TX_10 C750 0.22u_10V_X5R_04
C 18 PEG_RX10 PEG_RXP[10] PEG_TXP[10] PEG_TX10 18 C
E15 B15 PEG_TX#_10 C748 0.22u_10V_X5R_04
18 PEG_RX#10 PEG_RXN[10] PEG_TXN[10] PEG_TX#10 18
F14 C14 PEG_TX_11 C752 0.22u_10V_X5R_04
18 PEG_RX11 PEG_RXP[11] PEG_TXP[11] PEG_TX11 18
E14 B14 PEG_TX#_11 C751 0.22u_10V_X5R_04
18 PEG_RX#11 PEG_RXN[11] PEG_TXN[11] PEG_TX#11 18

18 PEG_RX12
18 PEG_RX#12
D13
E13 PEG_RXP[12]
PEG_RXN[12]
PEG_TXP[12]
PEG_TXN[12]
A13
B13
PEG_TX_12
PEG_TX#_12

PEG_TX_13
C745
C744
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX12 18
PEG_TX#12 18 Sheet 2 of 79
18 PEG_RX13 F12 C12 C747 0.22u_10V_X5R_04

Processor 1/7
PEG_RXP[13] PEG_TXP[13] PEG_TX#_13 PEG_TX13 18
18 PEG_RX#13 E12 B12 C746 0.22u_10V_X5R_04
PEG_RXN[13] PEG_TXN[13] PEG_TX#13 18
D11 A11 PEG_TX_14 C738 0.22u_10V_X5R_04
18 PEG_RX14 PEG_RXP[14] PEG_TXP[14] PEG_TX14 18
E11 B11 PEG_TX#_14 C737 0.22u_10V_X5R_04
18 PEG_RX#14 PEG_RXN[14] PEG_TXN[14] PEG_TX#14 18

VCCIO F10 C10 PEG_TX_15 C743 0.22u_10V_X5R_04


18 PEG_RX15 PEG_RXP[15] PEG_TXP[15] PEG_TX15 18
E10 B10 PEG_TX#_15 C740 0.22u_10V_X5R_04
18 PEG_RX#15 PEG_RXN[15] PEG_TXN[15] PEG_TX#15 18
R591
PEG_COMP G2
PEG_RCOMP
24.9_1%_04

D8 B8
33 DMI_IT_MR_0_DP DMI_RXP[0] DMI_TXP[0] DMI_MT_IR_0_DP 33
E8 A8
33 DMI_IT_MR_0_DN DMI_RXN[0] DMI_TXN[0] DMI_MT_IR_0_DN 33
E6 C6
33 DMI_IT_MR_1_DP DMI_RXP[1] DMI_TXP[1] DMI_MT_IR_1_DP 33
F6 B6
33 DMI_IT_MR_1_DN DMI_RXN[1] DMI_TXN[1] DMI_MT_IR_1_DN 33
B B
D5 B5
33 DMI_IT_MR_2_DP DMI_RXP[2] DMI_TXP[2] DMI_MT_IR_2_DP 33
E5 A5
33 DMI_IT_MR_2_DN DMI_RXN[2] DMI_TXN[2] DMI_MT_IR_2_DN 33
J8 D4
33 DMI_IT_MR_3_DP DMI_RXP[3] DMI_TXP[3] DMI_MT_IR_3_DP 33
J9 B4
33 DMI_IT_MR_3_DN DMI_RXN[3] DMI_TXN[3] DMI_MT_IR_3_DN 33

3 OF 14
SKL_H_BGA_BGA
REV = 1 ?

3.3V
PLACE NEAR CPU
2

RT1
TH05-3H103FR
P/N 6-17-10320-731
1

A THERM_VOLT 48 A

R347
10K_1%_04

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Title
[02] Processor 1/7-DMI/PEG
3.3V 13,30,41,42,43,44,49,51,52,54,55,58,59,60
Size Document Number Rev
VCCIO 3,5,7,55 A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 2 of 79


5 4 3 2 1

Processor 1/7 B - 3
Schematic Diagrams

Processor 2/7
5 4 3 2 1

?
SKYLAKE_HALO
U113D
BGA1440
K36 D29 IEDP_TXP_0
D K37 DDI1_TXP[0] EDP_TXP[0] E29 IEDP_TXN_0 D
J35 DDI1_TXN[0] EDP_TXN[0] F28 IEDP_TXP_1
J34 DDI1_TXP[1] EDP_TXP[1] E28 IEDP_TXN_1
H37 DDI1_TXN[1] EDP_TXN[1] B29 IEDP_TXN_2
H36 DDI1_TXP[2] EDP_TXN[2] A29 IEDP_TXP_2
J37 DDI1_TXN[2] EDP_TXP[2] B28 IEDP_TXN_3
J38 DDI1_TXP[3] EDP_TXN[3] C28 IEDP_TXP_3
DDI1_TXN[3] EDP_TXP[3]
D27 C26 IEDP_AUXP
E27 DDI1_AUXP EDP_AUXP B26 IEDP_AUXN
DDI1_AUXN EDP_AUXN
H34
H33 DDI2_TXP[0]
F37 DDI2_TXN[0] A33 EDP_DISP_UTIL
DDI2_TXP[1] EDP_DISP_UTIL VCCIO
G38
F34 DDI2_TXN[1]
B.Schematic Diagrams

F35 DDI2_TXP[2] D37 EDP_RCOMP R187 24.9_1%_04


E37 DDI2_TXN[2] EDP_RCOMP
E36 DDI2_TXP[3]
Width = 20mil CLOSE TO CPU
DDI2_TXN[3]
Space = 25mil
F26 lengh = 100mil(max)
E26 DDI2_AUXP
DDI2_AUXN
C34
D34 DDI3_TXP[0]

Sheet 3 of 79 B36
B34
F33
DDI3_TXN[0]
DDI3_TXP[1]
DDI3_TXN[1]
3.3VS

E33 DDI3_TXP[2]

Processor 2/7 C
C33
B33
DDI3_TXN[2]
DDI3_TXP[3]
DDI3_TXN[3] G27
L : Normal (DEFAULT)
H: Chip power down
R1816
10K_04
C

PROC_AUDIO_CLK AUD_AZACPU_SCLK 35
A27 G25 AUD_AZACPU_SDO_R 35
B27 DDI3_AUXP PROC_AUDIO_SDI G29 PS8331_PD
DDI3_AUXN PROC_AUDIO_SDO
4 OF 14 AUD_AZACPU_SDI_R

D
R183 20_1%_04 3.3VS
AUD_AZACPU_SDI 35 R1817
REV = 1
SKL_H_BGA_BGA CLOSE TO CPU GPIO17_IFPD_HPD_R
? EDP_HPD R810 *100K_04
499_1%_04 G
Q57

S
2SK3018S3
C1720 3.3VS

U115 1u_6.3V_X5R_04 PS8331_IN1_AEQ# R812 *4.7K_04

PS8331B 5*9mm PS8331_IN2_AEQ# R815 *4.7K_04

IEDP_TXP_0 C1034 0.1u_10V_X7R_04 IEDP_TXP_0_R 1 60 3.3VS


IN1_D0P VDD3 3.3VS
IEDP_TXN_0 C1033 0.1u_10V_X7R_04 IEDP_TXN_0_R 2 59 PS8331_IN1_AEQ#
IN1_D0N IN1_AEQ# PS8331_IN1_PEQ# R826 *4.7K_04
3 58 PS8331_IN2_AEQ#
36 IEDP_HPD IEDP_TXP_1 IEDP_TXP_1_R IN1_HPD IN2_AEQ#
C1031 0.1u_10V_X7R_04 4 57 R825 *4.7K_04
IEDP_TXN_1 C1029 0.1u_10V_X7R_04 IEDP_TXN_1_R 5 IN1_D1P GND 56 PS8331_PI0 L :PORT1 (INTEL) (DEFAULT)
INTEL EDP IEDP_TXP_2 C1028 0.1u_10V_X7R_04 IEDP_TXP_2_R 6 IN1_D1N PI0 55 PS8331_PC1 H: PORT2 (NV)
IEDP_TXN_2 C1026 0.1u_10V_X7R_04 IEDP_TXN_2_R 7 IN1_D2P PC1 54 PS8331_SW 3.3VS
IN1_D2N SW PS8331_SW 13,30,36,51
8 53 PS8331_IN2_PEQ#
IEDP_TXP_3 GND I2C_CTL_EN R827 *4.7K_04
C1032 0.1u_10V_X7R_04 IEDP_TXP_3_R 9 52 PS8331_IN1_PEQ#
IEDP_TXN_3 C1027 0.1u_10V_X7R_04 IEDP_TXN_3_R 10 IN1_D3P IN1_PEQ/SDA_CTL 51 PS8331_IN2_PEQ# R828 *4.7K_04
11 IN1_D3N IN2_PEQ/SCL_CTL
B 29 DEDP_D0 IN2_D0P PS8331_PD B
DP_D 12 50
29 DEDP_D#0 DEDP_HPD IN2_D0N PD
R831 *0_04 13 49
30 GPIO17_IFPD_HPD_R
14 IN2_HPD VDD3 48 PS8331_CA_DET
3.3VS NEAR PIN 3.3VS
29 DEDP_D1 IN2_D1P CA_DET PS8331_CEXT PS8331_PI0
15 47 C1040 2.2u_6.3V_X5R_04 R816 *4.7K_04
Q55 29 DEDP_D#1 IN2_D1N CEXT
R834 16 46
100K_04 E 2N3904 C
NV EDP 29 DEDP_D2
17 IN2_D2P OUT_D0P 45
DP_TXP0 13 R817 *4.7K_04
29 DEDP_D#2 IN2_D2N OUT_D0N EDP_HPD DP_TXN0 13
18 44 EDP_HPD 13
19 GND OUT_HPD 43
29 DEDP_D3 IN2_D3P OUT_D1P DP_TXP1 13 D01A 3.3VS
20 42
29 DEDP_D#3 DP_TXN1 13
B

IN2_D3N OUT_D1N 41 EDP


GND PS8331_PC0 R818 *4.7K_04
3.3VS 21 40
R833 1K_04 VDD3 OUT_D2P DP_TXP2 13
18,30 GPU_PEX_RST# 22 39 R819 *4.7K_04
IN1_SDA OUT_D2N PS8331_PC0 DP_TXN2 13
23 38
3V3_AON R832 *0_04 IN1_SCL PC0
24 37
IN2_SDA OUT_D3P DP_TXP3 13 3.3VS
25 36
IN2_SCL OUT_D3N DP_TXN3 13
C1041 3.3VS 26
VDD3 VDD3
35 3.3VS NEAR PIN PS8331_PC1 R820 *4.7K_04
IEDP_AUXN C1030 0.1u_10V_X7R_04 IEDP_AUXN_R 27 34 PS8331_REXT R824 4.99K_1%_04
0.1u_10V_X7R_04 IEDP_AUXP C1025 0.1u_10V_X7R_04 IEDP_AUXP_R 28 IN1_AUXN REXT 33 R821 *4.7K_04
29 IN1_AUXP GND 32
29 DEDP_D_AUX# IN2_AUXN OUT_AUXP_SCL DP_AUX 13
29 DEDP_D_AUX
30
IN2_AUXP OUT_AUXN_SDA
31
DP_AUX# 13D01A
EDP L :PORT1 (INTEL)
3.3VS
H: PORT2 (NV) (DEFAULT)
100K_04 R1818 3.3VS PS8331_SW
61 R822 *4.7K_04
THERMAL_PAD 100K_04 R1819
R823 *4.7K_04
PS8331BQFN60GTR-A1
QFN60-5X9MM

NEAR PIN
A
3.3VS 3.3VS 3.3VS PS8331_CA_DET R830 1M_04 A
3.3VS 3.3VS

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C1037 C1036 C1035 C1039 C1038
0.1u_10V_X7R_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04
PIN21 PIN26 PIN35 PIN49 PIN60 Title
[03] Processor 2/7-DISPLAY
3V3_AON 18,30,31,58
VCCIO 2,5,7,55 Size Document Number Rev
3.3VS 9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 3 of 79


5 4 3 2 1

B - 4 Processor 2/7
Schematic Diagrams

Processor 3/7
5 4 3 2 1

M_A_DQ[63:0] 9,10
?
SKYLAKE_HALO
U113B
11,12 M_B_DQ[63:0]
?
SKYLAKE_HALO BGA1440
U113A M_B_DQ0 BT11 AM9
BGA1440
M_B_DQ1 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] M_B_CLK_DDR0 11
M_A_DQ0 BR11 AN9
BR6 AG1 M_B_DQ2 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] M_B_CLK_DDR#0 11
M_A_DQ1 DDR0_DQ[0] DDR0_CKP[0] M_A_CLK_DDR0 9 BT8 AM8
BT6 AG2 M_B_DQ3 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] M_B_CLK_DDR#1 11
M_A_DQ2 DDR0_DQ[1] DDR0_CKN[0] M_A_CLK_DDR#0 9 BR8 AM7
BP3 AK1 M_B_DQ4 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_B_CLK_DDR1 11
M_A_DQ3 DDR0_DQ[2] DDR0_CKN[1] M_A_CLK_DDR#1 9 BP11 AM11
BR3 AK2 M_B_DQ5 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2] M_B_CLK_DDR2 12
M_A_DQ4 DDR0_DQ[3] DDR0_CKP[1] M_A_CLK_DDR1 9 BN11 AM10
BN5 AL3 M_B_DQ6 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2] M_B_CLK_DDR#2 12
M_A_DQ5 DDR0_DQ[4] DDR0_CLKP[2] M_A_CLK_DDR2 10 BP8 AJ10
BP6 AK3 M_B_DQ7 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] M_B_CLK_DDR3 12
M_A_DQ6 DDR0_DQ[5] DDR0_CLKN[2] M_A_CLK_DDR#2 10 BN8 AJ11
BP2 AL2 M_B_DQ8 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3] M_B_CLK_DDR#3 12
M_A_DQ7 DDR0_DQ[6] DDR0_CLKP[3] M_A_CLK_DDR3 10 BL12
BN3 AL1 M_B_DQ9 DDR1_DQ[8]/DDR0_DQ[24]
D M_A_DQ8 DDR0_DQ[7] DDR0_CLKN[3] M_A_CLK_DDR#3 10 BL11 AT8 D
BL4 M_B_DQ10 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] M_B_CKE0 11
M_A_DQ9 DDR0_DQ[8] BL8 AT10
BL5 AT1 M_B_DQ11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] M_B_CKE1 11
M_A_DQ10 DDR0_DQ[9] DDR0_CKE[0] M_A_CKE0 9 BJ8 AT7
BL2 AT2 M_B_DQ12 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] M_B_CKE2 12
M_A_DQ11 DDR0_DQ[10] DDR0_CKE[1] M_A_CKE1 9 BJ11 AT11
BM1 AT3 M_B_DQ13 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3] M_B_CKE3 12
M_A_DQ12 DDR0_DQ[11] DDR0_CKE[2] M_A_CKE2 10 BJ10
BK4 AT5 M_B_DQ14 DDR1_DQ[13]/DDR0_DQ[29]
M_A_DQ13 DDR0_DQ[12] DDR0_CKE[3] M_A_CKE3 10 BL7 AF11
BK5 M_B_DQ15 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] M_B_CS#0 11
M_A_DQ14 DDR0_DQ[13] BJ7 AE7
BK1 AD5 M_B_DQ16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] M_B_CS#1 11
M_A_DQ15 DDR0_DQ[14] DDR0_CS#[0] M_A_CS#0 9 BG11 AF10
BK2 AE2 M_B_DQ17 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] M_B_CS#2 12
M_A_DQ16 DDR0_DQ[15] DDR0_CS#[1] M_A_CS#1 9 BG10 AE10
BG4 AD2 M_B_DQ18 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3] M_B_CS#3 12
M_A_DQ17 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] M_A_CS#2 10 BG8
BG5 AE5 M_B_DQ19 DDR1_DQ[18]/DDR0_DQ[50]
M_A_DQ18 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] M_A_CS#3 10 BF8 AF7
BF4 M_B_DQ20 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_B_ODT0 11
M_A_DQ19 DDR0_DQ[18]/DDR0_DQ[34] BF11 AE8
BF5 AD3 M_B_DQ21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] M_B_ODT1 11
M_A_DQ20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_A_ODT0 9 BF10 AE9
BG2 AE4 M_B_DQ22 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] M_B_ODT2 12
M_A_DQ21 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] M_A_ODT1 9 BG7 AE11
BG1 AE1 M_B_DQ23 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3] M_B_ODT3 12
M_A_DQ22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] M_A_ODT2 10 BF7
BF1 AD4 M_B_DQ24 DDR1_DQ[23]/DDR0_DQ[55]
M_A_DQ23 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] M_A_ODT3 10 BB11 AH10
BF2 M_B_DQ25 DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] M_B_RAS# 11,12
M_A_DQ24 DDR0_DQ[23]/DDR0_DQ[39] BC11 AH11
BD2 AH5 M_B_DQ26 DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_W E# 11,12
DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_BA0 9,10 D02 BB8 AF8

B.Schematic Diagrams
M_A_DQ25 BD1 AH1 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] M_B_CAS# 11,12
DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BA1 9,10 M_B_DQ27 BC8
M_A_DQ26 BC4 AU1 DDR1_DQ[27]/DDR0_DQ[59]
DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BG0 9,10 M_B_DQ28 BC10 AH8 D02
M_A_DQ27 BC5 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BA0 11,12
DDR0_DQ[27]/DDR0_DQ[43] M_B_DQ29 BB10 AH9
M_A_DQ28 BD5 AH4 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BA1 11,12
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_A_RAS# 9,10 M_B_DQ30 BC7 AR9
M_A_DQ29 BD4 AG4 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 11,12
DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_W E# 9,10 M_B_DQ31 BB7
M_A_DQ30 BC1 AD1 DDR1_DQ[31]/DDR0_DQ[63]
DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_CAS# 9,10 M_B_DQ32 AA11 AJ9
M_A_DQ31 BC2 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A0 11,12
DDR0_DQ[31]/DDR0_DQ[47] M_B_DQ33 AA10 AK6
M_A_DQ32 AB1 AH3 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] M_B_A1 11,12
DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_A0 9,10 M_B_DQ34 AC11 AK5
M_A_DQ33 AB2 AP4 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] M_B_A2 11,12
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] M_A_A1 9,10 M_B_DQ35 AC10 AL5
M_A_DQ34 AA4 AN4 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] M_B_A3 11,12
DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] M_A_A2 9,10 M_B_DQ36 AA7 AL6
M_A_DQ35 AA5 AP5 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] M_B_A4 11,12
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] M_A_A3 9,10 M_B_DQ37 AA8 AM6
M_A_DQ36 AB5 AP2 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A5 11,12
C DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_A_A4 9,10 M_B_DQ38 AC8 AN7 C
M_A_DQ37

Sheet 4 of 79
AB4 AP1 M_B_DQ39 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] M_B_A6 11,12
M_A_DQ38 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_A_A5 9,10 AC7 AN10
AA2 AP3 M_B_DQ40 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] M_B_A7 11,12
M_A_DQ39 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] M_A_A6 9,10 W8 AN8
AA1 AN1 M_B_DQ41 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] M_B_A8 11,12
M_A_DQ40 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] M_A_A7 9,10 W7 AR11
V5 AN3 M_B_DQ42 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] M_B_A9 11,12
DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] M_A_A8 9,10 V10 AH7

Processor 3/7
M_A_DQ41 V2 AT4 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] M_B_A10 11,12
DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] M_A_A9 9,10 M_B_DQ43 V11 AN11
M_A_DQ42 U1 AH2 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] M_B_A11 11,12
DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] M_A_A10 9,10 M_B_DQ44 W11 AR10
M_A_DQ43 U2 AN2 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_A12 11,12
DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_A_A11 9,10 M_B_DQ45 W10 AF9
M_A_DQ44 V1 AU4 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] M_B_A13 11,12
DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] M_A_A12 9,10 M_B_DQ46 V7 AR7
M_A_DQ45 V4 AE3 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 11,12
DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] M_A_A13 9,10 M_B_DQ47 V8 AT9
M_A_DQ46 U5 AU2 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_ACT# 11,12
DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 9,10 D02 M_B_DQ48 R11
M_A_DQ47 U4 AU3 DDR1_DQ[48]
DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_ACT# 9,10 M_B_DQ49 P11 AJ7
M_A_DQ48 R2 DDR1_DQ[49] DDR1_PAR DDR1_B_PARITY 11,12
DDR0_DQ[48]/DDR1_DQ[32] M_B_DQ50 P7 AR8
M_A_DQ49 P5 AG3 D02 DDR1_DQ[50] DDR1_ALERT# DDR1_B_ALERT# 11,12
DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR DDR0_A_PARITY 9,10 M_B_DQ51 R8
M_A_DQ50 R4 AU5 DDR1_DQ[51]
DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR0_A_ALERT# 9,10 M_B_DQ52 R10
M_A_DQ51 P4 DDR1_DQ[52] M_B_DQS#[3:0] 11,12
DDR0_DQ[51]/DDR1_DQ[35] M_B_DQ53 P10 BP9 M_B_DQS#0
M_A_DQ52 R5 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2]
DDR0_DQ[52]/DDR1_DQ[36] M_A_DQS#[3:0] 9,10 M_B_DQ54 R7 BL9 M_B_DQS#1
M_A_DQ53 P2 BR5 M_A_DQS#0 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3]
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] M_B_DQ55 P8 BG9 M_B_DQS#2
M_A_DQ54 R1 BL3 M_A_DQS#1 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6]
DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] M_B_DQ56 L11 BC9 M_B_DQS#3
M_A_DQ55 P1 BG3 M_A_DQS#2 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] M_B_DQS#[7:4] 11,12
DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] M_B_DQ57 M11 AC9 M_B_DQS#4
M_A_DQ56 M4 BD3 M_A_DQS#3 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2]
DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQS[7:4] 9,10 M_B_DQ58 L7 W9 M_B_DQS#5
M_A_DQ57 M1 AB3 M_A_DQS4 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3]
DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] M_B_DQ59 M8 R9 M_B_DQS#6
M_A_DQ58 L4 V3 M_A_DQS5 DDR1_DQ[59] DDR1_DQSN[6]
DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] M_B_DQ60 L10 M9 M_B_DQS#7
M_A_DQ59 L2 R3 M_A_DQS6 DDR1_DQ[60] DDR1_DQSN[7]
DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] M_B_DQ61 M10
M_A_DQ60 M5 M3 M_A_DQS7 DDR1_DQ[61] M_B_DQS[3:0] 11,12
DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQ62 M7 BR9 M_B_DQS0
M_A_DQ61 M2 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2]
DDR0_DQ[61]/DDR1_DQ[45] M_A_DQS[3:0] 9,10 M_B_DQ63 L8 BJ9 M_B_DQS1
M_A_DQ62 L5 BP5 M_A_DQS0 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] BF9 M_B_DQS2
M_A_DQ63 L1 BK3 M_A_DQS1 DDR1_DQSP[2]/DDR0_DQSP[6]
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] M_B_CB0 AW11 BB9 M_B_DQS3
BF3 M_A_DQS2 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQS[7:4] 11,12
DDR0_DQSP[2]/DDR0_DQSP[4] M_B_CB1 AY11 AA9 M_B_DQS4
B M_A_CB0 BA2 BC3 M_A_DQS3 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] B
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQS#[7:4] 9,10 M_B_CB2 AY8 V9 M_B_DQS5
M_A_CB1 BA1 AA3 M_A_DQS#4 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] M_B_CB3 AW8 P9 M_B_DQS6
M_A_CB2 AY4 U3 M_A_DQS#5 DDR1_ECC[3] DDR1_DQSP[6]
DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] M_B_CB4 AY10 L9 M_B_DQS7
M_A_CB3 AY5 P3 M_A_DQS#6 DDR1_ECC[4] DDR1_DQSP[7]
DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] M_B_CB5 AW10
M_A_CB4 BA5 L3 M_A_DQS#7 DDR1_ECC[5]
DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5] M_B_CB6 AY7 AW9
M_A_CB5 BA4 DDR1_ECC[6] DDR1_DQSP[8]
DDR0_ECC[5] M_B_CB7 AW7 AY9
M_A_CB6 AY1 AY3 DDR1_ECC[7] DDR1_DQSN[8]
M_A_CB7 AY2 DDR0_ECC[6] DDR0_DQSP[8] BA3
DDR0_ECC[7] DDR0_DQSN[8]
DDR CHANNEL B
CLOSE TO CPU
D02
R589 121_1%_04 DDR_RCOMP0 G1 BN13
DDR_RCOMP1 H1 DDR_RCOMP[0] DDR_VREF_CA DIMM_CA_CPU_VREF_A 9
R594 75_1%_04 BP13 DIMM_DQ_CPU_VREF_A
DDR CHANNEL A
R597 100_1%_04 DDR_RCOMP2 J2 DDR_RCOMP[1] DDR0_VREF_DQ BR13
D03
DDR_RCOMP[2] 2 OF 14 DDR1_VREF_DQ DIMM_DQ_CPU_VREF_B 11
1 OF 14 REV = 1
SKL_H_BGA_BGA
?
REV = 1
SKL_H_BGA_BGA
?

D03

DEL

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[04] Processor 3/7-DDR3L
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 4 of 79


5 4 3 2 1

Processor 3/7 B - 5
Schematic Diagrams

Processor 4/7
5 4 3 2 1

NEAR CPU Ʉ CFG[0]: Stall reset sequence after PCU


PLL lock until de-asserted:
1.0V_VCCST — 1 = (Default) Normal Operation;
VCCIO No stall.
— 0 = Stall.
U113E
?
SKYLAKE_HALO
CFG9
R781
*1K_04 Ʉ CFG[1]: Reserved configuration lane.
Ʉ CFG[2]: PCI Express* Static x16 Lane
BGA1440 Numbering Reversal.
R322 R330 37 PCH_CPU_BCLK_R_DP B31 BN25 CFG0 R323 *1K_04
A32 BCLKP CFG[0] BN27 CFG1 R767 *1K_04 — 1 = Normal operation
100_04 56.2_1%_04 37 PCH_CPU_BCLK_R_DN BCLKN CFG[1] BN26 CFG2 R325 *1K_04 — 0 = Lane numbers reversed.
CFG[2]
D 37 PCH_CPU_PCIBCLK_R_DP D35
PCI_BCLKP CFG[3]
BN28 CFG3 R768 *1K_04 Ʉ CFG[3]: Reserved configuration lane. D
37 PCH_CPU_PCIBCLK_R_DN C36
PCI_BCLKN CFG[4]
BR20 CFG4 R784 1K_04 Ʉ CFG[4]: eDP enable:
BM20 CFG5 R326 *1K_04 — 1 = Disabled.
61,63 H_CPU_SVIDDAT CFG[5]
37 CPU_24MHZ_R_DP E31 BT20 CFG6 R775 *1K_04 — 0 = Enabled.
61,63 H_CPU_SVIDALRT# CLK24P CFG[6]
D31 BP20 CFG7 R766 *1K_04
61,63 H_CPU_SVIDCLK 37 CPU_24MHZ_R_DN CLK24N CFG[7] BR23 CFG8 R761 *1K_04
Ʉ CFG[6:5]: PCI Express* Bifurcation
R324 CFG[8] BR22 CFG9 R774 *1K_04
— 00 = 1 x8, 2 x4 PCI Express*
CFG[9] BT23 CFG10 R776 *1K_04 — 01 = reserved
220_04 CFG[10] — 10 = 2 x8 PCI Express*
BT22 CFG11 R759 *1K_04
CFG[11] BM19 CFG12 R327 *1K_04 — 11 = 1 x16 PCI Express*
CFG[12] BR19 CFG13 R765 *1K_04 Ʉ CFG[7]: PEG Training:
CFG[13] BP19 CFG14 R782 *1K_04 — 1 = (default) PEG Train
CPU_VIDALERT_N BH31 CFG[14] BT19 CFG15 R783 *1K_04
VIDALERT# CFG[15]
immediately following RESET# de
BH32 assertion.
BH29 VIDSCK BN23
VIDSOUT CFG[17] — 0 = PEG Wait for BIOS for
H_PROCHOT# R770 499_1%_04 H_PROCHOT#_R BR30 BP23 Del test point D01A
56,61,63 H_PROCHOT# PROCHOT# CFG[16] training.
BP22
Ʉ CFG[19:8]: Reserved configuration
B.Schematic Diagrams

D01A R779 *0402_short BT13 CFG[19] BN22


52 DDR_VTT_PG_CTRL DDR_VTT_CNTL CFG[18] lanes.
R780 *10K_04 BR27 SKL_XDP_MBP_0
3.3VA BPM#[0] BT27 SKL_XDP_MBP_1
BPM#[1] BM31 SKL_MBP_2
VCCST_PW RGD R182 60.4_1%_04 VCCST_PW RGD_CPU H13 BPM#[2] BT30 SKL_MBP_3
VCCST_PWRGD BPM#[3]

35 H_PW RGD BT31


PROCPWRGD H_TDO

Sheet 5 of 79 34 PLTRST_CPU_N BP35 BT28


BM34 RESET# PROC_TDO BL32
34 H_PM_SYNC PM_SYNC PROC_TDI 1.0V_VCCST
R771 20_1%_04 H_PM_DOW N_R BP31 BP28 Del test point D01A
34 H_PM_DOW N H_PECI_R PM_DOWN PROC_TMS H_TCK
R159 *12.1_1%_04 BT34 BR28
34 PCH_PECI PECI PROC_TCK

Processor 4/7 C D01AR762 *0402_short J31 H_TDO R788 51_04 C


TO EC 48 H_PECI THERMTRIP# BP30 H_TRST#
34 PCH_THERMTRIP# PROC_TRST# H_TRST# 40
H_SKTOCC_N BR33 BL30 H_PREQ# H_TCK R348 51_04
36 H_SKTOCC_N SKTOCC# PROC_PREQ# H_PREQ# 40
R758 *0_04 BN1 BP27 H_PRDY#
PROC_SELECT# PROC_PRDY# H_PRDY# 40
FLOAT FOR SKL BM30
GND FOR CNL D01A Del test point CATERR# BT25 CFG_RCOMP
CFG_RCOMP 3.3VA

H_SKTOCC_N R772 100K_04


5 OF 14 R786

SKL_H_BGA_BGA REV = 1 49.9_1%_04


?

VCCST_PWRGD 1.0V_VCCST

VDD3 R188
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
1K_04

VCCST_PW RGD
1: (DEFAULT)NORMAL OPERATION;
R174
LANE# DEFINITION MATCHES
100K_04 CFG2 SOCKET PIN MAP DEFINITION

3
D 0: LANE REVERSAL
B C353 B
5 G *0.01u_16V_X7R_04
S Q9B

4
MTDK5S6R DISPLAY PORT PRESENCE STRAP
6

D01A D

R1859 0_04 2 G 1: DISABLED;


13,40,48,61,63 ALL_SYS_PW RGD S Q9A
NO PHYSICAL DISPLAY PORT ATTACHED
1

MTDK5S6R
C1735 TO EMBEDDED DISPLAY PORT
*0.1u_10V_X7R_04 0: ENABLED;
CFG4 AN EXTERNAL DISPLAY
IS CONNECTED TO THE
PORT DEVICE
EMBEDDED
DISPLAY PORT
PCIE PORT BIFURCATION STRAPS

11: (Default) x16 - Device 1 functions 1 and 2 disabled


10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
1.0DX_VCCSTG CFG[6:5] 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
H_PROCHOT# R362 1K_04

DEFENSIVE PULL DOWN SITE


D

Q27

A G C590 1: (Default) PEG Train immediately following xxRESETB de assertion A


48 H_PROCHOT_EC
2SK3018S3 CFG7 0: PEG Wait for BIOS for training
S

47P_50V_NPO_04
R368

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
100K_04 3.3VA 32,33,34,35,36,38,40,54 Title
CAD Note: Capacitor need to be placed
[05]Processor 4/7-CLK/JTAG/MISC
1.0DX_VCCSTG 7,56,57
close to buffer output pin 1.0V_VCCST 7,34,35,55,61,63 Size Document Number Rev
VDD3 30,32,35,38,40,44,48,50,51,53,54,55,56,57,58
VCCIO 2,3,7,55
A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 5 of 79


5 4 3 2 1

B - 6 Processor 4/7
Schematic Diagrams

Processor 5/7

5 4 3 2 1

VCORE VCORE +VCCEDRAM

PLACE CAPS AT BOARD EDGE


?
VCORE CPU_TOP_VCCCORE U113GSKYLAKE_HALO
C545 C544 ?
SKYLAKE_HALO
U113J
BGA1440

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06
őōłńņġłōōġŕʼnņġœņŔŊŔŕŐœŔġŊŏ
BGA1440
AA13 V32
C466 C960 C465 C460 AA31 VCC VCC V33 BJ17
C426 C383 AA32 VCC
VCC
VCC
VCC
V34 ŕʼnŊŔġőłňņġĮġŏņłœġńőŖ BJ19 VCCOPC
VCCOPC

22u_6.3V_X5R_08

22u_6.3V_X5R_08

22u_6.3V_X5R_08

22u_6.3V_X5R_08
+ + AA33 V35 BJ20
AA34 VCC VCC V36 BK17 VCCOPC
VCC VCC VCCOPC

*EEFCX0J221YR

*EEFCX0J221YR
AA35 V37 BK19
AA36 VCC VCC V38 BK20 VCCOPC
D VCORE D
AA37 VCC VCC W13 PLACE CAP BACKSIDE BL16 VCCOPC
AA38 VCC VCC W14 BL17 VCCOPC
AB29 VCC VCC W29 CPU_BACK_VCCEOPIO INTEL 㰺㍍ BL18 VCCOPC
AB30 VCC VCC W30 BL19 VCCOPC
VCC VCC +VCCEOPIO VCCEDRAM_ED2 VCCOPC
C903 C904 C849 C902 C848 C900 C901 C464 AB31 W31 BL20
AB32 VCC VCC W32 BL21 VCCOPC
VCC VCC VCCOPC
22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06
AB35 W35 BM17
AB36 VCC VCC W36 BN17 VCCOPC
VCC VCC C990 C991 VCCOPC
AB37 W37
AB38 VCC VCC W38 BJ23

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06
AC13 VCC VCC Y29 BJ26 RSVD
AC14 VCC VCC Y30 BJ27 RSVD
AC29 VCC VCC Y31 BK23 RSVD

B.Schematic Diagrams
AC30 VCC VCC Y32 BK26 RSVD
VCC VCC R316 RSVD
PLACE CAPS AT BACK AC31 Y33 BK27
AC32 VCC VCC Y34 *100_1%_04 BL23 RSVD
VCORE AC33 VCC VCC Y35 BL24 RSVD
CPU_BACK_VCCCORE VCC VCC RSVD
AC34 Y36 BL25
AC35 VCC VCC L14 BL26 RSVD
AC36 VCC VCC P29 BL27 RSVD
AD13 VCC VCC P30 BL28 RSVD
C855 C898 C899 C856 C410 C413 C428 C402 C440 C441 C442 C854 C897 C853 VCC VCC RSVD
AD14 P31 BM24
AD31 VCC VCC P32 RSVD
10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_04

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06
AD32 VCC VCC P33
AD33 VCC VCC P34 PLACE CAPS IN SOCKET EDGE TOP BL15
VCC VCC D01A Del test point BM16 VCCOPC_SENSE

Sheet 6 of 79
AD34 P35
AD35 VCC VCC P36 CPU_TOP_EDRAM_1P8 VSSOPC_SENSE
AD36 VCC VCC R13 R321 *100_1%_04 BL22
VCC VCC +V1.8S_EDRAM RSVD
C AD37 R31 R760 BM22 C
AD38 VCC VCC R32 RSVD

Processor 5/7
*0_04 +VCCEOPIO
AE13 VCC VCC R33 C558
VCC VCC
D03 㓡0603cost down D03 㓡0603cost down AE14
VCC VCC
R34 INTEL 㰺㍍ BP15
VCCEOPIO

*22u_6.3V_X5R_06
AE30 R35 BR15
AE31 VCC VCC R36 VCCEOPIO_ED2 BT15 VCCEOPIO
D03 VCC VCC VCCEOPIO
㓡footrpint AE32
VCC VCC
R37
AE35 R38 R778 *100_1%_04 BP16
AE36 VCC VCC T29 BR16 RSVD
AE37 VCC VCC T30 BT16 RSVD
AE38 VCC VCC T31 RSVD
AF35 VCC VCC T32
AF36 VCC VCC T35 BN15
AF37 VCC VCC T36 BM15 VCCEOPIO_SENSE
VCC VCC
D01A Del test point VSSEOPIO_SENSE
AF38 T37
K13 VCC VCC T38 R764 *100_1%_04 VCCEOPIO_SENSE_ED2 BP17
K14 VCC VCC U29 R340 VSS_EOPIO_ED2_SENSE BN16 RSVD
L13 VCC VCC U30 *0_04 RSVD
VCC VCC +V1.8S_EDRAM
N13 U31 +VCCEDRAM_FUSEPRG
N14 VCC VCC U32 INTEL 㰺㍍ BM14
N30 VCC VCC U33 BL14 VCC_OPC_1P8
VCC VCC VCC_EDRAM_FUSEPRG_ED2 V1.8S_EDRAM_ED2 VCC_OPC_1P8
N31 U34
N32 VCC VCC U35 R320 BJ35
N35 VCC VCC U36 *100_1%_04 BJ36 RSVD
VCORE VCC VCC RSVD
N36 V13
N37 VCC VCC V14
N38 VCC VCC V31 AT13
P13 VCC VCC P14 AW13 ZVM#
VCC VCC
D01A Del test point MSM#
B R303 *100_1%_04 AU13 B
D01A AY13 ZVM2#
C852 C847 C419 C407 C432 C409 C390 C434 C398 C391 C438 C439 C421 C846 C405 MSM2#
AG37
VCC_SENSE VCC_VCORE_SENSE 61 R769 CPU_EOPIO_RCOMP
AG38 BT29
1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

VSS_SENSE VSS_VCORE_SENSE 61 EDRAM_OPIO_RCOMP OPC_RCOMP


BR25
*49.9_1%_04 EDRAM_OPIO_RCOMP_ED2 OPCE_RCOMP
BP25
7 OF 14 OPCE_RCOMP2
R785
10 OF 14
SKL_H_BGA_BGA REV = 1 ?
*49.9_1%_04
SKL_H_BGA_BGA
REV = 1 ?
R787
VCC_VCORE_SENSE R753 VSS_VCORE_SENSE
*49.9_1%_04
*49.9_1%_04

C420 C412 C430 C395 C431 C437 C436 C435 C414 C433 C396 C399 C406 C384 C392
1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

A A

VCORE 61,62

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[06] Processor 5/7-POWER1
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 6 of 79


5 4 3 2 1

Processor 5/7 B - 7
Schematic Diagrams

Processor 6/7

5 4 3 2 1

PLACE CAP BACKSIDE


VCCSA VDDQ
VCCVDDQ_CLK 1.0V_VCCSFR 1.0V_VCCST

?
SKYLAKE_HALO
U113I C408 C385 C387
BGA1440

1u_6.3V_X5R_04

1u_6.3V_X5R_04
10u_6.3V_X5R_04
J30 AA6
VCCSA VDDQ ?
SKYLAKE_HALO
K29 AE12 U113K
K30 VCCSA VDDQ AF5
K31 VCCSA VDDQ AF6 BGA1440

K32 VCCSA VDDQ AG5 D1 BM33


D K33 VCCSA VDDQ AG9 E1 RSVD_TP RSVD_TP BL33 D
K34 VCCSA VDDQ AJ12 E3 RSVD_TP RSVD_TP
VCCSA VDDQ D03 RSVD_TP
K35 AL11 E2 BJ14
L31 VCCSA VDDQ AP6 㓡footrpint RSVD_TP RSVD_TP BJ13 D01A
L32 VCCSA VDDQ AP7 BR1 RSVD_TP
L35 VCCSA VDDQ AR12 BT2 RSVD_TP BK28 Del test point
VCCSA VDDQ 1.0DX_VCCSTG VCCSFR_OC RSVD_TP RSVD
L36 AR6 BJ28
L37 VCCSA VDDQ AT12 D01A BN35 RSVD
L38 VCCSA VDDQ AW6 RSVD BJ18
M29 VCCSA VDDQ AY6
C381 C401 C549 C542 Del test point J24 VSS
M30 VCCSA VDDQ J5 H24 RSVD BJ16

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04
B.Schematic Diagrams

M31 VCCSA VDDQ J6 BN33 RSVD RSVD_TP BK16


M32 VCCSA VDDQ K12 BL34 RSVD RSVD_TP
M33 VCCSA VDDQ K6 RSVD
M34 VCCSA VDDQ L12 N29 BK24
M35 VCCSA VDDQ L6 R14 RSVD RSVD_TP BJ24 D01A
VCCIO VCCSA VDDQ RSVD RSVD_TP
M36 R6 AE29
VCCSA VDDQ T6 AA14 RSVD BK21
VDDQ W6 VCCVDDQ_CLK RSVD RSVD BJ21 Del test point
AG12 VDDQ D01A R575 *0402_short A36 RSVD
VCCIO VCCSFR_OC RSVD
G15 Y12 A37 BT17
G17 VCCIO VDDQC RSVD RSVD BR17
G19 VCCIO BH13 H23 RSVD
VCCIO VCCPLL_OC 40 PCH_2_CPU_TRIGGER PROC_TRIGIN
G21 G11 R186 30.1_1%_04 CPU_2_PCH_TRIGGER_R J23 BK18

Sheet 7 of 79 H15
H16
H17
VCCIO
VCCIO
VCCIO
VCCPLL_OC

H30
1.0V_VCCST
1.0DX_VCCSTG VCCFUSEPRG
40 CPU_2_PCH_TRIGGER
R184
R185
*0_04
*0_04
TP_SKL_F30
TP_SKL_E30
F30
E30
PROC_TRIGOUT

RSVD
VSS

RSVD_TP
BJ34
BJ33
H19 VCCIO VCCST RSVD RSVD_TP

Processor 6/7 C
H20
H21
H26
VCCIO
VCCIO
VCCIO
VCCSTG
H29

G30
R241
NEAR TO CPU PIN
*28mil short-p
D01A

1.0V_VCCSFR
B30
C30 RSVD
RSVD G13
C

H27 VCCIO VCCSTG G3 RSVD AJ8


J15 VCCIO H28 VCCIO J3 RSVD RSVD BL31 D01A
J16 VCCIO VCCPLL J28 D01A RSVD RSVD
J17 VCCIO VCCPLL AROUND_CPU Del test point B2 Del test point
VCCIO R1825 NCTF
J19 B38
J20 VCCIO M38 NCTF BP1
VCCIO VCCSA_SENSE VCCSA_SENSE 61 100_1%_04 VCCVDDQ_CLK VDDQ NCTF
J21 M37 BR35 BR2
VCCIO VSSSA_SENSE VSS_SA_SENSE 61 RSVD NCTF
J26 BR31 C1
J27 VCCIO H14 VCCIO_SENSE D01A BH30 RSVD NCTF C38
VCCIO VCCIO_SENSE J14 VSS_IO_SENSE RSVD NCTF
VSSIO_SENSE R254 *28mil short-p 11 OF 14
R1826
SKL_H_BGA_BGA
REV = 1 ?
100_1%_04

9 OF 14
SKL_H_BGA_BGA REV = 1 ? PLACE CAP IN BOARD EDGE PLACE CAP IN BACK SIDE
CPU_TOP_VCCSA VCCSA VCCSA CPU_BACK_VCCSA VCCSA
D01A
PLACE CAP BACKSIDE VCCSA VCCSA
VDDQ VDDQ VCCIO C815 C808 C840
D03 C841 C834 C820 C817 C842 C839 C833 C822 C823 C821
D01A
㓡footrpint

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06
B B

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04
10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06
D01A C816 C806
C497 C394 C446 C533 C472 C496 C445 C518 C417 C462 C389 C477 C424 C511 C388 C467 C386

22u_6.3V_X5R_06

*22u_6.3V_X5R_06
C370
+
10u_6.3V_X5R_06

10u_6.3V_X5R_04

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

10u_6.3V_X5R_04

10u_6.3V_X5R_06

10u_6.3V_X5R_04

220u_6.3V_SMD-D
*EEFCX0J221YR
D03 㓡0603cost down

D03 D03
D03 D03 㓡0603cost down 㓡footrpint 㓡footrpint 4,9,10,11,12,35,52,57 VDDQ
㓡0603cost down D03 2,3,5,55 VCCIO
㓡0603cost down 61,62 VCCSA
5,56,57 1.0DX_VCCSTG

57 VCCSFR_OC
55 1.0V_VCCSFR
5,34,35,55,61,63 1.0V_VCCST

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[07] Processor 6/7-POWER2
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 7 of 79


5 4 3 2 1

B - 8 Processor 6/7
Schematic Diagrams

Processor 7/7
5 4 3 2 1

VCCGT ?
U113MSKYLAKE_HALO +VCCGTU
VCCGT VCCGT SKYLAKE_HALO
? BGA1440 U113N
? SKYLAKE_HALO BB4 AK30 BGA1440
SKYLAKE_HALO U113L BB3 VSS VSS AK29 ?
SKYLAKE_HALO
U113F U113H AJ29
BGA1440 BB2 VSS VSS AK4
AJ30 VCCGT
Y38
BGA1440
K1 C17 C25 BB1 VSS VSS AJ38 BG34 BGA1440 AF29
AV29 AJ31 VCCGT
Y37 VSS VSS J36 C13 VSS VSS C23 BA38 VSS VSS AJ37 BG35 VCCGT VCCGTX AF30
VCCGT AV30 AJ32 VCCGT
Y14 VSS VSS J33 C9 VSS VSS C21 BA37 VSS VSS AJ6 BG36 VCCGT VCCGTX AF31
VCCGT AV31 AJ33 VCCGT
Y13 VSS VSS J32 BT32 VSS VSS C19 BA12 VSS VSS AJ5 BH33 VCCGT VCCGTX AF32
VCCGT AV32 AJ34 VCCGT
Y11 VSS VSS J25 BT26 VSS VSS C15 BA11 VSS VSS AJ4 BH34 VCCGT VCCGTX AF33
VCCGT AV33 AJ35 VCCGT
Y10 VSS VSS J22 BT24 VSS VSS C11 BA10 VSS VSS AJ3 BH35 VCCGT VCCGTX AF34
VCCGT AV34 AJ36 VCCGT
Y9 VSS VSS J18 BT21 VSS VSS C8 BA9 VSS VSS AJ2 BH36 VCCGT VCCGTX AG13
VCCGT AV35 AK31 VCCGT
Y8 VSS VSS J10 BT18 VSS VSS C5 BA8 VSS VSS AJ1 BH37 VCCGT VCCGTX AG14
VCCGT AV36 AK32 VCCGT
Y7 VSS VSS J7 BT14 VSS VSS BM29 BA7 VSS VSS AH34 BH38 VCCGT VCCGTX AG31
VCCGT AW14 AK33 VCCGT
W34 VSS VSS J4 BT12 VSS VSS BM25 BA6 VSS VSS AH33 BJ37 VCCGT VCCGTX AG32
VCCGT AW31 AK34 VCCGT
W33 VSS VSS H35 BT9 VSS VSS BM18 B9 VSS ? VSS AH12 BJ38 VCCGT VCCGTX AG33
VCCGT AW32 AK35 VCCGT
W12 VSS VSS H32 BT5 VSS VSS BM11 AY34 VSS VSS AH6 BL36 VCCGT VCCGTX AG34
VCCGT AW33 AK36 VCCGT
W5 VSS VSS H25 BR36 VSS VSS BM8 AY33 VSS VSS AG30 BL37 VCCGT VCCGTX AG35
D VCCGT AW34 AK37 VCCGT D
W4 VSS VSS H22 BR34 VSS VSS BM7 AY14 VSS VSS AG29 BM36 VCCGT VCCGTX AG36
VCCGT AW35 AK38 VCCGT
W3 VSS VSS H18 BR29 VSS VSS BM5 AY12 VSS VSS AG11 BM37 VCCGT VCCGTX AH13
VCCGT AW36 AL13 VCCGT
W2 VSS VSS H12 BR26 VSS VSS BM3 AW30 VSS VSS AG10 BN36 VCCGT VCCGTX AH14
VCCGT AW37 AL29 VCCGT
W1 VSS VSS H11 BR24 VSS VSS BL38 AW29 VSS VSS AG8 BN37 VCCGT VCCGTX AH29
VCCGT AW38 AL30 VCCGT
V30 VSS VSS G28 BR21 VSS VSS BL35 AW12 VSS VSS AG7 BN38 VCCGT VCCGTX AH30
VCCGT AY29 AL31 VCCGT
V29 VSS VSS G26 BR18 VSS VSS BL13 AW5 VSS VSS AG6 BP37 VCCGT VCCGTX AH31
VCCGT AY30 AL32 VCCGT
V12 VSS VSS G24 BR14 VSS VSS BL6 AW4 VSS VSS AF14 BP38 VCCGT VCCGTX AH32
VCCGT AY31 AL35 VCCGT
V6 VSS VSS G23 BR12 VSS VSS BK25 AW3 VSS VSS AF13 BR37 VCCGT VCCGTX AJ13
VCCGT AY32 AL36 VCCGT
U38 VSS VSS G22 BR7 VSS VSS BK22 AW2 VSS VSS AF12 BT37 VCCGT VCCGTX AJ14
VCCGT AY35 AL37 VCCGT
U37 VSS VSS G20 BP34 VSS VSS BK13 AW1 VSS VSS AF4 BE38 VCCGT VCCGTX
VCCGT AY36 AL38 VCCGT
U6 VSS VSS G18 BP33 VSS VSS BK6 AV38 VSS VSS AF3 BF13 VCCGT
VCCGT AY37 AM13 VCCGT
T34 VSS VSS G16 BP29 VSS VSS BJ30 AV37 VSS VSS AF2 BF14 VCCGT
VCCGT AY38 AM14 VCCGT
T33 VSS VSS G14 BP26 VSS VSS BJ29 AU34 VSS VSS AF1 BF29 VCCGT
VCCGT BA13 AM29 VCCGT
T14 VSS VSS G12 BP24 VSS VSS BJ15 AU33 VSS VSS AE34 BF30 VCCGT
VCCGT BA14 AM30 VCCGT
T13 VSS VSS G10 BP21 VSS VSS BJ12 AU12 VSS VSS AE33 BF31 VCCGT
VCCGT BA29 AM31 VCCGT
T12 VSS VSS G9 BP18 VSS VSS BH11 AU11 VSS VSS AE6 BF32 VCCGT
VCCGT BA30 AM32 VCCGT
T11 VSS VSS G8 BP14 VSS VSS BH10 AU10 VSS VSS AD30 BF35 VCCGT
VCCGT BA31 AM33 VCCGT
VSS VSS VSS VSS VSS VSS VCCGT

B.Schematic Diagrams
T10 G6 BP12 BH7 AU9 AD29 BF36 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA32 AM34
T9 G5 BP7 BH6 AU8 AD12 BF37 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA33 AM35
T8 G4 BN34 BH3 AU7 AD11 BF38 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA34 AM36
T7 F36 BN31 BH2 AU6 AD10 BG29 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA35 AN13
T5 F31 BN30 BG37 AT30 AD9 BG30 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA36 AN14
T4 F29 BN29 BG14 AT29 AD8 BG31 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB13 AN31
T3 F27 BN24 BG6 AT6 AD7 BG32 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB14 AN32
T2 F25 BN21 BF34 AR38 AD6 BG33 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB31 AN33
T1 F23 BN20 BF6 AR37 AC38 BC36 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB32 AN34
R30 F21 BN19 BE30 AR14 AC37 BC37 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB33 AN35
R29 F19 BN18 BE5 AR13 AC12 BC38 VCCGT VCCGT

Sheet 8 of 79
VSS VSS VSS VSS VSS VSS VCCGT BB34 AN36
R12 F17 BN14 BE4 AR5 AC6 BD13 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB35 AN37
P38 F15 BN12 BE3 AR4 AC5 BD14 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB36 AN38
P37 F13 BN9 BE2 AR3 AC4 BD29 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB37 AP13
P12 F11 BN7 BE1 AR2 AC3 BD30 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB38 AP14
P6 F9 BN4 BD38 AR1 AC2 BD31 VCCGT VCCGT

Processor 7/7
VSS VSS VSS VSS VSS VSS VCCGT BC29 AP29
N34 F8 BN2 BD37 AP34 AC1 BD32 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BC30 AP30
N33 F5 BM38 BD12 AP33 AB34 BD33 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BC31 AP31
N12 F4 BM35 BD11 AP12 AB33 BD34 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BC32 AP32
N11 F3 BM28 BD10 AP11 AB6 BD35 VCCGT VCCGT
C VSS VSS VSS VSS VSS VSS VCCGT BC35 AP35 C
N10 F2 BM27 BD8 AP10 AA30 BD36 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BE33 AP36
N9 E38 BM26 BD7 AP9 AA29 BE31 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BE34 AP37
N8 E35 BM23 BD6 AP8 AA12 BE32 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BE35 AP38
N7 E34 BM21 BC33 AN30 A30 BE37 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BE36 AR29
N6 E9 BM13 BC14 AN29 A28 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS AR30
N5 E4 BM12 BC13 AN12 A26 VCCGT
VSS VSS VSS VSS VSS VSS 8 OF 14 AR31
N4 D33 BM9 BC6 AN6 A24 VCCGT
VSS VSS VSS VSS VSS VSS AR32
N3 D30 BM6 BB30 AN5 A22 SKL_H_BGA_BGA REV = 1 ? VCCGT
VSS VSS VSS VSS VSS VSS AR33 AH38
N2 D28 BM2 BB29 AM38 A20 VCCGT VCCGT_SENSE VSSGTX_SENSE VCCGT_SENSE 63
VSS VSS VSS VSS VSS VSS AR34 AH35
N1 D26 BL29 BB6 AM37 A18 VCCGT VSSGTX_SENSE
VSS VSS VSS VSS VSS VSS AR35 AH37
M14 D24 BK29 BB5 AM12 A16 VCCGT VSSGT_SENSE VCCGTX_SENSE VSSGT_SENSE 63
VSS VSS VSS VSS VSS VSS AR36 AH36
M13 D22 BK15 AM5 A14 VCCGT VCCGTX_SENSE
VSS VSS VSS VSS VSS AT14
M12 D20 BK14 AM4 A12 VCCGT
VSS VSS VSS VSS VSS AT31
M6 D18 BJ32 AM3 A10 VCCGT
VSS VSS VSS VSS VSS AT32
L34 D16 BJ31 AM2 A9 VCCGT
VSS VSS VSS VSS VSS AT33
L33 D14 BJ25 AM1 A6 VCCGT
VSS VSS VSS VSS VSS AT34
L30 D12 BJ22 AL34 VCCGT
VSS VSS VSS VSS AT35
L29 D10 BH14 AL33 VCCGT
VSS VSS VSS C2 VSS AT36
K38 D9 BH12 NCTFVSS AL14 B37 VCCGT
VSS VSS VSS BT36 VSS NCTFVSS AT37
K11 D6 BH9 NCTFVSS AL12 B3 VCCGT
VSS VSS VSS BT35 VSS NCTFVSS AT38
K10 D3 BH8 NCTFVSS AL10 A34 VCCGT
VSS VSS VSS BT4 VSS NCTFVSS AU14
K9 C37 BH5 NCTFVSS AL9 A4 VCCGT
VSS VSS VSS BT3 VSS NCTFVSS AU29
K8 C31 BH4 NCTFVSS AL8 A3 VCCGT
VSS VSS VSS BR38 VSS NCTFVSS AU30
K7 C29 BH1 NCTFVSS AL7 VCCGT
VSS VSS VSS VSS AU31
K5 C27 BG38 AL4 VCCGT
VSS VSS VSS VSS AU32
K4 BG13 VCCGT
VSS VSS AU35
K3 D38 BG12 VCCGT
VSS NCTFVSS VSS 13 OF 14 AU36
K2 BF33 VCCGT
VSS VSS AU37
BF12 SKL_H_BGA_BGA REV = 1 ? VCCGT
6 OF 14 VSS AU38
BE29 PLACE CAP IN BACK SIDE VCCGT
VSS 14 OF 14
SKL_H_BGA_BGA REV = 1 ? BE6
BD9 VSS VCCGT SKL_H_BGA_BGA REV = 1 ?
BC34 VSS CPU_BACK_VCCGT
BC12 VSS
BB12 VSS
VSS 12 OF 14
C580 C579 C578 C577 C552 C551 C520 C581
SKL_H_BGA_BGA REV = 1 ?
B B

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06
D03

DEL

VCCGT
VCCGT VCCGT PLACE CAP IN BOARD EDGE

CPU_TOP_VCCGT D01A
C982 C981 C979 C980 C978 C973 C974 C952 C953 C954 C955 C956 C975 C527 C525 C526 C977 C958 C939 C976
C524 C521 C522 C486 C485 C484

1u_6.3V_X5R_04

1u_6.3V_X5R_04
10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06
22u_6.3V_X5R_08

22u_6.3V_X5R_08

22u_6.3V_X5R_08

22u_6.3V_X5R_08

22u_6.3V_X5R_08

22u_6.3V_X5R_08

C986 C985
+ +
*EEFCX0J221YR

*EEFCX0J221YR

D03 㓡0603cost down


VCCGT

C514 C499 C489 C482 C530 C491 C487 C478 C938 C937 C957 C515 C500 C490 C483 C537 C543 C510 C509 C508 C507 C506 C505 C936 C935 C934 C933 C513 C498 C488 C528 C529 C481 C538 C536
1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04
A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
63,64 VCCGT Title
[08] Processor 7/7-POWER/GND
Size Document Number Rev
C P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 8 of 79


5 4 3 2 1

Processor 7/7 B - 9
Schematic Diagrams

DDR4 CHA SO-DIMM_0


5 4 3 2 1

VTT_MEM

Channel A SO-DIMM 0[RAM1] J_DIMMA_1A


STD TYPE D02 㓡DDR4
H=4mm
VDDQ

163
J_DIMMA_1B

258
2.5V

160 VDD19 VTT


159 VDD18
137 8 VDD17
4 M_A_CLK_DDR0 CK0_T DQ0 M_A_DQ5 4,10 154 259
139 7 VDD16 VPP2
4 M_A_CLK_DDR#0 CK0_C DQ1 M_A_DQ0 4,10 153 257
138 20 VDD15 VPP1
4 M_A_CLK_DDR1 CK1_T DQ2 M_A_DQ2 4,10 148
140 21 VDD14
4 M_A_CLK_DDR#1 CK1_C DQ3 M_A_DQ3 4,10 147
4 VDD13 3.3VS
DQ4 M_A_DQ1 4,10 142
109 3 VDD12
4 M_A_CKE0 CKE0 DQ5 M_A_DQ4 4,10 141
110 16 VDD11
D 4 M_A_CKE1 CKE1 DQ6 M_A_DQ6 4,10 136 255 D
17 VDD10 VDDSPD
DQ7 M_A_DQ7 4,10 135
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 149 28 VDD9 D03
4 M_A_CS#0 S0* DQ8 M_A_DQ8 4,10 130
DDR4_DRAMRST# 157 29 VDD8
4 M_A_CS#1 S1* DQ9 M_A_DQ12 4,10 129 C1404 C1405
10,11,12,35 DDR4_DRAMRST# 41 VDD7
DQ10 M_A_DQ14 4,10 124
155 42 VDD6
4 M_A_ODT0 ODT0 DQ11 M_A_DQ11 4,10 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
161 24 VDD5
C1406 4 M_A_ODT1 ODT1 DQ12 M_A_DQ9 4,10 118
25 VDD4
DQ13 M_A_DQ13 4,10 117
115 38 VDD3
0.1u_10V_X7R_04 4,10 M_A_BG0 BG0 DQ14 M_A_DQ10 4,10 112
113 37 VDD2
4,10 M_A_BG1 BG1 DQ15 M_A_DQ15 4,10 111
150 50 VDD1
4,10 M_A_BA0 BA0 DQ16 M_A_DQ17 4,10
145 49
4,10 M_A_BA1 BA1 DQ17 M_A_DQ20 4,10 GND1
62 MT1
B.Schematic Diagrams

DQ18 M_A_DQ23 4,10 GND2


144 63 MT2
4,10 M_A_A0 A0 DQ19 M_A_DQ18 4,10
133 46 PLACE NEAR TO PIN
4,10 M_A_A1 A1 DQ20 M_A_DQ16 4,10
132 45
4,10 M_A_A2 A2 DQ21 M_A_DQ21 4,10 251 252
131 58 VSS VSS
4,10 M_A_A3 A3 DQ22 M_A_DQ19 4,10 247 248
PLACE THE CAP CLOSE TO SODIMM 128 59 VSS VSS
4,10 M_A_A4 A4 DQ23 M_A_DQ22 4,10 243 244
126 70 VSS VSS
DDR_VREFCA_CHA_DIMM 4,10 M_A_A5 A5 DQ24 M_A_DQ25 4,10 239 238
127 71 VSS VSS
4,10 M_A_A6 A6 DQ25 M_A_DQ28 4,10 235 234
122 83 VSS VSS
4,10 M_A_A7 A7 DQ26 M_A_DQ30 4,10 231 230
125 84 VSS VSS

Sheet 9 of 79 C1407

0.1u_10V_X7R_04
C1408
*2.2u_6.3V_X5R_04
4,10 M_A_A8
4,10 M_A_A9
4,10 M_A_A10
4,10 M_A_A11
121
146
120
A8
A9
A10_AP
A11
DQ27
DQ28
DQ29
DQ30
66
67
79
M_A_DQ31
M_A_DQ24
M_A_DQ29
M_A_DQ27
4,10
4,10
4,10
4,10
227
223
217
213
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
214
D03 119 80 VSS VSS
DDR4 CHA SO- 㨇㥳旸檀炻㓡0402 VDDQ 4,10 M_A_A12
4,10 M_A_A13
4,10 M_A_W E#
4,10 M_A_CAS#
158
151
156
A12
A13
A14_WE*
DQ31
DQ32
DQ33
174
173
187
M_A_DQ26
M_A_DQ32
M_A_DQ37
M_A_DQ39
4,10
4,10
4,10
4,10
209
205
201
197
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202
196
152 A15_CAS* DQ34 186

DIMM_0 C 4,10 M_A_RAS# M_A_DQ34 4,10 193 VSS VSS 192 C


R1631 A16_RAS* DQ35 170
M_A_DQ36 4,10 189 VSS VSS 188
DQ36 169
*240_1%_04 M_A_DQ33 4,10 185 VSS VSS 184
114 DQ37 183
4,10 M_A_ACT# M_A_DQ38 4,10 181 VSS VSS 180
ACT* DQ38 182
M_A_DQ35 4,10 175 VSS VSS 176
143 DQ39 195
4,10 DDR0_A_PARITY M_A_DQ41 4,10 171 VSS VSS 172
116 PARITY DQ40 194
4,10 DDR0_A_ALERT# M_A_DQ45 4,10 167 VSS VSS 168
134 ALERT* DQ41 207
34 DIMM0_CHA_EVENT# M_A_DQ46 4,10 107 VSS VSS 106
DDR4_DRAMRST# 108 EVENT* DQ42 208
M_A_DQ42 4,10 103 VSS VSS 102
RESET* DQ43 191
M_A_DQ44 4,10 99 VSS VSS 98
DDR_VREFCA_CHA_DIMM 164 DQ44 190
M_A_DQ40 4,10 93 VSS VSS 94
VREFCA DQ45 203
M_A_DQ43 4,10 89 VSS VSS 90
254 DQ46 204
10,11,12,17,35,51 SMB_DATA_R M_A_DQ47 4,10 85 VSS VSS 86
253 SDA DQ47 216
2.5V 10,11,12,17,35,51 SMB_CLK_R M_A_DQ49 4,10 81 VSS VSS 82
SCL DQ48 215
M_A_DQ52 4,10 77 VSS VSS 78
000 166
SA2
DQ49
DQ50
228
M_A_DQ55 4,10 73 VSS VSS 72
260 229 VSS VSS
SA1 DQ51 M_A_DQ51 4,10 69 68
D03 256 211 VSS VSS
C326 C321 C925 C875 SA0 DQ52 M_A_DQ50 4,10 65 64
212 VSS VSS
DQ53 M_A_DQ48 4,10 61 60
224 VSS VSS
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 M_A_DQ53 4,10 57 56
CHA_DIMM0=000 DQ54
DQ55
225
M_A_DQ54 4,10 51 VSS VSS 52
92 237 VSS VSS
CHA_DIMM1=001 91 CB0_NC DQ56 236
M_A_DQ61 4,10 47
VSS VSS
48
CB1_NC DQ57 M_A_DQ60 4,10 43 44
VTT_MEM CHB_DIMM0=010 101
CB2_NC DQ58
249
M_A_DQ58 4,10 39 VSS VSS 40
105 250 VSS VSS
CHB_DIMM1=011 88 CB3_NC DQ59 232
M_A_DQ63
M_A_DQ56
4,10
4,10
35
31 VSS VSS
36
30
87 CB4_NC DQ60 233
M_A_DQ57 4,10 27 VSS VSS 26
100 CB5_NC DQ61 245
C303 C315 C332 M_A_DQ62 4,10 23 VSS VSS 22
104 CB6_NC DQ62 246
M_A_DQ59 4,10 19 VSS VSS 18
CB7_NC DQ63
B 10u_6.3V_X5R_06 1u_6.3V_X5R_04 *10u_6.3V_X5R_04 M_A_DQS[7:0] 4,10 15 VSS VSS 14 B
12 13 M_A_DQS0 VSS VSS
VDDQ DM0*/DBI0* DQS0_T 9 10
D03 33 34 M_A_DQS1 VSS VSS
DM1*/DBI1* DQS1_T 5 6
暊SOCKET⣒役炻㓡⮷ 54
DM2*/DBI2* DQS2_T
55 M_A_DQS2
1 VSS VSS 2
75 76 M_A_DQS3 VSS VSS
VDDQ 178 DM3*/DBI3* DQS3_T 179 M_A_DQS4
199 DM4*/DBI4* DQS4_T 200 M_A_DQS5
220 DM5*/DBI5* DQS5_T 221 M_A_DQS6
DM6*/DBI6* DQS6_T M_A_DQS7 VDDQ D4AS0-26001-1P40
C988 241 242
+
96 DM7*/DBI7* DQS7_T 97
330uF_2.5V_12m_6.6*6.6*4.2 DM8*/DBI8* DQS8_T
M_A_DQS#0 M_A_DQS#[7:0] 4,10
11
DQS0_C 32 M_A_DQS#1 R633
DQS1_C
DQS2_C
53
74
M_A_DQS#2
M_A_DQS#3 1K_1%_04
月DIMM䪗㒢㓦
DQS3_C 177 M_A_DQS#4
DQS4_C 198 M_A_DQS#5
DQS5_C 219 M_A_DQS#6 DDR_VREFCA_CHA_DIMM
VDDQ DQS6_C M_A_DQS#7 DDR_VREFCA_CHA_DIMM 10
240
D03 DQS7_C 95 C1739 C1740
㨇㥳旸檀炻㓡0402 162 DQS8_C R634
165 S2*/C0 0.1u_10V_X7R_04 0.1u_10V_X7R_04
C479 C480 C447 C448 C924 C870 C966 C921 S3*/C1 1K_1%_04

10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 D4AS0-26001-1P40


6-86-24260-002 R625 1.8_1%_04
VDDQ 4 DIMM_CA_CPU_VREF_A

A C838 A

0.022u_16V_X7R_04
C874 C922 C965 C967 C969 C871 C970 C926

1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 R635


24.9_1%_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
4,7,10,11,12,35,52,57 VDDQ [09] DDR3 CHA SO-DIMM_0
10,11,12,52 VTT_MEM
10,11,12,52,57 2.5V Size Document Number Rev
3,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 3.3VS A3 P650RE 6-71-P65R0-D03 D03

Date: Tuesday, July 07, 2015 Sheet 9 of 79


5 4 3 2 1

B - 10 DDR4 CHA SO-DIMM_0


Schematic Diagrams

DDR4 CHA SO-DIMM_1


5 4 3 2 1

Channel A SO-DIMM 1[RAM3] REV TYPE


H=5.2mm D02 㓡DDR4
J_DIMMA_2A

137 8
4 M_A_CLK_DDR2 CK0_T DQ0 M_A_DQ5 4,9
139 7
4 M_A_CLK_DDR#2 CK0_C DQ1 M_A_DQ0 4,9
138 20 VTT_MEM
4 M_A_CLK_DDR3 CK1_T DQ2 M_A_DQ2 4,9
140 21
4 M_A_CLK_DDR#3 CK1_C DQ3 M_A_DQ3 4,9
4 VDDQ J_DIMMA_2B
DQ4 M_A_DQ1 4,9
109 3
4 M_A_CKE2 CKE0 DQ5 M_A_DQ4 4,9 2.5V
D 110 16 D
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 4 M_A_CKE3 CKE1 DQ6 M_A_DQ6 4,9 163 258
17 VDD19 VTT
DDR4_DRAMRST# DQ7 M_A_DQ7 4,9 160
149 28 VDD18
9,11,12,35 DDR4_DRAMRST# 4 M_A_CS#2 S0* DQ8 M_A_DQ8 4,9 159
157 29 VDD17
4 M_A_CS#3 S1* DQ9 M_A_DQ12 4,9 154 259
41 VDD16 VPP2
DQ10 M_A_DQ14 4,9 153 257
C1748 155 42 VDD15 VPP1
4 M_A_ODT2 ODT0 DQ11 M_A_DQ11 4,9 148
161 24 VDD14
4 M_A_ODT3 ODT1 DQ12 M_A_DQ9 4,9 147
*0.1u_10V_X7R_04 25 VDD13 3.3VS
DQ13 M_A_DQ13 4,9 142
115 38 VDD12
4,9 M_A_BG0 BG0 DQ14 M_A_DQ10 4,9 141
113 37 VDD11
4,9 M_A_BG1 BG1 DQ15 M_A_DQ15 4,9 136 255
150 50 VDD10 VDDSPD
4,9 M_A_BA0 BA0 DQ16 M_A_DQ17 4,9 135
145 49 VDD9 D03
4,9 M_A_BA1 BA1 DQ17 M_A_DQ20 4,9 130
62 VDD8
DQ18 M_A_DQ23 4,9 129 C1462 C1463
144 63 VDD7
4,9 M_A_A0 A0 DQ19 M_A_DQ18 4,9 124
133 46 VDD6
4,9 M_A_A1 A1 DQ20 M_A_DQ16 4,9 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
PLACE THE CAP CLOSE TO SODIMM 132 45 VDD5
4,9 M_A_A2 A2 DQ21 M_A_DQ21 4,9 118
131 58 VDD4
DDR_VREFCA_CHA_DIMM 4,9 M_A_A3 A3 DQ22 M_A_DQ19 4,9 117
128 59 VDD3
9 DDR_VREFCA_CHA_DIMM 4,9 M_A_A4 M_A_DQ22 4,9 112

B.Schematic Diagrams
126 A4 DQ23 70
4,9 M_A_A5 M_A_DQ25 4,9 111 VDD2
127 A5 DQ24 71
4,9 M_A_A6 M_A_DQ28 4,9 VDD1
C1750 C1749 122 A6 DQ25 83
4,9 M_A_A7 A7 DQ26 M_A_DQ30 4,9 GND1
125 84 MT1
4,9 M_A_A8 A8 DQ27 M_A_DQ31 4,9 GND2
0.1u_10V_X7R_04 *2.2u_6.3V_X5R_04 121 66 MT2
4,9 M_A_A9 A9 DQ28 M_A_DQ24 4,9
D03 146 67 PLACE NEAR TO PIN
4,9 M_A_A10 A10_AP DQ29 M_A_DQ29 4,9
㨇㥳旸檀炻㓡0402 4,9 M_A_A11
120
A11 DQ30
79
M_A_DQ27 4,9 251 252
119 80 VSS VSS
4,9 M_A_A12 A12 DQ31 M_A_DQ26 4,9 247 248

C
VDDQ
4,9 M_A_A13
4,9 M_A_W E#
4,9 M_A_CAS#
158
151
156
152
A13
A14_WE*
A15_CAS*
DQ32
DQ33
DQ34
174
173
187
186
M_A_DQ32
M_A_DQ37
M_A_DQ39
4,9
4,9
4,9
243
239
235
VSS
VSS
VSS
VSS
VSS
VSS
244
238
234 C
Sheet 10 of 79
4,9 M_A_RAS# M_A_DQ34 4,9 231 VSS VSS 230
R1638
240_1%_04
4,9 M_A_ACT#
114
A16_RAS*

ACT*
DQ35
DQ36
DQ37
DQ38
170
169
183
M_A_DQ36
M_A_DQ33
M_A_DQ38
4,9
4,9
4,9
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
DDR4 CHA SO-
182 VSS VSS

DIMM_1
DQ39 M_A_DQ35 4,9 213 214
143 195 VSS VSS
4,9 DDR0_A_PARITY PARITY DQ40 M_A_DQ41 4,9 209 210
116 194 VSS VSS
4,9 DDR0_A_ALERT# ALERT* DQ41 M_A_DQ45 4,9 205 206
134 207 VSS VSS
34 DIMM1_CHA_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_A_DQ46 4,9 201 202
108 208 VSS VSS
RESET* DQ43 M_A_DQ42 4,9 197 196
191 VSS VSS
DDR_VREFCA_CHA_DIMM 164 DQ44 M_A_DQ44 4,9 193 192
190 VSS VSS
VREFCA DQ45 M_A_DQ40 4,9 189 188
203 VSS VSS
DQ46 M_A_DQ43 4,9 185 184
254 204 VSS VSS
9,11,12,17,35,51 SMB_DATA_R SDA DQ47 M_A_DQ47 4,9 181 180
253 216 VSS VSS
9,11,12,17,35,51 SMB_CLK_R SCL DQ48 M_A_DQ49 4,9 175 176
215 VSS VSS
M_A_DQ52 4,9 171 172
001 166
SA2
DQ49
DQ50
228
M_A_DQ55 4,9 167 VSS VSS 168
260 229 VSS VSS
SA1 DQ51 M_A_DQ51 4,9 107 106
3.3VS D03 256 211 VSS VSS
SA0 DQ52 M_A_DQ50 4,9 103 102
212 VSS VSS
DQ53 M_A_DQ48 4,9 99 98
224
CHA_DIMM0=000 DQ54 225
M_A_DQ53 4,9 93 VSS
VSS
VSS
VSS
94
DQ55 M_A_DQ54 4,9 89 90
CHA_DIMM1=001 92
CB0_NC DQ56
237
M_A_DQ61 4,9 85 VSS VSS 86
91 236 VSS VSS
CHB_DIMM0=010 101 CB1_NC DQ57 249
M_A_DQ60 4,9 81
VSS VSS
82
CB2_NC DQ58 M_A_DQ58 4,9 77 78
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232
M_A_DQ63 4,9 73 VSS VSS 72
M_A_DQ56 4,9 69 VSS VSS 68
87 CB4_NC DQ60 233
M_A_DQ57 4,9 65 VSS VSS 64
100 CB5_NC DQ61 245
M_A_DQ62 4,9 61 VSS VSS 60
104 CB6_NC DQ62 246
M_A_DQ59 4,9 57 VSS VSS 56
B CB7_NC DQ63 B
M_A_DQS[7:0] 4,9 51 VSS VSS 52
12 13 M_A_DQS0 VSS VSS
2.5V VDDQ DM0*/DBI0* DQS0_T 47 48
33 34 M_A_DQS1 VSS VSS
DM1*/DBI1* DQS1_T M_A_DQS2 43 44
54 55 VSS VSS
DM2*/DBI2* DQS2_T M_A_DQS3 39 40
75 76 VSS VSS
DM3*/DBI3* DQS3_T M_A_DQS4 35 36
178 179 VSS VSS
DM4*/DBI4* DQS4_T M_A_DQS5 31 30
C333 C327 C1774 C1768 199 200 VSS VSS
DM5*/DBI5* DQS5_T M_A_DQS6 27 26
220 221 VSS VSS
DM6*/DBI6* DQS6_T M_A_DQS7 23 22
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 241 242 VSS VSS
DM7*/DBI7* DQS7_T 19 18
96 97 VSS VSS
DM8*/DBI8* DQS8_T 15 14
M_A_DQS#[7:0] 4,9 9 VSS VSS 10
11 M_A_DQS#0 VSS VSS
VTT_MEM DQS0_C M_A_DQS#1 5 6
32 VSS VSS
DQS1_C M_A_DQS#2 1 2
53 VSS VSS
DQS2_C 74 M_A_DQS#3
DQS3_C 177 M_A_DQS#4
C304 C316 C322 DQS4_C 198 M_A_DQS#5
DQS5_C M_A_DQS#6 D4AR0-26001-1P52
219
10u_6.3V_X5R_06 1u_6.3V_X5R_04 *10u_6.3V_X5R_06 DQS6_C 240 M_A_DQS#7
DQS7_C 95
162 DQS8_C
165 S2*/C0
S3*/C1
VDDQ
D03 D4AR0-26001-1P52
㨇㥳旸檀炻㓡0402 6-86-24260-019
C1760 C1762 C1761 C1764 C1752 C1754 C1753 C1756
9,11,12,52,57 2.5V
A 4,7,9,11,12,35,52,57 VDDQ A
10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04
9,11,12,52 VTT_MEM
3,9,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 3.3VS
VDDQ

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C927 C923 C971 C872 C873 C968 C928 C876 Title
[10] DDR3 CHA SO-DIMM_1
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 10 of 79


5 4 3 2 1

DDR4 CHA SO-DIMM_1 B - 11


Schematic Diagrams

DDR4 CHB SO-DIMM_0


5 4 3 2 1

VTT_MEM

Channel B SO-DIMM 0[RAM2]RSV TYPE


H=4mm D02 㓡DDR4 VDDQ

163
160
J_DIMMB_1B

VDD19 VTT
258
2.5V

J_DIMMB_1A 159 VDD18


154 VDD17 259
M_B_DQ0 M_B_DQ[63:0] 4,12 VDD16 VPP2
137 8 153 257
4 M_B_CLK_DDR0 CK0_T DQ0 M_B_DQ5 VDD15 VPP1
139 7 148
4 M_B_CLK_DDR#0 CK0_C DQ1 M_B_DQ7 VDD14
138 20 147 3.3VS
4 M_B_CLK_DDR1 CK1_T DQ2 M_B_DQ3 VDD13
140 21 142
D 4 M_B_CLK_DDR#1 CK1_C DQ3 M_B_DQ4 VDD12 D
4 141
109 DQ4 3 M_B_DQ2 136 VDD11 255
4 M_B_CKE0 CKE0 DQ5 M_B_DQ1 VDD10 VDDSPD
110 16 135
4 M_B_CKE1 CKE1 DQ6 M_B_DQ6 VDD9 D03
17 130
149 DQ7 28 M_B_DQ9 129 VDD8 C1433 C1434
4 M_B_CS#0 S0* DQ8 M_B_DQ14 VDD7
157 29 124
4 M_B_CS#1 S1* DQ9 M_B_DQ13 VDD6
41 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
155 DQ10 42 M_B_DQ15 118 VDD5
4 M_B_ODT0 ODT0 DQ11 M_B_DQ8 VDD4
161 24 117
4 M_B_ODT1 ODT1 DQ12 M_B_DQ10 VDD3
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 25 112
115 DQ13 38 M_B_DQ11 111 VDD2
DDR4_DRAMRST# 4,12 M_B_BG0 BG0 DQ14 VDD1
9,10,12,35 DDR4_DRAMRST# 113 37 M_B_DQ12
4,12 M_B_BG1 BG1 DQ15 M_B_DQ16
150 50 GND1
B.Schematic Diagrams

4,12 M_B_BA0 BA0 DQ16 M_B_DQ18 MT1


145 49 GND2
C1751 4,12 M_B_BA1 BA1 DQ17 M_B_DQ21 MT2
62 PLACE NEAR TO PIN
144 DQ18 63 M_B_DQ19
*0.1u_10V_X7R_04 4,12 M_B_A0 A0 DQ19 M_B_DQ17
133 46 251 252
4,12 M_B_A1 A1 DQ20 M_B_DQ22 VSS VSS
132 45 247 248
4,12 M_B_A2 A2 DQ21 M_B_DQ23 VSS VSS
131 58 243 244
4,12 M_B_A3 A3 DQ22 M_B_DQ20 VSS VSS
128 59 239 238
4,12 M_B_A4 A4 DQ23 M_B_DQ25 VSS VSS
126 70 235 234
4,12 M_B_A5 A5 DQ24 M_B_DQ31 VSS VSS
127 71 231 230

Sheet 11 of 79 PLACE THE CAP CLOSE TO SODIMM


4,12 M_B_A6
4,12 M_B_A7
4,12 M_B_A8
4,12 M_B_A9
122
125
121
A6
A7
A8
A9
DQ25
DQ26
DQ27
DQ28
83
84
66
M_B_DQ24
M_B_DQ29
M_B_DQ28
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
146 67 M_B_DQ27 213 214

DDR4 CHB SO- C


DDR_VREFCA_CHB_DIMM

C1436 C1437
VDDQ
4,12 M_B_A10
4,12 M_B_A11
4,12 M_B_A12
4,12 M_B_A13
120
119
158
A10_AP
A11
A12
DQ29
DQ30
DQ31
79
80
174
M_B_DQ30
M_B_DQ26
M_B_DQ39
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202 C
151 A13 DQ32 173 M_B_DQ35 197 VSS VSS 196
DIMM_0 0.1u_10V_X7R_04 *2.2u_6.3V_X5R_04
D03 R1890
4,12 M_B_W E#
4,12 M_B_CAS#
4,12 M_B_RAS#
156
152
A14_WE*
A15_CAS*
A16_RAS*
DQ33
DQ34
DQ35
187
186
170
M_B_DQ32
M_B_DQ37
M_B_DQ34
193
189
185
VSS
VSS
VSS
VSS
VSS
VSS
192
188
184
㨇㥳旸檀炻㓡0402 DQ36 169 M_B_DQ38 181 VSS VSS 180
240_1%_04 DQ37 M_B_DQ33 VSS VSS
114 183 175 176
4,12 M_B_ACT# ACT* DQ38 M_B_DQ36 VSS VSS
182 171 172
143 DQ39 195 M_B_DQ41 167 VSS VSS 168
4,12 DDR1_B_PARITY PARITY DQ40 M_B_DQ45 VSS VSS
116 194 107 106
4,12 DDR1_B_ALERT# DIMM0_CHB_EVENT# ALERT* DQ41 M_B_DQ46 VSS VSS
134 207 103 102
34 DIMM0_CHB_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_B_DQ43 VSS VSS
108 208 99 98
RESET* DQ43 191 M_B_DQ40 93 VSS VSS 94
DDR_VREFCA_CHB_DIMM 164 DQ44 190 M_B_DQ44 89 VSS VSS 90
VREFCA DQ45 203 M_B_DQ42 85 VSS VSS 86
254 DQ46 204 M_B_DQ47 81 VSS VSS 82
2.5V 9,10,12,17,35,51 SMB_DATA_R SDA DQ47 VSS VSS
D03 253 216 M_B_DQ55 77 78
9,10,12,17,35,51 SMB_CLK_R SCL DQ48 VSS VSS
㨇㥳旸檀炻㓡0402 215 M_B_DQ48 73 72
010 166
SA2
DQ49
DQ50
228 M_B_DQ49 69 VSS
VSS
VSS
VSS
68
260 229 M_B_DQ51 65 64
C773 C772 C961 C963 3.3VS SA1 DQ51 VSS VSS
D03 256 211 M_B_DQ52 61 60
SA0 DQ52 212 M_B_DQ54 57 VSS VSS 56
10u_6.3V_X5R_04 *10u_6.3V_X5R_04 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 DQ53 M_B_DQ53 VSS VSS
224 51 52
CHA_DIMM0=000 DQ54 225 M_B_DQ50 47 VSS VSS 48
CHA_DIMM1=001 92 DQ55 237 M_B_DQ61 43 VSS VSS 44
91 CB0_NC DQ56 236 M_B_DQ62 39 VSS VSS 40
VTT_MEM
CHB_DIMM0=010 101 CB1_NC DQ57 249 M_B_DQ60 35 VSS VSS 36
CB2_NC DQ58 VSS VSS
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232
M_B_DQ58
M_B_DQ59
31
27 VSS VSS
30
26
87 CB4_NC DQ60 233 M_B_DQ57 23 VSS VSS 22
B B
100 CB5_NC DQ61 245 M_B_DQ56 19 VSS VSS 18
C765 C771 C770 CB6_NC DQ62 M_B_DQ63 VSS VSS
104 246 15 14
CB7_NC DQ63 9 VSS VSS 10
10u_6.3V_X5R_06 1u_6.3V_X5R_04 *10u_6.3V_X5R_06 M_B_DQS0 M_B_DQS[7:0] 4,12 VSS VSS
VDDQ 12 13 5 6
33 DM0*/DBI0* DQS0_T 34 M_B_DQS1 1 VSS VSS 2
54 DM1*/DBI1* DQS1_T 55 M_B_DQS2 VSS VSS
75 DM2*/DBI2* DQS2_T 76 M_B_DQS3
178 DM3*/DBI3* DQS3_T 179 M_B_DQS4
199 DM4*/DBI4* DQS4_T 200 M_B_DQS5 D4AR0-26001-1P40
220 DM5*/DBI5* DQS5_T 221 M_B_DQS6
241 DM6*/DBI6* DQS6_T 242 M_B_DQS7
96 DM7*/DBI7* DQS7_T 97 VDDQ
DM8*/DBI8* DQS8_T
M_B_DQS#0 M_B_DQS#[7:0] 4,12
11
3,9,10,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 3.3VS DQS0_C 32 M_B_DQS#1
DQS1_C M_B_DQS#2 C1787
4,7,9,10,12,35,52,57 VDDQ 53 R390
9,10,12,52 VTT_MEM DQS2_C 74 M_B_DQS#3
DQS3_C M_B_DQS#4 1K_1%_04 *0.1u_10V_X7R_04
9,10,12,52,57 2.5V 177
DQS4_C 198 M_B_DQS#5
DQS5_C 219 M_B_DQS#6
DQS6_C
月DIMM䪗㒢㓦
VDDQ 240 M_B_DQS#7
DQS7_C 95 C1745
162 DQS8_C
S2*/C0 R391
165 0.1u_10V_X7R_04
S3*/C1 1K_1%_04 DDR_VREFCA_CHB_DIMM
DDR_VREFCA_CHB_DIMM 12
C517 C516 C494 C495 C868 C865 C911 C916
D4AR0-26001-1P40 C1746 C1747
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04
A R402 1.8_1%_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 A
6-86-24260-000 4 DIMM_DQ_CPU_VREF_B
D03 㨇㥳旸檀炻㓡0402
C642
VDDQ
0.022u_16V_X7R_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C950 C894 C866 C869 C948 C929 C931 C891 R397 Title
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04
24.9_1%_04 [11] DDR4 CHB SO-DIMM_0
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 11 of 79


5 4 3 2 1

B - 12 DDR4 CHB SO-DIMM_0


Schematic Diagrams

DDR4 CHB SO-DIMM_1


5 4 3 2 1

Channel B SO-DIMM 1[RAM4] J_DIMMB_2A


STD TYPE
H=5.2mm D02 㓡DDR4
M_B_DQ0 M_B_DQ[63:0] 4,11 VTT_MEM
137 8
4 M_B_CLK_DDR2 CK0_T DQ0 M_B_DQ5
139 7
4 M_B_CLK_DDR#2 CK0_C DQ1 M_B_DQ7 VDDQ J_DIMMB_2B
138 20
4 M_B_CLK_DDR3 CK1_T DQ2 M_B_DQ3
140 21 2.5V
4 M_B_CLK_DDR#3 CK1_C DQ3 M_B_DQ4
4 163 258
109 DQ4 3 M_B_DQ2 160 VDD19 VTT
4 M_B_CKE2 CKE0 DQ5 M_B_DQ1 VDD18
D 110 16 159 D
4 M_B_CKE3 CKE1 DQ6 M_B_DQ6 VDD17
17 154 259
149 DQ7 28 M_B_DQ9 153 VDD16 VPP2 257
4 M_B_CS#2 S0* DQ8 M_B_DQ14 VDD15 VPP1
157 29 148
4 M_B_CS#3 S1* DQ9 M_B_DQ13 VDD14
41 147 3.3VS
155 DQ10 42 M_B_DQ15 142 VDD13
4 M_B_ODT2 ODT0 DQ11 M_B_DQ8 VDD12
161 24 141
4 M_B_ODT3 ODT1 DQ12 M_B_DQ10 VDD11
25 136 255
115 DQ13 38 M_B_DQ11 135 VDD10 VDDSPD
4,11 M_B_BG0 BG0 DQ14 M_B_DQ12 VDD9 D03
113 37 130
4,11 M_B_BG1 BG1 DQ15 M_B_DQ16 VDD8
150 50 129 C1491 C1492
4,11 M_B_BA0 BA0 DQ16 M_B_DQ18 VDD7
145 49 124
4,11 M_B_BA1 BA1 DQ17 M_B_DQ21 VDD6
62 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
144 DQ18 63 M_B_DQ19 118 VDD5
4,11 M_B_A0 A0 DQ19 M_B_DQ17 VDD4
133 46 117
4,11 M_B_A1

B.Schematic Diagrams
132 A1 DQ20 45 M_B_DQ22 112 VDD3
4,11 M_B_A2 A2 DQ21 M_B_DQ23 VDD2
131 58 111
4,11 M_B_A3 A3 DQ22 M_B_DQ20 VDD1
128 59
4,11 M_B_A4 A4 DQ23 M_B_DQ25
126 70 GND1
4,11 M_B_A5 A5 DQ24 M_B_DQ31 MT1
127 71 GND2
4,11 M_B_A6 A6 DQ25 M_B_DQ24 MT2
122 83
4,11 M_B_A7 A7 DQ26 M_B_DQ29 PLACE NEAR TO PIN
125 84
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 4,11 M_B_A8 A8 DQ27 M_B_DQ28
121 66 251 252
4,11 M_B_A9 A9 DQ28 VSS VSS
9,10,11,35 DDR4_DRAMRST#
DDR4_DRAMRST#

C1786 VDDQ
4,11 M_B_A10
4,11 M_B_A11
4,11 M_B_A12
146
120
119
158
A10_AP
A11
A12
DQ29
DQ30
DQ31
67
79
80
174
M_B_DQ27
M_B_DQ30
M_B_DQ26
M_B_DQ39
247
243
239
235
VSS
VSS
VSS
VSS
VSS
VSS
248
244
238
234
Sheet 12 of 79
4,11 M_B_A13 A13 DQ32 VSS VSS

C
*0.1u_10V_X7R_04

R1652
4,11 M_B_W E#
4,11 M_B_CAS#
4,11 M_B_RAS#
151
156
152
A14_WE*
A15_CAS*
A16_RAS*
DQ33
DQ34
DQ35
173
187
186
170
M_B_DQ35
M_B_DQ32
M_B_DQ37
M_B_DQ34
231
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
230
226
222
218
C
DDR4 CHB SO-
DQ36 VSS VSS
240_1%_04
4,11 M_B_ACT#
114

143
ACT*
DQ37
DQ38
DQ39
169
183
182
195
M_B_DQ38
M_B_DQ33
M_B_DQ36
M_B_DQ41
213
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
214
210
206
202
DIMM_1
4,11 DDR1_B_PARITY PARITY DQ40 M_B_DQ45 VSS VSS
116 194 197 196
4,11 DDR1_B_ALERT# DIMM1_CHB_EVENT# ALERT* DQ41 M_B_DQ46 VSS VSS
134 207 193 192
34 DIMM1_CHB_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_B_DQ43 VSS VSS
108 208 189 188
RESET* DQ43 191 M_B_DQ40 185 VSS VSS 184
DDR_VREFCA_CHB_DIMM 164 DQ44 190 M_B_DQ44 181 VSS VSS 180
VREFCA DQ45 203 M_B_DQ42 175 VSS VSS 176
254 DQ46 204 M_B_DQ47 171 VSS VSS 172
9,10,11,17,35,51 SMB_DATA_R SDA DQ47 M_B_DQ55 VSS VSS
253 216 167 168
9,10,11,17,35,51 SMB_CLK_R SCL DQ48 M_B_DQ48 VSS VSS
215 107 106
011 166
SA2
DQ49
DQ50
228 M_B_DQ49 103 VSS
VSS
VSS
VSS
102
PLACE THE CAP CLOSE TO SODIMM 260 229 M_B_DQ51 99 98
3.3VS SA1 DQ51 VSS VSS
D03 256 211 M_B_DQ52 93 94
3.3VS SA0 DQ52 VSS VSS
DDR_VREFCA_CHB_DIMM 212 M_B_DQ54 89 90
11 DDR_VREFCA_CHB_DIMM DQ53 M_B_DQ53 VSS VSS
224 85 86
CHA_DIMM0=000 DQ54 225 M_B_DQ50 81 VSS VSS 82
C1785 C1784 CHA_DIMM1=001 92 DQ55 237 M_B_DQ61 77 VSS VSS 78
91 CB0_NC DQ56 236 M_B_DQ62 73 VSS VSS 72
0.1u_10V_X7R_04 *2.2u_6.3V_X5R_04 CHB_DIMM0=010 101 CB1_NC DQ57 249 M_B_DQ60 69 VSS VSS 68
CB2_NC DQ58 VSS VSS
D03 CHB_DIMM1=011 105
CB3_NC DQ59
250 M_B_DQ58 65
VSS VSS
64
㨇㥳旸檀炻㓡0402 88
CB4_NC DQ60
232 M_B_DQ59 61
VSS VSS
60
87 233 M_B_DQ57 57 56
100 CB5_NC DQ61 245 M_B_DQ56 51 VSS VSS 52
2.5V 104 CB6_NC DQ62 246 M_B_DQ63 47 VSS VSS 48
B CB7_NC DQ63 43 VSS VSS 44 B
D03 M_B_DQS[7:0] 4,11 VSS VSS
㨇㥳旸檀炻㓡0402 VDDQ 12
DM0*/DBI0* DQS0_T
13 M_B_DQS0 39
VSS VSS
40
33 34 M_B_DQS1 35 36
54 DM1*/DBI1* DQS1_T 55 M_B_DQS2 31 VSS VSS 30
C766 C767 C962 C964 DM2*/DBI2* DQS2_T M_B_DQS3 VSS VSS
75 76 27 26
178 DM3*/DBI3* DQS3_T 179 M_B_DQS4 23 VSS VSS 22
10u_6.3V_X5R_04 *10u_6.3V_X5R_04 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 DM4*/DBI4* DQS4_T M_B_DQS5 VSS VSS
199 200 19 18
220 DM5*/DBI5* DQS5_T 221 M_B_DQS6 15 VSS VSS 14
241 DM6*/DBI6* DQS6_T 242 M_B_DQS7 9 VSS VSS 10
96 DM7*/DBI7* DQS7_T 97 5 VSS VSS 6
DM8*/DBI8* DQS8_T 1 VSS VSS 2
VTT_MEM M_B_DQS#[7:0] 4,11 VSS VSS
11 M_B_DQS#0
DQS0_C 32 M_B_DQS#1
DQS1_C 53 M_B_DQS#2
DQS2_C 74 M_B_DQS#3 D4AS0-26001-1P52
C774 C769 C768 DQS3_C M_B_DQS#4
177
DQS4_C 198 M_B_DQS#5
10u_6.3V_X5R_04 1u_6.3V_X5R_04 *10u_6.3V_X5R_04 DQS5_C M_B_DQS#6
219
DQS6_C 240 M_B_DQS#7
D03 D03 DQS7_C
㨇㥳旸檀炻㓡0402 暊SOCKET⣒役炻㓡⮷ DQS8_C
95
162
165 S2*/C0
VDDQ S3*/C1

D4AS0-26001-1P52 3,9,10,11,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 3.3VS


6-86-24260-003 4,7,9,10,11,35,52,57 VDDQ
C1778 C1777 C1775 C1776 C1780 C1779 C1782 C1781 9,10,11,52 VTT_MEM
9,10,11,52,57 2.5V
A 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 A

VDDQ

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C917 C932 C930 C892 C895 C912 C951 C949 Title
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
[12] DDR4 CHB SO-DIMM_1
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Tuesday, July 07, 2015 Sheet 12 of 79


5 4 3 2 1

DDR4 CHB SO-DIMM_1 B - 13


Schematic Diagrams

Panel, Inverter
5 4 3 2 1

PANEL CONNECTOR (For coaxial cable) PANEL POWER


DEFAULT SHORT

2 1
PJ4 2mm

PLVDD Q4A
VIN *MTS3572G6 VLED
2A
4 3
S2 D2
C151
C204 C212

G2
J_LCD1
EQ1 C227
1u_6.3V_X5R_04

*0.1u_50V_Y5V_06

*0.1u_50V_Y5V_06
D S FRAME_LOCK#_R *0.22u_50V_Y5V_06
30 FRAME_LOCK# 1

5
D
ἧ䓐CABLE㍍⛘ 2 1 D
*2SK3018S3 3.3VS 2 R70
D01A 3
3 *4.7K_06
4

G
暨䡢娵GS䁢3.3V R1872 1A 5 4 R86
VGA_ENAVDD 6 5
0_04 6 R85 *150K_1%_04
7 D01A
7 *100K_04
8
㬌悐↮䚖⇵㗗⃰㍸ὃPANEL䴎NV G sync,㓭䚖⇵䠔橼䶂嶗㗗ᶵ䓐 9 8
10 9
11 10 GND5
11 GND5 R87 3.3V
12 GND4
13 12 GND4 GND3 D01A
13 GND3 *100K_04
14 GND2
15 14 GND2 GND1
DEL LVDS SIGNAL R1860 *0_04

6
B.Schematic Diagrams

15 GND1 35,40,42,46,48,54,55 SUSB# R66


16
D01A 16 Q4B

D1
17
17 *MTS3572G6 *10K_04
18 PANEL_VCC_EN R1861
18 *0_04 PANEL_VCC_EN_R 1
EC1 0.1u_10V_X7R_04 DRX0# 19 G1

6
3 DP_TXN0 19 D

S1
Sheet 13 of 79 3 DP_TXP0
EC2

EC3
0.1u_10V_X7R_04

0.1u_10V_X7R_04
DRX0

DRX1#
20
21
22
20
21
5VS
LVDD_EN# 2G
Q3A
*MTDK5S6R

2
3 DP_TXN1 22 1 2 S
EC4 0.1u_10V_X7R_04 DRX1 23

1
3
3 DP_TXP1 23 D

Panel, Inverter 3
3
DP_TXN2
DP_TXP2
EC5
EC6
0.1u_10V_X7R_04
0.1u_10V_X7R_04
DRX2#
DRX2
24
25
26
27
24
25
26 3.3VS
PJ2

DEFAULT SHORT
*3mm
5G
S
Q3B
*MTDK5S6R

4
EC7 0.1u_10V_X7R_04 DRX3# 28 27
3 DP_TXN3 28 1 2
3.3VS ER5 *100K_04 EC8 0.1u_10V_X7R_04 DRX3 29
3 DP_TXP3 29
C 30 PLVDD C
30 PJ3 3mm
EC9 0.1u_10V_X7R_04 DAUX# 31 U3
3 DP_AUX# 31 2A
3 DP_AUX
EC10 0.1u_10V_X7R_04 DAUX
PANEL_VCC_EN
32
32 5 1 >80 mil
33 VIN VOUT
ER6 *100K_04 BRIGHTNESS_R 34 33
INV_BLON 34 C149 4
VLED 35 VIN/SS
HPD_L 35 1u_6.3V_X5R_04 C150 C159 R65
36
36 3 2
2A 37 EN GND
37 *1u_6.3V_X5R_04 10u_6.3V_X5R_06 *100K_04
38
38 UP7553
39
39 R60
40 PANEL_VCC_EN
R91 C243 C237 40
100K_04
LVDFH-04008-TP00+
*4.7K_06 0.1u_50V_Y5V_06 0.01u_50V_X7R_04 PCB Footprint = lvdfh-04008-tp
DEL LVDS SIGNAL D01A
current = 0.3A

eDP D01A 3.3VS


ER17 100K_04
EU1
3.3V
Brightness ᾉ嘇枸䔁㓦暣ᾅ嬟暣嶗 2 12 EC12 0.1u_16V_Y5V_04
34 NB_ENAVDD VGA_ENAVDD 0B0 VCC
11
㚱暨㯪ℵᶲẞ 30 VGA_ENAVDD 1B0 1 PANEL_VCC_EN
C R69 *10K_04 ER13 100K_04 A0
BRIGHTNESS_R PLVDD 10 3
AC S0 GND
ER18 *100K_04
C195 A D01A 5 9
C169 34 BLON 0B1 VCC
BRIGHTNESS_R PANEL_PW M 8
*0.1u_16V_Y5V_04 D2 R67 *0402_short 30 VGA_BKLTEN 1B1 BLON_R
4
*BAV99 RECTIFIER *0.1u_16V_Y5V_04 A1
ER14 100K_04 7 6
S1 GND
B B
PI5A3158BZAE D02
P/N = 6-03-53158-0J1
3,13,30,36,51 PS8331_SW
3.3VS
śɥš–‘š
L :PORT1 (INTEL) (DEFAULT) śɨš–‘š
H: PORT2 (NV)
C
A

ED1
BAV99 RECTIFIER 3.3V
HPD_L ER2 1K_04
EDP_HPD 3
3.3V
PANEL POWER
AC

R513 100K_04 U33C

14
EC11
74LVC08APW U33B

14
9 74LVC08APW
0.1u_16V_Y5V_04 48 BKL_EN 3.3V
8 BLON1 4
BLON_R 10 6 BLON2
5
R514 100K_04

7
U33A

14
7
R49 *100K_04 SB_BLON 74LVC08APW
1
3 INV_BLON
40 SB_BLON
2
3.3V
eDP ἧ䓐eDP㗪,BRIGHTNESS䚜㍍ U33D

14

7
㍍⇘EDP CONNECTOR 3.3VS
12
74LVC08APW R48 C93
48,50 LID_SW # 0.1u_10V_X7R_04
ER19 100K_04 D01A 11 LID_SW #1 100K_04
EU2
13
2 12 EC13 0.1u_16V_Y5V_04
34 EDP_BRIGHTNESS 0B0 VCC
A 11 A
30 VGA_BKLPW M 1B0 PANEL_PW M
1

7
ER15 100K_04 10 A0 3 DEL LVDS SIGNAL
S0 GND 5,40,48,61,63 ALL_SYS_PW RGD
5 9 ER20

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
8 0B1 VCC D01A
1B1 *10K_04
4
7 A1 6 D01A
3,13,30,36,51 PS8331_SW S1 GND Title

L :PORT1 (INTEL) (DEFAULT) PI5A3158BZAE 45,48,52,53,54,55,56,57,58,61,62,63,64 VIN


[13]PANEL,INVERTER,CRT
H: PORT2 (NV) P/N = 6-03-53158-0J1 17,34,45,46,47,49,50,51,54 5VS Size Document Number Rev
śɥš–‘š 2,30,41,42,43,44,49,51,52,54,55,58,59,60
3,9,10,11,12,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63
3.3V
3.3VS A3 P650RE 6-71-P65R0-D03 D03
śɨš–‘š
Date: Monday, July 06, 2015 Sheet 13 of 79
5 4 3 2 1

B - 14 Panel, Inverter
Schematic Diagrams

Redriver
5 4 3 2 1

NV_DP_F
TI PARADA
D03
61'366 36% 6-02-75130-BQ0 6-03-08330-030 29 MDP_F_AUX#_RE
29 MDP_F_AUX_RE R814 *100K_1%_04
R829 *100K_1%_04
SLQ X)*1' X)*1' U39 SN75DP130SSRGZR PS8330B D02 MDP_F_AUX_SCL
MDP_F_AUX#_SDA
3.3VS

2.2u_6.3V_X5R_04 MDP_F_AUX 16
pin2 C826 1u_6.3V_X5R_04 MDP_F_AUX# 16
SLQ .9&& .*1' *1' 0_04 3.3VS R619 10K_04
D01A A_AUTO_EQ
pin3 R618 *10K_04 C828 2.2u_6.3V_X5R_04 A_EN R640 *4.7K_04 3.3VS

SLQ [ .9&& .*1' pin7 R627 X 4.99K_1%_04 3.3VS


D02 D
10K_04 C380 C397

36
35
34
33
32
31
30
29
28
27
26
25
pin35 R619 X U39
SLQ [ .9&& .*1' 2.2u_6.3V_X5R_04 0.1u_10V_X5R_04 0.1u_10V_X5R_04

V3P3

V3P3

V3P3
DNC(VDDD_DREG)(CEXT) AUTO-EQ(RSTN)(RST#)
SDA_DDC
SCL_DDC

GND
AUX_SRCP
AUX_SRCN
HPD_SRC PERICOM(TI)(PARADA)AUX_SNKP
AUX_SNKN
ENABLE(ENABLE)(PD#)
pin35 C828 0.22u_10V_X5R_04

SLQ [ .*1' PS8330B


U44 SN75DP130SSRGZR FROM NV TO CON
X)*1' .9&&X)*1' 2.2u_6.3V_X5R_04 Zdiff=90ȍ 37
DNC Zdiff=100ȍ
SLQ pin2 C886 1u_6.3V_X5R_04 29 MDP_F0_RE
38
39 IN0P GND
24
23
pin3 R694 *10K_04 0_04 29 MDP_F#0_RE IN0N OUT0P MDP_F0 16

OP_1(SDA_CTL)(SDA_CTL/CFG0)
A_EQ 40 22
[ .9&& .*1'

OP_0(SCL_CTL)(SCL_CTL/PEQ)
EQ(DNC)(CFG1) OUT0N MDP_F#0 16
SLQ pin7 R726 X 4.99K_1%_04 29 MDP_F1_RE
41
IN1P DNC
21

OC_1(ADDR_EQ)(I2C_ADDR)
42 20
29 MDP_F#1_RE IN1N OUT1P MDP_F1 16
43 19

B.Schematic Diagrams
SLQ [ [ pin35 R691 X 10K_04
29 MDP_F2_RE
44 DNC
IN2P
OUT1N
GND
18
MDP_F#1 16

2.2u_6.3V_X5R_04 45 17
29 MDP_F#2_RE MDP_F2 16

CNTRL(DNC)(REXT)
pin35 C890 0.22u_10V_X5R_04 46 IN2N OUT2P 16
D02 OC_0(DNC)(NC) OUT2N MDP_F#2 16
47 15
29 MDP_F3_RE IN3P DNC
48 14
29 MDP_F#3_RE IN3N OUT3P MDP_F3 16
49 13
HGND OUT3N MDP_F#3 16

CAD_SRC

CAD_SNK
HPD_SNK
Sheet 14 of 79

V3P3

V3P3

V3P3
NV_DP_E D01A
D01A PS8330B
Redriver

1
2
3
4
5
6
7
8
9
10
11
12
29 MDP_E_AUX#_RE
MDP_E_AUX#_RE
MDP_E_AUX_RE
D03 C826 2.2u_6.3V_X5R_04 R837 100K_04 FROM CON
29 MDP_E_AUX_RE C827 *0.01u_16V_X7R_04 MDP_F_HPD 16
R809 *100K_1%_04 3.3VS C
D02 R813 *100K_1%_04
14,29 MDP_E_AUX_SCL
MDP_E_AUX_SCL
MDP_E_AUX#_SDA
3.3VS TO NV & PCH 30,36 MDP_F_HPD_RE
G_MDPF_MODE
D02
16
C400 C382
14,29 MDP_E_AUX#_SDA MDP_E_AUX 15
MDP_E_AUX# 15 D02 MDPF_MODE_SRC 0.1u_10V_X5R_04 0.1u_10V_X5R_04
R691 10K_04
D01A B_AUTO_EQ
3.3VS
C890 2.2u_6.3V_X5R_04 B_EN R734 *4.7K_04 3.3VS R622 *10K_04 A_OP_0 R621 *4.7K_04 3.3VS
3.3VS D02 R624 *10K_04 A_OP_1 R623 *4.7K_04 3.3VS
C492 C471
D01A
36
35
34
33
32
31
30
29
28
27
26
25

R627 4.99K_1%_04 A_CNTRL D02


U44
0.1u_10V_X5R_04 0.1u_10V_X5R_04
V3P3

V3P3

V3P3
DNC(VDDD_DREG)(CEXT) AUTO-EQ(RSTN)(RST#)
SDA_DDC
SCL_DDC

GND
AUX_SRCP
AUX_SRCN
HPD_SRC PERICOM(TI)(PARADA)AUX_SNKP
AUX_SNKN
ENABLE(ENABLE)(PD#)

R607 *10K_04 A_EQ R608 *10K_04 3.3VS

FROM NV Zdiff=90ȍ Zdiff=100ȍ


37
38 DNC 24
TO CON 3.3VS D02
29 MDP_E0_RE IN0P GND
39 23
29 MDP_E#0_RE IN0N OUT0P MDP_E0 15
OP_1(SDA_CTL)(SDA_CTL/CFG0)

B_EQ 40 22
OP_0(SCL_CTL)(SCL_CTL/PEQ)

EQ(DNC)(CFG1) OUT0N MDP_E#0 15


41 21
29 MDP_E1_RE IN1P DNC
OC_1(ADDR_EQ)(I2C_ADDR)

42 20
29 MDP_E#1_RE IN1N OUT1P MDP_E1 15
43 19
DNC OUT1N MDP_E#1 15 R1905 R1906 R1907
44 18
29 MDP_E2_RE IN2P GND 4.7K_04 4.7K_04 4.7K_04
45 17
29 MDP_E#2_RE MDP_E2 15
CNTRL(DNC)(REXT)

46 IN2N OUT2P 16
D02 OC_0(DNC)(NC) OUT2N MDP_E#2 15
47 15
29 MDP_E3_RE IN3P DNC
48 14
29 MDP_E#3_RE IN3N OUT3P MDP_E3 15
49 13

D
MDP_E#3 15

S
HGND OUT3N
CAD_SRC

G G
CAD_SNK
HPD_SNK

Q69 B
2SK3018S3
Q67 Q68 MDPF_MODE_SRC
G
V3P3

V3P3

V3P3

AO3415 AO3415

S
D01A MDP_F_AUX_SCL
D01A PS8330B 29 MDP_F_AUX_SCL
FROM CON MDP_F_AUX#_SDA
1
2
3
4
5
6
7
8
9
10
11
12

C886 2.2u_6.3V_X5R_04 R841 100K_04 29 MDP_F_AUX#_SDA


C889 *0.01u_16V_X7R_04 MDP_E_HPD 15
3.3VS 3.3VS
TO NV & PCH 30,36 MDP_E_HPD_RE D02 D03
C476 C493
G_MDPE_MODE 15
D02 0.1u_10V_X5R_04 0.1u_10V_X5R_04
MDPE_MODE_SRC
R1902 R1903 R1904
R701 *10K_04 B_OP_0 R700 *4.7K_04 4.7K_04 4.7K_04 4.7K_04
3.3VS
R723 *10K_04 B_OP_1 R722 *4.7K_04 3.3VS
D01A
R726 4.99K_1%_04 B_CNTRL D02
B_EQ

D
R658 *10K_04 R659 *10K_04

S
3.3VS G G Q66
2SK3018S3
Q64 Q65 MDPE_MODE_SRC
G
AO3415 AO3415

S
MDP_E_AUX_SCL
14,29 MDP_E_AUX_SCL MDP_E_AUX#_SDA
14,29 MDP_E_AUX#_SDA

3.3VS 3,9,10,11,12,13,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[14] DP REDRIVER
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 14 of 79


5 4 3 2 1

Redriver B - 15
Schematic Diagrams

Mini DP Port E
5 4 3 2 1

D01A
R343
R344
*0_04
*0_04
Close to Display PORT mini-Display Port E
1 2
14 MDP_E#3 D_MDP_E#3 3.3VS 3.3VS_MDP
C572 0.1u_10V_X7R_04
D_MDP_E3 U47
4 3 C567 0.1u_10V_X7R_04
14 MDP_E3 5 1
L16 *DVI2012F2SF-900T05_08-SHORT VIN VOUT
C553 ᶵ⎗ⷞ C613
R339 *0_04 SY6288DAAC 2
R341 *0_04
*10u_6.3V_X5R_06 㚫㺷暣 GND 10u_6.3V_X5R_06
1 2
14 MDP_E#2 D_MDP_E#2
D C564 0.1u_10V_X7R_04 D
D_MDP_E2 4 3
4 3 C561 0.1u_10V_X7R_04 17,52,54 SUSB EN# OC#
14 MDP_E2
L15 *DVI2012F2SF-900T05_08-SHORT
uP7549UMA5-20
PCB Footprint = M-SOT23-5
R351 *0_04
R346 *0_04
4 3
14 MDP_E#1 D_MDP_E#1
C576 0.1u_10V_X7R_04
1 2 C582 0.1u_10V_X7R_04 D_MDP_E1 3.3VS_MDP
14 MDP_E1 SHIELD6
L17 *DVI2012F2SF-900T05_08-SHORT COMMON GND4
SHIELD5 GND3
R352 *0_04
R361 *0_04
1 2 EMI_GND
14 MDP_E#0 D_MDP_E#0
C589 0.1u_10V_X7R_04 D01A 20
PWR 20
4 3 C585 0.1u_10V_X7R_04 D_MDP_E0 GND 19
B.Schematic Diagrams

14 MDP_E0 MDP_E_AUX#_R
19
L20 *DVI2012F2SF-900T05_08-SHORT 18 AUX_CHN
18
D01A
17
3.3VS D_MDP_E#2J 17 LANE_2N AUX_CHP16 MDP_E_AUX_R
16
D_MDP_E2J 15 LANE_2P
inductor for EMI 15
GND 14

Sheet 15 of 79 D03
R1910
R757 D_MDP_E#3J
D_MDP_E3J
12
10
LANE_3N
LANE_3P
14

12
13

11
GND

LANE_1N 11
13

D_MDP_E#1J

Mini DP Port E
5.1M_04 *100K_04 10
D_MDP_E1J 9 LANE_1P 9
7 GND 8
GND 8
D02 7
G_MDPE_CEC 6 CONFIG2
6
C G_MDPE_MODE 4 CONFIG1 LANE_0N 5 D_MDP_E#0J C
14 G_MDPE_MODE 5

4
D_MDP_E0J 3 LANE_0P
3
1 GND HPD 2 MDP_E_HPD_R EMI_GND
2
R763
J_MDP1
1 D01A
1M_04 909JD20FSTC6M0CC
EMI_GND P/N = 6-21-11Y10-020
PCB Footprint = c-909jd20fstc6-1 SHIELD2 GND2
3.3VS D03 SHIELD1 GND1

R239 *0_04

3
EMI㒢㓦

C
EMI_GND
3.3VS_MDP

A
D31
R756

2
*BAT54CS3
100K_1%_04
D01A
R1908 *0402_short MDP_E_AUX#_R
14 MDP_E_AUX#

D01A
B B

R1909 *0402_short MDP_E_AUX_R


14 MDP_E_AUX

R755

100K_1%_04

DP ESD W/O LEVELSHIFT 暨ᶲ, NET ⎗SWAP


D12

D_MDP_E#3 6 5 D_MDP_E#3J
D_MDP_E3 7 4 D_MDP_E3J
8 3
D_MDP_E#2 9 2 D_MDP_E#2J
D_MDP_E2 10 1 D_MDP_E2J

PS8330Bℏ悐㚱㈿ESD *PUSB3F96 D03


D13
D01A
TO DP REDRIVER
D_MDP_E#1 10 1 D_MDP_E#1J
R792 1K_04 L42 FCM1005KF-121T03 MDP_E_HPD_R
14 MDP_E_HPD D_MDP_E1 9 2 D_MDP_E1J
AC

8 3
C992 D_MDP_E0 D_MDP_E0J
7 4
D32 D_MDP_E#0 D_MDP_E#0J
6 5
BAV99 RECTIFIER 220p_50V_NPO_04
A A
A

3.3VS_MDP PS8330Bℏ悐㚱㈿ESD *PUSB3F96 D03

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
16 3.3VS_MDP
[15] MINI DP PORT E
3,9,10,11,12,13,14,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 3.3VS Size Document Number Rev
13,17,34,45,46,47,49,50,51,54 5VS D03
A3 P650RE
6-71-P65R0-D03
Date: Monday, July 06, 2015 Sheet 15 of 79
5 4 3 2 1

B - 16 Mini DP Port E
Schematic Diagrams

Mini DP Port F
5 4 3 2 1

mini-Display Port F
PLEASE CLOSE TO CONNECTOR
3.3VS_MDP
D01A

D R393 *0_04 Close to Display PORT D


1 2 C550
14 MDP_F#3 D_MDP_F#3
C637 0.1u_10V_X7R_04
L32 4 3 C635 0.1u_10V_X7R_04 D_MDP_F3 10u_6.3V_X5R_06
14 MDP_F3
*DVI2012F2SF-900T05_08-SHORT
R387 *0_04

R380 *0_04
1 2
14 MDP_F#2 D_MDP_F#2
C628 0.1u_10V_X7R_04
L29 4 3 C616 0.1u_10V_X7R_04 D_MDP_F2
14 MDP_F2
*DVI2012F2SF-900T05_08-SHORT
R377 *0_04

R394 *0_04 COMMON SHIELD6 GND4


4 3 SHIELD5 GND3
14 MDP_F#1

B.Schematic Diagrams
C640 0.1u_10V_X7R_04 D_MDP_F#1
L33 1 2 C644 0.1u_10V_X7R_04 D_MDP_F1 3.3VS_MDP
14 MDP_F1
*DVI2012F2SF-900T05_08-SHORT
R399 *0_04 D01A PWR 20

Sheet 16 of 79
20
GND 19
19
R410 *0_04 MDP_F_AUX#_R 18 AUX_CHN D01A
18
1 2
14 MDP_F#0 D_MDP_F#0 D_MDP_F#2J
17
MDP_F_AUX_R
C652 0.1u_10V_X7R_04 17 LANE_2N AUX_CHP16
L34
Mini DP Port F
16
4 3 C649 0.1u_10V_X7R_04 D_MDP_F0 3.3VS D_MDP_F2J 15 LANE_2P
14 MDP_F0 15
GND
*DVI2012F2SF-900T05_08-SHORT 14
14
R403 *0_04 D03 GND 13
13
D_MDP_F#3J 12 LANE_3N
R1911 D_MDP_F3J
12
D_MDP_F#1J
R796 10 LANE_3P
11
LANE_1N 11
C 5.1M_04 10
C
*100K_04 D_MDP_F1J 9 LANE_1P 9
7 GND 8
GND 8
inductor for EMI D02 7
G_MDPF_CEC 6 CONFIG2
6
G_MDPF_MODE 4 CONFIG1 LANE_0N 5 D_MDP_F#0J
14 G_MDPF_MODE 5

4
D01A
D_MDP_F0J 3 LANE_0P
3.3VS 3
MDP_F_HPD_R
D03 1 GND 2
HPD 2
R797 1
J_MDP2
1M_04 909JD20FSTC6M0CC
3

EMI_GND P/N = 6-21-11Y10-020


C

PCB Footprint = c-909jd20fstc6-1 SHIELD2 GND2


SHIELD1 GND1
3.3VS_MDP
D02
A

D33
R794
DEL
1

*BAT54CS3
100K_1%_04 D01A EMI_GND

R1912 *0402_short MDP_F_AUX#_R


14 MDP_F_AUX#

DP ESD W/O LEVELSHIFT 暨ᶲ, NET ⎗SWAP

D01A D15

B R1913 *0402_short MDP_F_AUX_R D_MDP_F#3 6 5 D_MDP_F#3J B


14 MDP_F_AUX D_MDP_F3 D_MDP_F3J
7 4
8 3
R793 D_MDP_F#2 9 2 D_MDP_F#2J
D_MDP_F2 10 1 D_MDP_F2J
100K_1%_04

PS8330Bℏ悐㚱㈿ESD *PUSB3F96 D03


D16

D_MDP_F#1 10 1 D_MDP_F#1J
D_MDP_F1 9 2 D_MDP_F1J
8 3
D_MDP_F0 7 4 D_MDP_F0J
D_MDP_F#0 6 5 D_MDP_F#0J

PS8330Bℏ悐㚱㈿ESD *PUSB3F96 D03

TO DP REDRIVER D01A
A A
R801 1K_04 L43 FCM1005KF-121T03 MDP_F_HPD_R
14 MDP_F_HPD
AC

C1001
D34
BAV99 RECTIFIER 220p_50V_NPO_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
A

Title
[16] MINI DP PORT F
3.3VS_MDP 3.3VS_MDP 15 Size Document Number Rev
3.3VS 3,9,10,11,12,13,14,15,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63
5VS 13,17,34,45,46,47,49,50,51,54 A3
6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 16 of 79


5 4 3 2 1

Mini DP Port F B - 17
Schematic Diagrams

HDMI Connector

5 4 3 2 1

HDMI_5VS

5VS
HDMI_5VS
HDMI CONNECTOR For ESD HDMI_5VS

EMC2
HDMI_5VS

EMC3
D01A

BY platform 婧㔜℞ῤ
U8 J_HDMI1

C
A

A
5 1 16-A0171-2003-0 R146 R163 *100p_50V_NPO_04 *0.1u_16V_Y5V_04
VIN VOUT P/N = 6-21-14A80-019
ᶵ⎗ⷞ C348 C352 2.2K_04 2.2K_04
SY6288DAAC 2 D5 D6 D4
㚫㺷暣

AC

AC

AC
GND 22u_6.3V_X5R_08 22u_6.3V_X5R_08 *BAV99 RECTIFIER *BAV99 RECTIFIER *BAV99 RECTIFIER

4 3 PCB Footprint = C12881-100C


15,52,54 SUSB EN# OC# HDMI_HPD-C HDMI_SCL-C
D 19 D
uP7549UMA5-20 18 HOT PLUG DETECT
PCB Footprint = M-SOT23-5 +5V 17 HDMI_SDA-C
HDMI_SDA-C 16 DDC/CEC GND
SDA 15 HDMI_SCL-C HDMI_HPD-C
14 SCL
R1917 RESERVED HDMI_CEC
13
TMDS_CLOCK#-R 12 CEC
*180_1%_04 TMDS CLOCK- 11
TMDS_CLOCK-R CLK SHIELD R1920
10
TMDS CLOCK+ 9 TMDS_DATA0#-R
B.Schematic Diagrams

TMDS DATA0- *180_1%_04


8
D03 SHIELD0 7 TMDS_DATA0-R
TMDS_DATA1#-R 6 TMDS DATA0+
TMDS DATA1- 5
SHIELD1
Sheet 17 of 79 TMDS_DATA1-R
R1918

*180_1%_04
4

2
TMDS DATA1+

SHIELD2
TMDS DATA2-
3

1
D03
TMDS_DATA2#-R

TMDS_DATA2-R
R1919

HDMI Connector
TMDS DATA2+

*180_1%_04

GND1
GND2
GND3
GND4
EMI_GND EMI_GND

HDMI 1.2VS

GND1
GND2
GND3
GND4
3.3VS R283 *15K_1%_04 3.3VS
VDD12_ON R1808 0_04 1.2VS_EN
C D01A C411 C
R804 *20mil_Short-p C459
R282 2.2u_6.3V_X5R_04
EMI㒢㓦

*0.1u_10V_X7R_04
*6.2K_1%_04
EMI_GND

U13
1A(40mil)
HDMI 2.0 Repeater R154 *0_04 R1
1

5
EN

NC
VIN

LX
4

3 1
L12
2.2uH_4*4*2.0
2 1A(40mil)
1.2VS
9,10,11,12,35,51 SMB_DATA_R
9,10,11,12,35,51 SMB_CLK_R R156 *0_04
D01A R269 10K_1%_04 6 2
1.2VS VFB GND C415
3.3VS R221 2.2K_04
G5719TB1U

PS8409_SDA
PS8409_SCL

C1705

C1706
R220 2.2K_04 10u_6.3V_X5R_06

I2C_ADDR

PRE
R275

HDMI_ID
29 HDMI_CTRLDATA C425 R2 D03
29 HDMI_CTRLCLK
RST#
*47P_6.3V_Y5V_04 10K_1%_04 㓡0603cost down
D01A

0.1u_10V_X7R_04

0.01u_16V_X7R_04
R1803 4.99K_1%_04
Vout=0.6V*(1+R1/R2)

36
35
34
33
32
31
30
29
28
27
26
25
U9

VDD12
CSCL

RSV2
HDMI_ID
RESETB
SCL_SRC/AUXP
SDA_SRC/AUXN

I2C_ADDR

NC
REXT

CSDA
PRE
B B

VDD12_ON 37 24 3.3VS
C362 0.1u_10V_X7R_04 HDMI_DATA2P_C 38 POWERSW VDD33 23 TMDS_DATA2-R
29 HDMI_DATA2P HDMI_DATA2N_C IN_D2p OUT_D2p TMDS_DATA2#-R
39 22

C1707

C1708
C360 0.1u_10V_X7R_04
29 HDMI_DATA2N HDMI_HPD_C IN_D2n OUT_D2n HDMI_HPD-C
R1801 1K_04 40 21
30,36 HDMI_HPD HDMI_DATA1P_C HPD_SRC HPD_SNK TMDS_DATA1-R
C358 0.1u_10V_X7R_04 41 20
29 HDMI_DATA1P HDMI_DATA1N_C IN_D1p OUT_D1p TMDS_DATA1#-R
C357 0.1u_10V_X7R_04 42 19
29 HDMI_DATA1N IN_D1n OUT_D1n
1.2VS 43 18 1.2VS
C355 0.1u_10V_X7R_04 HDMI_DATA0P_C 44 VDDRX12 VDDTX12 17 TMDS_DATA0-R

0.1u_10V_X7R_04

0.01u_16V_X7R_04
29 HDMI_DATA0P HDMI_DATA0N_C IN_D0p OUT_D0p TMDS_DATA0#-R
C351 0.1u_10V_X7R_04 45 PS8409QFN48GTR2-A1 OUT_D0n 16
29 HDMI_DATA0N IN_D0n
1.2VS 46 15 1.2VS
C349 0.1u_10V_X7R_04 HDMI_CLOCKP_C 47 VDDRX12 VDDTX12 14 TMDS_CLOCK-R
29 HDMI_CLOCKP HDMI_CLOCKN_C IN_CKp OUT_CKp TMDS_CLOCK#-R
C347 0.1u_10V_X7R_04 48 13
29 HDMI_CLOCKN

TESTMODEB
IN_CKn OUT_CKn

HDMI_CEC
49

C1709

C1710

C1711
SDA_SNK
SCL_SNK
DCIN_EN
EPAD

CEC_EN
VDDA12
VDD33

VDD12

RSV1
PDB
EQ
3.3VS
C1712

C1713

C1714

qfn48-6x6mmc

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.01u_16V_X7R_04
1
2
3
4
5
6
7
8
9
10
11
12
R1802
1.2VS

HDMI_SDA-C
HDMI_SCL-C
3.3VS
0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.01u_16V_X7R_04

10K_04

DCIN_EN
C1715

C1716

C1717

C1718
1.2VS

1.2VS
R840 *4.7K_04 DCIN_EN RST#
A EQ A
3.3VS 3,9,10,11,12,13,14,15,16,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63
3.3VS R1807 *4.7K_04 EQ
5VS 13,34,45,46,47,49,50,51,54
0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.01u_16V_X7R_04
C1719
R1806 *4.7K_04
1u_6.3V_X5R_04

R839 *4.7K_04 PRE ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/


Title
3.3VS R1805 *4.7K_04 I2C_ADDR [17] HDMI 2.0 PS8409
Size Document Number Rev
3.3VS R1804 *4.7K_04 HDMI_ID
A3 P650RE 6-71-P65R0-D03 D03

Date: Tuesday, July 07, 2015 Sheet 17 of 79


5 4 3 2 1

B - 18 HDMI Connector
Schematic Diagrams

VGA PCI Express

1 2 3 4 5

3V3_AON

36,60 DGPU_PWRGD
R521
10K_04
NV PCI EXPRESS

G
Q38
D S 2SK3018S3 PEX_CLKREQ#
37 PEG_CLKREQ#
R522
A A
G1A
*100K_04 BGA1745
COMMON PLACE AT PLACE OUTSIDE PEX_VDD
1/21 PCI_EXPRESS
BALLS OF BGA D01A
SNN_PEXWAKE BJ21 PEX_WAKE
PEX_IOVDD AW33
R520 0_04 BE20 PEX_RST PEX_IOVDD AY32 C108 C106 C109 C1 C3 C110 C112
3,30 GPU_PEX_RST#
PEX_IOVDD AY33

1u_6.3V_X6S_04

1u_6.3V_X6S_04

4.7u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

22u_6.3V_X5R_08

22u_6.3V_X5R_08
PEX_CLKREQ# BB20 PEX_CLKREQ PEX_IOVDD AY35
PEX_IOVDD BA33
VGA_PEXCLK BD20 PEX_REFCLK PEX_IOVDD BA35
37 VGA_PEXCLK VGA_PEXCLK# BC20 PEX_REFCLK PEX_IOVDD BB33
37 VGA_PEXCLK#

B.Schematic Diagrams
C323 0.22u_10V_X5R_04 PEX_RX0 BC21 PEX_TX0
2 PEG_RX0 PEX_RX0#
C319 0.22u_10V_X5R_04 BD21 PEX_TX0
2 PEG_RX#0
GND

Sheet 18 of 79
BH21 PEX_RX0
2 PEG_TX0
BG21 PEX_RX0 CHANGE FP PEX_VDD
2 PEG_TX#0
C328 0.22u_10V_X5R_04 PEX_RX1 BE22 PEX_TX1 D01A
2 PEG_RX1 PEX_RX1#
C324 0.22u_10V_X5R_04 BE23 PEX_TX1 PEX_IOVDDQ AY24

VGA PCI Express


2 PEG_RX#1
PEX_IOVDDQ AY26
BG23 PEX_RX1 PEX_IOVDDQ AY27 C219 C6 C707 C103 C111
2 PEG_TX1
BH23 PEX_RX1 PEX_IOVDDQ AY29 C105 C107
2 PEG_TX#1

4.7u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

22u_6.3V_X5R_08

22u_6.3V_X5R_08
PEX_IOVDDQ AY30

1u_6.3V_X6S_04

1u_6.3V_X6S_04
C312 0.22u_10V_X5R_04 PEX_RX2 BD23 PEX_TX2 PEX_IOVDDQ BA24
2 PEG_RX2 PEX_RX2#
C308 0.22u_10V_X5R_04 BC23 PEX_TX2 PEX_IOVDDQ BA26
2 PEG_RX#2
PEX_IOVDDQ BA27
BJ23 PEX_RX2 PEX_IOVDDQ BA29
2 PEG_TX2
BJ24 PEX_RX2 PEX_IOVDDQ BA30
2 PEG_TX#2
PEX_IOVDDQ BA32
B C317 0.22u_10V_X5R_04 PEX_RX3 BC24 PEX_TX3 PEX_IOVDDQ BB24 GND B
2 PEG_RX3 PEX_RX3#
C314 0.22u_10V_X5R_04 BD24 PEX_TX3 PEX_IOVDDQ BB27
2 PEG_RX#3
PEX_IOVDDQ BB30
BH24 PEX_RX3
2 PEG_TX3
BG24 PEX_RX3
2 PEG_TX#3
C300 0.22u_10V_X5R_04 PEX_RX4 BE26 PEX_TX4
2 PEG_RX4 PEX_RX4#
C301 0.22u_10V_X5R_04 BE25 PEX_TX4
2 PEG_RX#4
BG26 PEX_RX4
2 PEG_TX4 3V3_AON
BH26 PEX_RX4 PLACE AT BALLS PLACE OUTSIDE
2 PEG_TX#4
OF BGA
C307 0.22u_10V_X5R_04 PEX_RX5 BD26 PEX_TX5
2 PEG_RX5 PEX_RX5#
C302 0.22u_10V_X5R_04 BC26 PEX_TX5
2 PEG_RX#5
PEX_PLL_HVDD AW30 C139
BJ26 PEX_RX5 C86 C81
2 PEG_TX5

0.1u_10V_X7R_04
BJ27 PEX_RX5 PEX_SVDD_3V3 AW32
2 PEG_TX#5

4.7u_6.3V_X5R_06

4.7u_6.3V_X5R_06
C296 0.22u_10V_X5R_04 PEX_RX6 BC27 PEX_TX6
2 PEG_RX6 PEX_RX6#
C290 0.22u_10V_X5R_04 BD27 PEX_TX6
2 PEG_RX#6
BH27 PEX_RX6
2 PEG_TX6
BG27 PEX_RX6 GND
2 PEG_TX#6
C299 0.22u_10V_X5R_04 PEX_RX7 BE28 PEX_TX7
2 PEG_RX7 PEX_RX7#
C297 0.22u_10V_X5R_04 BE29 PEX_TX7
2 PEG_RX#7
BG29 PEX_RX7
2 PEG_TX7
BH29 PEX_RX7
2 PEG_TX#7
C287 0.22u_10V_X5R_04 PEX_RX8 BD29 PEX_TX8
2 PEG_RX8 PEX_RX8#
C286 0.22u_10V_X5R_04 BC29 PEX_TX8
2 PEG_RX#8
C BJ29 PEX_RX8 NVVDD_SENSE AY23 GPU_VDD_SENSE 58,59 C
2 PEG_TX8
BJ30 PEX_RX8
2 PEG_TX#8
GND_SENSE AW23 GPU_VSS_SENSE 58,59
C289 0.22u_10V_X5R_04 PEX_RX9 BC30 PEX_TX9
2 PEG_RX9 PEX_RX9# 28,29,58 PEX_VDD
C288 0.22u_10V_X5R_04 BD30 PEX_TX9
2 PEG_RX#9
3,30,31,58 3V3_AON
BH30 PEX_RX9
2 PEG_TX9
BG30 PEX_RX9
2 PEG_TX#9 2,13,30,41,42,43,44,49,51,52,54,55,58,59,60 3.3V
C282 0.22u_10V_X5R_04 PEX_RX10 BE31 PEX_TX10
2 PEG_RX10 PEX_RX10#
C281 0.22u_10V_X5R_04 BE32 PEX_TX10
2 PEG_RX#10
BG32 PEX_RX10
2 PEG_TX10
BH32 PEX_RX10
2 PEG_TX#10
C285 0.22u_10V_X5R_04 PEX_RX11 BD32 PEX_TX11
2 PEG_RX11 PEX_RX11#
C283 0.22u_10V_X5R_04 BC32 PEX_TX11
2 PEG_RX#11
BJ32 PEX_RX11 PEX_TEST_PLL_CLK_OUT Termination = 200ohm
2 PEG_TX11
BJ33 PEX_RX11
2 PEG_TX#11 PEX_TSTCLK_OUT
PEX_TSTCLK_OUT BH38
C277 0.22u_10V_X5R_04 PEX_RX12 BC33 PEX_TX12 PEX_TSTCLK_OUT BG38 PEX_TSTCLK_OUT#
2 PEG_RX12 PEX_RX12#
C276 0.22u_10V_X5R_04 BD33 PEX_TX12 R56 *200_1%_04
2 PEG_RX#12
BH33 PEX_VDD
2 PEG_TX12 PEX_RX12
BG33 PEX_RX12 PLACE OUTSIDE
2 PEG_TX#12
OF BGA
C280 0.22u_10V_X5R_04 PEX_RX13 BE34 PEX_TX13 PEX_PLLVDD AW26 PEX_PLLVDD_L R72 0_06
2 PEG_RX13 PEX_RX13#
C279 0.22u_10V_X5R_04 BE35 PEX_TX13
2 PEG_RX#13
C166 C170 C233
BG35 PEX_RX13
2 PEG_TX13
BH35 PEX_RX13 0.1u_10V_X7R_04 1u_6.3V_X5R_04 4.7u_6.3V_X5R_06
2 PEG_TX#13
D C273 0.22u_10V_X5R_04 PEX_RX14 BD35 PEX_TX14 D
2 PEG_RX14 PEX_RX14# GPU_TESTMODE
C271 0.22u_10V_X5R_04 BC35 PEX_TX14 TESTMODE BA23 R71 10K_04
2 PEG_RX#14
BJ35 PEX_RX14 GND
2 PEG_TX14
BJ36 PEX_RX14
2 PEG_TX#14
GND
C275 0.22u_10V_X5R_04 PEX_RX15 BC36 PEX_TX15

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
2 PEG_RX15 PEX_RX15#
C272 0.22u_10V_X5R_04 BD36 PEX_TX15
2 PEG_RX#15
BH36 PEX_RX15 PEX_TERMP BJ38 PEX_TERMP R515 2.49K_1%_04
2 PEG_TX15 Title
BG36
2 PEG_TX#15 PEX_RX15
[18] VGA PCI EXPRESS
N16E-GT Size Document Number Rev
GND
Custom P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 18 of 79


1 2 3 4 5

VGA PCI Express B - 19


Schematic Diagrams

VGA Frame Buffer Partition


1 2 3 4 5 6 7 8

G1C
G1B
BGA1745
COMMON
PAGE3: GPU FRAME BUFFER PARTITION A/B BGA1745
COMMON

3/21 FBB
2/21 FBA
FBB_D0 D30 FBB_D0 FBB_CMD0 C29 FBB_CMD0
A FBA_D0 V43 U47 FBA_CMD0 FBA_DBI[7..0] FBB_DBI[7..0] FBB_D1 G30 B29 FBB_CMD1 A
FBA_D0 FBA_CMD0 FBA_DBI[7..0] 20 FBB_DBI[7..0] 21 FBB_D1 FBB_CMD1
FBA_D1 V41 FBA_D1 FBA_CMD1 U48 FBA_CMD1 FBB_D2 E30 FBB_D2 FBB_CMD2 A29 FBB_CMD2
FBA_D2 V44 U49 FBA_CMD2 FBA_EDC[7..0] FBB_EDC[7..0] FBB_D3 F30 A30 FBB_CMD3
FBA_D2 FBA_CMD2 FBA_EDC[7..0] 20 FBB_EDC[7..0] 21 FBB_D3 FBB_CMD3
FBA_D3 V42 FBA_D3 FBA_CMD3 V48 FBA_CMD3 FBB_D4 G29 FBB_D4 FBB_CMD4 B30 FBB_CMD4
FBA_D4 U43 V49 FBA_CMD4 FBA_CMD[31..0] FBB_CMD[31..0] FBB_D5 F29 B32 FBB_CMD5
FBA_D4 FBA_CMD4 FBA_CMD[31..0] 20 FBB_CMD[31..0] 21 FBB_D5 FBB_CMD5
FBA_D5 U44 FBA_D5 FBA_CMD5 V47 FBA_CMD5 FBB_D6 J29 FBB_D6 FBB_CMD6 A32 FBB_CMD6
FBA_D6 U41 AA49 FBA_CMD6 FBA_D[63..0] FBB_D[63..0] FBB_D7 H29 C32 FBB_CMD7
FBA_D6 FBA_CMD6 FBA_D[63..0] 20 FBB_D[63..0] 21 FBB_D7 FBB_CMD7
FBA_D7 U42 FBA_D7 FBA_CMD7 AA48 FBA_CMD7 FBB_D8 C33 FBB_D8 FBB_CMD8 A33 FBB_CMD8
FBA_D8 AA46 FBA_D8 FBA_CMD8 AC48 FBA_CMD8 FBB_D9 E33 FBB_D9 FBB_CMD9 B33 FBB_CMD9
FBA_D9 AC46 FBA_D9 FBA_CMD9 AC49 FBA_CMD9 FBB_D10 F33 FBB_D10 FBB_CMD10 B35 FBB_CMD10
FBA_D10 AA45 FBA_D10 FBA_CMD10 AC47 FBA_CMD10 FBB_D11 D33 FBB_D11 FBB_CMD11 A35 FBB_CMD11
FBA_D11 AA47 FBA_D11 FBA_CMD11 AD49 FBA_CMD11 FBB_D12 C30 FBB_D12 FBB_CMD12 C35 FBB_CMD12
FBA_D12 Y46 FBA_D12 FBA_CMD12 AD48 FBA_CMD12 FBB_D13 K33 FBB_D13 FBB_CMD13 A36 FBB_CMD13
FBA_D13 Y49 FBA_D13 FBA_CMD13 AD47 FBA_CMD13 FBB_D14 E32 FBB_D14 FBB_CMD14 B36 FBB_CMD14
FBA_D14 Y45 AF47 FBA_CMD14 FBB_D15 D32 B38 FBB_CMD15
FBA_D15 Y48
FBA_D14
FBA_D15
FBA_CMD14
FBA_CMD15 AF48 FBA_CMD15 GDDR5 Mode F Mapping FBB_D16 H39
FBB_D15
FBB_D16
FBB_CMD15
FBB_CMD16 D49 FBB_CMD16
B.Schematic Diagrams

FBA_D16 AJ46 FBA_D16 FBA_CMD16 BB49 FBA_CMD16 FBB_D17 G39 FBB_D17 FBB_CMD17 C48 FBB_CMD17
FBA_D17 AG47 BA48 FBA_CMD17 FBB_D18 F39 B46 FBB_CMD18
FBA_D18 AG46
FBA_D17 FBA_CMD17
BA49 FBA_CMD18
GB3B-256 ch0 0..31 ch1 32..63 FBB_D19 D41
FBB_D18 FBB_CMD18
A46 FBB_CMD19
FBA_D18 FBA_CMD18 FBB_D19 FBB_CMD19
FBA_D19 AG45 AW49 FBA_CMD19 FBB_D20 F38 A45 FBB_CMD20
FBA_D20 AF44
FBA_D19 FBA_CMD19
AV48 FBA_CMD20
CMD0 CAS* FBB_D21 G38
FBB_D20 FBB_CMD20
C44 FBB_CMD21
FBA_D20 FBA_CMD20 FBB_D21 FBB_CMD21
FBA_D21 AF45 AV49 FBA_CMD21 FBB_D22 D38 A44 FBB_CMD22
FBA_D22 AD46
FBA_D21 FBA_CMD21
AN48 FBA_CMD22
CMD1 CKE* FBB_D23 E38
FBB_D22 FBB_CMD22
B44 FBB_CMD23
FBA_D22 FBA_CMD22 FBVDDQ FBB_D23 FBB_CMD23
FBA_D23 AD45 AN49 FBA_CMD23 FBB_D24 F36 C42 FBB_CMD24
FBA_D24 AD44
FBA_D23 FBA_CMD23
AM47 FBA_CMD24
CMD2 RST* FBB_D25 K35
FBB_D24 FBB_CMD24
B42 FBB_CMD25
FBVDDQ
FBA_D24 FBA_CMD24 FBB_D25 FBB_CMD25
FBA_D25 AD43 AM49 FBA_CMD25 FBB_D26 E36 A42 FBB_CMD26
FBA_D26 AD42
FBA_D25 FBA_CMD25
AM48 FBA_CMD26
CMD3 RAS* FBB_D27 D36
FBB_D26 FBB_CMD26
A41 FBB_CMD27

Sheet 19 of 79
FBA_D26 FBA_CMD26 FBB_D27 FBB_CMD27
FBA_D27 AC42 AJ47 FBA_CMD27 FBB_D28 G35 B41 FBB_CMD28
FBA_D28 AA44
FBA_D27 FBA_CMD27
AJ49 FBA_CMD28
CMD4 A1_A9 FBB_D29 F35
FBB_D28 FBB_CMD28
C39 FBB_CMD29
FBA_D28 FBA_CMD28 FBB_D29 FBB_CMD29
FBA_D29 AA43 AJ48 FBA_CMD29 R42 R43 FBB_D30 D35 B39 FBB_CMD30 R64 R50
FBA_D30 AA42
FBA_D29 FBA_CMD29
AG48 FBA_CMD30
CMD5 A0_A10 FBB_D31 E35
FBB_D30 FBB_CMD30
A39 FBB_CMD31
FBA_D30 FBA_CMD30 *60.4_1%_04 *60.4_1%_04 FBB_D31 FBB_CMD31 *60.4_1%_04 *60.4_1%_04

VGA Frame Buffer


FBA_D31 AA40 AG49 FBA_CMD31 FBB_D32 M44 A38
FBA_D32 AT48
FBA_D31 FBA_CMD31
AF49
CMD6 A12_RFU FBB_D33 P42
FBB_D32 FBB_CMD32
C38
FBA_D32 FBA_CMD32 FBB_D33 FBB_CMD33
FBA_D33 AT46 AF46 FBB_D34 M43 D29 FBB_DEBUG0
FBA_D34 AT49
FBA_D33 FBA_CMD33
Y47 FBA_DEBUG0
CMD7 ABI* FBB_D35 P43
FBB_D34 FBB_CMD34
C41 FBB_DEBUG1
B
FBA_D34 FBA_CMD34 FBB_D35 FBB_CMD35 B
FBA_D35 AT47 AR47 FBA_DEBUG1 FBB_D36 R45
FBA_D35 FBA_CMD35 CMD8 A6_A11 FBB_D36

Partition FBA_D36
FBA_D37
FBA_D38
FBA_D39
AW47
AW48
BA47
AW46
FBA_D36
FBA_D37
FBA_D38
FBA_D39
CMD9
CMD10
A7_A8
WE*
FBB_D37
FBB_D38
FBB_D39
FBB_D40
R46
R43
R44
M47
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBA_D40 AR46 FBA_D40
FBB_D41 P44 FBB_D41
FBA_D41 AN45 FBB_D42 M46
FBA_D42 AR49
FBA_D41 CMD11 A5_BA1 FBB_D43 M45
FBB_D42
FBA_D42 FBB_D43
FBA_D43 AR48 FBB_D44 P47 E41 FBB_CLK0
FBA_D44 AT45
FBA_D43
AF41 FBA_CLK0 FB_CLK
CMD12 A4_BA2 FBB_D45 P49
FBB_D44 FBB_CLK0
F41 FBB_CLK0*
DP_FBB_CLK0 FB_CLK FBB_CLK0 21
FBA_D44 FBA_CLK0 DP_FBA_CLK0 FBA_CLK0 20 FBB_D45 FBB_CLK0 DP_FBB_CLK0 FB_CLK FBB_CLK0* 21
FBA_D45 AR44 AF40 FBA_CLK0* FB_CLK FBB_D46 P45 E42 FBB_CLK1
FBA_D46 AN41
FBA_D45 FBA_CLK0
AJ44 FBA_CLK1
DP_FBA_CLK0
FB_CLK
FBA_CLK0* 20 CMD13 A2_BA0 FBB_D47 P46
FBB_D46 FBB_CLK1
D42 FBB_CLK1*
DP_FBB_CLK1 FB_CLK FBB_CLK1 21
FBA_D46 FBA_CLK1 DP_FBA_CLK1 FBA_CLK1 20 FBB_D47 FBB_CLK1 DP_FBB_CLK1 FB_CLK FBB_CLK1* 21
FBA_D47 AN42 AJ45 FBA_CLK1* FB_CLK FBB_D48 F46
FBA_D48 AG40
FBA_D47 FBA_CLK1 DP_FBA_CLK1 FBA_CLK1* 20 CMD14 A3_BA3 FBB_D49 E47
FBB_D48
FBA_D48 FBB_D49
FBA_D49 AG43 FBB_D50 D47
FBA_D50 AG41
FBA_D49 CMD15 CS* FBB_D51 D48
FBB_D50
FBA_D50 FBB_D51
FBA_D51 AJ43 FBB_D52 F48
FBA_D52 AJ40
FBA_D51 CMD16 CAS* FBB_D53 H46
FBB_D52
FBA_D52 FBB_D53
FBA_D53 AK40 FBB_D54 H47
FBA_D54 AK42
FBA_D53 CMD17 CKE* FBB_D55 H48
FBB_D54
FBA_D54 FBB_D55
FBA_D55 AK41 FBB_D56 L45 F32 FBB_WCK01
FBA_D56 AK45
FBA_D55
V46 FBA_WCK01 FB_WCK
CMD18 RST* FBB_D57 L44
FBB_D56 FBB_WCK01
G32 FBB_WCK01*
FBB_WCK01 FB_WCK FBB_WCK01 21
FBA_D56 FBA_WCK01 FBA_WCK01 FBA_WCK01 20 FBB_D57 FBB_WCK01 FBB_WCK01 FB_WCK FBB_WCK01* 21
FBA_D57 AK43 V45 FBA_WCK01* FB_WCK FBB_D58 J46 H32
FBA_D58 AK48
FBA_D57 FBA_WCK01
Y42
FBA_WCK01 FBA_WCK01* 20 CMD19 RAS* FBB_D59 H49
FBB_D58 FBB_WCKB01
J32
FBA_D58 FBA_WCKB01 FBB_D59 FBB_WCKB01
FBA_D59 AK49 Y41 FBB_D60 L47 G36 FBB_WCK23
FBA_D60 AM45
FBA_D59 FBA_WCKB01
AD41 FBA_WCK23 FB_WCK
CMD20 A1_A9 FBB_D61 J49
FBB_D60 FBB_WCK23
H36 FBB_WCK23*
FBB_WCK23 FB_WCK FBB_WCK23 21
FBA_D60 FBA_WCK23 FBA_WCK23 FBA_WCK23 20 FBB_D61 FBB_WCK23 FBB_WCK23 FB_WCK FBB_WCK23* 21
FBA_D61 AM44 AD40 FBA_WCK23* FB_WCK FBB_D62 L48 K36
FBA_D62 AK44
FBA_D61 FBA_WCK23
AC41
FBA_WCK23 FBA_WCK23* 20 CMD21 A0_A10 FBB_D63 L49
FBB_D62 FBB_WCKB23
J36
FBA_D62 FBA_WCKB23 FBB_D63 FBB_WCKB23
FBA_D63 AM43 AC40 M42 FBB_WCK45
FBA_D63 FBA_WCKB23
AT44 FBA_WCK45 FB_WCK
CMD22 A12_RFU FBB_WCK45
M41 FBB_WCK45*
FBB_WCK45 FB_WCK FBB_WCK45 21
FBA_WCK45 FBA_WCK45 FBA_WCK45 20 FBB_WCK45 FBB_WCK45 FB_WCK FBB_WCK45* 21
AT43 FBA_WCK45* FB_WCK FBB_DBI0 E29 L42
FBA_DBI0 U40
FBA_WCK45
AR43
FBA_WCK45 FBA_WCK45* 20 CMD23 ABI* FBB_DBI1 G33
FBB_DQM0 FBB_WCKB45
L43
FBA_DQM0 FBA_WCKB45 FBB_DQM1 FBB_WCKB45
FBA_DBI1 AC45 AR42 FBB_DBI2 H38 H45 FBB_WCK67
FBA_DBI2 AG44
FBA_DQM1 FBA_WCKB45
AM42 FBA_WCK67 FB_WCK
CMD24 A6_A11 FBB_DBI3 C36
FBB_DQM2 FBB_WCK67
H44 FBB_WCK67*
FBB_WCK67 FB_WCK FBB_WCK67 21
FBA_DQM2 FBA_WCK67 FBA_WCK67 FBA_WCK67 20 FBB_DQM3 FBB_WCK67 FBB_WCK67 FB_WCK FBB_WCK67* 21
FBA_DBI3 AA41 AM41 FBA_WCK67* FB_WCK FBB_DBI4 P41 J45
C
FBA_DBI4 AV45
FBA_DQM3 FBA_WCK67
AN47
FBA_WCK67 FBA_WCK67* 20 CMD25 A7_A8 FBB_DBI5 P48
FBB_DQM4 FBB_WCKB67
J44
C
FBA_DQM4 FBA_WCKB67 FBB_DQM5 FBB_WCKB67
FBA_DBI5 AR45 AN46 FBB_DBI6 F47
FBA_DBI6 AG42
FBA_DQM5 FBA_WCKB67 CMD26 WE* FBB_DBI7 L46
FBB_DQM6
FBA_DQM6 FBB_DQM7
FBA_DBI7 AM46 FBA_DQM7 CMD27 A5_BA1
FBB_EDC0 J30
FBA_EDC0 U45
CMD28 A4_BA2 FBB_EDC1 H33
FBB_DQS_WP0
FBA_DQS_WP0 FBB_DQS_WP1
FBA_EDC1 Y43 FBB_EDC2 D39
FBA_EDC2 AF42
FBA_DQS_WP1 CMD29 A2_BA0 FBB_EDC3 J35
FBB_DQS_WP2
FBA_DQS_WP2 FBB_DQS_WP3
FBA_EDC3 AC44 FBB_EDC4 R42
FBA_EDC4 AV47
FBA_DQS_WP3 CMD30 A3_BA3 FBB_EDC5 M48
FBB_DQS_WP4
FBA_DQS_WP4 FBB_DQS_WP5
FBA_EDC5 AN43 FBB_EDC6 F49
FBA_EDC6 AJ42
FBA_DQS_WP5 CMD31 CS* FBB_EDC7 J47
FBB_DQS_WP6
L36
PLACE AT BALLS
FBA_DQS_WP6 PLACE AT BALLS FBB_DQS_WP7 FBB_PLL_AVDD FB_PLLAVDD 23
FBA_EDC7 AK47 FBA_DQS_WP7 FBA_PLL_AVDD AJ39 FB_PLLAVDD

C122 H30 FBB_DQS_RN0 C115


U46 FBA_DQS_RN0 J33 FBB_DQS_RN1
Y44 FBA_DQS_RN1 0.1u_10V_X7R_04 E39 FBB_DQS_RN2
AF43 FBA_DQS_RN2 FBVDDQ FBVDDQ H35 FBB_DQS_RN3 0.1u_10V_X7R_04
AC43 FBA_DQS_RN3 R41 FBB_DQS_RN4
AV46 FBA_DQS_RN4 GND M49 FBB_DQS_RN5
AN44 FBA_DQS_RN5 E49 FBB_DQS_RN6
AJ41 FBA_DQS_RN6 J48 FBB_DQS_RN7 GND
AK46 FBA_DQS_RN7
R7 R499 R25 R18
10K_1%_04 10K_1%_04 10K_1%_04 10K_1%_04
GPU_PLLVDD AC39 FB_REFPLL_DLL_AVDD0
28 GPU_PLLVDD FBA_CMD1 FBB_CMD1
L21 FB_REFPLL_DLL_AVDD1
FBA_CMD17 FBB_CMD17

FBA_CMD2 FBB_CMD2 N16E-GT


N16E-GT FBA_CMD18 FBB_CMD18

D C117 C198 D
R501 R20 R505 R26
0.1u_10V_X7R_04 0.1u_10V_X7R_04 10K_1%_04 10K_1%_04 10K_1%_04 10K_1%_04
20,21,22,23,24,25,26,27,31,60 FBVDDQ

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
GND

GND GND
Title
[19] VGA Frame Buffer Partition
ɈP6xxRA Frame A,Bᶵᶲẞ(㔜枩␐怲暞ẞᶵᶲẞ)
Size Document Number Rev
Custom P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 19 of 79


1 2 3 4 5 6 7 8

B - 20 VGA Frame Buffer Partition


Schematic Diagrams

Frame Buffer Partition A


1 2 3 4 5 6 7 8

FBA_WCK01 FBA_CMD[31..0]
19 FBA_W CK01 FBA_WCK01* 19 FBA_CMD[31..0]
19
19
19
FBA_W CK01*
FBA_W CK23
FBA_W CK23*
FBA_WCK23
FBA_WCK23*
FBA_WCK45
19 FBA_D[63..0]
FBA_D[63..0]

FBA_DBI[7..0]
FRAME BUFFER PARTITION A
19 FBA_W CK45 FBA_WCK45* 19 FBA_DBI[7..0]
19 FBA_W CK45* FBA_WCK67 FBA_EDC[7..0]
19 FBA_W CK67 FBA_WCK67* 19 FBA_EDC[7..0] M8D
19 FBA_W CK67* INS115241755
BGA170
COMMON

A M7D NORMAL M8B A


INS115242370 INS115241858
BGA170_MIRR
FBA_D32 A4 DQ0 BGA170
COMMON FBA_D33 A2 DQ1 COMMON
FBA_D34 B4 DQ2
MIRRORED M7B
FBA_D35 B2 DQ3 FBA_CMD19 G3 RAS
INS115242074
x32 x16 BGA170_MIRR
FBA_D36 E4 DQ4 FBA_CMD16 L3 CAS
FBA_D0 V4 DQ0 COMMON FBA_D37 E2 DQ5 FBA_CMD26 L12 WE
NC
FBA_D1 V2 DQ1 FBA_D38 F4 DQ6 FBA_CMD31 G12 CS
NC
FBA_D2 T4 DQ2 FBA_CMD3 L3 RAS FBA_D39 F2 DQ7
NC
FBA_D3 T2 DQ3 FBA_CMD0 G3 CAS FBA_CMD23 J4 ABI
NC
FBA_D4 N4 DQ4 FBVDDQ FBA_CMD10 G12 WE FBA_EDC4 C2 EDC0
NC
FBA_D5 N2 DQ5 FBA_CMD15 L12 CS FBA_DBI4 D2 DBI0 0.300 FBA_CMD21 H4 A0_A10
NC

B.Schematic Diagrams
FBA_D6 M4 DQ6 VREFD A10 FBA_VREFD FBA_CMD20 H5 A1_A9
NC
FBA_D7 M2 DQ7 FBA_CMD7 J4 ABI FBA_CMD29 H11 A2_BA0
NC
x32 x16 FBA_CMD30 H10 A3_BA3
FBA_EDC0 R2 EDC0 R28 FBA_CMD5 K4 A0_A10 FBA_D40 A11 DQ8 C59 FBA_CMD28 K11 A4_BA2
NC NC
FBA_DBI0 P2 DBI0 549_1%_04 FBA_CMD4 K5 A1_A9 FBA_D41 A13 DQ9 FBA_CMD27 K10 A5_BA1
NC NC

820p_50V_X7R_04
FBA_CMD13 K11 A2_BA0 FBA_D42 B11 DQ10 FBA_CMD24 K5 A6_A11
NC
0.300 FBA_CMD14 K10 A3_BA3 FBA_D43 B13 DQ11 FBA_CMD25 K4 A7_A8
NC
VREFD V10 FBA_VREFD FBA_CMD12 H11 A4_BA2 FBA_D44 E11 DQ12 NC
FBA_CMD22 J5 RFU_A12
FBA_D8
FBA_D9
FBA_D10
FBA_D11
V11
V13
T11
T13
DQ8
DQ9
DQ10 C56
R30
FBA_CMD11
FBA_CMD8
FBA_CMD9
FBA_CMD6
H10
H5
H4
J5
A5_BA1
A6_A11
A7_A8
FBA_D45
FBA_D46
FBA_D47
E13
F11
F13
DQ13
DQ14
DQ15
NC
NC
NC GND
Sheet 20 of 79
DQ11 RFU_A12

Frame Buffer
820p_50V_X7R_04

FBA_D12 N11 DQ12 1.33K_1%_04 FBA_EDC5 C13 EDC1 GND


FBA_D13 N13 DQ13 FBA_DBI5 D13 DBI1 FBA_CMD18 J2 RESET
NC
FBA_D14 M11 DQ14 FBA_CMD17 J3 CKE
FBA_D15 M13 DQ15 FBA_W CK45 D4 WCK01
B
FBA_EDC1
FBA_DBI1
R13
P13
EDC1
DBI1
GND
GND FBA_CMD2
FBA_CMD1
J2
J3
RESET
CKE
FBA_W CK45* D5 WCK01

K4G41325FC-HC03000
FBA_CLK1 J12
FBA_CLK1* J11
CLK
CLK
B

Partition A
FBA_W CK01 P4 WCK01 FBA_CLK0 J12 CLK
FBA_W CK01* FBA_CLK0* M8A
P5 WCK01 J11 CLK INS115241971
BGA170
K4G41325FC-HC03000 COMMON

NORMAL
M7A FBA_D48 V11 DQ16 A5 NC_RFU_A5
INS115242217
BGA170_MIRR
FBA_D49 V13 DQ17 V5 NC_RFU_V5
COMMON FBA_D50 T11 DQ18
FBA_D51 T13 DQ19
MIRRORED
A5 NC_RFU_A5 FBA_D52 N11 DQ20
x32 x16 V5 NC_RFU_V5 FBA_D53 N13 DQ21
FBA_D16 A11 DQ16 FBA_D54 M11 DQ22
NC
FBA_D17 A13 DQ17 FBVDDQ FBA_D55 M13 DQ23
NC
FBA_D18 B11 DQ18 NC
FBA_D19 B13 DQ19 FBA_EDC6 R13 EDC2
NC
FBA_D20 E11 DQ20 FBA_DBI6 P13 DBI2
NC
FBA_D21 E13 DQ21 VREFD V10 FBA_VREFD 0.300
NC
FBA_D22 F11 DQ22 R19 FBA_VREFC J14 VREFC
NC
FBA_D23 F13 DQ23 549_1%_04 x32 x16
NC
FBA_D56 V4 DQ24 C16 FBA_ZQ2 J13 ZQ
NC
FBA_EDC2 C13 EDC2 0.300 FBA_D57 V2 DQ25 C31
GND NC
FBA_SEN2

820p_50V_X7R_04
FBA_DBI2 D13 DBI2 FBA_VREFC J14 VREFC FBA_D58 T4 DQ26 J10 SEN
NC NC

820p_50V_X7R_04
FBA_D59 T2 R6
ŇŃłŠŗœņŇń

DQ27 NC
FBA_ZQ0 J13 ZQ FBA_D60 N4 DQ28 121_1%_04
NC
C A10 FBA_VREFD C33 R490 FBA_D61 N2 R8 C
VREFD DQ29 NC K4G41325FC-HC03000
FBA_D24 A4 DQ24 1.33K_1%_04 FBA_SEN0 J10 SEN FBA_D62 M4 DQ30 1K_1%_04
NC
820p_50V_X7R_04

FBA_D25 A2 DQ25 FBA_D63 M2 DQ31 NC


FBA_D26 B4 DQ26 GND
FBA_D27 B2 DQ27 C13 R5 R15 K4G41325FC-HC03000 FBA_EDC7 R2 EDC3 GND GND
NC
FBA_D28 E4 DQ28 121_1%_04 1K_1%_04 FBA_DBI7 P2 DBI3 NC
820p_50V_X7R_04

FBA_D29 E2 DQ29 GND


FBA_D30 F4 DQ30 FBA_W CK67 P4 WCK23
FBA_D31 F2 DQ31 GND FBA_W CK67* P5 WCK23

FBA_EDC3 C2 EDC3 K4G41325FC-HC03000


FBA_DBI3 D2 DBI3 GND GND
FBA_CLK1
FBA_W CK23 D4 WCK23 19 FBA_CLK1
FBA_W CK23* D5 WCK23
R13
K4G41325FC-HC03000 80.6_1%_04

FBA_CLK0 0.300 FBA_VREF_L R491 931_1%_04 FBA_VREFD


19 FBA_CLK0
FBA_CLK1*
R492 931_1%_04 FBA_VREFC 19 FBA_CLK1*
D

R14
80.6_1%_04 Q35
GPIO10_ALT_MEM_VREF G 2SK3018S3
21,24,25,30 GPIO10_ALT_MEM_VREF
S

FBA_CLK0*
19 FBA_CLK0*
D 19,21,22,23,24,25,26,27,31,60 FBVDDQ D

GND

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
ɈP6xxRA Frame A,Bᶵᶲẞ(㔜枩ᶵᶲẞ) Title
[20] Frame Buffer Partition A
P6x0RG, P6x0RE VRAM=K4G80325FB-HC03, HC28 Size Document Number Rev

P6x0RG1, P6x0RE1, P6x0RA VRAM=K4G41325FC-HC03 A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 20 of 79


1 2 3 4 5 6 7 8

Frame Buffer Partition A B - 21


Schematic Diagrams

Frame Buffer Partition B


1 2 3 4 5 6 7 8

FBB_WCK01 FBB_CMD[31..0]
19 FBB_W CK01 FBB_WCK01* 19 FBB_CMD[31..0]
19
19
19
FBB_W CK01*
FBB_W CK23
FBB_W CK23*
FBB_WCK23
FBB_WCK23*
FBB_WCK45
19 FBB_D[63..0]
FBB_D[63..0]

FBB_DBI[7..0]
FRAME BUFFER PARTITION B
19 FBB_W CK45 FBB_WCK45* 19 FBB_DBI[7..0]
19 FBB_W CK45* FBB_WCK67 FBB_EDC[7..0]
19 FBB_W CK67 FBB_WCK67* 19 FBB_EDC[7..0]
19 FBB_W CK67* M6B
M5B M6D INS115243542
M5D INS115243645 BGA170
INS115243758
A COMMON A
BGA170_MIRR BGA170
INS115243861
COMMON COMMON
BGA170_MIRR
COMMON FBB_CMD19 G3 RAS
FBB_CMD3 L3
NORMAL FBB_CMD16 L3
MIRRORED RAS CAS
FBB_CMD0 G3 CAS FBB_D32 A4 DQ0 FBB_CMD26 L12 WE
x32 x16 FBB_CMD10 G12 WE FBB_D33 A2 DQ1 FBB_CMD31 G12 CS
FBB_D0 V4 DQ0 FBB_CMD15 L12 CS FBB_D34 B4 DQ2
NC
FBB_D1 V2 DQ1 FBB_D35 B2 DQ3 FBB_CMD23 J4 ABI
NC
FBB_D2 T4 DQ2 FBB_CMD7 J4 ABI FBB_D36 E4 DQ4
NC
FBB_D3 T2 DQ3 FBB_D37 E2 DQ5 FBB_CMD21 H4 A0_A10
NC
FBB_D4 N4 DQ4 FBVDDQ FBB_CMD5 K4 A0_A10 FBB_D38 F4 DQ6 FBB_CMD20 H5 A1_A9
NC
FBB_D5 N2 DQ5 FBB_CMD4 K5 A1_A9 FBB_D39 F2 DQ7 FBB_CMD29 H11 A2_BA0
NC
FBB_D6 M4 DQ6 FBB_CMD13 K11 A2_BA0 FBB_CMD30 H10 A3_BA3
B.Schematic Diagrams

NC
FBB_D7 M2 DQ7 FBB_CMD14 K10 A3_BA3 FBB_EDC4 C2 EDC0 FBB_CMD28 K11 A4_BA2
NC
FBB_CMD12 H11 A4_BA2 FBB_DBI4 D2 DBI0 0.300 FBB_CMD27 K10 A5_BA1
FBB_EDC0 R2 EDC0 R31 FBB_CMD11 H10 A5_BA1 VREFD A10FBB_VREFD FBB_CMD24 K5 A6_A11
NC
FBB_DBI0 P2 DBI0 549_1%_04 FBB_CMD8 H5 A6_A11 FBB_CMD25 K4 A7_A8
NC
FBB_CMD9 H4 A7_A8 x32 x16 C57 FBB_CMD22 J5 RFU_A12
0.300 FBB_CMD6 J5 RFU_A12 FBB_D40 A11 DQ8 NC

820p_50V_X7R_04
VREFD V10 FBB_VREFD FBB_D41 A13 DQ9 NC
FBB_D8 V11 DQ8 FBB_D42 B11 DQ10 NC
FBB_D9 V13 FBB_D43 B13

Sheet 21 of 79
DQ9 DQ11 NC
FBB_D10 T11 DQ10 C10 FBB_D44 E11 DQ12 NC
FBB_D11 T13 DQ11 R4 FBB_D45 E13 DQ13 GND FBB_CMD18 J2 RESET
NC

820p_50V_X7R_04
FBB_D12 N11 DQ12 1.33K_1%_04 FBB_CMD2 J2 RESET FBB_D46 F11 DQ14 FBB_CMD17 J3 CKE
NC
FBB_D13 N13 FBB_CMD1 J3 FBB_D47 F13
Frame Buffer FBB_D14
FBB_D15
M11
M13
DQ13
DQ14
DQ15
GND
FBB_CLK0
FBB_CLK0*
J12
J11
CKE

CLK
CLK
FBB_EDC5
FBB_DBI5
C13
D13
DQ15

EDC1
DBI1
NC

GND
NC
FBB_CLK1
FBB_CLK1*
J12
J11
CLK
CLK

FBB_EDC1
Partition B
B R13 EDC1 GND B
FBB_DBI1 P13 DBI1 FBB_W CK45 D4 WCK01
FBB_W CK45* D5 WCK01
FBB_W CK01 P4 WCK01
FBB_W CK01* P5 WCK01 K4G41325FC-HC03000
M6A
K4G41325FC-HC03000
INS115243964
BGA170 A5 NC_RFU_A5
M5A
A5 NC_RFU_A5 COMMON V5 NC_RFU_V5
INS115244067
V5 NC_RFU_V5
BGA170_MIRR
COMMON
NORMAL
FBB_D48 V11 DQ16
MIRRORED
FBB_D49 V13 DQ17
x32 x16 FBB_D50 T11 DQ18
FBB_D16 A11 DQ16 FBB_D51 T13 DQ19
NC
FBB_D17 A13 DQ17 FBB_D52 N11 DQ20
NC
FBB_D18 B11 DQ18 FBB_D53 N13 DQ21
NC
FBB_D19 B13 DQ19 FBB_D54 M11 DQ22
NC
FBB_D20 E11 DQ20 FBB_D55 M13 DQ23 0.300
NC
FBB_D21 E13 DQ21 0.300 FBB_VREFC J14 VREFC
NC
FBB_D22 F11 DQ22 FBB_VREFC J14 VREFC FBB_EDC6 R13 EDC2
NC
FBB_D23 F13 DQ23 FBB_DBI6 P13 DBI2 FBB_ZQ2 J13 ZQ
NC
FBB_ZQ0 J13 ZQ VREFD V10 FBB_VREFD C36
FBB_EDC2 C13 FBB_SEN2 J10
EDC2 GND FBVDDQ SEN
FBB_SEN0

820p_50V_X7R_04
FBB_DBI2 D13 DBI2 J10 SEN x32 x16
NC
FBB_D56 V4 DQ24 C710 R10
NC
R22 FBB_D57 V2 DQ25 121_1%_04 R16 K4G41325FC-HC03000
NC

820p_50V_X7R_04
VREFD A10 FBB_VREFD 121_1%_04 K4G41325FC-HC03000 FBB_D58 T4 DQ26 NC
1K_1%_04
FBB_D24 A4 DQ24 R24 FBB_D59 T2 DQ27 NC
C FBB_D25 A2 R21 1K_1%_04 FBB_D60 N4 C
DQ25 DQ28 NC
FBB_D26 B4 DQ26 C60 549_1%_04 FBB_D61 N2 DQ29 NC
FBB_D27 B2 DQ27 FBB_D62 M4 DQ30 GND GND
NC
820p_50V_X7R_04

FBB_D28 E4 DQ28 FBB_D63 M2 DQ31 NC


FBB_D29 E2 DQ29
FBB_D30 F4 DQ30 FBB_EDC7 R2 EDC3 GND
NC
FBB_D31 F2 DQ31 GND FBB_DBI7 P2 DBI3 NC
GND
FBB_EDC3 C2 EDC3 C45 R494 FBB_W CK67 P4 WCK23 FBB_CLK1
FBB_DBI3 FBB_W CK67* 19 FBB_CLK1
D2 DBI3 1.33K_1%_04 P5 WCK23
820p_50V_X7R_04
FBB_W CK23 D4 WCK23 K4G41325FC-HC03000 R9
FBB_W CK23* D5 WCK23 80.6_1%_04

K4G41325FC-HC03000
GND GND
FBB_CLK1*
19 FBB_CLK1*

FBB_VREF_H R495 931_1%_04 FBB_VREFD


FBB_CLK0
19 FBB_CLK0 FBB_VREFC
0.300 R496 931_1%_04

D
R23 Q36
80.6_1%_04 GPIO10_ALT_MEM_VREF G 2SK3018S3
20,24,25,30 GPIO10_ALT_MEM_VREF

S
FBB_CLK0*
D 19 FBB_CLK0* D
19,20,22,23,24,25,26,27,31,60 FBVDDQ
GND

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
ɈP6xxRA Frame A,Bᶵᶲẞ(㔜枩ᶵᶲẞ)
Title
[21] Frame Buffer Partition B
Size Document Number Rev
P6x0RG, P6x0RE VRAM=K4G80325FB-HC03, HC28 A3 P650RE 6-71-P65R0-D03 D03
P6x0RG1, P6x0RE1, P6x0RA VRAM=K4G41325FC-HC03 Date: W ednesday, July 08, 2015 Sheet 21 of 79
1 2 3 4 5 6 7 8

B - 22 Frame Buffer Partition B


Schematic Diagrams

Frame Buffer Partition A_B


1 2 3 4 5 6 7 8

FRAME BUFFER PARTITION A/B DECOUPLING


FBVDDQ

DECOUPLING AROUND FBA MEMORIES (DQ0-DQ31) PLACE Under MEM FBVDDQ

DECOUPLING AROUND FBA MEMORIES (DQ32-DQ63) PLACE Under MEM


SPARE
SPARE
A A
C40 C49 C48 C29 C46 C54 C21 C42 C39 C41 C27 C22 C17 C25 C34 C708
C11 C23 C55 C43 C44 C47 C18 C28 C14 C58 C24 C15 C26 C709 C711 C35
0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

10u_6.3V_X5R_06

10u_6.3V_X5R_06

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

10u_6.3V_X5R_06

10u_6.3V_X5R_06

B.Schematic Diagrams
GND
GND

ɈP6xxRA Frame A,Bᶵᶲẞ


FBVDDQ
FBVDDQ
Sheet 22 of 79
R12
1K_1%_04 INS115246518
M7C M8C
INS115246041
R27
1K_1%_04
FBB_MF0
INS115247167
BGA170_MIRR
COMMON
M5C
FBB_MF2
M6C
INS115247582
BGA170
COMMON FBVDDQ
Frame Buffer
BGA170_MIRR BGA170

Partition A_B
B FBA_MF0 COMMON COMMON B
FBVDDQ Mirrored Normal
FBA_MF2 R17
Mirrored R500 Normal SOE*/MF_VDD J1 1K_1%_04 J1 MF_VSS/SOE*
SOE*/MF_VDD J1 1K_1%_04 J1 MF_VSS/SOE* add 1k to VDD add 1k to VSS
add 1k to VDD add 1k to VSS C10
VDD VSS B10 B10 VSS VDD C10
C10
VDD VSS B10 B10 VSS VDD C10 C5
VDD VSS B5 B5 VSS VDD C5
C5
VDD VSS B5 B5 VSS VDD C5 D11
VDD VSS D10 D10 VSS VDD D11
D11
VDD VSS D10 D10 VSS VDD D11 G1
VDD VSS G10 G10 VSS VDD G1
G1
VDD VSS G10 G10 VSS VDD G1 G11
VDD VSS G5 G5 VSS VDD G11
G11
VDD VSS G5 G5 VSS VDD G11 G14
VDD VSS H1 H1 VSS VDD G14
G14
VDD VSS H1 H1 VSS VDD G14 G4
VDD VSS H14 H14 VSS VDD G4
G4
VDD VSS H14 H14 VSS VDD G4 L1
VDD VSS K1 K1 VSS VDD L1
L1
VDD VSS K1 K1 VSS VDD L1 L11
VDD VSS K14 K14 VSS VDD L11
L11
VDD VSS K14 K14 VSS VDD L11 L14
VDD VSS L10 L10 VSS VDD L14
L14
VDD VSS L10 L10 VSS VDD L14 L4
VDD VSS L5 L5 VSS VDD L4
L4
VDD VSS L5 L5 VSS VDD L4 P11
VDD VSS P10 P10 VSS VDD P11
P11
VDD VSS P10 P10 VSS VDD P11 R10
VDD VSS T10 T10 VSS VDD R10
R10
VDD VSS T10 T10 VSS VDD R10 R5
VDD VSS T5 T5 VSS VDD R5
R5
VDD VSS T5 T5 VSS VDD R5
VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1
VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1 VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12
VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12 VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14
VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14 VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3
VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3 VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1
VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1 D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12
D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12 D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14
D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14 VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3
VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3 VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10
VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10 VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5
C C
VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5 VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1
VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1 VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12
VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12 VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14
VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14 VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3
VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3 G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13
G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13 VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2
VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2 H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12
H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12 VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3
VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3 VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12
VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12 VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3
VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3 VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13
VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13 VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2
VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2 VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1
VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1 M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12
M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12 M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14
M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14 VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3
VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3 N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10
N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10 VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5
VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5 VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1
VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1 VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12
VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12 VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14
VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14 VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3
VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3 VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1
VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1 VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12
VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12 VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14
VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14 VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3
VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3
K4G41325FC-HC03000 K4G41325FC-HC03000
D K4G41325FC-HC03000 K4G41325FC-HC03000 D
GND GND
GND GND

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[22] Frame Buffer Partition A_B
Size Document Number Rev
19,20,21,23,24,25,26,27,31,60 FBVDDQ A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 22 of 79


1 2 3 4 5 6 7 8

Frame Buffer Partition A_B B - 23


Schematic Diagrams

GPU Frame Buffer Partition


1 2 3 4 5 6 7 8

FBD_DBI[7..0] FBD_CMD[31..0]
FBD_DBI[7..0] 25 FBD_CMD[31..0] 25
GPU FRAME BUFFER PARTITION C/D FBC_DBI[7..0]
FBC_DBI[7..0] 24
FBD_EDC[7..0]
FBD_EDC[7..0] 25
FBD_D[63..0]
FBD_D[63..0] 25

ɈP6xxRE Frame Dᶵᶲẞ


FBC_EDC[7..0]
G1D FBC_EDC[7..0] 24 G1E
BGA1745 FBC_CMD[31..0] BGA1745
COMMON FBC_CMD[31..0] 24 COMMON
FBVDDQ
FBC_D[63..0]
4/21 FBC FBC_D[63..0] 24 5/21 FBD

FBC_D0 A8 FBC_D0 FBC_CMD0 B3 FBC_CMD0 FBVDDQ FBD_D0 AF7 FBD_D0 FBD_CMD0 AG3 FBD_CMD0
FBC_D1 D8 FBC_D1 FBC_CMD1 A4 FBC_CMD1 FBD_D1 AF9 FBD_D1 FBD_CMD1 AG2 FBD_CMD1
FBC_D2 B8 FBC_D2 FBC_CMD2 B4 FBC_CMD2 FBD_D2 AF6 FBD_D2 FBD_CMD2 AG1 FBD_CMD2
A FBC_D3 C8 FBC_D3 FBC_CMD3 A5 FBC_CMD3 FBD_D3 AF8 FBD_D3 FBD_CMD3 AF3 FBD_CMD3 R138 R79 A
FBC_D4 C5 FBC_D4 FBC_CMD4 A6 FBC_CMD4 FBD_D4 AG7 FBD_D4 FBD_CMD4 AF1 FBD_CMD4 10K_1%_04 10K_1%_04
FBC_D5 B5 FBC_D5 FBC_CMD5 B6 FBC_CMD5 FBD_D5 AG6 FBD_D5 FBD_CMD5 AF2 FBD_CMD5
FBC_D6 D5 FBC_D6 FBC_CMD6 B11 FBC_CMD6 R74 R46 FBD_D6 AG9 FBD_D6 FBD_CMD6 AC1 FBD_CMD6
FBC_D7 C4 FBC_D7 FBC_CMD7 A11 FBC_CMD7 10K_1%_04 10K_1%_04 FBD_D7 AG8 FBD_D7 FBD_CMD7 AC2 FBD_CMD7 FBD_CMD1
FBC_D8 B9 FBC_D8 FBC_CMD8 C12 FBC_CMD8 FBD_D8 AC5 FBD_D8 FBD_CMD8 AA2 FBD_CMD8 FBD_CMD17
FBC_D9 E11 FBC_D9 FBC_CMD9 A12 FBC_CMD9 FBD_D9 AA4 FBD_D9 FBD_CMD9 AA1 FBD_CMD9
FBC_D10 D9 FBC_D10 FBC_CMD10 B12 FBC_CMD10 FBC_CMD1 FBD_D10 AC4 FBD_D10 FBD_CMD10 AA3 FBD_CMD10 FBD_CMD2
FBC_D11 A9 FBC_D11 FBC_CMD11 C15 FBC_CMD11 FBC_CMD17 FBD_D11 AC3 FBD_D11 FBD_CMD11 Y1 FBD_CMD11 FBD_CMD18
FBC_D12 H11 FBC_D12 FBC_CMD12 A15 FBC_CMD12 FBD_D12 AD4 FBD_D12 FBD_CMD12 Y2 FBD_CMD12
FBC_D13 F9 FBC_D13 FBC_CMD13 B15 FBC_CMD13 FBC_CMD2 FBD_D13 AD2 FBD_D13 FBD_CMD13 Y3 FBD_CMD13
FBC_D14 J11 FBC_D14 FBC_CMD14 B17 FBC_CMD14 FBC_CMD18 FBD_D14 AD5 FBD_D14 FBD_CMD14 V3 FBD_CMD14 R77 R139
FBC_D15 E8 FBC_D15 FBC_CMD15 A17 FBC_CMD15 FBD_D15 AD1 FBD_D15 FBD_CMD15 V2 FBD_CMD15 10K_1%_04 10K_1%_04
FBC_D16 K17 C27 FBC_CMD16 FBD_D16 R4 C2 FBD_CMD16
B.Schematic Diagrams

FBC_D16 FBC_CMD16 FBD_D16 FBD_CMD16


FBC_D17 G17 FBC_D17 FBC_CMD17 B27 FBC_CMD17 R47 R75 FBD_D17 U3 FBD_D17 FBD_CMD17 D1 FBD_CMD17
FBC_D18 J17 FBC_D18 FBC_CMD18 A27 FBC_CMD18 10K_1%_04 10K_1%_04 FBD_D18 U4 FBD_D18 FBD_CMD18 D2 FBD_CMD18
FBC_D19 G15 FBC_D19 FBC_CMD19 C26 FBC_CMD19 FBD_D19 U5 FBD_D19 FBD_CMD19 E1 FBD_CMD19
FBC_D20 K15 FBC_D20 FBC_CMD20 A26 FBC_CMD20 FBD_D20 V6 FBD_D20 FBD_CMD20 F2 FBD_CMD20
FBC_D21 K14 FBC_D21 FBC_CMD21 B26 FBC_CMD21 FBD_D21 V5 FBD_D21 FBD_CMD21 F1 FBD_CMD21
FBC_D22 H14 FBC_D22 FBC_CMD22 A23 FBC_CMD22 FBD_D22 Y4 FBD_D22 FBD_CMD22 L2 FBD_CMD22 GND
FBC_D23 J14 FBC_D23 FBC_CMD23 B23 FBC_CMD23 FBD_D23 Y5 FBD_D23 FBD_CMD23 L1 FBD_CMD23
FBC_D24 E14 FBC_D24 FBC_CMD24 B21 FBC_CMD24 FBD_D24 Y6 FBD_D24 FBD_CMD24 M3 FBD_CMD24 FBVDDQ
FBVDDQ
Sheet 23 of 79
FBC_D25 F14 FBC_D25 FBC_CMD25 A21 FBC_CMD25 GND FBD_D25 Y7 FBD_D25 FBD_CMD25 M1 FBD_CMD25
FBC_D26 A14 FBC_D26 FBC_CMD26 C21 FBC_CMD26 FBD_D26 Y8 FBD_D26 FBD_CMD26 M2 FBD_CMD26
FBC_D27 B14 FBC_D27 FBC_CMD27 A20 FBC_CMD27 FBD_D27 AC9 FBD_D27 FBD_CMD27 R3 FBD_CMD27
FBC_D28 E12 FBC_D28 FBC_CMD28 B20 FBC_CMD28 FBD_D28 AC7 FBD_D28 FBD_CMD28 R1 FBD_CMD28

GPU Frame Buffer B


FBC_D29
FBC_D30
FBC_D31
FBC_D32
F12
G12
G14
G26
FBC_D29
FBC_D30
FBC_D31
FBC_CMD29
FBC_CMD30
FBC_CMD31
C20
C18
B18
D18
FBC_CMD29
FBC_CMD30
FBC_CMD31
R92

*60.4_1%_04
R68

*60.4_1%_04
FBD_D29
FBD_D30
FBD_D31
FBD_D32
AC6
AC8
AC10
H2
FBD_D29
FBD_D30
FBD_D31
FBD_CMD29
FBD_CMD30
FBD_CMD31
R2
U2
U1
V1
FBD_CMD29
FBD_CMD30
FBD_CMD31
R117
*60.4_1%_04
R109
*60.4_1%_04
B
FBC_D32 FBC_CMD32 FBD_D32 FBD_CMD32

Partition FBC_D33
FBC_D34
FBC_D35
FBC_D36
J26
F26
H26
FBC_D33
FBC_D34
FBC_D35
FBC_CMD33
FBC_CMD34
FBC_CMD35
A18
C9
C24
FBC_DEBUG0
FBC_DEBUG1
FBD_D33
FBD_D34
FBD_D35
FBD_D36
H4
H1
H3
FBD_D33
FBD_D34
FBD_D35
FBD_CMD33
FBD_CMD34
FBD_CMD35
V4
AD3
J3
FBD_DEBUG0
FBD_DEBUG1
G27 FBC_D36 F5 FBD_D36
FBC_D37 F27 FBC_D37 FBD_D37 E2 FBD_D37
FBC_D38 J27 FBC_D38 FBD_D38 E4 FBD_D38
FBC_D39 H27 FBC_D39 FBD_D39 D3 FBD_D39
FBC_D40 E23 FBC_D40 FBD_D40 J4 FBD_D40
FBC_D41 D21 FBC_D41 FBD_D41 L5 FBD_D41
FBC_D42 D23 FBC_D42 FBD_D42 J2 FBD_D42
FBC_D43 C23 FBC_D43 FBD_D43 J1 FBD_D43
FBC_D44 A24 FBC_D44 FBC_CLK0 F15 FBC_CLK0 DP_FBC_CLK0 FB_CLK FBD_D44 J6 FBD_D44 FBD_CLK0 V9
FBC_CLK0 24 FBD_CLK0 25
FBC_D45 B24 FBC_D45 FBC_CLK0 E15 FBC_CLK0* DP_FBC_CLK0 FB_CLK FBD_D45 H5 FBD_D45 FBD_CLK0 V10
FBC_CLK0* 24 FBD_CLK0* 25
FBC_D46 E24 FBC_D46 FBC_CLK1 J18 FBC_CLK1 DP_FBC_CLK1 FB_CLK FBD_D46 L9 FBD_D46 FBD_CLK1 R6
FBC_CLK1 24 FBD_CLK1 25
FBC_D47 D24 FBC_D47 FBC_CLK1 K18 FBC_CLK1* DP_FBC_CLK1 FB_CLK FBD_D47 L8 FBD_D47 FBD_CLK1 R5
FBC_CLK1* 24 FBD_CLK1* 25
FBC_D48 D15 FBC_D48 FBD_D48 U10 FBD_D48
FBC_D49 C17 FBC_D49 FBD_D49 U7 FBD_D49
FBC_D50 D17 FBC_D50 FBD_D50 U9 FBD_D50
FBC_D51 E17 FBC_D51 FBD_D51 R7 FBD_D51
FBC_D52 F18 FBC_D52 FBD_D52 R10 FBD_D52
FBC_D53 E18 FBC_D53 FBD_D53 P10 FBD_D53
FBC_D54 D20 FBC_D54 FBD_D54 P8 FBD_D54
FBC_D55 E20 FBC_D55 FBD_D55 P9 FBD_D55
FBC_D56 G20 FBC_D56 FBC_WCK01 F8 FBC_W CK01 FBC_WCK01 FB_WCK FBD_D56 P5 FBD_D56 FBD_WCK01 AF4
FBC_W CK01 24 FBD_W CK01 25
FBC_D57 H20 FBC_D57 FBC_WCK01 G8 FBC_W CK01* FBC_WCK01 FB_WCK FBD_D57 P6 FBD_D57 FBD_WCK01 AF5
FBC_W CK01* 24 FBD_W CK01* 25
FBC_D58 F20 FBC_D58 FBC_WCKB01 H9 FBD_D58 P2 FBD_D58 FBD_WCKB01 AD8
FBC_D59 H21 FBC_D59 FBC_WCKB01 G9 FBD_D59 P1 FBD_D59 FBD_WCKB01 AD9
FBC_D60 F23 FBC_D60 FBC_WCK23 H12 FBC_W CK23 FBC_WCK23 FB_WCK FBD_D60 M5 FBD_D60 FBD_WCK23 Y9
C FBC_W CK23 24 FBD_W CK23 25 C
FBC_D61 G23 FBC_D61 FBC_WCK23 J12 FBC_W CK23* FBC_WCK23 FB_WCK FBD_D61 M6 FBD_D61 FBD_WCK23 Y10
FBC_W CK23* 24 FBD_W CK23* 25
FBC_D62 H23 FBC_D62 FBC_WCKB23 C11 FBD_D62 M7 FBD_D62 FBD_WCKB23 AA9
FBC_D63 K23 FBC_D63 FBC_WCKB23 D11 FBD_D63 P7 FBD_D63 FBD_WCKB23 AA10
FBC_WCK45 D26 FBC_W CK45 FBC_WCK45 FB_WCK FBD_WCK45 H6
FBC_W CK45 24 FBD_W CK45 25
FBC_WCK45 E26 FBC_W CK45* FBC_WCK45 FB_WCK FBD_WCK45 H7
FBC_W CK45* 24 FBD_W CK45* 25
FBC_DBI0 E6 FBC_DQM0 FBC_WCKB45 H24 FBD_DBI0 AG10 FBD_DQM0 FBD_WCKB45 J8
FBC_DBI1 E9 FBC_DQM1 FBC_WCKB45 J24 FBD_DBI1 AA5 FBD_DQM1 FBD_WCKB45 J7
FBC_DBI2 H17 FBC_DQM2 FBC_WCK67 J20 FBC_W CK67 FBC_WCK67 FB_WCK FBD_DBI2 U6 FBD_DQM2 FBD_WCK67 M8
FBC_W CK67 24 FBD_W CK67 25
FBC_DBI3 D12 FBC_DQM3 FBC_WCK67 K20 FBC_W CK67* FBC_WCK67 FB_WCK FBD_DBI3 AA8 FBD_DQM3 FBD_WCK67 M9
FBC_W CK67* 24 FBD_W CK67* 25
FBC_DBI4 K27 FBC_DQM4 FBC_WCKB67 J21 FBD_DBI4 E3 FBD_DQM4 FBD_WCKB67 L3
FBC_DBI5 E21 FBC_DQM5 FBC_WCKB67 K21 FBD_DBI5 J5 FBD_DQM5 FBD_WCKB67 L4
FBC_DBI6 F17 FBC_DQM6 FBD_DBI6 U8 FBD_DQM6
FBC_DBI7 J23 FBC_DQM7 FBD_DBI7 M4 FBD_DQM7

FBC_EDC0 D6 FBC_DQS_WP0 FBD_EDC0 AG5 FBD_DQS_WP0


FBC_EDC1 F11 FBC_DQS_WP1 FBD_EDC1 AD7 FBD_DQS_WP1
FBC_EDC2 H15 FBC_DQS_WP2 FBD_EDC2 V8 FBD_DQS_WP2
FBC_EDC3 C14 FBC_DQS_WP3 FBD_EDC3 AA7 FBD_DQS_WP3
FBC_EDC4 E27 FBC_DQS_WP4 3V3_RUN FBD_EDC4 F4 FBD_DQS_WP4
FBC_EDC5 F24 FBC_DQS_WP5 PLACE AT BALLS PLACE OUTSIDE FBD_EDC5 L7 FBD_DQS_WP5
FBC_EDC6 H18 FBC_DQS_WP6 0.5A OF BGA FBD_EDC6 R8 FBD_DQS_WP6
FBC_EDC7 G21 FBC_DQS_WP7 FBC_PLL_AVDD L26 FB_PLLAVDD 3.3V 0.4 LB3 . FBD_EDC7 P3 FBD_DQS_WP7 FBD_PLL_AVDD AA11
C177 C262
D01A HCB1608KF-300T60 C250
C6 FBC_DQS_RN0 AG4 FBD_DQS_RN0
G11 FBC_DQS_RN1 0.1u_10V_X7R_04 22u_6.3V_X5R_08 AD6 FBD_DQS_RN1 0.1u_10V_X7R_04
J15 FBC_DQS_RN2 V7 FBD_DQS_RN2
D
D14 FBC_DQS_RN3 AA6 FBD_DQS_RN3 D
D27 CHANGE FP F3
FBC_DQS_RN4 FBD_DQS_RN4 GND
19,20,21,22,24,25,26,27,31,60 FBVDDQ
G24 FBC_DQS_RN5 D03 L6 FBD_DQS_RN5
EMC21
G18 FBC_DQS_RN6 EMI R9 FBD_DQS_RN6
F21 FBC_DQS_RN7 GND P4 FBD_DQS_RN7
*100p_50V_NPO_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
GND
28,29,30,31,36,58,59 3V3_RUN
[23] GPU Frame Buffer Partition
19 FB_PLLAVDD Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03
N16E-GT N16E-GT
Date: W ednesday, July 08, 2015 Sheet 23 of 79
1 2 3 4 5 6 7 8

B - 24 GPU Frame Buffer Partition


Schematic Diagrams

Frame Buffer Partition C


1 2 3 4 5 6 7 8

23 FBC_CMD[31..0]
FBC_CMD[31..0]

FBC_D[63..0] 23 FBC_W CK01


FBC_WCK01
FBC_WCK01*
FRAME BUFFER PARTITION C
23 FBC_D[63..0] 23 FBC_W CK01* FBC_WCK23
FBC_DBI[7..0] 23 FBC_W CK23 FBC_WCK23*
23 FBC_DBI[7..0] 23 FBC_W CK23* FBC_WCK45
FBC_EDC[7..0] 23 FBC_W CK45 FBC_WCK45*
23 FBC_EDC[7..0] 23 FBC_W CK45* FBC_WCK67 M4D
23 FBC_W CK67 FBC_WCK67* INS115249753 M4B
23 FBC_W CK67* BGA170 INS115249537
COMMON
BGA170
COMMON
M3D NORMAL
A INS115249856 M3B A
BGA170_MIRR
FBC_D32 A4 DQ0 FBC_CMD19 G3 RAS
INS115249231
COMMON
BGA170_MIRR
FBC_D33 A2 DQ1 FBC_CMD16 L3 CAS
COMMON FBC_D34 B4 DQ2 FBC_CMD26 L12 WE
MIRRORED
FBC_D35 B2 DQ3 FBC_CMD31 G12 CS
x32 x16 FBC_CMD3 L3 RAS FBC_D36 E4 DQ4
FBC_D0 V4 DQ0 FBC_CMD0 G3 CAS FBC_D37 E2 DQ5 FBC_CMD23 J4 ABI
NC
FBC_D1 V2 DQ1 FBC_CMD10 G12 WE FBC_D38 F4 DQ6
NC
FBC_D2 T4 DQ2 FBC_CMD15 L12 CS FBC_D39 F2 DQ7 FBC_CMD21 H4 A0_A10
NC
FBC_D3 T2 DQ3 FBC_CMD20 H5 A1_A9
NC
FBC_D4 N4 DQ4 FBVDDQ FBC_CMD7 J4 ABI FBC_EDC4 C2 EDC0 FBC_CMD29 H11 A2_BA0
NC
FBC_D5 N2 DQ5 FBC_DBI4 D2 DBI0 0.300 FBC_CMD30 H10 A3_BA3
NC
FBC_D6 M4 DQ6 FBC_CMD5 K4 A0_A10 VREFD A10 FBC_VREFD FBC_CMD28 K11 A4_BA2
NC
FBC_D7 M2 DQ7 FBC_CMD4 K5 A1_A9 FBC_CMD27 K10 A5_BA1

B.Schematic Diagrams
NC
FBC_CMD13 K11 A2_BA0 x32 x16 FBC_CMD24 K5 A6_A11
FBC_EDC0 R2 EDC0 R53 FBC_CMD14 K10 A3_BA3 FBC_D40 A11 DQ8 C160 FBC_CMD25 K4 A7_A8
NC NC
FBC_DBI0 P2 DBI0 549_1%_04 FBC_CMD12 H11 A4_BA2 FBC_D41 A13 DQ9 FBC_CMD22 J5 RFU_A12
NC NC
FBC_CMD11 H10 A5_BA1 FBC_D42 B11 DQ10 820p_50V_X7R_04
NC
0.300 FBC_CMD8 H5 A6_A11 FBC_D43 B13 DQ11 NC
VREFD V10 FBC_VREFD FBC_CMD9 H4 A7_A8 FBC_D44 E11 DQ12 NC
FBC_D8 V11 DQ8 FBC_CMD6 J5 RFU_A12 FBC_D45 E13 DQ13 NC
FBC_D9 V13 DQ9 FBC_D46 F11 DQ14

Sheet 24 of 79
NC
FBC_D10 T11 DQ10 C148 FBC_D47 F13 DQ15 GND FBC_CMD18 J2 RESET
NC
FBC_D11 T13 DQ11 R54 FBC_CMD17 J3 CKE
820p_50V_X7R_04

FBC_D12 N11 DQ12 1.33K_1%_04 FBC_EDC5 C13 EDC1 GND


FBC_D13 N13 FBC_DBI5 D13 FBC_CLK1 J12
FBC_D14
FBC_D15
M11
M13
DQ13
DQ14
DQ15
GND
FBC_CMD2
FBC_CMD1
J2
J3
RESET
CKE FBC_W CK45
FBC_W CK45*
D4
D5
DBI1

WCK01
WCK01
NC
FBC_CLK1* J11
CLK
CLK
Frame Buffer
FBC_EDC1 R13 FBC_CLK0 J12
Partition C
B EDC1 GND CLK B
FBC_DBI1 P13 DBI1 FBC_CLK0* J11 CLK K4G41325FC-HC03000

FBC_W CK01 P4 WCK01


FBC_W CK01* M4A
P5 WCK01 INS115249374
BGA170
K4G41325FC-HC03000 COMMON A5 NC_RFU_A5
V5 NC_RFU_V5
M3A NORMAL
INS115249650
BGA170_MIRR
FBC_D48 V11 DQ16
COMMON A5 NC_RFU_A5 FBC_D49 V13 DQ17
V5 NC_RFU_V5 FBC_D50 T11 DQ18
MIRRORED
FBC_D51 T13 DQ19
x32 x16 FBC_D52 N11 DQ20
FBC_D16 A11 DQ16 FBC_D53 N13 DQ21
NC
FBC_D17 A13 DQ17 FBC_D54 M11 DQ22
NC
FBC_D18 B11 DQ18 FBC_D55 M13 DQ23
NC
FBC_D19 B13 DQ19 0.300
NC
FBC_D20 E11 DQ20 FBC_EDC6 R13 EDC2 FBC_VREFC J14 VREFC
NC
FBC_D21 E13 DQ21 FBVDDQ FBC_DBI6 P13 DBI2
NC
FBC_D22 F11 DQ22 VREFD V10 FBC_VREFD FBC_ZQ2 J13 ZQ
NC
FBC_D23 F13 DQ23 0.300 C114
NC
FBC_VREFC J14 x32 x16 FBC_SEN2 J10
VREFC SEN
FBC_EDC2 C13 EDC2 FBC_D56 V4 DQ24 C102 820p_50V_X7R_04
GND NC
FBC_DBI2 D13 DBI2 FBC_ZQ0 J13 ZQ FBC_D57 V2 DQ25
NC NC

820p_50V_X7R_04
R58 FBC_D58 T4 DQ26 R516 K4G41325FC-HC03000
NC
549_1%_04 FBC_SEN0 J10 FBC_D59 T2 121_1%_04 R52
SEN DQ27 NC
VREFD A10 FBC_VREFD FBC_D60 N4 DQ28 NC
1K_1%_04
FBC_D24 A4 DQ24 FBC_D61 N2 DQ29 NC
C FBC_D25 A2 R62 FBC_D62 M4 C
DQ25 K4G41325FC-HC03000 DQ30 NC GND
FBC_D26 B4 DQ26 C137 121_1%_04 R517 FBC_D63 M2 DQ31 GND
NC
FBC_D27 B2 DQ27 1K_1%_04
FBC_D28 E4 DQ28 820p_50V_X7R_04 FBC_EDC7 R2 EDC3 NC
FBC_D29 E2 DQ29 C124 R61 FBC_DBI7 P2 DBI3 GND
NC
FBC_D30 F4 DQ30 1.33K_1%_04
820p_50V_X7R_04

FBC_D31 F2 DQ31 FBC_W CK67 P4 WCK23 FBC_CLK1


FBC_W CK67* 23 FBC_CLK1
GND P5 WCK23
FBC_EDC3 C2 EDC3 GND
FBC_DBI3 D2 DBI3 K4G41325FC-HC03000 R55
80.6_1%_04
FBC_W CK23 D4 WCK23 GND GND
FBC_W CK23* D5 WCK23

K4G41325FC-HC03000 FBC_CLK1*
23 FBC_CLK1*

FBC_CLK0
23 FBC_CLK0

R63
80.6_1%_04

FBC_CLK0* 0.300 FBC_VREF_L R57 931_1%_04 FBC_VREFD


D

D 23 FBC_CLK0* D
Q2 R59 931_1%_04 FBC_VREFC
GPIO10_ALT_MEM_VREF G 2SK3018S3
20,21,25,30 GPIO10_ALT_MEM_VREF
S

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
GND Title
[24] Frame Buffer Partition C
P6x0RG, P6x0RE VRAM=K4G80325FB-HC03, HC28 Size Document Number Rev
P6x0RG1, P6x0RE1, P6x0RA VRAM=K4G41325FC-HC03 19,20,21,22,23,25,26,27,31,60 FBVDDQ A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 24 of 79


1 2 3 4 5 6 7 8

Frame Buffer Partition C B - 25


Schematic Diagrams

Frame Buffer Partition D


1 2 3 4 5

23 FBD_CMD[31..0]
FBD_CMD[31..0]

FBD_D[63..0] 23 FBD_W CK01


FBD_WCK01
FBD_WCK01*
FRAME BUFFER PARTITION D
23 FBD_D[63..0] 23 FBD_W CK01* FBD_WCK23
FBD_DBI[7..0] 23 FBD_W CK23 FBD_WCK23*
23 FBD_DBI[7..0] 23 FBD_W CK23* FBD_WCK45 M2D
FBDEDC[7..0]
23 FBD_W CK45 FBD_WCK45* INS115251069
23 FBD_EDC[7..0] 23 FBD_W CK45* BGA170
FBD_WCK67 COMMON
23 FBD_W CK67 FBD_WCK67*
23 FBD_W CK67* NORMAL
A A
FBD_D32 A4 DQ0
M1D M1B
FBD_D33 A2 DQ1
INS115251408 INS115251663
BGA170_MIRR BGA170_MIRR
FBD_D34 B4 DQ2 M2B
COMMON COMMON FBD_D35 B2 DQ3 INS115250966
FBD_D36 E4 DQ4 BGA170
MIRRORED
FBD_CMD3 L3 RAS FBD_D37 E2 DQ5 COMMON
x32 x16 FBD_CMD0 G3 CAS FBD_D38 F4 DQ6
FBD_D0 V4 DQ0 FBD_CMD10 G12 WE FBD_D39 F2 DQ7 FBD_CMD19 G3 RAS
NC
FBD_D1 V2 DQ1 FBD_CMD15 L12 CS FBD_CMD16 L3 CAS
NC
FBD_D2 T4 DQ2 FBD_EDC4 C2 EDC0 FBD_CMD26 L12 WE
NC
FBD_D3 T2 DQ3 FBD_CMD7 J4 ABI FBD_DBI4 D2 DBI0 0.300 FBD_CMD31 G12 CS
NC
FBD_D4 N4 DQ4 FBVDDQ VREFD A10 FBD_VREFD
B.Schematic Diagrams

NC
FBD_D5 N2 DQ5 FBD_CMD5 K4 A0_A10 FBD_CMD23 J4 ABI
NC
FBD_D6 M4 DQ6 FBD_CMD4 K5 A1_A9 x32 x16
NC
FBD_D7 M2 DQ7 FBD_CMD13 K11 A2_BA0 FBD_D40 A11 DQ8 C249 FBD_CMD21 H4 A0_A10
NC NC
FBD_CMD14 K10 A3_BA3 FBD_D41 A13 DQ9 FBD_CMD20 H5 A1_A9
NC
FBD_EDC0 R2 EDC0 R137 FBD_CMD12 H11 A4_BA2 FBD_D42 B11 DQ10 820p_50V_X7R_04 FBD_CMD29 H11 A2_BA0
NC NC
FBD_DBI0 P2 DBI0 549_1%_04 FBD_CMD11 H10 A5_BA1 FBD_D43 B13 DQ11 FBD_CMD30 H10 A3_BA3
NC NC
FBD_CMD8 H5 A6_A11 FBD_D44 E11 DQ12 FBD_CMD28 K11 A4_BA2
NC
0.300 FBD_CMD9 H4 A7_A8 FBD_D45 E13 DQ13 FBD_CMD27 K10 A5_BA1
NC
V10 FBD_VREFD FBD_CMD6 J5 FBD_D46 F11 FBD_CMD24 K5

Sheet 25 of 79 VREFD RFU_A12 DQ14 GND A6_A11


FBD_D8 V11 DQ8
D03 FBD_D47 F13 DQ15
NC
FBD_CMD25 K4 A7_A8
FBD_D9 V13 EMI NC
FBD_CMD22 J5
DQ9 RFU_A12
FBD_D10 T11 DQ10 C248 EMC22 EMC23 FBD_EDC5 C13 EDC1 GND
FBD_D11 FBD_DBI5

Frame Buffer
T13 DQ11 R96 D13 DBI1

*100p_50V_NPO_04

*100p_50V_NPO_04
NC

820p_50V_X7R_04
FBD_D12 N11 DQ12 1.33K_1%_04
FBD_D13 N13 DQ13 FBD_CMD2 J2 RESET FBD_W CK45 D4 WCK01
FBD_D14 M11 DQ14 FBD_CMD1 J3 CKE FBD_W CK45* D5 WCK01

Partition D B FBD_D15 M13 DQ15 FBD_CMD18 J2 RESET B


GND FBD_CLK0 J12 CLK K4G41325FC-HC03000 FBD_CMD17 J3 CKE
FBD_EDC1 R13 GND GND FBD_CLK0* J11
EDC1 GND CLK
FBD_DBI1 P13 DBI1 FBD_CLK1 J12 CLK
M2A FBD_CLK1* J11 CLK
INS115251172
FBD_W CK01 P4 WCK01 BGA170
FBD_W CK01* P5 WCK01 COMMON

NORMAL
K4G41325FC-HC03000
FBD_D48 V11 DQ16
FBD_D49 V13 DQ17
M1A FBD_D50
A5 NC_RFU_A5 T11 DQ18
INS115251285
BGA170_MIRR V5 NC_RFU_V5 FBD_D51 T13 DQ19
COMMON FBD_D52 N11 DQ20 A5 NC_RFU_A5
FBD_D53 N13 DQ21 V5 NC_RFU_V5
MIRRORED
FBD_D54 M11 DQ22
x32 x16 FBVDDQ FBD_D55 M13 DQ23
FBD_D16 A11 DQ16 NC
FBD_D17 A13 DQ17 FBD_EDC6 R13 EDC2
NC
FBD_D18 B11 DQ18 FBD_DBI6 P13 DBI2
NC
FBD_D19 B13 DQ19 VREFD V10 FBD_VREFD
NC
FBD_D20 E11 DQ20 NC
FBD_D21 E13 DQ21 R110 0.300 x32 x16
NC
FBD_D22 F11 DQ22 549_1%_04 FBD_VREFC J14 VREFC FBD_D56 V4 DQ24 C269
NC NC
FBD_D23 F13 DQ23 FBD_D57 V2 DQ25 0.300
NC NC

820p_50V_X7R_04
FBD_ZQ0 J13 ZQ FBD_D58 T4 DQ26 FBD_VREFC J14 VREFC
NC
FBD_EDC2 C13 EDC2 FBD_D59 T2 DQ27
GND NC
FBD_DBI2 D13 FBD_SEN0 J10 FBD_D60 N4 FBD_ZQ2 J13
DBI2 NC SEN DQ28 NC ZQ
FBD_D61 N2 DQ29 C259
NC
C FBD_D62 M4 FBD_SEN2 J10 C
DQ30 NC SEN
VREFD A10 FBD_VREFD C260 R120 K4G41325FC-HC03000 FBD_D63 M2 DQ31 NC GND 820p_50V_X7R_04
FBD_D24 A4 DQ24 121_1%_04 R136
FBD_D25 A2 DQ25 820p_50V_X7R_04 R116 1K_1%_04 FBD_EDC7 R2 EDC3 R111 K4G41325FC-HC03000
NC
FBD_D26 B4 DQ26 C268 1.33K_1%_04 FBD_DBI7 P2 DBI3 121_1%_04 R94
NC
FBD_D27 B2 DQ27 1K_1%_04
FBD_D28 E4 DQ28 820p_50V_X7R_04 FBD_W CK67 P4 WCK23
FBD_D29 E2 DQ29 FBD_W CK67* P5 WCK23 GND
FBD_D30 F4 DQ30 GND
FBD_D31 F2 DQ31 GND K4G41325FC-HC03000
GND GND
FBD_EDC3 C2 EDC3 GND
FBD_DBI3 D2 DBI3

FBD_W CK23 D4 WCK23 FBD_CLK1


FBD_W CK23* D5 WCK23 23 FBD_CLK1

K4G41325FC-HC03000 R101
0.300 FBD_VREF_L R118 931_1%_04 FBD_VREFD

D
80.6_1%_04
Q5 R112 931_1%_04 FBD_VREFC
GPIO10_ALT_MEM_VREF G 2SK3018S3
20,21,24,30 GPIO10_ALT_MEM_VREF
FBD_CLK1*

S
23 FBD_CLK1*

FBD_CLK0
23 FBD_CLK0
GND

D R126 D
80.6_1%_04
19,20,21,22,23,24,26,27,31,60 FBVDDQ

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
FBD_CLK0*
23 FBD_CLK0*

ɈP6xxRE Frame Dᶵᶲẞ(㔜枩ᶵᶲẞ) Title


[25] Frame Buffer Partition D
P6x0RG, P6x0RE VRAM=K4G80325FB-HC03, HC28 Size Document Number Rev

P6x0RG1, P6x0RE1, P6x0RA VRAM=K4G41325FC-HC03 A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 25 of 79


1 2 3 4 5

B - 26 Frame Buffer Partition D


Schematic Diagrams

Frame Buffer Partition C_D


1 2 3 4 5 6 7 8

FRAME BUFFER PARTITION C/D DECOUPLING


FBVDDQ
FBVDDQ

DECOUPLING AROUND FBC MEMORIES (DQ0-DQ31) PLACE Under MEM DECOUPLING AROUND FBC MEMORIES (DQ32-DQ63) PLACE Under MEM
SPARE
SPARE
A A
C717 C116 C168 C721 C92 C98 C147 C146 C197 C87 C729 C113 C95 C213 C121 C728
C754 C755 C278 C284 C274 C266 C263 C210 C247 C238 C223 C732 C257 C230 C270 C758
0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

1u_6.3V_X6S_04

0.1u_10V_X7R_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

10u_6.3V_X5R_06

10u_6.3V_X5R_06

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

10u_6.3V_X5R_06

10u_6.3V_X5R_06

B.Schematic Diagrams
GND
GND

ɈP6xxRE Frame Dᶵᶲẞ


FBVDDQ
FBVDDQ

R140
Sheet 26 of 79
M2C M1C

Frame Buffer
R76 FBD_MF1 1K_1%_04
M3C FBC_MF2 M4C INS115254554 INS115254077
1K_1%_04 INS115254999 INS115253650 FBVDDQ BGA170 BGA170_MIRR
COMMON FBD_MF0 COMMON
BGA170_MIRR BGA170
FBC_MF0 COMMON COMMON R73
Normal Mirrored
B

SOE*/MF_VDD J1
Mirrored R44
1K_1%_04
J1 MF_VSS/SOE*
Normal 1K_1%_04
J1 MF_VSS/SOE*
add 1k to VSS
J1 SOE*/MF_VDD
add 1k to VDD
B
Partition C_D
add 1k to VDD add 1k to VSS B10 VSS VDD C10 C10 VDD VSS B10
C10
VDD VSS B10 B10 VSS VDD C10 B5 VSS VDD C5 C5 VDD VSS B5
C5
VDD VSS B5 B5 VSS VDD C5 D10 VSS VDD D11 D11 VDD VSS D10
D11
VDD VSS D10 D10 VSS VDD D11 G10 VSS VDD G1 G1 VDD VSS G10
G1
VDD VSS G10 G10 VSS VDD G1 G5 VSS VDD G11 G11 VDD VSS G5
G11
VDD VSS G5 G5 VSS VDD G11 H1 VSS VDD G14 G14 VDD VSS H1
G14
VDD VSS H1 H1 VSS VDD G14 H14 VSS VDD G4 G4 VDD VSS H14
G4
VDD VSS H14 H14 VSS VDD G4 K1 VSS VDD L1 L1 VDD VSS K1
L1
VDD VSS K1 K1 VSS VDD L1 K14 VSS VDD L11 L11 VDD VSS K14
L11
VDD VSS K14 K14 VSS VDD L11 L10 VSS VDD L14 L14 VDD VSS L10
L14
VDD VSS L10 L10 VSS VDD L14 L5 VSS VDD L4 L4 VDD VSS L5
L4
VDD VSS L5 L5 VSS VDD L4 P10 VSS VDD P11 P11 VDD VSS P10
P11
VDD VSS P10 P10 VSS VDD P11 T10 VSS VDD R10 R10 VDD VSS T10
R10
VDD VSS T10 T10 VSS VDD R10 T5 VSS VDD R5 R5 VDD VSS T5
R5
VDD VSS T5 T5 VSS VDD R5
A1 VSSQ VDDQ B1 B1 VDDQ VSSQ A1
VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1 A12 VSSQ VDDQ B12 B12 VDDQ VSSQ A12
VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12 A14 VSSQ VDDQ B14 B14 VDDQ VSSQ A14
VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14 A3 VSSQ VDDQ B3 B3 VDDQ VSSQ A3
VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3 C1 VSSQ VDDQ D1 D1 VDDQ VSSQ C1
VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1 C11 VSSQ VDDQ D12 D12 VDDQ VSSQ C11
D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12 C12 VSSQ VDDQ D14 D14 VDDQ VSSQ C12
D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14 C14 VSSQ VDDQ D3 D3 VDDQ VSSQ C14
VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3 C3 VSSQ VDDQ E10 E10 VDDQ VSSQ C3
VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10 C4 VSSQ VDDQ E5 E5 VDDQ VSSQ C4
VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5 E1 VSSQ VDDQ F1 F1 VDDQ VSSQ E1
C C
VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1 E12 VSSQ VDDQ F12 F12 VDDQ VSSQ E12
VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12 E14 VSSQ VDDQ F14 F14 VDDQ VSSQ E14
VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14 E3 VSSQ VDDQ F3 F3 VDDQ VSSQ E3
VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3 F10 VSSQ VDDQ G13 G13 VDDQ VSSQ F10
G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13 F5 VSSQ VDDQ G2 G2 VDDQ VSSQ F5
VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2 H13 VSSQ VDDQ H12 H12 VDDQ VSSQ H13
H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12 H2 VSSQ VDDQ H3 H3 VDDQ VSSQ H2
VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3 K13 VSSQ VDDQ K12 K12 VDDQ VSSQ K13
VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12 K2 VSSQ VDDQ K3 K3 VDDQ VSSQ K2
VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3 M10 VSSQ VDDQ L13 L13 VDDQ VSSQ M10
VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13 M5 VSSQ VDDQ L2 L2 VDDQ VSSQ M5
VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2 N1 VSSQ VDDQ M1 M1 VDDQ VSSQ N1
VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1 N12 VSSQ VDDQ M12 M12 VDDQ VSSQ N12
M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12 N14 VSSQ VDDQ M14 M14 VDDQ VSSQ N14
M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14 N3 VSSQ VDDQ M3 M3 VDDQ VSSQ N3
VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3 R1 VSSQ VDDQ N10 N10 VDDQ VSSQ R1
N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10 R11 VSSQ VDDQ N5 N5 VDDQ VSSQ R11
VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5 R12 VSSQ VDDQ P1 P1 VDDQ VSSQ R12
VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1 R14 VSSQ VDDQ P12 P12 VDDQ VSSQ R14
VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12 R3 VSSQ VDDQ P14 P14 VDDQ VSSQ R3
VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14 R4 VSSQ VDDQ P3 P3 VDDQ VSSQ R4
VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3 V1 VSSQ VDDQ T1 T1 VDDQ VSSQ V1
VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1 V12 VSSQ VDDQ T12 T12 VDDQ VSSQ V12
VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12 V14 VSSQ VDDQ T14 T14 VDDQ VSSQ V14
VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14 V3 VSSQ VDDQ T3 T3 VDDQ VSSQ V3
VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3
K4G41325FC-HC03000 K4G41325FC-HC03000
K4G41325FC-HC03000 K4G41325FC-HC03000
D GND GND D
GND GND

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
19,20,21,22,23,24,25,27,31,60 FBVDDQ
[26] Frame Buffer Partition C_D
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 26 of 79


1 2 3 4 5 6 7 8

Frame Buffer Partition C_D B - 27


Schematic Diagrams

GPU Decoupling

D
A

B
8

8
7

7
B.Schematic Diagrams

6
Sheet 27 of 79
GPU Decoupling
5

5
4

4
3

3
2

2
1

1
C

D
A

B - 28 GPU Decoupling
Schematic Diagrams

DACA Interface & XTAL


1 2 3 4 5

DACA INTERFACE and XTAL


G1G N15E-GT ἧ䓐GC6 1.0
BGA1745
IO PORT PCH廠↢炻㓭ᶵἧ䓐NC
COMMON

6/21 DACA
A A
3V3_RUN AW18 DACA_VDD I2CA_SCL BD4
I2CA_SCL 30
I2CA_SDA BD3
I2CA_SDA 30
AW20 DACA_VREF

AY20 DACA_RSET DACA_HSYNC BA20


DACA_VSYNC AY18

DACA_RED AY21

DACA_GREEN BA21

DACA_BLUE AW21

B.Schematic Diagrams
N16E-GT

Sheet 28 of 79
B
PEX_VDD G1F
B DACA Interface and
BGA1745
COMMON

14/21 XTAL/PLL
XTAL
D01A CHANGE FP VID_PLLVDD
LB2 . FCM1608KF-181T05 0.300 AW27 SP_PLLVDD

AW28 VID_PLLVDD
C214
C211 C144 C157
22u_6.3V_X5R_08 4.7u_6.3V_X5R_06 0.1u_10V_X7R_04 0.1u_10V_X7R_04

19 GPU_PLLVDD
GND
GPU_PLLVDD
LB1 . HCB1608KF-300T60 0.300 Y39 GPCPLL_AVDD0

AD11 GPCPLL_AVDD1
D01A
AT11 LXS_PLLVDD
CHANGE FP C100 C96 C192 C246 C232 C118
0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04

0.1u_10V_X7R_04
22u_6.3V_X5R_08

C C

XTALSSIN BB3 XTALSSIN XTALOUTBUFF BB1 XTALOUTBUFF

BB2 XTALIN XTALOUT BA1

PLACE Near GPU PLACE Under GPU


GND N16E-GT
X1
㓡Footprint 4 3 XTALOUT 㓡Footprint
R531 D02 XTALIN GND
1 2 D02 R530
GND
10K_1%_04 10K_1%_04
C735 D01A C59-109_27MHZ C734 D01A
D01A fsx3m
27p_50V_NPO_04 6-22-27R00-1B8 27p_50V_NPO_04
6-22-27R00-1BF
XTAL
GND GND GND GND

18,29,58 PEX_VDD
23,29,30,31,36,58,59 3V3_RUN

D D

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[28] DACA INTERFACE and XTAL
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 28 of 79


1 2 3 4 5

DACA Interface & XTAL B - 29


Schematic Diagrams

IFP I/O Interface


1 2 3 4 5

G1M
G1L
BGA1745 BGA1745
COMMON COMMON

G1H
BGA1745
IFP I/O INTERFACE 12/21 MIOB 11/21 MIOA

COMMON AM11 VDD33 MIOBD0 AM8 AJ10 VDD33 MIOAD0 AJ7


AN11 VDD33 MIOBD1 AM6 AJ11 VDD33 MIOAD1 AJ2
7/21 IFPAB AR11 AM9 AK11 AJ6
VDD33 MIOBD2 VDD33 MIOAD2
MIOBD3 AN9 MIOAD3 AJ5
GK104 GM204 AN5 AK4
MIOBD4 MIOAD4
MIOBD5 AN8 MIOAD5 AJ4
IFPA_AUX_SDA BG5
NC MIOBD6 AR7 MIOAD6 AK9
IFPA_AUX_SCL BJ5
NC MIOBD7 AN4 MIOAD7 AK3
MIOBD8 AN1 MIOAD8 AM3
MIOBD9 AR6 MIOAD9 AK7
IFPB_AUX_SDA BF15
NC MIOBD10 AN6 MIOAD10 AM2
A IFPB_AUX_SCL BE15 A
NC AR5 MIOBCAL_PD_VDDQ MIOBD11 AR2 AJ9 MIOACAL_PD_VDDQ MIOAD11 AK6

AR4 MIOBCAL_PU_GND AJ8 MIOACAL_PU_GND

DP LVDS/DVI/HDMI

AR1 MIOB_VREF AM1 MIOA_VREF


IFPA_TXC BD18
DPA_L3 IFPA_TXC BC18

BE18 IFPAB_RSET
IFPA_TXD0 BG14
DPA_L2 IFPA_TXD0 BH14
MIOB_CTL3 AR8 MIOA_CTL3 AK5
MIOB_HSYNC AM7 MIOA_HSYNC AJ1
MIOB_VSYNC AN7 MIOA_VSYNC AK8
BB15 IFPAB_PLLVDD IFPA_TXD1 BC15
MIOB_DE AR3 MIOA_DE AM4
DPA_L1 IFPA_TXD1 BD15
B.Schematic Diagrams

IFPA_TXD2 BE17
MIOB_CLKOUT AN3 MIOA_CLKOUT AK1
DPA_L0 IFPA_TXD2 BF17
MIOB_CLKOUT AN2 MIOA_CLKOUT AK2 GND
MIOB_CLKIN AM5 MIOA_CLKIN AJ3
IFPA_TXD3 BC17
BD17
G1I
BGA1745
HDMI
Sheet 29 of 79
IFPA_TXD3 N16E-GT N16E-GT COMMON

8/21 IFPC ʼnŅŎŊ


IFPB_TXC BG18
R131 R130
DPB_L3 IFPB_TXC BH18 R81 1K_1%_04 BB14 IFPCD_RSET
GND

IFP I/O Interface BB17


BA17

BA18
IFPAB_IOVDD
IFPAB_IOVDD
DPB_L2
IFPB_TXD4
IFPB_TXD4
BJ14
BJ15
N15E-GT ἧ䓐optimus
IO PORT PCH廠↢炻㓭ᶵἧ䓐NC
3V3_RUN
L5
40 mil
IF_PLLVDD
. HCB1608KF-300T60
PLACE AT BALLS
BB12 IFPCD_PLLVDD
DVI/HDMI DP

IFPC_AUX_SDA BF2
BG2
*100K_04 *100K_04

HDMI_CTRLDATA 17
IFPB_IOVDD IFPC_AUX_SCL HDMI_CTRLCLK 17
BB18 IFPB_IOVDD C254
B BH15 B
IFPB_TXD5
DPB_L1 IFPB_TXD5 BG15 0.1u_10V_X7R_04 IFPC_L3 BE11
TXC HDMI_CLOCKN 17
IFPC_L3 BD11
TXC HDMI_CLOCKP 17
IFPB_TXD6 BG17 GND IFPC_L2 BC12
TXD0 HDMI_DATA0N 17
DPB_L0 IFPB_TXD6 BH17 IFPC_L2 BD12
TXD0 HDMI_DATA0P 17
IFPC BE14
TXD1 IFPC_L1 HDMI_DATA1N 17
IFPB_TXD7 BJ18 TXD1 IFPC_L1 BF14
HDMI_DATA1P 17
IFPB_TXD7 BJ17
IFPC_L0 BD14
TXD2 HDMI_DATA2N 17
PLACE OUTSIDE IFPC_L0 BC14
PEX_VDD PLACE AT BALLS TXD2 HDMI_DATA2P 17
40 mil OF BGA
R78 0_06 IF_IOVDD BA11 IFPCD_IOVDD
GND
BA12 IFPCD_IOVDD
C240 C235 C224
IFPAB
N16E-GT 4.7u_6.3V_X6S_06 1u_6.3V_X6S_04 0.1u_10V_X7R_04 N16E-GT
G1K
DP R128 R129 GND
ŮŪůŪġġŅőŠņ
BGA1745
COMMON
100K_04 100K_04 GND
10/21 IFPEF
D02
DVI/HDMI DP MDP_E_AUX#_SDA 14 G1J GND

IFPE_AUX_SDA BH3 MDP_E_AUX#_SDA C910


MDP_E_AUX_SCL
0.1u_10V_X7R_04
14 BGA1745
COMMON
DP
MDP_E_AUX#_RE 14
IFPE_AUX_SCL BG3 MDP_E_AUX_SCL C915 0.1u_10V_X7R_04 9/21 IFPD
MDP_E_AUX_RE 14
GM204 GK104
IFPE_L3 BE5 MDP_E#3_RE_R C947 0.1u_10V_X7R_04
TXC MDP_E#3_RE 14 R103 R107
GND
R84 1K_1%_04 BF11 IFPEF_RSET TXC IFPE_L3 BD5 MDP_E3_RE_R C946 0.1u_10V_X7R_04
MDP_E3_RE 14
BE12 NC RSET
DVI/HDMI DP
ŦŅőŠŅ
100K_04 100K_04
C IFPE_L2 BE6 MDP_E#2_RE_R C945 0.1u_10V_X7R_04 C
TXD0 MDP_E#2_RE 14
IFPE_L2 BD6 MDP_E2_RE_R C944 0.1u_10V_X7R_04
TXD0 MDP_E2_RE 14
PLACE AT BALLS BB11 NC PLLVDD IFPD_AUX_SDA BF4 DEDP_D_AUX#_R C1023 0.1u_10V_X7R_04
IF_PLLVDD DEDP_D_AUX# 3
BB9 IFPEF_PLLVDD IFPE_L1 BG6 MDP_E#1_RE_R C943 0.1u_10V_X7R_04 IFPD_AUX_SCL BG4 DEDP_D_AUX_R C1024 0.1u_10V_X7R_04
TXD1 MDP_E#1_RE 14 DEDP_D_AUX 3
IFPE_L1 BF6 MDP_E1_RE_R C942 0.1u_10V_X7R_04
TXD1 MDP_E1_RE 14
C258
IFPE_L0 BF8 MDP_E#0_RE_R C941 0.1u_10V_X7R_04 IFPD_L3 BH9 DEDP_D#3_R C1022 0.1u_10V_X7R_04
TXD2 MDP_E#0_RE 14 TXC DEDP_D#3 3
IFPE_L0 BE8 MDP_E0_RE_R C940 0.1u_10V_X7R_04 IFPD_L3 BG9 DEDP_D3_R C1020 0.1u_10V_X7R_04
0.1u_10V_X7R_04 TXD2 MDP_E0_RE 14 TXC DEDP_D3 3
GND
IFPE TXD0 IFPD_L2 BG11 DEDP_D#2_R C1017 0.1u_10V_X7R_04
DEDP_D#2 3
IFPD_L2 BH11 DEDP_D2_R C1015 0.1u_10V_X7R_04
GND
TXD0 DEDP_D2 3
IFPD BJ11 DEDP_D#1_R C1021 0.1u_10V_X7R_04
TXD1 IFPD_L1 DEDP_D#1 3
TXD1 IFPD_L1 BJ12 DEDP_D1_R C1018 0.1u_10V_X7R_04
DEDP_D1 3
R807 R808
IFPD_L0 BH12 DEDP_D#0_R C1019 0.1u_10V_X7R_04
DEDP_D#0 3
ŮŪůŪġġŅőŠŇ
TXD2
100K_04 100K_04 IFPD_L0 BG12 DEDP_D0_R C1016 0.1u_10V_X7R_04
TXD2 DEDP_D0 3
D02 PLACE AT BALLS
BC8 IFPEF_IOVDD
BD8 DVI-DL DVI/HDMI DP MDP_F_AUX#_SDA 14 IF_IOVDD BA14
IFPEF_IOVDD IFPD_IOVDD
MDP_F_AUX_SCL 14 BA15 IFPD_IOVDD
C236
PLACE AT BALLS BC9 IFPF_IOVDD
IF_IOVDD BD9 IFPF_IOVDD IFPF_AUX_SDA BH4 MDP_F_AUX#_SDA C845 0.1u_10V_X7R_04
MDP_F_AUX#_RE 14 0.1u_10V_X7R_04
IFPF_AUX_SCL BJ4 MDP_F_AUX_SCL C851 0.1u_10V_X7R_04 N16E-GT
MDP_F_AUX_RE 14
C241 C245
GND
0.1u_10V_X7R_04 0.1u_10V_X7R_04 TXC IFPF_L3 BH6 MDP_F#3_RE_R C885 0.1u_10V_X7R_04
MDP_F#3_RE 14
TXC IFPF_L3 BJ6 MDP_F3_RE_R C884 0.1u_10V_X7R_04
MDP_F3_RE 14
IFPF_L2 BG8 MDP_F#2_RE_R C883 0.1u_10V_X7R_04
TXD3 TXD0 MDP_F#2_RE 14
GND IFPF_L2 BH8 MDP_F2_RE_R C882 0.1u_10V_X7R_04
TXD3 TXD0 MDP_F2_RE 14
IFPF
PLACE OUTSIDE IFPF_L1 BJ8 MDP_F#1_RE_R C881 0.1u_10V_X7R_04
TXD4 TXD1 MDP_F#1_RE 14
BJ9 MDP_F1_RE_R C880 0.1u_10V_X7R_04
OF BGA TXD4 TXD1 IFPF_L1 MDP_F1_RE 14
D BE9 MDP_F#0_RE_R C879 0.1u_10V_X7R_04 D
C234 C244 TXD5 TXD2 IFPF_L0 MDP_F#0_RE 14
IFPF_L0 BF9 MDP_F0_RE_R C878 0.1u_10V_X7R_04
TXD5 TXD2 MDP_F0_RE 14
4.7u_6.3V_X6S_06 1u_6.3V_X6S_04

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
GND

Title
[29] IFP I/O Interface
Size Document Number Rev
18,28,58
23,28,30,31,36,58,59
PEX_VDD
3V3_RUN
Custom P650RE 6-71-P65R0-D03 D03
N16E-GT
Date: Friday, July 03, 2015 Sheet 29 of 79
1 2 3 4 5

B - 30 IFP I/O Interface


Schematic Diagrams

Misc - GPIO, I2C and ROM


1 2 3 4 5 6 7 8

G1O
BGA1745
COMMON
MISC: GPIO, I2C, and ROM MULTI-LEVEL STRAPS
15/21 MISC_2 3V3_RUN
U118 3V3_RUN
ROM_CS BA3 VGA_ROM_CS#
0.1u_16V_Y5V_04 C1732 12 2 IVGA_ROM_CS# 3V3_AON
VCC 0B0 11 DVGA_ROM_CS#
BA5 VGA_ROM_SI
ROM_SI
BA4 VGA_ROM_SO
VGA_ROM_CS# 1 1B0
D03 Setting RAM type
ROM_SO 3 A0 10
STRAP0 BA6 STRAP0 ROM_SCLK BA2 VGA_ROM_SCLK GND S0 PS8331_SW 3,13,36,51
STRAP1 AW8 STRAP1 IVGA_ROM_SO
9 5 L :PORT1 (INTEL) R106 R83 R104 R98 R82
STRAP2 BA7 STRAP2 VCC 0B1 DVGA_ROM_SO R119 R127
8 H: PORT2 (NV) 49.9K_1%_04 *34.8K_1%_04 *4.99K_1%_04 *45.3K_1%_04 *45.3K_1%_04
STRAP3 BA8 STRAP3 VGA_ROM_SO 1B1 *30.1K_1%_04 45.3K_1%_04
4 Rg Ri Rk Rm Ro
STRAP4 BB6 STRAP4 A1 Rc Re
6 7
GND S1
VGA_ROM_SI
PI5A3158BZAE STRAP0
A P/N = 6-03-53158-0J1 A
STRAP1
AW9
BUFRST
śɥš–‘š VGA_ROM_SCLK
STRAP2
śɨš–‘š
STRAP3
BB7 MULTISTRAP_REF0_GND

VBIOS ROM
3V3_RUN VBIOS ROM R133 R123
STRAP4
STRAP_CALPD_MISC

20K_1%_04 *4.99K_1%_04

N16E-GT
3V3_RUN
(OPTIMUS) (DGPU) INS118597607
Rd Rf
SO8 3V3_RUN R102 R88 R105 R99 R90
3V3_RUN R1843 SO8 U119 *4.99K_1%_04 *4.99K_1%_04 *4.99K_1%_04 *4.99K_1%_04 *45.3K_1%_04
INS53767385
SO8
7
COMMON
8
Rh Rj Rl Rn Rp
R115 SO8 U35 10K_04 HOLD VCC
COMMON 3 WP
Setting RAM type GND
10K_04 7 8 DVGA_ROM_CS# R1844 33_04 DVGA_ROM_CS#_R 1
HOLD VCC CS
3 WP
K4G41325FC-HC03(256X16) Rd=20K
R89 IVGA_ROM_CS# R113 33_04 IVGA_ROM_CS#_R 1 VGA_ROM_SI R1845 33_04 DVGA_ROM_SI 5 C1723
CS
C267 DVGA_ROM_SO R1846 0_04 DVGA_ROM_SO_R 2
SI
0.1u_16V_Y5V_04 K4G80325FB-HC03/HC28 (512X16) Rc=30.1K P6x0RG, P6x0RE VRAM=K4G80325FB-HC03GND

B.Schematic Diagrams
40.2K_1%_04 SO
VGA_ROM_SI
IVGA_ROM_SO
R124
R1848
33_04
0_04
IVGA_ROM_SI
IVGA_ROM_SO_R
5
2
SI 0.1u_16V_Y5V_04 VGA_ROM_SCLK R1847 33_04 DVGA_ROM_SCLK 6 SCK GND 4 P6x0RG1, P6x0RE1, P6x0RA VRAM=K4G41325FC-HC03
SO
VGA_ROM_SCLK R135 33_04 IVGA_ROM_SCLK 6 4 GD25Q21BTIGR
SCK GND
6-04-02521-A70 PH PL
GD25D10BTIGR
GND
6-04-02510-A91
3V3_RUN
D02
FOR G-SYNC
R1849 *10K_04
3V3_RUN D01A Strap pin Location
N16 ES
Location
N16 ES Sheet 30 of 79
VGA_ROM_SCLK Ra R127 X Rb R123 4.99K
R132
R122
*4.99K_1%_04
4.99K_1%_04
R1850
FOR DGPU
10K_04

GND VGA_ROM_SI Rc R119 X Rd R133 20K


Misc - GPIO, I2C
B
GND 3.3V

R360
VDD3

R363
VGA_ROM_SO Re R132 X Rf R122 4.99K
B and ROM
GPU_PEX_RST# *0_04 0_04
R523 0_04
STRAP 0 Rg R106 49.9K Rh R102 X

3V3_AON R525 *10K_04


R345 R349 STRAP 1 Ri R83 X Rj R88 X
Q39A
2

MTDK5S6R
G

4.7K_04 4.7K_04
G1N 1 6 SMC_VGA_THERM
BGA1745
SMC_VGA_THERM 48 STRAP 2 Rk R104 X Rl R105 X
S

COMMON
5

Q39B
G

13/21 MISC_1
I2CS_SCL BF3 SMC_VGA_THERM1 MTDK5S6R
OVERT AV7 OVERT I2CS_SDA BE3 SMD_VGA_THERM1 4 3 SMD_VGA_THERM STRAP 3 Rm R98 X Rn R99 X
GPIO8 SMD_VGA_THERM 48
S

GM204 GK104
I2CC_SCL BD2 I2CC_SCL_R R533 33_04 I2CC_SCL
I2CC_SCL 58 STRAP 4 Ro R82 X Rp R90 X
I2CC_SDA BD1 I2CC_SDA_R R532 33_04 I2CC_SDA 3V3_AON
I2CC_SDA 58
BE1 THERMDN
I2CB_SCL BB5 I2CB_SCL R95 3V3_AON
BF1 THERMDP I2CB_SDA BB4 I2CB_SDA R537
GPIO12_AC_DETECT_R 3V3_AON
10K_04 R134 *10K_04
10K_04 SMD_VGA_THERM1
GPIO6_PSI R527 2.2K_04
GK104 GM204 R498 10K_04
GPIO0 AT9 GPIO0_NVVDD_PWM_VID
GPIO0_NVVDD_PWM_VID 59 R526 2.2K_04 SMC_VGA_THERM1
GPIO1 AT7 GPIO1_GC6_FB_EN R100 0_04 R534 10K_04 GPIO3_OC_WARN#
GPIO2_GPU_EVENT# GC6_FB_EN 36,60
GPIO2 AV1
GPIO3 AW4 GPIO3_OC_WARN# D3 A C RB751V-40(lision)
3V3_MAIN_EN GPIO3_OC_WARN# 58 GPU_EVENT# 36
GPIO4 AW1 3V3_MAIN_EN 3V3_AON
FRAME_LOCK# 3V3_MAIN_EN 58 R543 10K_04
C GPIO5 AT4 C
GPIO6_PSI FRAME_LOCK# 13
GPIO6 AT1 FRAME_LOCK#
GPIO6_PSI 59 R835 10K_04
GPIO7 AT10
GPIO8_IFPF_HPD_R VGA_BKLPWM 13 GPU_PEX_RST#
BJ20 JTAG_TCK GPIO8 AV8 GPIO9_THERM_ALERT# R547 R546
GPIO8_NC
GPIO9_THERM_ALERT# R524 10K_04
BF20 JTAG_TMS GPIO9 AW7

G
GPIO10_ALT_MEM_VREF GPIO9_THERM_ALERT# 59
BG20 JTAG_TDI GPIO10 AT6 Q37 0_04 *0_04
GPIO10_ALT_MEM_VREF 20,21,24,25 R97 10K_04 OVERT
BH20 JTAG_TDO GPIO11 AV2 2SK3018S3
JTAG_TRST* GPIO12_AC_DETECT_R VGA_ENAVDD 13 GPIO9_THERM_ALERT#
BF21 JTAG_TRST GPIO12 AV4 S D
d_GPIO9_ALERT_FAN 48 GPIO10_ALT_MEM_VREF
GPIO13 AT5 R93 100K_04
VGA_BKLTEN 13
GPIO14 AW5
R518 GPIO15 AV6 GPIO15_IFPC_HPD_R R80 *0_04 R539 R538
10K_04 GPIO16 AW2 SYS_PEX_RST_MON#
AW6 R529 *0_04 2.2K_04 2.2K_04
GPIO17 GPIO17_IFPD_HPD_R 3
GPIO18 AW3
GPIO19 AT8 GPIO18_IFPE_HPD_R OVERT S D dGPU_GPIO8_OVERT 48 I2CC_SDA
GPIO20 AV5 I2CC_SCL
GPIO21 AT3 Q6
R108 R114 R121 R125
GND GPIO22 AR9 2SK3018S3
1.8K_1%_04 1.8K_1%_04 1.8K_1%_04 1.8K_1%_04
G

GPIO23 AV3 GPU_PEX_RST_HOLD#


GPIO24 AT2 GPU_PEX_RST#
GPIO24_DVS 60
GPIO25 AV9 I2CB_SCL
GPIO25_NC
GPIO26 AR10 I2CB_SDA
GPIO26_NC
GPIO27 AN10 3V3_AON I2CA_SDA
GPIO27_NC
I2CA_SCL I2CA_SDA 28
N16E-GT I2CA_SCL 28
5

U34
NV ⺢嬘 GPIO12_AC_DETECT_R
1
VBATT_BOOST# 48
HDMI_HPD 17,36 MDP_E_HPD_RE 14,36 4
FROM HDMI REDRIVER FROM DP REDRIVER 2
AC/BATL# 56
HDMI
74AHC1G32GW
3

GPIO15_IFPC_HPD_R R540 *0_04 GPIO18_IFPE_HPD_R R544 *0_04 GPIO8_IFPF_HPD_R R541 *0_04


MDP_F_HPD_RE 14,36
DP_E DP_F FROM DP REDRIVER
R542 Q40 R548 Q42 R545 Q41
D D
100K_04 E 2N3904 C 100K_04 E 2N3904 C 100K_04 E 2N3904 C
3V3_AON D01A 5,30,32,35,38,40,44,48,50,51,53,54,55,56,57,58 VDD3
5,30,32,35,38,40,44,48,50,51,53,54,55,56,57,58 VDD3
3V3_AON 23,28,29,31,36,58,59 3V3_RUN
B

2,13,41,42,43,44,49,51,52,54,55,58,59,60 3.3V
R535 10K_04
GPU_PEX_RST# R552 GPU_PEX_RST# R554 GPU_PEX_RST# 3,18,31,58 3V3_AON
1K_04 1K_04 R553 1K_04 U4
5

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
MC74VHC1G08DFT2G
R549 *0_04 R551 *0_04 R550 *0_04 GPU_PEX_RST_HOLD# 1
3V3_AON 3V3_AON 3V3_AON
4 GPU_PEX_RST#
SYS_PEX_RST_MON# GPU_PEX_RST# 3,18
2 Title
C739 C742 C741 [30] Misc-GPIO_I2C_ROM
0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04
3

R536 0_04 R519 100K_04 Size Document Number Rev


36 PERSTB#
Custom P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 30 of 79


1 2 3 4 5 6 7 8

Misc - GPIO, I2C and ROM B - 31


Schematic Diagrams

GPU NVVDD, FBVDDQ, and GND

1 2 3 4 5 6 7 8

G1P G1Q

BGA1745 BGA1745
COMMON

16/21 GND_1/2
COMMON

17/21 GND_2/2 GPU NVVDD, FBVDDQ, AND GND


A2 GND GND AJ25 BB32 GND GND K2
A3 GND GND AJ27 BB34 GND GND K4
A47 GND GND AJ29 BB35 GND GND K42
G1R G1T
A48 GND GND AJ31 BB36 GND GND K45
AA15 GND GND AK14 BB8 GND GND K46 NVVDD
BGA1745 BGA1745
AA17 GND GND AK16 BC2 GND GND K48 NVVDD NVVDD NVVDD
COMMON COMMON
AA19 GND GND AK18 BC4 GND GND K5
AA21 GND GND AK20 BC48 GND GND K8 18/21 VDD_1/2 19/21 VDD_2/2
G1U
AA23 GND GND AK22 BC5 GND GND L13
A AA25 GND GND AK24 BE10 GND GND L16 AA14 VDD VDD AH31 BA39 VDD VDD BH48 A
BGA1745
AA27 GND GND AK26 BE13 GND GND L19 AA16 VDD VDD AJ14 BA42 VDD VDD BH49 FBVDDQ FBVDDQ
COMMON
AA29 GND GND AK28 BE16 GND GND L22 AA18 VDD VDD AJ16 BA43 VDD VDD BJ39
AA31 GND GND AK30 BE19 GND GND L25 AA20 VDD VDD AJ18 BA44 VDD VDD BJ41 20/21 FBVDDQ
AB11 GND GND AK32 BE2 GND GND L28 AA22 VDD VDD AJ20 BA45 VDD VDD BJ42
AB14 GND GND AL11 BE21 GND GND L31 AA24 VDD VDD AJ22 BA46 VDD VDD BJ44 AA39 FBVDDQ FBVDDQ J43
AB16 GND GND AL15 BE24 GND GND L34 AA26 VDD VDD AJ24 BB37 VDD VDD BJ45 AC11 FBVDDQ FBVDDQ K24
AB18 GND GND AL17 BE27 GND GND L37 AA28 VDD VDD AJ26 BB38 VDD VDD BJ46 AD10 FBVDDQ FBVDDQ K26
AB2 GND GND AL19 BE30 GND GND N11 AA30 VDD VDD AJ28 BB39 VDD VDD BJ47 AD39 FBVDDQ FBVDDQ K29
AB20 GND GND AL2 BE33 GND GND N2 AA32 VDD VDD AJ30 BB40 VDD VDD BJ48 AF11 FBVDDQ FBVDDQ K30
AB22 GND GND AL21 BE36 GND GND N39 AB15 VDD VDD AJ32 BB41 VDD VDD P15 AF39 FBVDDQ FBVDDQ K32
AB24 GND GND AL23 BE37 GND GND N4 AB17 VDD VDD AK15 BB42 VDD VDD P17 AG39 FBVDDQ FBVDDQ L14
AB26 GND GND AL25 BE4 GND GND N41 AB19 VDD VDD AK17 BB43 VDD VDD P19 AK39 FBVDDQ FBVDDQ L15
AB28 GND GND AL27 BE7 GND GND N42 AB21 VDD VDD AK19 BB44 VDD VDD P21 AM39 FBVDDQ FBVDDQ L17
AB30 AL29 BF10 N45 AB23 AK21 BB45 P23 AM40 L18
B.Schematic Diagrams

GND GND GND GND VDD VDD VDD VDD FBVDDQ FBVDDQ
AB32 GND GND AL31 BF13 GND GND N46 AB25 VDD VDD AK23 BB46 VDD VDD P25 AN40 FBVDDQ FBVDDQ L20
AB39 GND GND AL39 BF16 GND GND N48 AB27 VDD VDD AK25 BB47 VDD VDD P27 B47 FBVDDQ FBVDDQ L23
AB4 GND GND AL4 BF19 GND GND N5 AB29 VDD VDD AK27 BC38 VDD VDD P29 C45 FBVDDQ FBVDDQ L24
AB41 GND GND AL41 BF22 GND GND N8 AB31 VDD VDD AK29 BC39 VDD VDD P31 C46 FBVDDQ FBVDDQ L27
AB42 GND GND AL42 BF23 GND GND N9 AC14 VDD VDD AK31 BC41 VDD VDD R14 C47 FBVDDQ FBVDDQ L29

Sheet 31 of 79 AB45
AB46
AB48
AB5
GND
GND
GND
GND
GND
GND
GND
GND
AL45
AL46
AL48
AL5
BF24
BF25
BF26
BF27
GND
GND
GND
GND
GND
GND
GND
GND
P14
P16
P18
P20
AC16
AC18
AC20
AC22
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AL14
AL16
AL18
AL20
BC42
BC45
BC46
BD38
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
R16
R18
R20
R22
D44
D45
D46
E44
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
L30
L32
L33
L35
AB8 GND GND AL8 BF28 GND GND P22 AC24 VDD VDD AL22 BD39 VDD VDD R24 E45 FBVDDQ FBVDDQ L41

GPU NVVDD, AB9


AC15
AC17
AC19
GND
GND
GND
GND
GND
GND
GND
GND
AL9
AM14
AM16
AM18
BF29
BF30
BF31
BF32
GND
GND
GND
GND
GND
GND
GND
GND
P24
P26
P28
P30
AC26
AC28
AC30
AC32
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AL24
AL26
AL28
AL30
BD41
BD42
BD44
BD45
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
R26
R28
R30
R32
F42
F44
F45
G41
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
P11
P39
R11
R40
AC21 AM20 BF33 P32 AD15 AL32 BD46 T15 G42 U11

FBVDDQ, GND
GND GND GND GND VDD VDD VDD VDD FBVDDQ FBVDDQ
AC23 GND GND AM22 BF34 GND GND R15 AD17 VDD VDD AM15 BD47 VDD VDD T17 H41 FBVDDQ FBVDDQ U39
AC25 GND GND AM24 BF35 GND GND R17 AD19 VDD VDD AM17 BD48 VDD VDD T19 H42 FBVDDQ FBVDDQ V11
AC27 GND GND AM26 BF36 GND GND R19 AD21 VDD VDD AM19 BD49 VDD VDD T21 H43 FBVDDQ FBVDDQ V39
AC29 GND GND AM28 BF37 GND GND R21 AD23 VDD VDD AM21 BE38 VDD VDD T23 J38 FBVDDQ FBVDDQ V40
AC31 GND GND AM30 BF5 GND GND R23 AD25 VDD VDD AM23 BE39 VDD VDD T25 J39 FBVDDQ FBVDDQ Y11
B AD14 AP11 BF7 R25 AD27 AM25 BE40 T27 J42 Y40 B
GND GND GND GND VDD VDD VDD VDD FBVDDQ FBVDDQ
AD16 GND GND AP2 BG1 GND GND R27 AD29 VDD VDD AM27 BE41 VDD VDD T29
AD18 GND GND AP4 BH1 GND GND R29 AD31 VDD VDD AM29 BE42 VDD VDD T31 FBVDDQ_SENSE_R49 R511 0_04 FBVDDQ_SENSE
FBVDDQ_SENSE 58,60
AD20 GND GND AP41 BH10 GND GND R31 AE14 VDD VDD AM31 BE43 VDD VDD U14
AD22 GND GND AP42 BH13 GND GND T11 AE16 VDD VDD AM32 BE44 VDD VDD U16 R488 0_04 FBVDDQ_SENSE_RTN
FBVDDQ_SENSE_RTN 58,60
AD24 GND GND AP45 BH16 GND GND T14 AE18 VDD VDD AN39 BE45 VDD VDD U18
AD26 GND GND AP46 BH19 GND GND T16 AE20 VDD VDD AP39 BE46 VDD VDD U20
AD28 GND GND AP48 BH2 GND GND T18 AE22 VDD VDD AR39 BE47 VDD VDD U22 GND
AD30 GND GND AP5 BH22 GND GND T2 AE24 VDD VDD AR40 BE48 VDD VDD U24 FBVDDQ_SENSE R49
AD32 GND GND AP8 BH25 GND GND T20 AE26 VDD VDD AR41 BE49 VDD VDD U26
AE11 GND GND AP9 BH28 GND GND T22 AE28 VDD VDD AT39 BF38 VDD VDD U28 FB_CLAMP BB48 FB_CLAMP_GPU
AE15 GND GND AT42 BH31 GND GND T24 AE30 VDD VDD AT40 BF39 VDD VDD U30
AE17 GND GND AU11 BH34 GND GND T26 AE32 VDD VDD AT41 BF40 VDD VDD U32 FB_VREF R39
AE19 GND GND AU2 BH37 GND GND T28 AF15 VDD VDD AU39 BF41 VDD VDD V15
AE2 GND GND AU4 BH5 GND GND T30 AF17 VDD VDD AU41 BF42 VDD VDD V17
AE21 GND GND AU45 BH7 GND GND T32 AF19 VDD VDD AU42 BF43 VDD VDD V19
AE23 AU46 BJ2 T39 AF21 AV41 BF44 V21 AG11 Del test point D01A
GND GND GND GND VDD VDD VDD VDD PROBE_FBVDDQ
AE25 GND GND AU48 BJ3 GND GND T4 AF23 VDD VDD AV42 BF45 VDD VDD V23
AE27 GND GND AU5 C1 GND GND T41 AF25 VDD VDD AV43 BF46 VDD VDD V25 PROBE_FB_GND AF10
AE29 GND GND AU8 C3 GND GND T42 AF27 VDD VDD AV44 BF47 VDD VDD V27 FBVDDQ
AE31 GND GND AU9 C49 GND GND T45 AF29 VDD VDD AW35 BF48 VDD VDD V29
AE39 GND GND AW13 D10 GND GND T46 AF31 VDD VDD AW36 BF49 VDD VDD V31
AE4 GND GND AW16 D13 GND GND T48 AG14 VDD VDD AW37 BG39 VDD VDD W14 FB_CAL_PD_VDDQ P40 FB_CAL_PD_VDDQ R51 40.2_1%_04
AE41 GND GND AW19 D16 GND GND T5 AG16 VDD VDD AW41 BG41 VDD VDD W16
AE42 GND GND AW22 D19 GND GND T8 AG18 VDD VDD AW42 BG42 VDD VDD W18 FB_CAL_PU_GND R48 FB_CAL_PU_GND R510 40.2_1%_04
AE45 GND GND AW25 D22 GND GND T9 AG20 VDD VDD AW43 BG44 VDD VDD W20
AE46 GND GND AW29 D25 GND GND U15 AG22 VDD VDD AW44 BG45 VDD VDD W22 FB_CALTERM_GND R47 FB_CAL_TERM_GND R512 60.4_1%_04
AE48 GND GND AW31 D28 GND GND U17 AG24 VDD VDD AW45 BG46 VDD VDD W24
AE5 GND GND AW34 D31 GND GND U19 AG26 VDD VDD AY36 BG47 VDD VDD W26
AE8 GND GND AY2 D34 GND GND U21 AG28 VDD VDD AY42 BG48 VDD VDD W28 N16E-GT
AE9 GND GND AY4 D37 GND GND U23 AG30 VDD VDD AY45 BG49 VDD VDD W30 GND
AF14 GND GND AY46 D4 GND GND U25 AG32 VDD VDD BA36 BH39 VDD VDD W32
AF16 GND GND AY48 D40 GND GND U27 AH15 VDD VDD BA37 BH40 VDD VDD Y15
AF18 GND GND AY5 D43 GND GND U29 AH17 VDD VDD BA38 BH41 VDD VDD Y17
C AF20 GND GND AY8 D7 GND GND U31 AH19 VDD VDD Y31 BH42 VDD VDD Y19 C
AF22 GND GND B1 E10 GND GND V14 AH21 VDD BH43 VDD VDD Y21
AF24 GND GND B10 E13 GND GND V16 AH23 VDD BH44 VDD VDD Y23
AF26 GND GND B13 E16 GND GND V18 AH25 VDD BH45 VDD VDD Y25
AF28 GND GND B16 E19 GND GND V20 AH27 VDD BH46 VDD VDD Y27
AF30 GND GND B19 E22 GND GND V22 AH29 VDD BH47 VDD VDD Y29
AF32 GND GND B2 E25 GND GND V24
AG15 GND GND B22 E28 GND GND V26
AG17 GND GND B25 E31 GND GND V28 N16E-GT N16E-GT R45
AG19 GND GND B28 E34 GND GND V30 10K_04
AG21 GND GND B31 E37 GND GND V32
G1S
AG23 GND GND B34 E40 GND GND W11
AG25 GND GND B37 E43 GND GND W15
BGA1745
AG27 GND GND B40 E46 GND GND W17
COMMON
AG29 GND GND B43 E48 GND GND W19
AG31 GND GND B45 E5 GND GND W2 21/21 NC/3V3 3V3_RUN GND
AH11 GND GND B48 E7 GND GND W21
AH14 GND GND B49 F6 GND GND W23 AK10 NC VDD33 AW15
AH16 GND GND B7 G2 GND GND W25 AM10 NC VDD33 AY15
AH18 GND GND BA13 G4 GND GND W27 AY14 NC
AH2 GND GND BA16 G45 GND GND W29 BC11 NC C199 C191 C217 C749
AH20 GND GND BA19 G46 GND GND W31 BF12 NC GK104 GM204
AH22 GND GND BA22 G48 GND GND W39 BF18 NC 3V3MISC 3V3_AON AW17
AH24 GND GND BA25 G5 GND GND W4 3V3MISC 3V3_AON AY17 0.1u_10V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X6S_04 4.7u_6.3V_X6S_06
AH26 GND GND BA28 H10 GND GND W41
AH28 GND GND BA31 H13 GND GND W42
AH30 GND GND BA34 H16 GND GND W45
AH32 GND GND BB10 H19 GND GND W46
AH39 GND GND BB13 H22 GND GND W48 3V3AUX_NC AW14 GND
AH4 GND GND BB16 H25 GND GND W5
AH41 GND GND BB19 H28 GND GND W8
AH42 GND GND BB22 H31 GND GND W9 N16E-GT
AH45 GND GND BB23 H34 GND GND Y14
AH46 GND GND BB25 H37 GND GND Y16 3V3_AON
AH48 GND GND BB26 H40 GND GND Y18
D AH5 BB28 H8 Y20 D
GND GND GND GND 23,28,29,30,36,58,59 3V3_RUN
AH8 GND GND BB29 J13 GND GND Y22
3,18,30,58 3V3_AON
AH9 GND GND BB31 J16 GND GND Y24 C736 C731 C730
19,20,21,22,23,24,25,26,27,60 FBVDDQ
AJ15 GND GND Y32 J19 GND GND Y26
27,59,60 NVVDD
AJ17 GND GND AW24 J22 GND GND Y28
AJ19 GND GND BB21 J25 GND GND Y30 0.1u_10V_X7R_04 1u_6.3V_X6S_04 4.7u_6.3V_X6S_06
AJ21 GND J28 GND GND J34

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
AJ23 GND J31 GND GND J37

N16E-GT N16E-GT Title


GND GND GND GND GND [31] GPU NVVDD, FBVDDQ and GND
Size Document Number Rev
Custom P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 31 of 79


1 2 3 4 5 6 7 8

B - 32 GPU NVVDD, FBVDDQ, and GND


Schematic Diagrams

PCH 1/9

5 4 3 2 1

BOOT HALT JTAG ODT ESPI FLASH SHARING MODE


ENABLE:LOW DISABLE:LOW MASTER ATTACHED FLASH SHARING:LOW
SLAVE ATTACEHD FLASH SHARING:HIGH
(INTERNAL WEAK PD) (INTERNAL WEAK PU) (INTERNAL WEAK PD)
SPI_3.3V D02 SPI_3.3V D02 3.3VA

R664 R689 R669

*20K_04 *20K_04 *4.7K_04


SPI_SI_R SPI_SO_R GPP_H_12

D R663 R688 R662 D


*4.7K_04 *4.7K_04 *20K_04 SPT-H_PCH
U114A

R592 *0_04 BD17 BB27 PLT_RST# 36


48,51 LAN_W AKEUP# GPP_A11/PME# GPP_B13/PLTRST#
AG15 GPP_G_14_GSXDIN:
CONSENT STRAP PESONALITY STRAP RSVD P43
AG14 GPP_G16/GSXCLK DMI AC COUPLING FULL VOLTAGE MODE
ENABLE:LOW ENABLE:LOW RSVD R39
AF17 GPP_G12/GSXDOUT WHEN SAMPLED LOW
(INTERNAL WEAK PU) (INTERNAL WEAK PU) RSVD R36
AE17 GPP_G13/GSXSLOAD GPP_G_14_GSXDIN
RSVD R42 R710 *1K_04
SPI_3.3V D02 SPI_3.3V D02 GPP_G14/GSXDIN R41
AR19 GPP_G15/GSXSRESET# 3.3VS
AN17 TP2

B.Schematic Diagrams
TP1
AF41 EXTTS_SNI_DRV0_PCH R1810 8.2K_04
R656 R719 SPI_SI_R BB29 GPP_E3/CPU_GP0
SPI0_MOSI AE44 TCH_PNL_INTR_N R1812 10K_04 3.3VA
SPI_SO_R BE30 GPP_E7/CPU_GP1
SPI0_MISO BC23 BT_RF_KILL_R_N
*20K_04
SPI_IO2
*20K_04
SPI_IO3
SPI_W P#

SPI_W P1#
R649
D02
R648
33_04

*33_04
SPI_CS_0#
SPI_SCLK_R
SPI_CS_1#
BD31
BC31
AW31
SPI0_CS0#
SPI0_CLK
SPI0_CS1#
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

GPP_H18/SML4ALERT#
BD24

BC36
EXTTS_SNI_DRV1_PCH R1811

SML4ALERT# R720
8.2K_04

*100K_04
Sheet 32 of 79
D01A SPI_IO2 BC29 BE34 SML4DATA R660 *100K_04
R655
*4.7K_04
R718
*1K_04
SPI_HOLD#

SPI_HOLD1#
R698

R697
33_04

*33_04
SPI_3.3V
SPI_IO3
R281
BD30
*2.2K_04 SPI_CS2# AT31
AN36
SPI0_IO2
SPI0_IO3
SPI0_CS2#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
BD39
BB36
BA35
SML4CLK
SML3ALERT#
SML3DATA
R714 *10K_04
PCH 1/9
GPP_H14/SML3DATA BC35 SML3CLK
AL39 GPP_D1/SPI1_CLK
D02 GPP_D0/SPI1_CS#
GPP_H13/SML3CLK BD35 GPP_H_12
AN41 GPP_H12/SML2ALERT#
GPP_D3/SPI1_MOSI AW35 SML2DATA R267 *10K_04
AN38 GPP_H11/SML2DATA
GPP_D2/SPI1_MISO BD34 SML2CLK
AH43 GPP_H10/SML2CLK
AG44 GPP_D22/SPI1_IO3 BE11 R582 330K_04
C GPP_D21/SPI1_IO2 INTRUDER# VCC_RTC C

QJHT-S 1 OF 12 REV = 1.3

For ITE IT8587B Test


HSPI_MSI R752 0_04 SPI_SI_R
B 48 HSPI_MSI HSPI_MSO SPI_SO_R B
R735 0_04
48 HSPI_MSO HSPI_SCLK SPI_SCLK_R
R748 0_04
48 HSPI_SCLK HSPI_CE# SPI_CS_0#
R742 0_04
48 HSPI_CE# SPI_CS_1#
R728 *0_04

SPI_3.3V
D01A
SPI_* = 1"~6.5" SPI_* = 1"~6.5"
SPI_3.3V RTC Wake UP
RTC Wake UP
BIOS + ME ROM 8MB VDD3
2
PJ39
1
1mm

U46 U45
8 5 SPI_SI_M R751 33_04 SPI_SI_R 8 5 SPI_SI_B R741 *33_04 SPI_SI_R
VDD SI VDD SI
2 SPI_SO_M R745 33_04 SPI_SO_R 2 SPI_SO_B R736 *33_04 SPI_SO_R
C959 SO C920 SO
R746 3.3K_1%_04 SPI_W P# 3 1 SPI_CS0# R743 0_04 SPI_CS_0# R737 *3.3K_1%_04 SPI_W P1# 3 1 SPI_CS1# R731 *0_04 SPI_CS_1#
0.1u_16V_Y5V_04 WP# CE# *0.1u_16V_Y5V_04 WP# CE#
6 SPI_SCLK_M R747 33_04 SPI_SCLK_R 6 SPI_SCLK_B R738 *33_04 SPI_SCLK_R
D01A SCK SCK
R744 3.3K_1%_04 SPI_HOLD# 7 4 R733 *3.3K_1%_04 SPI_HOLD1# 7 4
HOLD# VSS HOLD# VSS
GD25B64CSIGR *GD25B32B
D02
A A

64MPRMC
GD:6-04-02564-492

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
WINBOND: 6-04-02564-491
64M
GD:6-04-02564-A75
MXIC:6-04-25647-490 SPI_3.3V 38 Title
3.3VA 5,33,34,35,36,38,40,54 [32] PCH 1/12-SPI/SMBUS
VCC_RTC 35,38
Size Document Number
3.3VS 3,9,10,11,12,13,14,15,16,17,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 Rev
VDD3 5,30,35,38,40,44,48,50,51,53,54,55,56,57,58 A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 32 of 79


5 4 3 2 1

PCH 1/9 B - 33
Schematic Diagrams

PCH 2/9
5 4 3 2 1

SPT-H_PCH
U114B
L27
2 DMI_MT_IR_0_DN DMI_RXN0 AF5 USB_PN1 42
N27 USB2N_1
2 DMI_MT_IR_0_DP
C27 DMI_RXP0
USB2P_1
AG7
AD5
USB_PP1 42 USB3 PORT1, ⶎ, C h a r g e r
2 DMI_IT_MR_0_DN DMI_TXN0
B27 USB2N_2
2 DMI_IT_MR_0_DP DMI_TXP0 AD7 Del test point D01A
E24 USB2P_2
2 DMI_MT_IR_1_DN DMI_RXN1 AG8 USB_PN3 51
G24 USB2N_3
DFX TEST MODE
2 DMI_MT_IR_1_DP
B28 DMI_RXP1
USB2P_3
AG10
AE1
USB_PP3 51 USB3 PORT3, ⎛ ᶲ
2 DMI_IT_MR_1_DN DMI_TXN1 USB_PN4 51
XTAL INPUT IS SINGLE ENDED A28 USB2N_4
IF SAMPLED LOW ELSE DIFFERENTIAL
2
2
DMI_IT_MR_1_DP
DMI_MT_IR_2_DN
G27 DMI_TXP1 DMI
USB2P_4
AE2
AC2
USB_PP4 51 USB3 PORT4, ⎛ ᶳ
E26 DMI_RXN2 USB_PN5 41
USB2N_5
D
VISACH2_D3 2 DMI_MT_IR_2_DP
B29 DMI_RXP2
USB2P_5
AC3
AF2
USB_PP5 41 USB3 PORT5, ᶲ D
2 DMI_IT_MR_2_DN DMI_TXN2 USB_PN6 43
C29 USB2N_6
2 DMI_IT_MR_2_DP DMI_TXP2 AF3 USB_PP6 43 NGFF 3G+MSATA
R675 L29 USB2P_6
2 DMI_MT_IR_3_DN DMI_RXN3 AB3 USB_PN7 51
K29 USB2N_7
*10K_04 2 DMI_MT_IR_3_DP DMI_RXP3 USB 2.0 AB2 USB_PP7 51 FINGER
B30 USB2P_7
2 DMI_IT_MR_3_DN DMI_TXN3 AL8 USB_PN8 44
A30 USB2N_8
2 DMI_IT_MR_3_DP DMI_TXP3 AL7 USB_PP8 44 NGFF WLAN+BT
USB2P_8 AA1
R583 100_1%_04 PCIECOMP_N B18 USB2N_9 USB_PN9 49
PCIECOMP_P PCIE_RCOMPN AA2 USB_PP9 49 CCD
C17 USB2P_9
RING OSCILLATOR BYPASS PCIE_RCOMPP AJ8
USB2N_10 AJ7
USB_OC0# USB2P_10
H15 W2
G15 PCIE1_RXN/USB3_7_RXN USB2N_11 W3
B.Schematic Diagrams

R672 A16 PCIE1_RXP/USB3_7_RXP USB2P_11 AD3


B16 PCIE1_TXN/USB3_7_TXN USB2N_12 AD2

PCIe/USB 3
*10K_04
B19 PCIE1_TXP/USB3_7_TXP USB2P_12 V2 D01A
C19 PCIE2_TXN/USB3_8_TXN USB2N_13 V1 3.3VA
PCIE2_TXP/USB3_8_TXP USB2P_13 RN3

Sheet 33 of 79
E17 AJ11
PCIE2_RXN/USB3_8_RXN USB2N_14 10K_8P4R_04
G17 AJ13 USB_OC2#
PCIE2_RXP/USB3_8_RXP USB2P_14 1 8
L17 VISACH2_D3
XTAL INPUT FREQUENCY[0] PCIE3_RXN/USB3_9_RXN 2 7
K17 USB_OC1#
PCIE3_RXP/USB3_9_RXP 3 6

PCH 2/9
USB_OC1# B20
PCIE3_TXN/USB3_9_TXN USB_OC0# 4 5
C20 USB_OC0#
PCIE3_TXP/USB3_9_TXP AD43
E20 GPP_E9/USB2_OC0# USB_OC1# RN4
R674 PCIE4_RXN/USB3_10_RXN AD42
G19 GPP_E10/USB2_OC1# USB_OC2# 10K_8P4R_04
PCIE4_RXP/USB3_10_RXP AD39 USB_OC5#
*10K_04 B21 GPP_E11/USB2_OC2# VISACH2_D3 1 8
PCIE4_TXN/USB3_10_TXN AC44 USB_OC6#
A21 GPP_E12/USB2_OC3# USB_OC4# 2 7
PCIE4_TXP/USB3_10_TXP Y43 USB_OC7#
K19 GPP_F15/USB2_OCB_4 USB_OC5# 3 6
51 PCIE_RXN5_GLAN PCIE5_RXN Y41 USB_OC4#
L19 GPP_F16/USB2_OCB_5 USB_OC6# 4 5
51 PCIE_RXP5_GLAN PCIE5_RXP W44
C807 0.1u_10V_X7R_04 D22 GPP_F17/USB2_OCB_6 USB_OC7#
C 51 PCIE_TXN5_GLAN PCIE5_TXN W43 C
XTAL INPUT FREQUENCY[1] C810 0.1u_10V_X7R_04 C22 GPP_F18/USB2_OCB_7
51 PCIE_TXP5_GLAN PCIE5_TXP
USB_OC2# G22
44 PCIE_RXN6_W LAN PCIE6_RXN
E22 DESIGN NOTE:
44 PCIE_RXP6_W LAN PCIE6_RXP AG3 USB2_COMP R560 113_1%_04
C813 0.1u_10V_X7R_04 B22 USB2_COMP USB2 COMP RES: PLACE WITHIN 1 INCH
44 PCIE_TXN6_W LAN PCIE6_TXN AD10 USB2_VBUSSENSE R189 1K_04
R272 C814 0.1u_10V_X7R_04 A23 USB2_VBUSSENSE
44 PCIE_TXP6_W LAN PCIE6_TXP AB13 Del test point D01A
L22 RSVD_AB13
*10K_04 51 PCIE_RXN7_SD40 PCIE7_RXN AG2 USB2_ID R559 1K_04
K22 USB2_ID
51 PCIE_RXP7_SD40 PCIE7_RXP
C819 *0.1u_10V_X7R_04 C23
51 PCIE_TXN7_SD40 PCIE7_TXN
C818 *0.1u_10V_X7R_04 B23
51 PCIE_TXP7_SD40 PCIE7_TXP
K24 BD14
D01A L24 PCIE8_RXN GPD7/RSVD
C24 PCIE8_RXP
B24 PCIE8_TXN
PCIE8_TXP

QJHT-S 2 OF 12 REV = 1.3

B B

5,32,34,35,36,38,40,54 3.3VA
5,30,32,35,38,40,44,48,50,51,53,54,55,56,57,58 VDD3

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[33] PCH 2/12-DMI/PCIE/USB2.0
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 33 of 79


5 4 3 2 1

B - 34 PCH 2/9
Schematic Diagrams

PCH 3/9

5 4 3 2 1

BIOS RECOVERY PCH_RSVD MFG_MODE


SPT-H_PCH
ENABLE :LOW U114C
3.3VS
3.3VS 3.3VS
44 CL_CLK1 AV2
CL_CLK G31
44 CL_DATA1 AV3 PCIE9_RXN/SATA0A_RXN PCIE_RXN9_SATA0A_RXN_SSD 44
CL_DATA CLINK H31
AW2 PCIE9_RXP/SATA0A_RXP PCIE_RXP9_SATA0A_RXP_SSD 44
R244 R248
R708 44 CL_RST#1
R44
CL_RST#
PCIE9_TXN/SATA0A_TXN
C31
B31
C824
C825
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PCIE_TXN9_SATA0A_TXN_SSD 44
PCIE_TXP9_SATA0A_TXP_SSD 44
SSD
*10K_04 PCIE9_TXP/SATA0A_TXP
10K_04 10K_04 R43 GPP_G8/FAN_PWM_0
MFG_MODE U39 GPP_G9/FAN_PWM_1 G29 PCIE_RXN10_SATA1A_SSD
BIOS_REC PCH_RSVD GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN
N42 E29 PCIE_RXP10_SATA1A_SSD
GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP
R245 R249
U43
FAN PCIE10_TXN/SATA1A_TXN
C32
B32
C831
C829
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PCIE_TXN10_SATA1A_SSD
PCIE_TXP10_SATA1A_SSD SSD
D PCIE10_TXP/SATA1A_TXP D
*0_04 *10K_04 U42 GPP_G0/FAN_TACH_0
SCI GPP_G1/FAN_TACH_1 F41 SATA_RXN2
U41 PCIE15_RXN/SATA2_RXN SATA_RXP2
GPP_G2/FAN_TACH_2 E41
48 SCI# C
D29
A SCI#_R
RB751V-40(lision)
M44
U36 GPP_G3/FAN_TACH_3
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
B39
A39
SATA_TXN2
SATA_TXP2
main HDD 3.3VS

P44 GPP_G4/FAN_TACH_4
GFX SELECT TABLE PCIE15_TXP/SATA2_TXP
D9 C A SW I#_R T45 GPP_G5/FAN_TACH_5
NORMAL GFX:LOW 48 SW I# GPP_G6/FAN_TACH_6 D43 D02
RB751V-40(lision) T44 SATA_RXN3 51

PCIe/SATA
PCIE16_RXN/SATA3_RXN E42
CUSTOMER GFX:HIGH GPP_G7/FAN_TACH_7 SATA_RXP3 51 SATAGP0 R1884 43K_04
PCIE16_RXP/SATA3_RXP A41
3.3VS 44 PCIE_TXP11_SSD
44 PCIE_TXN11_SSD
0.22u_10V_X5R_04
0.22u_10V_X5R_04
C830
C832
B33
C33 PCIE11_TXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
A40
SATA_TXN3 51
SATA_TXP3 51 2nd HDD SATAGP1_R
SATAGP2
R1885
R1886
*43K_04
43K_04
PCIE11_TXN
SSD 44 PCIE_RXP11_SSD
K31
L31 PCIE11_RXP
PCIE17_RXN/SATA4_RXN
H42
H40
SATAGP3 R1887 43K_04

B.Schematic Diagrams
44 PCIE_RXN11_SSD PCIE11_RXN PCH_SATAHDD_LED#
R707 PCIE17_RXP/SATA4_RXP R673 10K_04
BIOS_REC E45
AB33 PCIE17_TXN/SATA4_TXN
PCH_RSVD GPP_F10/SCLOCK F45 SCI#_R
*10K_04 AB35 PCIE17_TXP/SATA4_TXP R681 10K_04
GP39_GFX_CRB_DETECT AA44 GPP_F11/SLOAD
GP39_GFX_CRB_DETECT

R676
PCIE_TXN14 C639
PCIE_TXP14 C643
MFG_MODE
*0.22u_10V_X5R_04
*0.22u_10V_X5R_04
AA45
B38
C38
GPP_F13/SDATAOUT0
GPP_F12/SDATAOUT1
PCIE14_TXN/SATA1B_TXN
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
K37
G37
G45
G44
D01A

SW I#_R R679
3.3VA

10K_04
Sheet 34 of 79
PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP
10K_04
B KEY NGFF
PCIE_RXN14
PCIE_RXP14
D39
E37 PCIE14_RXN/SATA1B_RXN
PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED#
AD44 PCH_SATAHDD_LED#
PCH_SATAHDD_LED# 51 SATAGP0 R1851 *0_04 SATAGP1 PCH 3/9
PCIE X2 PCIE_TXN13 C843
PCIE_TXP13 C835
*0.22u_10V_X5R_04
*0.22u_10V_X5R_04
C36
B36 PCIE13_TXN/SATA0B_TXN
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
AG36
AG35
SATAGP0
SATAGP1_R
SATAGP0 44 SATAGP0 & SATAGP1
AG39 H: SATA
(13 & 14) PCIE_RXN13
PCIE_RXP13
G35
E35
PCIE13_TXP/SATA0B_TXP
PCIE13_RXN/SATA0B_RXN
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
AD35
SATAGP2
SATAGP3
D02
L: PCIe
PCIE13_RXP/SATA0B_RXP AD31 1.0V_VCCST
GPP_F1/SATAXPCIE4/SATAGP4 AD38
C836 0.22u_10V_X5R_04 A35 GPP_F2/SATAXPCIE5/SATAGP5
C 44 PCIE_TXP12_SSD PCIE12_TXP AC43 C
C844 0.22u_10V_X5R_04 B35 GPP_F3/SATAXPCIE6/SATAGP6
44 PCIE_TXN12_SSD PCIE12_TXN AB44
SSD 44 PCIE_RXP12_SSD
44 PCIE_RXN12_SSD
H33
G33 PCIE12_RXP
GPP_F4/SATAXPCIE7/SATAGP7
W36 R143
PCIE12_RXN EDP_BRIGHTNESS 13
J45 GPP_F21/EDP_BKLTCTL W35
PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN BLON 13 1K_04
K44 W42 NB_ENAVDD 13
N38 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN
N39 PCIE20_RXP/SATA7_RXP HOST AJ3 PCH_THERMTRIP#_R R144 604_1%_04 PCH_THERMTRIP#
PCIE20_RXN/SATA7_RXN THERMTRIP# PCH_THERMTRIP# 5
H44 AL3 PCH_PECI
PCIE19_TXP/SATA6_TXP PECI PCH_PECI 5
H43 AJ4 H_PM_SYNC_R R148 30.1_1%_04
PCIE19_TXN/SATA6_TXN PM_SYNC H_PM_SYNC 5
L39 AK2 PLTRST_CPU_N 5
L37 PCIE19_RXP/SATA6_RXP PLTRST_PROC# AH2
PCIE19_RXN/SATA6_RXN PM_DOWN H_PM_DOW N 5
R162
QJHT-S 3 OF 12 REV = 1.3 *10K_04
D02
PLACE CLOSE TO PCH
3.3VS
PCH_THERMTRIP# R1656 *1K_04
DIMM0_CHA_EVENT# 9
R1657 *1K_04
DIMM0_CHB_EVENT# 11
C1726 C1727
R1658 *1K_04
DIMM1_CHA_EVENT# 10

10
U121

6
1
*10u_6.3V_X5R_06 *0.1u_10V_X7R_04
R1659 *1K_04
DIMM1_CHB_EVENT# 12
VDD3_3
VDD3_2
B
VDD3_1 B
CBTL02043A
CBTL02043A 19
B0+ PCIE_TXP10_SSD 44
18
B0- PCIE_TXN10_SSD 44
SATA PORT2 PCIE_TXP10_SATA1A_SSD 3 17 TO J_SSD1 PCIEX4
qfn20-4_5x2_5mm

J_SATA1 PCIE_TXN10_SATA1A_SSD A0+ B1+ PCIE_RXP10_SSD 44


4 16
S1 A0- B1- PCIE_RXN10_SSD 44
S2 SATATXP2 C1014 0.01u_16V_X7R_04 SATA_TXP2
PCIE_RXP10_SATA1A_SSD 7 15
S3 SATATXN2 C1013 0.01u_16V_X7R_04 SATA_TXN2 A1+ C0+ SATA1_TXP1 43
PCIE_RXN10_SATA1A_SSD 8 14
S4 A1- C0- SATA1_TXN1 43
S5
S6
SATARXN2
SATARXP2
C1012
C1011
0.01u_16V_X7R_04
0.01u_16V_X7R_04
SATA_RXN2
SATA_RXP2 C1+
13
12
SATA1_RXP1 43
TO J_3G1 SATA1
S7 C1- SATA1_RXN1 43 D01A
3.3VS SATAGP1_R
9 LTE_GPIO#
SEL(L_B, H_C) R1870 *0_04
LTE_GPIO# 40 H: SATA,
P1
THERMAL

KEY SATAGP1 3.3VS


P2 4G_SATA_DET# L: USB3 (4G)
P3 C1009 C1010 OPTION M-KEY (J_SSD1) B-KEY (J_3G1) L: PCIe H: SATA,
GND3
GND2
GND1

H: SATA
XSD

P4 U122
1 PCIE X 4 L: USB3 (4G)

5
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06 USB3 U122 4G_SATA_DET# SATAGP1 SATAGP1_R
P6 1 㰺㍺CARD PIN4 (J_3G1) (J_3G1)
PCIE X 4 4G_SATA_DET# 43
P7 5VS 4
21
20
11
5
2

2 SATA
P8 ᶵ㓗㎜ 2 L
L L
(Default) (Defaule)
PCIE
SATAGP1 43
P9
P10 SATA USB3 L H PCIE
3 MC74VHC1G08DFT2G SATAGP1 L
3
P11 4G CARD
L: PCIe H
P12 C1006 C1007 C1008 SATA SATA
P13 4 GND 㰺㍺CARD H H SATA SATA
A P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 R1852 *0_04 H: SATA,USB3(4G) A
P15
GND1
GND2

5,32,33,35,36,38,40,54
3,9,10,11,12,13,14,15,16,17,32,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63
3.3VA
3.3VS
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
13,17,45,46,47,49,50,51,54 5VS Title
For P650RE: 193705-1
PCB Footprint = 193705-1 PN = 6-20-437E0-022
5,7,35,55,61,63 1.0V_VCCST [34] PCH 3/12-PCIE/SATA/HOST
P650RE, P655RE, P650RA, P655RA烉6-20-437E0-022 Size Document Number Rev
P650RG, P670RE, P670RG, P670RA烉6-21-43710-022
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 34 of 79


5 4 3 2 1

PCH 3/9 B - 35
Schematic Diagrams

PCH 4/9
5 4 3 2 1

SPT-H_PCH
VDD3 U114D

D01A
BA9 BB17 ISH_GP_6_R
45 HDA_BITCLK HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# PM_CLKRUN#
D35 A C *RB751V-40(lision) BD8 AW22
45,46 HDA_RST# HDA_RST# GPP_A8/CLKRUN# PM_CLKRUN# 49
BE7
45 HDA_SDIN0 HDA_SDI0
BC8 AR15
R1862 1.5K_1%_04 R1863 45.3K_1%_04 HDA_SDI1 GPD11/LANPHYPC Del test point D01A
HDA_SDOUT BB7 AV13
35,45 HDA_SDOUT HDA_SDO GPD9/SLP_WLAN#
D
ijıŮŪŭŴ 45 HDA_SYNC
BD9
HDA_SYNC DDR4_DRAMRST# D02 D
VCC_RTC BC14
D8 DRAM_RESET#
BD1 BD23 VRALERTB#
1 A BE2 RSVD_BD1 GPP_B2/VRALERT# AL27
C 3 RSVD_BE2 GPP_B1 AR27
CLOSE TO PCH GPP_B0 Del test point D01A
AUDIO
2 A R557 30.1_1%_04 AUD_AZACPU_SDO AM1 N44
3 AUD_AZACPU_SDO_R DISPA_SDO GPP_G17/ADR_COMPLETE
AN2 AN24

RTC_VBAT_1
3 AUD_AZACPU_SDI DISPA_SDI GPP_B11
BAT54CS3 R556 30.1_1%_04 AUD_AZACPU_SCLK_R AM2 AY1 SYS_PW ROK 40
C342 R580 R577 3 AUD_AZACPU_SCLK DISPA_BCLK SYS_PWROK
IJıŮŪŭŴ D02 30.1K_1%_04 30.1K_1%_04 BC13 PCIE_W AKE#
1u_6.3V_X5R_04 AL42 WAKE# PCIE_W AKE# 44,51
GPP_D8/I2S0_SCLK BC15 SLP_A#
AN42 GPD6/SLP_A# PM_SLP_LAN#
GPP_D7/I2S0_RXD AV15
AM43 SLP_LAN#
GPP_D6/I2S0_TXD BC26
B.Schematic Diagrams

AJ33 GPP_B12/SLP_S0#
R266 GPP_D5/I2S0_SFRM AW15
AH44 GPD4/SLP_S3# SUSB# 13,40,42,46,48,54,55
GPP_D20/DMIC_DATA0 BD15

1
C803 AJ35 GPD5/SLP_S4# SUSC# 48,52,55,57
1K_04 GPP_D19/DMIC_CLK0 BA13
JOPEN2 AJ38 GPD10/SLP_S5#
1u_6.3V_X5R_04 *OPEN_10mil-1MM AJ42 GPP_D18/DMIC_DATA1
SUS_CLK
Sheet 35 of 79 GPP_D17/DMIC_CLK1 AN15 D03 DEL
J_CBAT1 GPD8/SUSCLK BD13 PM_BATLOW #

2
GPD0/BATLOW# BB19 SUS_PW R_ACK# R599 *0_04
1 GPP_A15/SUSACK# SUS_PW R_ACK#_EC 48
RTC_RST# BC10 BD19 SUSW ARN#
2 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK D01A
PCH 4/9
SRTC_RST# BB10
50271-0020N-001 SRTCRST#
P/N = 6-20-43130-102 AW11 BD11 LAN_W AKE#
PCB Footprint = 85204-02R C809
40 PM_PCH_PW ROK
RSMRST# BA11 PCH_PWROK GPD2/LAN_WAKE# BB15 AC_PRESENT D01A
48 RSMRST# RSMRST# GPD1/ACPRESENT AC_PRESENT 48
1u_6.3V_X5R_04 D01A BB13 SLP_SUS#_R R1853 *0_04
SLP_SUS# EC_SLP_SUS# 48,53,54,55
D01A AT13 PW R_BTN#
RSMRST# R1824 *0402_short PCH_DPW ROK AV11 GPD3/PWRBTN# PW R_BTN# 48
DSW_PWROK AW1 SYS_RESET# D01A
SKIN_THRM_SNSR_ALERT_N BB41 SYS_RESET#
GPP_C2/SMBALERT# BD26 SPKR_SMC_EXTSMI R620 0_04

SMBUS
SMB_CLK AW44 GPP_B14/SPKR PCH_SPKR 45
45,49 SMB_CLK GPP_C0/SMBCLK AM3
C SMB_DATA BB43 PROCPWRGD H_PW RGD 5 C
45,49 SMB_DATA GPP_C1/SMBDATA
GPP_C5 BA40
GPP_C5/SML0ALERT# AT2 ITP_PMODE
SML0_CLK AY44 ITP_PMODE 1.0V_VCCST
GPP_C3/SML0CLK AR3 PCH_JTAGX
SML0_DATA BB39 JTAGX
GPP_C4/SML0DATA JTAG AR2 PCH_JTAG_TMS
PCH_HOT_GNSS_DISABLE AT27 JTAG_TMS
GPP_B23/SML1ALERT#/PCHHOT# AP1 PCH_JTAG_TDO R555 51_04
R686 *0_04 SMC_CPU_THERM_RAW42 JTAG_TDO
48 SMC_CPU_THERM GPP_C6/SML1CLK AP2 PCH_JTAG_TDI
SMD_CPU_THERM AW45 JTAG_TDI
48 SMD_CPU_THERM GPP_C7/SML1DATA AN3 PCH_JTAG_TCK R562 51_04
JTAG_TCK

QJHT-S 4 OF 12 REV = 1.3


D01A
SUSW ARN# R1835 0_04 SUS_PW R_ACK#
3.3VS D02
D01A 3.3VA
RN7
1K_8P4R_04
C470 *100p_50V_NPO_04 SMC_CPU_THERM_R 1 8
DRAM_RST# VDDQ C888 *100p_50V_NPO_04 SMD_CPU_THERM 2 7
R739 R740 SMB_CLK
C887 *100p_50V_NPO_04 3 6
C453 *100p_50V_NPO_04 SMB_DATA 4 5
1K_04 1K_04
Q45A 2 G R201
MTDK5S6R 470_04
1 6 SMB_CLK D02
9,10,11,12,17,51 SMB_CLK_R D02
S

D
SML0_CLK R294 499_1%_04
Q45B 5 DDR4_DRAMRST#
G DDR4_DRAMRST# 9,10,11,12
MTDK5S6R SML0_DATA R713 499_1%_04
4 3 SMB_DATA
9,10,11,12,17,51 SMB_DATA_R D01A
S

D
C361 SUSW ARN# R593 1K_04
B *0.1u_10V_X7R_04 R207 *1K_04 B

VDD3

SUS_PW R_ACK# R598 *10K_04


Flash Descriptor Security Overide
Low = Disabled-(Default) PW R_BTN# R193 *10K_04
High = Enabled PM_BATLOW #
JOPEN1 R588 8.2K_04
*OPEN_10mil-1MM
PM_SLP_LAN# R202 *10K_04
3.3VA R175 1K_04 1 2 R149 1K_04
ME_W E 48 PCIE_W AKE# R192 1K_04

R168 *910_04 A C HDA_SDOUT AC_PRESENT R587 10K_04


HDA_SDOUT 35,45
D7 RB751V-40(lision)

ESPI/LPC SELECT STARP TOP SWAP OVERRIDE STRAP EXI BOOT STALL BYPASS 3.3VS
LPC : LOW (DEFAULT) SWAP ENABLE: HIGH ENABLE:HIGH
eSPI: HIGH SWAP DISABLE(DEFAULT): LOW (INTERNAL WEAK PD) PM_CLKRUN# R219 8.2K_04
(INTERNAL WEAK PD) (INTERNAL WEAK PD)
SYS_RESET# R564 10K_04
3.3VA 3.3VS 3.3VA TLS CONFIDENTITALITY RSMRST# R191 10K_04 D01A
ENABLE: HIGH
A
(INTERNAL WEAK PD) SUS_CLK R196 *1.5K_04 A

R296 R616 R293 KW>>sZE>/^>t,E^DW>>Kt


*4.7K_04 150K_1%_04 *4.7K_04 D01A
GPP_C5 SPKR_SMC_EXTSMI PCH_HOT_GNSS_DISABLE
3.3VA R1871 *4.7K_04 3.3VA 5,32,33,34,36,38,40,54
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
1.0V_VCCST 5,7,34,55,61,63 Title
R280 R615 R279
*20K_04 *20K_04 *20K_04
R251 *20K_04 SKIN_THRM_SNSR_ALERT_N VCC_RTC 32,38
VDDQ 4,7,9,10,11,12,52,57
[35] PCH 4/12-HDA/SMBUS/RTC
3.3V 2,13,30,41,42,43,44,49,51,52,54,55,58,59,60 Size Document Number Rev
3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63
VDD3 5,30,32,38,40,44,48,50,51,53,54,55,56,57,58 A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 35 of 79


5 4 3 2 1

B - 36 PCH 4/9
Schematic Diagrams

PCH 5/9
5 4 3 2 1

D D

U114E
R632 100K_04 SPT-H_PCH

BB3 3.3VS
FROM DP REDRIVER AW4 GPP_I7/DDPC_CTRLCLK
14,30 MDP_F_HPD_RE GPP_I0/DDPB_HPD0 BD6
AY2 GPP_I8/DDPC_CTRLDATA

B.Schematic Diagrams
17,30 HDMI_HPD GPP_I1/DDPC_HPD1 BA5
AV4 GPP_I5/DDPB_CTRLCLK
FROM DP REDRIVER 14,30 MDP_E_HPD_RE GPP_I2/DDPD_HPD2 BC4
BA4 GPP_I6/DDPB_CTRLDATA DGPU_RST#_PCH R253
GPP_I3/DDPE_HPD3 BE5 *10K_04
R729 100K_04 GPP_I9/DDPD_CTRLCLK BE6 DGPU_SELECT# R699
GPP_I10/DDPD_CTRLDATA 10K_04
Y44 H_SKTOCC_N 5 DGPU_PRSNT#
GPP_F14 R683 10K_04
V44
GPP_F23 DGPU_RST#_PCH DGPU_PW R_EN# 48,59
W39 3V3_RUN
BD7 GPP_F22
3 IEDP_HPD GPP_I4/EDP_HPD DGPU_PRSNT#

Sheet 36 of 79
L43 DGPU_PW RGD D01A
GPP_G23 DGPU_PW RGD_R D02 *0_04 R711 10K_04
L44 R1888
R572 GPP_G22 GC6_FB_EN DGPU_PW RGD 18,60 R682 *10K_04
U35
GPP_G21 GPU_EVENT# GC6_FB_EN 30,60
100K_04 R35
GPP_G20 GPU_EVENT# 30

PCH 5/9
BD36 DGPU_SELECT#
GPP_H23
3.3VS

GC6_FB_EN R240 *10K_04


C C
QJHT-S 5 OF 12 REV = 1.3
GPU_EVENT# R235 *10K_04
R236 *10K_04
D01A

SPT-H_PCH
U114F

C11 AT22

LPC/eSPI
42 USB3_TXN1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD0 48,49
B11 AV22
42 USB3_TXP1 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_AD1 48,49
USB3 PORT1, ⶎ, C h a r g e r 42 USB3_RXN1
B7
A7 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2
AT19
BD16
LPC_AD2 48,49
42 USB3_RXP1 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 48,49 3.3VA
B12 LPC_PIRQA#
43 USB3_TXN2 USB3_2_TXN/SSIC_1_TXN R208 *10K_04
A12 BE16 LPC_FRAME# 48,49
4G LTE 43 USB3_TXP2 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# 3.3VS
C8 BA17 SERIRQ SERIRQ 48,49 D01A
43 USB3_RXN2 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# LPC_PIRQA#
B8 AW17 SMI#_RR
43 USB3_RXP2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# SB_KBCRST# R680 10K_04
AT17
B15 GPP_A0/RCIN#/ESPI_ALERT1# SB_KBCRST# 48 SERIRQ R209 10K_04
USB3_6_TXN BC18 S4_STATE# 49 SB_KBCRST# R216
C15 GPP_A14/SUS_STAT#/ESPI_RESET# 10K_04
K15 USB3_6_TXP
USB3_6_RXN
USB

K13 BC17 CLK_PCI_KBC_R R590 22_04


USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK PCLK_KBC 48
AV19 CLK_PCI_TPM_R R212 22_04
B14 GPP_A10/CLKOUT_LPC1 PCLK_TPM 49 24 Mhz
41 USB3_TXN5 USB3_5_TXN
C14
COMBO, ᶲ 41
41
USB3_TXP5
USB3_RXN5
G13 USB3_5_TXP
GPP_G19/SMI#
M45
N43
SMI#_RR A
RB751V-40(lision)
C D28 SMI# 48
H13 USB3_5_RXN
41 USB3_RXP5 GPP_G18/NMI# EMC20
USB3_5_RXP
B B
D13
51 USB3_TXP3 USB3_3_TXP/SSIC_2_TXP AE45 R703 *0_04 PCH_MUTE# 46 *10p_50V_NPO_04
C13 GPP_E6/DEVSLP2
51 USB3_TXN3 USB3_3_TXN/SSIC_2_TXN AG43
USB3 PORT3, ⎛ ᶲ 51 USB3_RXP3
A9
B10 USB3_3_RXP/SSIC_2_RXP
GPP_E5/DEVSLP1 AG42 D03 DEL D03
51 USB3_RXN3 GPP_E4/DEVSLP0 AB39 PS8331_SW _R R836 *0402_short
USB3_3_RXN/SSIC_2_RXN PS8331_SW 3,13,30,51
GPP_F9/DEVSLP7 AB36 EMI
SATA

B13 GPP_F8/DEVSLP6 D01A


51 USB3_TXP4 USB3_4_TXP AB43 L :PORT1 (INTEL) (DEFAULT)
A14 GPP_F7/DEVSLP5
51 USB3_TXN4 USB3_4_TXN AB42 H: PORT2 (NV)
USB3 PORT4, ⎛ ᶳ 51 USB3_RXP4
G11
E11 USB3_4_RXP
GPP_F6/DEVSLP4 AB41
GPP_F5/DEVSLP3 KBLED_DET 50
51 USB3_RXN4 USB3_4_RXN

QJHT-S 6 OF 12 REV = 1.3

3.3VS BUF_PLT_RST# 3.3VS


PERSTB#
U10
C863 C416 0.1u_10V_X7R_04
R646 *0_04 MC74VHC1G08DFT2G
DGPU_RST# 48
5

U40 *1u_6.3V_X5R_04
5

1
MC74VHC1G08DFT2G 1 DGPU_RESET# R636 0_04 DGPU_RST#_PCH 4 5,32,33,34,35,38,40,54 3.3VA
PLT_RST# BUF_PLT_RST# 44,48,49,51
4 2
30 PERSTB# PLT_RST#
2 PLT_RST# 32
A 23,28,29,30,31,58,59 3V3_RUN A
R653 R260
3

3,9,10,11,12,13,14,15,16,17,32,34,35,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 3.3VS
3

13,17,34,45,46,47,49,50,51,54 5VS
10K_04 R654 100K_04
5,30,32,35,38,40,44,48,50,51,53,54,55,56,57,58 VDD3
R641 100K_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
*0_04 Title
[36] PCH 5_6/12-DPP/ESPI/USB3.0
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 36 of 79


5 4 3 2 1

PCH 5/9 B - 37
Schematic Diagrams

PCH 6/9
5 4 3 2 1

D02 D01A
W 76-147_24MHZ
C787 24MHZ
12p_50V_NPO_04 fsx3m
6-22-24R00-1B9
6-22-24R00-1BA

1
4
R565
X2
1M_04

2
3
D02 C790
12p_50V_NPO_04
SPT-H_PCH
U114G
D D
RTC (10 MOHM RES): DO NOT CHANGE TO 0402 AR17
GPP_A16/CLKOUT_48
L1 PCH_XDP_CLK_DN
G1 CLKOUT_ITPXDP PCH_XDP_CLK_DP
5 CPU_24MHZ_R_DP CLKOUT_CPUNSSC_P L2
C795 5 CPU_24MHZ_R_DN F1 CLKOUT_ITPXDP_P
CLKOUT_CPUNSSC J1
D01A 15p_50V_NPO_04
CLKOUT_CPUPCIBCLK PCH_CPU_PCIBCLK_R_DN 5
G2 J2
5 PCH_CPU_BCLK_R_DP CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK_R_DP 5
5 PCH_CPU_BCLK_R_DN H2
D01A CLKOUT_CPUBCLK
N7

2
1
X3 R573 A5 CLKOUT_PCIE_N0
XTAL24_OUT N8
A6 CLKOUT_PCIE_P0
10M_04 XTAL24_IN
XCLK_RBIAS L7
VDD1.0 R160 2.7K_1%_04 E1 CLKOUT_PCIE_N1 L5

3
4
C802 1TJS125DJ4A420P_32.768KHz XCLK_BIASREF
CLKOUT_PCIE_P1
D01A 15p_50V_NPO_04 CM200S RTC_X1 BC9
RTCX1 D3
B.Schematic Diagrams

RTC_X2 BD10 CLKOUT_PCIE_N2


RTCX2 F2
CLKOUT_PCIE_P2
32.768KHZ BC24
GPP_B5/SRCCLKREQ0# E5
6-22-32R76-0B2 AW24 CLKOUT_PCIE_N3
3.3VS GPP_B6/SRCCLKREQ1# G4
6-22-32R76-0BJ PCIECLKRQ2# AT24 CLKOUT_PCIE_P3
PCIECLKRQ3# BD25 GPP_B7/SRCCLKREQ2#
GPP_B8/SRCCLKREQ3# D5
RN6 D01A BB24 CLKOUT_PCIE_N4
LAN_CLKREQ# GPP_B9/SRCCLKREQ4# E6
10K_8P4R_04 BE25 CLKOUT_PCIE_P4
LAN_CLKREQ# 51 LAN_CLKREQ# W LAN_CLKREQ# GPP_B10/SRCCLKREQ5#
1 8 AT33
44 W LAN_CLKREQ# D8
Sheet 37 of 79 2 7 W LAN_CLKREQ# SD40_CLKREQ# AR31 GPP_H0/SRCCLKREQ6# CLK_PCIE_GLAN# 51
51 SD40_CLKREQ# CLKOUT_PCIE_N5 D7
3 6 3G_CLKREQ# PEG_CLKREQ# BD32 GPP_H1/SRCCLKREQ7# CLK_PCIE_GLAN 51
18 PEG_CLKREQ# CLKOUT_PCIE_P5
4 5 SSD_CLKREQ# SSD_CLKREQ# BC32 GPP_H2/SRCCLKREQ8#
44 SSD_CLKREQ# GPP_H3/SRCCLKREQ9# R8
BB31 CLKOUT_PCIE_N6 CLK_PCIE_MINI# 44

PCH 6/9 GPP_H4/SRCCLKREQ10# R7


BC33 CLKOUT_PCIE_P6 CLK_PCIE_MINI 44
R265 *100K_04 SD40_CLKREQ# GPP_H5/SRCCLKREQ11#
C BA33 C
GPP_H6/SRCCLKREQ12# U5
R278 *100K_04 PCIECLKRQ2# AW33 CLKOUT_PCIE_N7 CLK_PCIE_SD40# 51
3G_CLKREQ# GPP_H7/SRCCLKREQ13# U7
R614 *100K_04 PCIECLKRQ3# BB33 CLKOUT_PCIE_P7 CLK_PCIE_SD40 51
43 3G_CLKREQ# GPP_H8/SRCCLKREQ14#
PEG_CLKREQ# BD33
R631 100K_04 GPP_H9/SRCCLKREQ15# W10 VGA_PEXCLK# 18
R247 *10K_04 CLKOUT_PCIE_N8 W11 N16
R13 CLKOUT_PCIE_P8 VGA_PEXCLK 18
R11 CLKOUT_PCIE_N15
CLKOUT_PCIE_P15 N3
CLKOUT_PCIE_N9 CLK_PCIE_SSD# 44
N2
P1 CLKOUT_PCIE_P9 CLK_PCIE_SSD 44
43 CLK_PCIE_3G# CLKOUT_PCIE_N14
R2
43 CLK_PCIE_3G CLKOUT_PCIE_P14 P3
CLKOUT_PCIE_N10 P2
PCI-E CLK Usage W7 CLKOUT_PCIE_P10
Y5 CLKOUT_PCIE_N13
CLKOUT_PCIE_P13 R3
CLKOUT_PCIE_N11 R4
5 GLAN U2 CLKOUT_PCIE_P11
6 WLAN U3 CLKOUT_PCIE_N12
CLKOUT_PCIE_P12
8 PEG(NV)
9 SSD (X 4 LANE) QJHT-S 7 OF 12 REV = 1.3
14 SSD (X 2 LANE)

B B

D01A

DEL

A VDD1.0 38,55,57 A
3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,38,40,43,44,45,46,48,49,50,51,54,59,61,63
VDD3 5,30,32,35,38,40,44,48,50,51,53,54,55,56,57,58

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[37] PCH 7/12-CLKOUT
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 37 of 79


5 4 3 2 1

B - 38 PCH 6/9
Schematic Diagrams

PCH 7/9
5 4 3 2 1

D D
D01A
R166 *20mil_Short-p VDD1.0
R238 *28mil short-p VDD3

VDD1.0 SPT-H_PCH
DEFAULT SHORT +VCCPRIM_1P0 U114H
D01A
R264 *20mil_Short-p eSPI:1.8V
1 2 +VCCPRIM_1P0 2.899A AA23 3.3VA LPC:3.3V
AA26 VCCPRIM_1P0
VCCPRIM_1P0 㺷暣 R297 *28mil short-p
PJ10 2mm AA28 AL22 0.0908A +VCCFHV_2P8 3.3VA
VCCPRIM_1P0 VCCPRIM_1P0 D01A

CORE
AC23 C454
VCCPRIM_1P0 +VCCPDSW _3P3 R288 *20mil_Short-p 3.3VA
AC26 BA24 0.403A D01A
AC28 VCCPRIM_1P0 VCCDSW_3P3 0.1u_10V_X7R_04 C452
R233 *0_04 VCCPRIM_1P0 BA31 0.082A +V3.3A_V1.8A_VCCPGPPA R287 *20mil_Short-p

VCCGPIO

B.Schematic Diagrams
AE23 VCCPGPPA 3.3VA
VCCPRIM_1P0 CLOSE TO PCH
CLOSE TO PCH C378 AE26 BC42 0.229A +V3.3A_VCCPGPPBCH (1-3 mm) 0.1u_10V_X7R_04 C451
(3-5 mm) Y23 VCCPRIM_1P0 VCCPGPPBCH BD40
VCCPRIM_1P0 VCCPGPPBCH CLOSE TO PCH
1u_6.3V_X5R_04 Y25 AJ41 0.114A +V3.3A_VCCPGPPEF (1-3 mm) 0.1u_10V_X7R_04
+VCCDSW _1P0 0.0454A BA29 VCCPRIM_1P0 VCCPGPPEF AL41 CLOSE TO PCH
DCPDSW_1P0 VCCPGPPEF AD41 0.065A +V3.3A_VCCPGPPG (1-3 mm) D01A
R198 *20mil_Short-p 0.021A N17 VCCPGPPG AN5 0.2875A +VCCPHVC_3P3 R181 *28mil short-p
VCCCLK1 VCCPRIM_3P3 3.3VA
0.05A R19 R157 *20mil_Short-p VDD1.0
D01A VCCCLK3
U20
Sheet 38 of 79
0.024A R158 *20mil_Short-p C350
VCCCLK4 3.3VS
0.137A V17 AD15 0.0061A +VCCDTS_1P0
R17 VCCCLK2 VCCPRIM_1P0 AD13 0.007A +V3.3S_VCCATS
C339 D01A 0.1u_10V_X7R_04
VCCCLK2 VCCATS BA20 0.0002A +VCCPRTCPRIM_3P3 1u_6.3V_X5R_04 CLOSE TO PCH
CLOSE TO PCH
L7 . HCB1608KF-121T30 +VCCF24_1P0_L 0.006A K2 VCCRTCPRIM_3P3

PCH 7/9
VDD1.0 VCCCLK5 BA22 0.0002A +VCCPRTC3P3 CLOSE TO PCH (1-3 mm)
K3 VCCRTC +VCC_RTCEXT_CAP (3-5 mm) D01A
C337 C336 VCCCLK5 BA26
C
C340 DCPRTC R215 *20mil_Short-p 3.3VA C
+VCCMPHY_1P0 C377
*22u_6.3V_X5R_06 *22u_6.3V_X5R_06 3.53A U21 C372 C373
1u_6.3V_X5R_04 VCCMPHY_1P0 AJ20

MPHY
U23 VCCPRIM_1P0 1u_6.3V_X5R_04
DEFAULT SHORT VCCMPHY_1P0 AJ21 1u_6.3V_X5R_04 0.1u_10V_X7R_04
CLOSE TO PCH U25 VCCPRIM_1P0 CLOSE TO PCH
(3-5 mm) VCCMPHY_1P0 AJ23 (3-5 mm)
U26 VCCPRIM_1P0
VDD1.0 1 2 VCCMPHY_1P0 AJ25 +VCCPRIM_1P0
CLOSE TO PCH D01A
V26 VCCPRIM_1P0 (1-3 mm)
+VCCAMPHYPLL_1P0 VCCMPHY_1P0 R227 *20mil_Short-p VCC_RTC
C367 0.11A A43
PJ15 2mm C364 VCCMPHYPLL_1P0
B43 BE41 0.029A C376 C374
22u_6.3V_X5R_08 1u_6.3V_X5R_04 C44 VCCMPHYPLL_1P0 VCCSPI BE43
VCCPCIE3PLL_1P0 VCCSPI 1u_6.3V_X5R_04 0.1u_10V_X7R_04 R234
CLOSE TO PCH C45 BE42
VCCPCIE3PLL_1P0 VCCSPI *100K_04
(3-5 mm) +VCCAPLLEBB_1P0 0.030A V28 BC44 0.078A
VCCAPLLEBB_1P0 VCCPGPPD
L13 . HCB1608KF-121T30 +VCCDUSB_1P0 0.533A AC17 BA45 D01A

USB
0.012A AJ5 VCCPRIM_1P0 VCCPGPPD BC45 +V3.3A_V1.8A_VCCPSPI
C444 C418 VCCUSB2PLL_1P0 VCCPGPPD SPI_3.3V
C422 AL5 BB45
0.033A AN19 VCCUSB2PLL_1P0 VCCPGPPD +V3.3A_V1.8A_VCCPGPPD 2 1
VCCHDAPLL_1P0 3.3VA
*22u_6.3V_X5R_06 *22u_6.3V_X5R_06 1u_6.3V_X5R_04 +V3.3A_V1.8A_VCCPAZIO 0.075A BA15 BD3 0.0811A PJ46 1mm DEFAULE ᶲ D01A
VCCPRIM_3P3 BE3
CLOSE TO PCH VCCHDA
+VCCPUSBDSW _3P3 W15 VCCPRIM_3P3 BE4 +VCCPFUSE_3P3 R569 *28mil short-p
(3-5 mm) VCCDSW_3P3 VCCPRIM_3P3 3.3VA
D01A R228 *20mil_Short-p
C356
QJHT-S 8 OF 12 REV = 1.3
D01A
VDD1.0 R161 *28mil short-p
1u_6.3V_X5R_04
D01A C363
CLOSE TO PCH
(3-5 mm)
1u_6.3V_X5R_04
+V3.3A_V1.8A_VCCPAZIO
+VCCAAZPLL_1P0

B VDD1.0 L6 . HCB1608KF-121T30 C359


B
C334 C325
0.1u_10V_X7R_04
CLOSE TO PCH
*22u_6.3V_X5R_06 *22u_6.3V_X5R_06 (3-5 mm)
CLOSE TO PCH 3.3VA R205 *20mil_Short-p
(3-5 mm) R179 *28mil short-p
VDD3
D01A
C1788
D03
0.1u_10V_X7R_04

place clost to ball AN19

32 SPI_3.3V
37,55,57 VDD1.0
5,30,32,35,40,44,48,50,51,53,54,55,56,57,58 VDD3
3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,40,43,44,45,46,48,49,50,51,54,59,61,63 3.3VS
32,35 VCC_RTC

5,32,33,34,35,36,40,54 3.3VA

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[38] PCH 8/12-POWER
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 38 of 79


5 4 3 2 1

PCH 7/9 B - 39
Schematic Diagrams

PCH 8/9
5 U114I 4 SPT-H_PCH
U114L
3 2 1
SPT-H_PCH
AC18 AR5
AN4 VSS VSS AR7 C42 AB11
AN10 VSS VSS U15 D10 VSS VSS AB7
BE14 VSS VSS AL4 D12 VSS VSS AB14
BE18 VSS VSS AE29 D15 VSS VSS AB31
BE23 VSS VSS AE4 D16 VSS VSS AB32
BE28 VSS VSS AE42 D17 VSS VSS AB38
BE32 VSS VSS AF18 D19 VSS VSS AB4
BE37 VSS VSS AF20 D21 VSS VSS AB5
BE40 VSS VSS AF21 D24 VSS VSS AC1
BE9 VSS VSS AF23 D25 VSS VSS AC20
VSS VSS VSS VSS
D C10
C2 VSS VSS
AF25
AF26
D27
D29 VSS VSS
AC21
AC25
D
C28 VSS VSS AF28 D30 VSS VSS AC29
C37 VSS VSS AF29 D31 VSS VSS AC45
J7 VSS VSS AG11 D33 VSS VSS AB8
K10 VSS VSS AG13 D35 VSS VSS AD11
K27 VSS VSS AG31 D36 VSS VSS AD14
K33 VSS VSS AG32 E13 VSS VSS AB15
K36 VSS VSS AG33 E15 VSS VSS AD32
K4 VSS VSS AG38 E31 VSS VSS AD33
K42 VSS VSS AG4 E33 VSS VSS AD36
K43 VSS VSS AH1 F44 VSS VSS AD4
L12 VSS VSS AH17 F8 VSS VSS AD8
L13 VSS VSS AH18 G42 VSS VSS AE18
L15 VSS VSS AH20 G9 VSS VSS AE20
B.Schematic Diagrams

L4 VSS VSS AH21 H17 VSS VSS AE21


L41 VSS VSS AH23 H19 VSS VSS AE25
L8 VSS VSS AH25 H22 VSS VSS AE28
M35 VSS VSS AH26 H24 VSS VSS AL10
M42 VSS VSS AH28 H27 VSS VSS AL11
N10 VSS VSS AH29 H29 VSS VSS AL13
N15 VSS VSS AH45 H3 VSS VSS AL17
N19 VSS VSS AJ10 H35 VSS VSS AL19
VSS VSS VSS VSS

Sheet 39 of 79 N22
N24
N35
N36
VSS
VSS
VSS
VSS
VSS
VSS
AJ14
AJ15
AJ17
AJ18
J10
J11
J3
J39
VSS
VSS
VSS
VSS
VSS
VSS
AL24
AL29
AL32
AL33
VSS VSS VSS VSS
PCH 8/9 C
N4
N41
N5
P17
VSS
VSS
VSS
VSS
VSS
VSS
AJ26
AJ28
AJ29
AJ31
J5
T42
U10
U11
VSS
VSS
VSS
VSS
VSS
VSS
AL38
AM15
AM17
AM19 C
P19 VSS VSS AJ32 U14 VSS VSS AM22
P22 VSS VSS AJ36 U17 VSS VSS AM24
P45 VSS VSS AK4 U18 VSS VSS AM27
R10 VSS VSS AK42 U28 VSS VSS AM29
R14 VSS VSS AU7 U29 VSS VSS AM45
R22 VSS VSS AV17 U31 VSS VSS AN11
R29 VSS VSS AV24 U32 VSS VSS AN22
R33 VSS VSS AV27 U33 VSS VSS AN27
R38 VSS VSS AV31 U38 VSS VSS AN31
R5 VSS VSS AV33 U4 VSS VSS AN39
T1 VSS VSS AV6 U8 VSS VSS AN7
T2 VSS VSS AW13 V18 VSS VSS AN8
T4 VSS VSS AW19 V20 VSS VSS AP11
Y18 VSS VSS AW29 V21 VSS VSS AP4
Y20 VSS VSS AW37 V23 VSS VSS AR33
Y21 VSS VSS AW9 V25 VSS VSS AR34
Y26 VSS VSS AY38 V29 VSS VSS AR42
Y28 VSS VSS AY45 V3 VSS VSS AR9
Y29 VSS VSS B25 V45 VSS VSS AT10
A18 VSS VSS B3 W14 VSS VSS AT15
A25 VSS VSS B37 W31 VSS VSS AT36
A32 VSS VSS B40 W32 VSS VSS AT9
A37 VSS VSS B6 W33 VSS VSS AU1
AA17 VSS VSS BA1 W38 VSS VSS AU35
AA18 VSS VSS BB11 W4 VSS VSS AU36
AA20 VSS VSS BB16 W8 VSS VSS AU39
AA21 VSS VSS BB21 Y17 VSS VSS AU45
AA25 VSS VSS BB25 VSS VSS C4
B AA29 VSS
VSS
VSS
VSS
BB30 VSS B
AA4 BB34
AA42 VSS VSS BC2
AB10 VSS VSS BD43 12 OF 12
VSS VSS
9 OF 12 QJHT-S REV = 1.3
QJHT-S REV = 1.3

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[39] PCH 9_12/12-VSS
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 39 of 79

5 4 3 2 1

B - 40 PCH 8/9
Schematic Diagrams

PCH 9/9
NO REBOOT STARP 5 4 3 2 1
ENABLE: HIGH U114J SPT-H_PCH
(INTERNAL WEAK PD) DFX TEST MODE QUALIFIER FOR OTHER
3.3VS DFX STRAP WHEN SAMPLED LOW
(WEAK INTERNAL PU)
BD2 AR22 R213 *1K_04
BD45 VSS RSVD W13
R638 VSS RSVD
BD44 U13
BE44 VSS RSVD
*4.7K_04 VSS P31
D45 RSVD
LPSS_GSPI0_MOSI VSS N31
A42 RSVD
B45 VSS P27 D01A
B44 VSS RSVD R27 Del test point
R637 VSS RSVD
A4 N29
D *20K_04 A3 VSS
VSS
RSVD
RSVD
P29 D
B2 AN29
A2 VSS RSVD R24
B1 VSS RSVD P24
BB1 VSS RSVD
VSS AT3 PCH_XDP_PREQ#_R R563 *0_04 H_PREQ# 5
BOOT STARP BC1 PREQ#
VSS AT4 PCH_XDP_PRDY#_R R561 *0_04 H_PRDY# 5
ENABLE:LPC IS SELECT A44 PRDY#
VSS AY5 H_TRST#_R R164 *0_04 H_TRST# 5
(INTERNAL WEAK PD) C1 CPU_TRST# AL2 PCH_2_CPU_TRIGGER_R R558 30.1_1%_04
3.3VA RSVD PCH_TRIGOUT PCH_2_CPU_TRIGGER 7
D1 AK1 CPU_2_PCH_TRIGGER 7
RSVD PCH_TRIGIN
BOARD_ID[2:1]
P650Rx, P655Rx:00
R270
QJHT-S 10 OF 12 REV = 1.3
P670Rx:10
*4.7K_04 3.3VS 3.3VS
LPSS_GSPI1_MOSI

B.Schematic Diagrams
R232
*20K_04
P670Rx R277 R671
U114K SPT-H_PCH 暨ᶲẞ *10K_04 *10K_04
LPSS_GSPI1_MOSI AT29
GPP_B22/GSPI1_MOSI AL44 BOARD_ID1
AR29 GPP_D9 BOARD_ID2
GPP_B21/GSPI1_MISO AL36
AV29 GPP_D10
GPP_B20/GSPI1_CLK AL35

Sheet 40 of 79
BC27 GPP_D11
GPP_B19/GSPI1_CS# AJ39
LPSS_GSPI0_MOSI GPP_D12 TPM_DET 49 3.3VS
BD28 R292 R702
BD27 GPP_B18/GSPI0_MOSI AJ43
GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# D03 *10K_04
GPP_B16
C AW27 AL43 D02 *10K_04
C
GPP_B15 AR24

AV44
GPP_B16/GSPI0_CLK
GPP_B15/GSPI0_CS#

GPP_C9/UART0_TXD
GPP_D15/ISH_UART0_RTS#
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
AK44
AK45 EDP: H
GSYNC: L
R1900
100K_04
PCH 9/9
BA41 D02
AU44 GPP_C8/UART0_RXD
GPP_C11/UART0_CTS# GSYNC_DET
AV43
GPP_C10/UART0_RTS#
AU41 BC38 R1900 R1873 R1873
AT44 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BB38
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA EDP 100K_04 NC *100K_04
AT43 D01A
AU43 GPP_C13/UART1_TXD/ISH_UART1_TXD BD38
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL BE39
3.3VS
UART2_CTS# AN43 GPP_H21/ISH_I2C1_SDA G-SYNC NC 100K_04
D01A UART2_RTS# AN44 GPP_C23/UART2_CTS#
DEBUG GPP_C22/UART2_RTS#
TX -> D+ R727 *49.9K_1%_06 UART2_TXD AR39
R721 *49.9K_1%_06 UART2_RXD AR45 GPP_C21/UART2_TXD BC22 DGPU_PW M_SELECT#
RX -> D- GPP_C20/UART2_RXD GPP_A23/ISH_GP5 3.3VS
BD18 3G_CONFIG0 43
AR41 GPP_A22/ISH_GP4 BE21
GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 3G_CONFIG1 43 DGPU_PW M_SELECT# R211 *10K_04
AR44 BD22 3G_CONFIG2 43
AR38 GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 BD21
GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 3G_CONFIG3 43
AT42 BB22 SB_BLON VDD3
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 SB_BLON 13
BC19
AM44 GPP_A17/ISH_GP7 LTE_GPIO# 34
AJ44 GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA SB_BLON R595 *10K_04
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL

QJHT-S 11 OF 12 REV = 1.3

B B

EC DELAY ALL_SYS_PWRGD 200ms VDD3


VDD3 =PM_PWROK
VDD3
48 PM_PW ROK
U38B U38D
14

14
74LVC08APW 14 U38C 74LVC08APW
D02 4 74LVC08APW 12
61 VCORE_PG DELAY_PW RGD
R1889 *0_04 6 9 11 SYS_PW ROK_R R612 1K_04
SYS_PW ROK 35
VDD3 5 8 13
63 VCCGT_PG ALL_SYS_PW RGD 10
R611
7

7
R605
7

*10K_04
10K_04
U38A
14

74LVC08APW
1
55 VCCIO_PW RGD ALL_SYS_PW RGD
3 PM_PCH_PW ROK 35
ALL_SYS_PW RGD 5,13,48,61,63
2
13,35,42,46,48,54,55 SUSB#
TO VR_ON & EC
7

A R628 C837 A
10K_04 *0.1u_10V_X7R_04
ON

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Title
5,32,33,34,35,36,38,54 3.3VA
[40] PCH 10_11/12-UART/I2C/GPIO
Size Document Number Rev
5,30,32,35,38,44,48,50,51,53,54,55,56,57,58
3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,43,44,45,46,48,49,50,51,54,59,61,63
VDD3
3.3VS
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 40 of 79

5 4 3 2 1

PCH 9/9 B - 41
Schematic Diagrams

USB3.0

5 4 3 2 1

3.3V
USB3.0 re-driver USB3.0 PORT5 (MBᶲ)
USBVCC3.0_5

R32 *0_04 U32


R35 *4.7K_04
5V
5 1 100 mil
R37 *4.7K_04 VIN VOUT
C32 C38 C714
D03 2
R39 *2K_1%_04 10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
D D
4 3
EN# OC#
R497 *0402_short uP7549UMA5-20
51,52,54 DD_ON#
PCB Footprint = M-SOT23-5

6
U1
25

VCC

EN_RXD
EQ_A

DE_A

SW_A

GND
R29 *4.7K_04 I2C_SDA_P5 24 GND 7 I2C_SCK_P5 R41 *4.7K_04
SMB_DATA SMB_SCK
B.Schematic Diagrams

TXN5 *0.1u_10V_X7R_04 C50 23 8 C70 *0.1u_10V_X7R_04 USB3_TXN5


TX1- RX1- USB3_TXN5 36
TXP5 *0.1u_10V_X7R_04 C51 22 9 C71 *0.1u_10V_X7R_04 USB3_TXP5
TX1+ RX+ USB3_TXP5 36
21 10
To Conn. TYPE_IND# CHIP_EN# From PCH C712 22u_6.3V_X5R_08
RXN5 *0.1u_10V_X7R_04 C52 20 11 C72 *0.1u_10V_X7R_04 USB3_RXN5 100 mil

Reserverd
RX2- TX2- USB3_RXN5 36 USBVCC3.0_5 C37 22u_6.3V_X5R_08

SW_B
Sheet 41 of 79

EQ_B
USB3_RXP5

DE_B
RXP5 *0.1u_10V_X7R_04 C53 19 12 C73 *0.1u_10V_X7R_04

GND

VCC
USB3_RXP5 36

GND1
RX2+ TX2+
3.3V USB3.0 Max Trace length J_USB3_2
D03 Follow Design Guide

18

17

16

15

14

13
USB3.0 *ASM1464

SHIELD
PCB Footprint = QFN24-4X4MM TXP5_J 9
3.3V 1 SSTX+

Standard-A
TXN5_J 8 VBUS
D1 USB_PN5_J 2 SSTX-
4 D-
C R504 *0_04 R38 *4.7K_04 10 1 USB_PP5_J 3 GND C
R36 *4.7K_04 C720 C718 C722 9 2 RXP5_J 6 D+
8 3 7 SSRX+

SHIELD
R34 *4.7K_04
GND_D

*0.01u_16V_X7R_04

*0.1u_10V_X7R_04

*1u_6.3V_X5R_04
R33 *0_04 D03 D03 D03 4 L4 3 USB_PN5_CON 7 4 USB_PN5_J RXN5_J 5
33 USB_PN5 SSRX-
USB_PP5_CON 6 5 USB_PP5_J
33 USB_PP5 1 2
PUSB3F96 93-0022-02
*W CM2012F2S-161T03-short

GND2
PCB Footprint = USB-93-0022-01

D25
co-lay, place under ASM1464 RXN5_J
RXN5 10 1
RXP5 9 2 RXP5_J
TXN5 R1838 0_04 U3_TXN5 R509 0_04 USB3_TXN5
8 3 6-20-B4A00-009
TXN5 C716 0.1u_10V_X7R_04 TXN5_C 7 4 TXN5_J
TXP5 R1839 0_04 U3_TXP5 R508 0_04 USB3_TXP5
TXP5_C 6 5 TXP5_J
U3_RXN5 R507 USB3_RXN5 TXP5 C715 0.1u_10V_X7R_04
RXN5 R503 0_04 0_04
PUSB3F96
RXP5 R502 0_04 U3_RXP5 R506 0_04 USB3_RXP5

B B

A A
45,51,52,54,57,58,59,60,61,62,63,64 5V

2,13,30,42,43,44,49,51,52,54,55,58,59,60 3.3V

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[41] USB3.0
Size Document Number Rev
A3 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 41 of 79


5 4 3 2 1

B - 42 USB3.0
Schematic Diagrams

USB Charger

1 2 3 4 5

3.3V
USB3.0 re-driver
R695 *0_04
R687 *4.7K_04
R667 *4.7K_04

R661 2K_1%_04

A A

6
U41
25

VCC

EN_RXD
EQ_A

DE_A

SW_A

GND
R724 *4.7K_04 I2C_SDA_P1 24 GND 7 I2C_SCK_P1 R647 *4.7K_04
SMB_DATA SMB_SCK
TXN1 0.1u_10V_X7R_04 C908 23 8 C860 0.1u_10V_X7R_04 USB3_TXN1
TX1- RX1- USB3_TXN1 36 VDD5 VDD5 D01A

B.Schematic Diagrams
TXP1 0.1u_10V_X7R_04 C907 22 9 C859 0.1u_10V_X7R_04 USB3_TXP1
TX1+ RX+ USB3_TXP1 36
21 10 EMC8 EMC9
To Conn. TYPE_IND# CHIP_EN# From PCH
RXN1 0.1u_10V_X7R_04 C906 20 11 C858 0.1u_10V_X7R_04 USB3_RXN1 *100p_50V_NPO_04 *0.1u_16V_Y5V_04

Reserverd
RX2- TX2- USB3_RXN1 36
SW_B
EQ_B

USB3_RXP1
DE_B

RXP1 0.1u_10V_X7R_04 C905 19 12 C857 0.1u_10V_X7R_04


GND

VCC
RX2+ TX2+ USB3_RXP1 36
3.3V
Sheet 42 of 79
18

17

16

15

14

13
ASM1464
PCB Footprint = QFN24-4X4MM
3.3V
USB Charger
R668 *0_04 R665 *4.7K_04
B R690 *4.7K_04 C893 C862 C864 B
R696 *4.7K_04
R712 *0_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04
USB3.0 PORT1 (MBⶎ)
VDD5 USBVCC_CH
U11
5 1
VIN VOUT
C861 C909
+ C475 D01A
2 C449 C427
10u_6.3V_X5R_06 GND EEFCX0J221YR 22u_6.3V_X5R_08 22u_6.3V_X5R_08

0.1u_16V_Y5V_04
USB_DD_ON# 4 3
EN# OC# 220u,6.3V,ESR=15mȍ,H=1.9mm
uP7549UMA5-20
PCB Footprint = M-SOT23-5
J_USB3_1

SLG55593VTR USB Charging PORT TXP1_J 9


1 SSTX+ SHIELD
GND1
GND3

Standard-A
TXN1_J 8 VBUS SHIELD
USB_PN1_J 2 SSTX-
4 D-
USB_PP1_J 3 GND
VDD5 D+
RXP1_J 6
C 7 SSRX+ GND4 C

W/ USB CHARGER 48,53,54 USB_CHARGE_EN


R306
100K_04
USB3.0 Max Trace length
RXN1_J 5 GND_D
SSRX-
SHIELD
SHIELD
GND2

C19007-90905-L NEW
USB_DD_ON# Follow Design Guide EMI_GND PCB Footprint = USB-C19005
VDD5 R314 P/N = 6-21-B4A30-009
1M_04
D11
6

D R364 *0_04

PRE#_R 2 G 10 1
R305 S Q21A 9 2 EMI㒢㓦
1

10K_04 MTDK5S6R 8 3 EMI_GND


C531 USB_PN1_A L14 4 3 USB_PN1_CON 7 4 USB_PN1_J
3

R300 *0_04 D USB_PP1_CON 6 5 USB_PP1_J


13,35,40,46,48,54,55 SUSB# USB_PP1_A
U15 Default Low5 0.1u_16V_Y5V_04 1 2
R301 0_04 8 1 PRE# G *W CM2012F2S-161T03-short
48,53,54 DD_ON CB PRE# S Q21B PUSB3F96
4

USB_PN1 7 2 USB_PN1_A MTDK5S6R


33 USB_PN1 TDM DM R312
USB_PP1 6 3 USB_PP1_A 100K_04
33 USB_PP1 TDP DP
GND

D30
VDD5 5 4
VCC CDP
C504 SLG55593VTR RXN1 10 1 RXN1_J
9

PCB Footprint = TDFN8-2X2MM RXP1 9 2 RXP1_J


0.1u_16V_Y5V_04 䚖⇵ἧ䓐㬌㕁SLG55593VTR R304 8 3
*10K_04 TXN1 7 4 TXN1_J
:6-02-55593-9D0 TXP1_J
D TXP1 6 5 D

PRE# R299 *0_04 USB_DD_ON#


PUSB3F96

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Title
VDD5 53,54,55
[42] USB CHARGER
5V 41,45,51,52,54,57,58,59,60,61,62,63,64 Size Document Number Rev
3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63
3.3V 2,13,30,41,43,44,49,51,52,54,55,58,59,60 A3 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 42 of 79


1 2 3 4 5

USB Charger B - 43
Schematic Diagrams

M.2 3G + M.2 SATA


5 4 3 2 1

3G 4G CARD USB3.0 / M.2 SATA


CURRENT2A㗪,DON'T DROP BELOW 3.135V
3G_3.3V 80 milsP670 MSATA Only, ⣏暣⭡ᶵᶲẞ
J_3G1 C984 220u_6.3V_6.3*6.3*4.2

+
75 74 C596 0.1u_16V_Y5V_04 GND
40 3G_CONFIG2 CONFIG_2 3.3V4
73 72
71 GND10 3.3V3 70 C598 0.1u_16V_Y5V_04
40 3G_CONFIG1 3G_CONFIG1 GND9 3.3V2
D 69 68 D
R453 *0_04 67 CONFIG_1 SUSCLK(32Khz)(O) 66 D03 DEL
48 3G_RST# Reset#(O)1.8V SIM Detect(O) SIM_DET 51
65 64 M.2 3G/4G-LTE module SIM Detect
CHECK BIOS C995 63 ANTCTL3(I)1.8V COEX1(I/O)1.8V 62 C621
ANTCTL2(I)1.8V COEX2(I/O)1.8V Pin 66炻ℏ悐䁢1.8V with
Reserved & EC, 1.8V LEVEL 61 60 Pull-up暣旣
CLOSED *33p_50V_NPO_04 59 ANTCTL1(I)1.8V COEX3(I/O)1.8V 58 470p_50V_X7R_04
SATAGP1 R337 *0_04 3G_CONFIG1 57 ANTCTL0(I)1.8V NC1 56
CONNECTOR GND8 NC0
55 54
37 CLK_PCIE_3G REFCLKP PEWake#(IO)
GND 53 52 GND
Close to J_3G1 37 CLK_PCIE_3G# REFCLKN CLKREQ#(IO)
51 50
C1731 0_04 SATA1_TXP1_R 49 GND7 PERST#(O) 48 R386 *10K_04
34 SATA1_TXP1 PETp0/SATA-A+ GPIO_4(IO)1.8V 3.3V
C1729 0_04 SATA1_TXN1_R 47 46
D02 3.3VS 34 SATA1_TXN1 PETn0/SATA-A- GPIO_3(IO)1.8V
45 44
10K_04 SATA1_RXN1_R GND6 GPIO_2(IO)1.8V 3G_CLKREQ# 37
3.3VS R1901 C1728 0_04 43 42
34 SATA1_RXN1 PERp0/SATA-B- GPIO_1(IO)1.8V
B.Schematic Diagrams

C1730 0_04 SATA1_RXP1_R 41 40


34 SATA1_RXP1 PERn0/SATA-B+ GPIO_0(IO)1.8V D03 DEL
39 38
SATAGP1 R754 USB3_TXP2_R 37 GND5 DEVSLP(O) 36 UIM_PW R
34 SATAGP1 USB3_TXN2_R PETp1/USB3.0-Tx+/SSIC-TxP UIM_PWR(I) UIM_DATA UIM_PW R 51
35 34

D
PETn1/USB3.0-Tx-/SSIC-TxN UIM_DATA(IO) UIM_CLK UIM_DATA 51
10K_04 33 32 C654
SATAGP1 USB3_RXP2_R GND4 UIM_CLK(I) UIM_RST UIM_CLK 51
31 30
L: PCIe 3G_CONFIG1 USB3_RXN2_R PERp1/USB3.0-Rx+/SSIC-RxP UIM_RESET(I) UIM_RST 51
G 29 28 0.1u_16V_Y5V_04
㰺㍺CARD Q49 27 PERn1/USB3.0-Rx-/SSIC-RxN GPIO_8(IO)1.8V 26 GPS_DISABLE# R415 0_04

S
BODYSAR_N 25 GND3 GPIO_10(IO)1.8V 24
H: SATA,USB3(4G) 2SK3018S3 3G_CONFIG1 GPIO_12(IO)1.8V GPIO_7(IO)1.8V
Sheet 43 of 79 H: PCIe(NC)
㰺㍺CARD
L: SATA,USB3(4G)
40 3G_CONFIG0
3G_W AKE#
3G_CONFIG0
23
21 GPIO_11(IO)1.8V
CONFIG_0
GPIO_6(IO)1.8V
GPIO_5(IO)1.8V
22
20 GND
GND

M.2 3G + M.2 SATA C


3.3VS 48 3G_DET#
GND R803

R802
0_04

*0_04 11
GND2
B KEY
GPIO_9/DAS/DSS#(I)(OD)
10 M2B_3GSSD_LED#R
D01A HUAWEI MU736 ⎗㍍⍿3.3V
C
D01A 4 3 9 8
10K_04 33 USB_PN6 USB_D- W_DISABLE#1(O) PW R_ON_OFF R430 3G_EN 48
3.3VS R1869 7 6 10K_04
1 2 5 USB_D+ Full_Card_Power_Off#(O)1.8V 4
33 USB_PP6 GND1 3.3V1 80 mils
L36 *W CM2012F2S-SHORT 3 2
GND0 3.3V0 3G_3.3V
R1868 1
34 4G_SATA_DET# 40 3G_CONFIG3 CONFIG_3 C1005

D
10K_04 + C983 C1004
10u_6.3V_X5R_06
4G_SATA_DET# NFSB0-S6701-TP40
3G_CONFIG0 220u_6.3V_6.3*6.3*4.2
H: SATA, G P/N = 6-21-84K50-075 0.1u_16V_Y5V_04
Q60 GND PCB Footprint = NXSB0-S67XX-XX40 P670 MSATA Only, ⣏暣⭡ᶵᶲẞ
L: USB3 (4G)
S
2SK3018S3 3G_CONFIG0 PCB Footprint婳䡢娵㨇㥳ἧ䓐䘬Connector
㰺㍺CARD GND GND
L: SATA (GND)
H: USB3(4G) (NC)
㰺㍺CARD 普ᷕ㷔溆 BOT
Windows 8 3G_POWEREN
3G POWER Always hi.
P670 MSATA Only, ᶲẞ
3G_EN
GPS_DISABLE#
6-14-0003B-11D 3G_PW R_EN
R805 *0_06_2A
3.3VS 3G_3.3V
R806 *0_06_2A

Rd R431 *0_06_2A
Re R435 *0_06_2A 3G_3.3V
B B

>120 mil >120 mil Default ᶵᶲẞ D01A


P670 MSATA Only, USBᾉ嘇ᶵᶲẞ Close to J_3G1 4 3
3.3V S2 D2 3G_PW R_EN
L25 USB3_TXP2_R Qb
C594 0.1u_10V_X7R_04 1 2
36 USB3_TXP2

G2
USB3_TXN2_R
Ca C685
C595 0.1u_10V_X7R_04 4 3
36 USB3_TXN2 USB3_RXP2_R C675 0.1u_16V_Y5V_04 Q32A
*W CM2012F2S-SHORT

5
USB3_RXN2_R MTS3572G6 0.1u_16V_Y5V_04
4G LTE R434
L21 C1003
1 2
36 USB3_RXP2 Rc Ra *100_06
1u_6.3V_X5R_04 R441 R452
4 3
36 USB3_RXN2 100K_04 10_06 PW R_ON_OFF
*W CM2012F2S-SHORT
Rb
R437 330K_04

D
6
Qa R433

D1
D01A G Q33
3G_PW R_EN *12K_06
1 Q32B 2SK3018S3
48 3G_PW R_EN

S
G1 MTS3572G6

S1
䔞LTE䓙PIN6㍏⇞㗪Rd,Re天ᶲ,

2
Qa, Qb, Ra, Rb, Rc, Caᶵ䓐ᶲ GND
P670 MSATA Only, ㍏⇞䶂嶗ᶵᶲẞ
D01A
DEL

A A

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Title
5VS 13,17,34,45,46,47,49,50,51,54 [43] M.2 3G + M.2 SATA
3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,44,45,46,48,49,50,51,54,59,61,63
5V 41,45,51,52,54,57,58,59,60,61,62,63,64 Size Document Number Rev
3.3V 2,13,30,41,42,44,49,51,52,54,55,58,59,60 A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 43 of 79


5 4 3 2 1

B - 44 M.2 3G + M.2 SATA


Schematic Diagrams

M.2 WLAN+BT, PCIE4X SSD


5 4 3 2 1

J_W LAN1
40 mil
WLAN+BT 75
73
71
69
GND10
Reserved/REFCLKN1
3.3V3
3.3V2
Reserved/REFCLKP1 UIM_Power_In/Gpio1/PEWake1#
74
72
70
68
C295
C305
W LAN_3.3V

67 GND9 UIM_Power_Out/CLKREQ1# 66 22u_6.3V_X5R_08 0.1u_16V_Y5V_04


65 Reserved/PERn1 UIM_SWP/PERST1# 64
63 Reserved/PERp1 Reserved1 62
61 GND8 ALERT#(I) 60 R200 10K_04 PJ7 2 1 *2mm
Reserved/PETn1 I2C CLK(O) W LAN_3.3V 3.3V
59 58 R194 10K_04
57 Reserved/PETp1 I2C DATA(IO) 56 R197 0_04 VDD3 W LAN_3.3V
GND7 W_DISABLE#1(O) W LAN_EN 48 U7
D R586 *0_04 55 54 >120 mil >120 mil D
35,51 PCIE_W AKE# PEWake0#(IO) Reserved/W_DISABLE#2(O) BT_EN 48
53 52 5 1
37 W LAN_CLKREQ# CLKREQ0#(IO) PERST0#(O) BUF_PLT_RST# 36,44,48,49,51 VIN VOUT
VDD3 R581 *10K_04 51 50 SUSCLK
49 GND6 SUSCLK(32Khz)(O) 48 4
D01A 37 CLK_PCIE_MINI# REFCLKN0 COEX1(I/O)1.8V
32Khz
VIN/SS
47 46 C318 C298
37 CLK_PCIE_MINI REFCLKP0 COEX2(I/O)1.8V
45 44 3 2
43 GND5 COEX3(I/O)1.8V 42 R180 *0_04 1u_6.3V_X5R_04 EN GND 0.1u_16V_Y5V_04
33 PCIE_RXN6_W LAN PERn0 VENDOR DEFINED2 CL_CLK1 34
41 40 R177 *0_04 UP7553
33 PCIE_RXP6_W LAN PERp0 VENDOR DEFINED1 CL_DATA1 34
39 38 R173 *0_04
GND4 VENDOR DEFINED0 CL_RST#1 34
37 36 M: NCT3522U -- 6-02-03522-9C0
33 PCIE_TXN6_W LAN PETn0 NC8
35 34 S: G5243A ---- 6-02-05243-9C0
33 PCIE_TXP6_W LAN PETp0 NC7 48 W LAN_PW R_EN
33 32 AP2821KTR-G1 6-02-02821-9C0
GND3 NC6
㍍⇘EC ,枰冯EC䡢娵
E KEY

B.Schematic Diagrams
23 22
21 NC5 NC4 20
D01A NC3 NC2
19 18
17 NC1 GND2 16
NC0 LED#2(I)(OD)
DEL

A KEY

33 USB_PN8
7
5
3
GND1
USB_D-
LED#1(I)(OD)
3.3V1
6
4
2
40 mil 普ᷕ㷔溆 BOT
3.3V 2,13,30,41,42,43,49,51,52,54,55,58,59,60
3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,45,46,48,49,50,51,54,59,61,63
VDD3 5,30,32,35,38,40,48,50,51,53,54,55,56,57,58
Sheet 44 of 79
33 USB_PP8 USB_D+ 3.3V0 W LAN_3.3V

C
1
GND0

NFSA0-S6701-TP40
C313

22u_6.3V_X5R_08
W LAN_EN
BT_EN C
M.2 WLAN+BT,
W LAN_PW R_EN
P/N = 6-21-84K20-075
PCB Footprint = NXSA0-S67XX-XX40
PCB Footprint婳䡢娵㨇㥳ἧ䓐䘬Connector
W LAN_3.3V PCIE4X SSD
NGFF_M (M2) SSD (PCIE 4X) Reserved
R789 *0_04

3.3VS
>120 mil
3.3VS KEY
J_SSD1
R791 C1000 C999 C998 OPTION M-KEY (J_SSD1) B-KEY (J_3G1)
34 SATAGP0
75
D

10K_04 73 GND13 74 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06 1 PCIE X 4


SATAGP0 GND12 3.3V8
USB3
L: PCIe 71 72
G PCIE_SATA 69 GND11 3.3V7 70 PCIE X 4
H: SATA PEDET(NC-PCIe/GND-SATA) 3.3V6 2 ᶵ㓗㎜ SATA
Q51 67 68 GND GND
S

2SK3018S3 NC18 SUSCLK(32Khz)(O) GND


SATA USB3
3
M KEY D03 DEL
SATA SATA
B 57 58 4 B
55 GND10 NC17 56 D01A
37 CLK_PCIE_SSD REFCLKP NC16
53 54
37 CLK_PCIE_SSD# REFCLKN PEWake#(IO)
51 52
GND9 CLKREQ#(IO) SSD_CLKREQ# 37
49 50
34 PCIE_TXP9_SATA0A_TXP_SSD PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# 36,44,48,49,51
47 48
34 PCIE_TXN9_SATA0A_TXN_SSD PETn0/SATA-A- NC15
45 46
43 GND8 NC14 44
34 PCIE_RXN9_SATA0A_RXN_SSD PERp0/SATA-B- NC13
D01A 41 42
34 PCIE_RXP9_SATA0A_RXP_SSD PERn0/SATA-B+ NC12
39 40
37 GND7 NC11 38
34 PCIE_TXP10_SSD PETp1 DEVSLP(O) D03 DEL
35 36
34 PCIE_TXN10_SSD PETn1 NC10
33 34
31 GND6 NC9 32
34 PCIE_RXP10_SSD PERp1 NC8
29 30 >120 mil
34 PCIE_RXN10_SSD PERn1 NC7
27 28 3.3VS
25 GND5 NC6 26
34 PCIE_TXP11_SSD PETp2 NC5
23 24 C622 C634 C623
34 PCIE_TXN11_SSD PETn2 NC4
21 22
19 GND4 NC3 20 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
34 PCIE_RXP11_SSD PERp2 NC2
17 18
34 PCIE_RXN11_SSD PERn2 3.3V5
15 16
13 GND3 3.3V4 14 GND GND GND
34 PCIE_TXP12_SSD
11 PETp3 3.3V3 12 D01A
34 PCIE_TXN12_SSD PETn3 3.3V2 M2M_SSD_LED#R
9 10
7 GND2 DAS/DSS#(I)(OD) 8 D01A
34 PCIE_RXP12_SSD
5 PERp3 NC1 6 DEL
34 PCIE_RXN12_SSD PERn3 NC0 80 mils
3 4 3.3VS
1 GND1 3.3V1 2
A GND0 3.3V0 A

C633
NFSM0-S6701-TP40 0.1u_10V_X7R_04
P/N = 6-21-84K70-075

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
GND PCB Footprint = NXSM0-S67XX-XX40
PCB Footprint婳䡢娵㨇㥳ἧ䓐䘬Connector
GND
Title
[44] M.2 WLAN+BT, PCIE4X SSD
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 44 of 79


5 4 3 2 1

M.2 WLAN+BT, PCIE4X SSD B - 45


Schematic Diagrams

Realtek ALC892
5 4 3 2 1

3.3V 2,13,30,41,42,43,44,49,51,52,54,55,58,59,60
Layout Note: 3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,46,48,49,50,51,54,59,61,63
5V 41,51,52,54,57,58,59,60,61,62,63,64
U43 pin 1 ~ pin 11 and pin 47 and pin 48 C600 0.1u_16V_Y5V_04
5VS 13,17,34,46,47,49,50,51,54
are Digital signals. VIN 13,48,52,53,54,55,56,57,58,61,62,63,64
C599 0.1u_16V_Y5V_04
The others are Analog signals.
C603 0.1u_16V_Y5V_04

3.3VS 3.3VS_AUD 5VS_AUD C602 0.1u_16V_Y5V_04

L37 HCB1005KF-121T20
40mil 40mil L30 *HCB1005KF-121T20 C601 0.1u_16V_Y5V_04
D
Layout Note: D01A
5VS
D
(1)MIC1-L (U13.21) (2)MIC1-R (U13.22) C668 C676 C679 C682 C627 C625
(3)LINE-L (U13.23) (4)LINE-R (U13.24) AUDG
*0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06
␐⚵⽭枰⊭央 AUDG, ᶼ⃀慷性⃵嶐崲 0.1u_16V_Y5V_04
+5VS & +VIN plane. R414 *20mil_short-p
AUDG AUDG

25
38
7

1
9
U24
VREF_CODEC AUDG

DVSS2

DVDD1
DVDD2

AVDD1
AVDD2
MIC_CLK HCB1005KF-121T20 1 2 L40
49 MIC_CLK MIC_DATA HCB1005KF-121T20 1 2 L39 C632 0.1u_16V_Y5V_04
49 MIC_DATA
C678 47p_50V_NPO_04 2
4 GPIO0/DMIC-CLK 27
C680 10u_6.3V_X5R_06
DMIC_DAT VREF
C619 10u_6.3V_X5R_06 D01A MIC1-VREFO-L
3
B.Schematic Diagrams

C687 47p_50V_NPO_04 MIC2-VREFO


C683 *22p_50V_NPO_04 GPIO1/DMIC-DATA
D04_Reflash_0902_Alex R446 22_04 5 28 MIC1-VREFO-L AUDG R383
35 HDA_SDOUT SDATA-OUT VREFOOUT-B_L
R450 22_04 6 32 MIC1-VREFO-R R382
35 HDA_BITCLK BIT-CLK VREFOUT-B_R
R454 *0_04 MIC_DATA R449 22_04 8 2.2K_04 D01A
35 HDA_SDIN0 SDATA-IN
R447 22_04 10 39 *2.2K_04
ALC889 DIGITAL
SRUW$ SURR-OUT-R
35 HDA_SYNC
R448 22_04 11 SYNC SURR-OUT-L 41 Del test point D01A MIC1_L_M
ᶲẞ.
35,46 HDA_RST# RESET# INT_MIC_OUT
Max: 0.5inch EAPD_MODE 47 30 MIC2-VREFO C609
46 EAPD_MODE SPDIFI/EAPD VREFOUT-F_L T105

Sheet 45 of 79 PC BEEP
D20
1 A D03 51 SPDIFO
SPDIFO 48
SPDIFO
VREFOUT-E
31

35 FRONT_L
T107
C608

*330p_50V_X7R_04
*680p_50V_X5R_04
48 KBC_BEEP C 3 BEEPR440 47K_04 C677 1u_6.3V_X5R_04 12
PCBEEP SRUW' FRONT-OUT-R
FRONT-OUT-L 36 FRONT_R FRONT_L
FRONT_R
46,47
46,47

Realtek ALC892 C
D01A 35 PCH_SPKR
2 A

BAT54CS3
R438
C671
4.7K_04
*0.1u_10V_X5R_04
D03
13
SRUW(FR_HP-R
FR_HP-L
14
15
HEADPHONE-L
HEADPHONE-R
AUDG
AUDG

C
D02 MIC1-VREFO-R
51 JD_SENSEA Sense A
AUDG 34 43
SRUW*
51 JD_SENSEB Sense B CENTER
L26 44 C657 10u_6.3V_X5R_06 R422 75_1%_04
LFE SIDE_L 51
HCB1005KF-121T20 37 C661 10u_6.3V_X5R_06 R426 75_1%_04 R381
LDO_IN NC SIDE-L_R SIDE_R 51
29 45
5V LDO_IN ANALOG SRUW+ SIDE-R
SIDE-L 46 SIDE-R_R C629 *0.1u_16V_Y5V_04 2.2K_04 D01A
C

C660 *4.7u_6.3V_X5R_06 MIC2_L 16


D14 ALC889 INT_MIC_OUT R372 *1K_04 INT_MIC_R C656 *4.7u_6.3V_X5R_06 MIC2_R 17 MIC2-L
SRUW) 33 CAP C626 *10u_6.3V_X5R_06 MIC1_R_M
*RB751V ᶵᶲẞ. C606
22u_6.3V_X5R_08 18
MIC2-R CAP
40 JDREF R385 20K_1%_04 C607
CD-L JDREF AUDG
19 AUDG
A

20 CD-GND 23 R379 *5.1K_1%_04 *680p_50V_X5R_04


CD-R
SRUW& LINE1-R
LINE1-L 24

AVSS1
AVSS2
MIC1_L_M R413 1K_04 C653 4.7u_6.3V_X5R_06 21
SRUW%
51 MIC1_L_M MIC1_R_M R404 MIC1-L
Connect standby power(for D01A 1K_04 C650 4.7u_6.3V_X5R_06 22 C636 *100p_50V_NPO_04 AUDG
51 MIC1_R_M MIC1-R
pop noise)
ALC892

26
42
VT1818S P2P ALC892

AUDG

Ca C604 *EEFCX0J221YR

+
B
3D HeadPhone AMP Ra
Rb
R358

R357
0_04

*0_04
3D_HP_L

5V DEL D02
B

Rc R356 0_04 Rg
3D_HP_L R359 54.9_1%_04 HEADPHONE-LC
HEADPHONE-LC 51
Rd R354 *0_04 3D_HP_R R334 54.9_1%_04 HEADPHONE-RC
C587 C586 C584 C583 C569 HEADPHONE-RC 51
Re R355 *0_04 AMP_EN
AMP_EN 46,47
+
Rh

2.2u_6.3V_X5R_04

0.1u_16V_Y5V_04

22u_6.3V_X5R_08

*22u_6.3V_X5R_08
Ra,Rc,Rf,Rg,Rh Rb,Rd,Ca,Cb, Ua
Ri

220u_6.3V_SMD-D
EEFCX0J221YR
R353 *0_04
HP_JSGND
SV3H612 Mount NC HP_JSGND 51
D01A VIN
SV3H615 NC Mount
D01A
16
15
14
13

R1878 15_1%_04 HP_JSGND


U17
㬌悐↮劍㚱⮷㜧婳㓦㕤M/B PWR OFF, HP_JSGND=0V
Re, Ri烉612炻615䘮ᶵᶲẞ RB
OUTL
VDD
JD
SGND

C571 0.01u_16V_X7R_04 PWR ON, HP_JSGND=2.5V


1M_04

D
HEADPHONE-L HP_L R350 470_04 HP_INL 1 12 C566 0.01u_16V_X7R_04 R1866
C575 2 INL C2_3DL 11 AUDG
QB
1u_16V_X7R_06 3 VREF C1_3DL 10 HP_JSGND_EN G Q58
REXT PGND AUDG
HEADPHONE-R HP_R R338 470_04 HP_INR 4 VSS 9 MTN7002ZHS3
RC

S
INR C1_SDR
C2_3DR

C559 C562 0.01u_16V_X7R_04


QA
OUTA
C574

C563

C570

R342

1u_16V_X7R_06 R1867
SDA
SCL

17 C554 0.01u_16V_X7R_04 HP_JSGND G 1M_04


VSS Q59 AUDG

S
SV3H612V MTN7002ZHS3
5
6
7
8

pin SV3H612 SV3H615


2200p_50V_X7R_04

2200p_50V_X7R_04

1u_6.3V_X5R_04

A AUDG A
SV3H615 ARa ᶲ0ohm (AUDIO/B)
*240K_04

HP_SCL R328 22_1%_04


13 SGND JD HP_SDA R329 22_1%_04
SMB_CLK 35,49 SV3H612 QA,QB MTN7002ZHS3, RB,RC 1Mohm
SMB_DATA 35,49
14 JD VDD
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C555 10p_50V_NPO_04
15 VDD LS-IN C556 10p_50V_NPO_04

Title
[45] Realtek ALC892
Rf R333 0_04 3D_HP_R
Size Document Number Rev
AUDG
Cb C548 *EEFCX0J221YR A3 P650RE 6-71-P65R0-D03 D03
+

Date: Monday, July 06, 2015 Sheet 45 of 79


5 4 3 2 1

B - 46 Realtek ALC892
Schematic Diagrams

TPA2008D2
5 4 3 2 1

AMP_5VS
L27
The volume control.the gain range is from TPA2008D2 HCB1608KF-121T30
-80db(Vvolume=5V) to +20db(Vvolume=0V) with 5VS
64 steps precise control. P2P BA20550 D01A C611 C612 C605

(TSSOP24) 0.1u_10V_X7R_04 0.1u_10V_X7R_04 22u_6.3V_X5R_08


U21 Front Speaker R / L
AUDG AUDG AUDG
D
AMP_EN 3 20 ROUTP L22 . FCM1005KF-121T03 ROUT+ 4 Ohm 2W Speaker D
SHUTDOWN ROUTP

AUDG C615 2.2u_6.3V_X5R_04 22 21 20 Mil J_SPK1


20 Mil BYPASS PVDDR1
FRONT_R R370 3.01K_1%_04 C620 24 17 ROUTN L24 FCM1005KF-121T03 ROUT- 1
45,47 FRONT_R
0.1u_10V_X7R_04 RINN ROUTN
. 2 Speaker wire length less than 8000mils , It don't need LC Filter.
D02 23 16 20 Mil 3
AUDG C614 0.1u_10V_X7R_04 SPKOUTR+,R-,L+,L- Trace width
RINP PVDDR2 4
6 18 85204-04001 Speaker 4 ohm------> 30mils, Via hole----->C40D20.
PGNDL1 PGNDR1
7 19
20 Mil D02 PGNDL2 PGNDR2 20 Mil ROUT+
FRONT_L R428 3.01K_1%_04 C663 1 5 LOUTP L23 . FCM1005KF-121T03 LOUT+ ROUT-
45,47 FRONT_L LINN LOUTP
0.1u_10V_X7R_04 LOUT+
AUDG C664 0.1u_10V_X7R_04 2 9 LOUT-
LINP PVDDL1

C592

C593

C597

C591

B.Schematic Diagrams
5VS R374 6.98K_1%_04 14 4
On VOLUME PVDDL2

1000p_50V_X7R_04

1000p_50V_X7R_04

1000p_50V_X7R_04

1000p_50V_X7R_04
AUDG R375 10K_1%_04 15 13
NC VDD

Thermal_Pad
20 Mil
10 8 LOUTN L19 . FCM1005KF-121T03 LOUT-
COSC LOUTN
11 12

C662 R427
ROSC

25
AGND

TPA2008D2
AUDIO AMP Enable Sheet 46 of 79
220p_50V_NPO_04 120K_04 3.3VS
C
AUDG
AUDG
C
TPA2008D2
AUDG AUDG C674
R439
*0.1u_10V_X5R_04
100K_1%_04

C A
35,45 HDA_RST#
D21 *RB751V-40(lision)

C A
13,35,40,42,48,54,55 SUSB#
D23 RB751V-40(lision)

C A
36 PCH_MUTE#
D19 *RB751V-40(lision) U26

5
MC74VHC1G08DFT2G
45 EAPD_MODE R442 *0_04 1
4 AMP_EN
AMP_EN 45,47
2
48 KBC_MUTE#
D01A C665

3
*0.1u_16V_Y5V_04

C667 C669
B B
0.1u_16V_Y5V_04 1000p_50V_X7R_04

AUDG

A A
5VS 13,17,34,45,47,49,50,51,54
3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,48,49,50,51,54,59,61,63

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[46] TPA2008D2
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 46 of 79


5 4 3 2 1

TPA2008D2 B - 47
Schematic Diagrams

Subwoofer
5 4 3 2 1

P670SE ONLY SR3 2.2_04 SC5 2200p_50V_X7R_04 GND


SAMP_PW R

SAMP_PW R

SC9 SC36 EMC18


SC21 SC40 SC10 SC6
SD1
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 SR9 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 1000p_50V_X7R_04
D SL1 . 2.2uH_4*4*2.0 SAMPPW R_SW A C 10K_04 D
5VS D03

10
16

26
32
SU2 SU1

1
AUDG_2 AUDG_2 AUDG_2 AUDG_2 AUDG_2
FMS3004-AS-H GND EMI

VLDO

LVDDN
LVPPD
RVDDP
RVDDN
SC3 8 6 17 21 SOSCIN SR8 *10K_04
IN LX1 45,46 AMP_EN SD OSCIN
10u_6.3V_X5R_06 7 SR13 0_04 19 20
SR23 SAMPPW R_FREQ9 LX2 SR25 MUTE OSOC

GND_Thermal
*0402_short FREQ 2 AUDG_2
GND SR24 SAMPPW R_EN 3 FB 130K_1%_06 SC15 0.1u_10V_X7R_04 6 11
SHDN AUDG_2 RINN ROUTP1
10_04 12
10 1 SC12 0.1u_10V_X7R_04 7 ROUTP2

GND
GND
SC4 SS COMP SR15 RINP 13
*10u_6.3V_X5R_06 SC24 18K_1%_06 2CH_SUBW OOFER_RC SC14 0.1u_10V_X7R_04 4 RGND
G5110 LINN 14

4
5
11
15000p_50V_X7R_06 SC13 0.1u_10V_X7R_04 3 APA2607QBI ROUTN1 15
AUDG_2
B.Schematic Diagrams

LINP ROUTN2
GND SPFLAG 18 31 SJ_SUBW OOF1
GND SGAIN1_R 25 PFLAG LOUTP2 30 SUBW OOFER+ SL3 HCB1005KF-121T20
SGAIN0_R GAIN1 LOUTP1 40 mil 2
GND SR26 24
GND 100K_04 SDRC1_R 23 GAIN0 29 1
SAMP_3V3LDO SDRC0_R 22 DRC1 LGND 88266-02001
DRC0 40 mil
27 SUBW OOFER- SL2 HCB1005KF-121T20 Speaker:
LOUTN1

Case_GND

SC33

SC32
SC22 SC23 2 28
330p_50V_X7R_04 10p_50V_NPO_04 3V3LDO LOUTN2 ℙ䓐6-23-5P15E-0W3
Sheet 47 of 79

AGND
4ȍ,

VREF
SR37 18K_1%_04 SPMAX 9
PMAX
typ=2.5W

1000p_50V_X7R_04

1000p_50V_X7R_04
SR38 SAMP_PW R max=4W
Subwoofer

33
SAMP_3V3LDO SC34 10K_04
C GND 0.1u_10V_X7R_04 C

+ SC26 SC7
SC11 SC8
SR1 SR10 SR11 SR12 SR14 AUDG_2 AUDG_2 0.1u_10V_X7R_04 *220u_25V_V_B 4.7u_25V_X5R_08 4.7u_25V_X5R_08
10K_04 10K_04 *10K_04 *10K_04 120K_04
D01A
AUDG_2 AUDG_2 AUDG_2

SGAIN1_R AUDG_2 AUDG_2


SGAIN0_R *0.1u_16V_Y5V_04
SDRC1_R FRONT_R SC39
45,46 FRONT_R
SDRC0_R
SPFLAG *0.1u_16V_Y5V_04 20 Mil
FRONT_L SC38 SR41 *3.24K_1%_04 SR42 *15.4K_1%_04 2CH_SUBW OOFER_RC
45,46 FRONT_L
SR2 SR5 SR6 SR7 SR4 SR16 *0402_short

SC2

SC16 1000p_50V_X7R_04

SC1

SC41
*10K_04 *10K_04 10K_04 10K_04 *120K_04 SC37 EMC19
GND
*0.1u_10V_X5R_04 1000p_50V_X7R_04

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04
AUDG_2

0.1u_16V_Y5V_04
D03
AUDG_2 AUDG_2 AUDG_2 AUDG_2 AUDG_2
AUDG_2 EMI

B B

SR40 100K_04 SAMP_PW R AUDG_2


SAMP_PW R
8

30K_1%_04
FRONT_R SC29 SR31 3 SR32 SC31 0.47u_6.3V_X5R_04
FILTER FC: 300Hz
V+

+ 2.37K_1%_04
0.1u_10V_X7R_04 1 SUB_R SR36 *0_04 SAMP_PW R
SR39 OUT SR35 SR33 SU3B
D01A

8
100K_04 2 SU4A 1.27K_1%_04 1.27K_1%_04
V-

- LM358G D01A SC30 0.1u_10V_X7R_04 SOUTPUT1 SINPUT2+ 5 SUB Woofer out

V+
+
4

SAMP_PW R 7 2CH_SUBW OOFER_RC


AUDG_2 SR21 SR19 SU3A SC27 SR34 SC19 OUT

8
AUDG_2 2.37K_1%_04 2.37K_1%_04 6

V-
SUB_L 3 *0.1u_16V_Y5V_04 *4.3K_1%_04 0.1u_10V_X7R_04 - SR20

V+
+ LM358G D01A

4
SR27 100K_04 SAMP_PW R 1 0_04
SAMP_PW R D01A D01A OUT D01A
AUDG_2
8

30K_1%_04 SC17 SR18 SC28 2 AUDG_2

V-
FRONT_L SC25 SR28 5 - SAMP_PW R SAMP_PW R AUDG_2 SINPUT2- SR17
V+

+ *0.1u_10V_X5R_04 *4.3K_1%_04 0.1u_10V_X7R_04 LM358G D01A SR29 *100K_04

4
0.1u_10V_X7R_04 7 0_04
SR22 OUT
100K_04 6 SU4B AUDG_2 SC20 SC18 AUDG_2
V-

- LM358G
D01A
AUDG_2 AUDG_2 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
4

SR30
A *100K_04 A
AUDG_2 AUDG_2
AUDG_2 AUDG_2

AUDG_2
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[47] P670SE SUBWOOFER_S
13,17,34,45,46,49,50,51,54 5VS Size Document Number Rev
A3 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 47 of 79


5 4 3 2 1

B - 48
Schematic Diagrams

KBC-ITE IT8587
5 4 3 2 1

P670RE
IT8587(Follow IT8991 PIN Define) KBC_AVDD L38
J_KB2
85208-24051 VDD3
MODEL_ID RB (PL)
10K
RA (PH)
X
Voltage
0V
HCB1005KF-121T20 DEFAULE
. KB-SI0 4 MODEL_ID RA R798 *10K_04 X 22K 1V
VDD3 VDD3 X
KB-SI1 5
C610 C646 C690 C691 C688 C689 KB-SI2 6 RB R799 10K_04 15.4K 10K 2V
KB-SI3 8 X
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 KB-SI4 11 X 10K 3.3V
KB-SI5 12 X
KB-SI6 14
C684 KB-SI7 15
D KBC_AGND OPTION (⎗ẍ嬲≽ὅEC㍸ὃ䘬EXECL堐) D
L41 HCB1005KF-121T20 0.1u_16V_Y5V_04 KB-SO0 1 㛒⛐EXECL堐ᷕ䘬≇傥⎗ẍ冒埴␥⎵ AUTO_LOAD_MODE
. P650RE KB-SO1 2
3.3VS DSx
KB-SO2 3
EMI Solution 1 J_KB1 24 KB-SO3 7 R456 R455 PJ33

114
121
127
J_KB1 KB-SO4 9 10K_04 1K_04 *CV-40mil

11

26
50
92

74
3
U25A 85208-24051 KB-SO5 10 VDD3 1 2
KB-SO6 13 U25B

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
VCC

AVCC
VBAT
10 58 KB-SI0 4 KB-SO7 16 DSx
36,49 LPC_AD0 GPM0/LAD0 KSI0/STB#
9 59 KB-SI1 5 KB-SO8 17 76 100
36,49 LPC_AD1 GPM1/LAD1 KSI1/AFD# 35 SUS_PW R_ACK#_EC GPJ0/TACH2 5VT/SSCE0#/GPG2
8 60 KB-SI2 6 KB-SO9 18 80
36,49 LPC_AD2 GPM2/LAD2 KSI2/INIT# 50 VGA_FAN2 GPJ4/DAC4/DCD0#
7 61 KB-SI3 8 KB-SO10 19 81
36,49 LPC_AD3 GPM3/LAD3 KSI3/SLIN# 50 VGA_FAN1 GPJ5/DAC5/RIG0#
13 62 KB-SI4 11 KB-SO11 20
36 PCLK_KBC GPM4/LPCCLK KSI4
6 LPC 63 KB-SI5 12 KB-SO12 21 78 56
36,49 LPC_FRAME# GPM5/LFRAME# KSI5 50 KBLIGHT_ADJ GPJ2/DAC2//TACH0B KSO16/SMOSI/GPC3 3G_DET# 43
5 64 KB-SI6 14 KB-SO13 22 57
36,49 SERIRQ GPM6/SERIRQ KSI6 KSO17/SMISO/GPC5 W LAN_EN 44
22 65 KB-SI7 15 KB-SO14 23 68

B.Schematic Diagrams
36,44,49,51 BUF_PLT_RST# GPD2/LPCRST#/5VT KSI7 35 ME_W E GPI2/ADC2
K/B MATRIX KB-SO15 24
R423 100K_04 KBC_W RESET# 14 36 KB-SO0 1
IT8587
VDD3 WRST# KSO0/PD0
C666 0.1u_16V_Y5V_04 37 KB-SO1 2 71 93
KSO1/PD1 VBATT_BOOST# GPI5/ADC5/DCD1# 5VT/CLKRUN#/ID0/GPH0 SUSB# 13,35,40,42,46,54,55
GA20 126 38 KB-SO2 3 72
GPB5/GA20 KSO2/PD2 30 VBATT_BOOST# GPI6/ADC6/DSR1#
4 39 KB-SO3 7 94
56 AC_IN# GPB6/KBRST# KSO3/PD3 5VT/CRX1/SIN1/SMCLK3/ID1/GPH1 SUSC# 35,52,55,57
16 40 KB-SO4 9
51 LED_ACIN GPC7/PWUREQ#/BBO/SMCLK2ALT KSO4/PD4 50 VGASEN_SEL
20 41 KB-SO5 10 N15x GC6 2.0
35 AC_PRESENT GPE7/L80LLAT/5VT KSO5/PD5 42 KB-SO6 13 96

36 SMI#
23
15 GPD3/ECSCI#/5VT
KSO6/PD6
KSO7/PD7
KSO8/ACK#
43
44
45
KB-SO7
KB-SO8
KB-SO9
16
17
18
30
30
SMC_VGA_THERM
SMD_VGA_THERM
115
116
118
GPC1/SMCLK1/5VT
GPC2/SMDAT1/5VT
5VT/ID3/GPH3
5VT/ID4/GPH4
5VT/ID5/GPH5
97
98
99
dGPU_GPIO8_OVERT 30
d_GPIO9_ALERT_FAN 30
3G_RST# 43
Sheet 48 of 79
34 SCI# GPD4/ECSMI# KSO9/BUSY 35 SMD_CPU_THERM GPF7/SMDAT2/PECIRQT# 5VT/ID6/GPH6 W LAN_PW R_EN 44
46 19
KBC-ITE IT8587
KB-SO10
77 KSO10/PE 51 KB-SO11 20 D01A 82 D01A
46 KBC_MUTE# GPJ1
DAC KSO11/ERR# 5VT/EGAD/GPE1 P670RG-M_TPLED 51
C 52 KB-SO12 21 24 83 C
KSO12/SLCT 51 EC_SSD_LED# GPA0/PWM0/5VT 5VT/EGCS#/GPE2 DGPU_RST# 36
53 KB-SO13 22 84 R432 0_04
50 CPU_FAN
C693
CPU_FAN
0.1u_16V_Y5V_04
79
GPJ3/DAC3/TACH1B
IT8587 KSO13
KSO14
54
55
KB-SO14
KB-SO15
23
24
51 LED_SCROLL#
28
29 GPA2/PWM2/5VT
5VT/EGCLK/GPE3
48
DGPU_PW R_EN# 36,59

KSO15 51 LED_NUM# GPA3/PWM3/5VT TACH1/TMA1/GPD7 VGA_FANSEN 50


ADC 30 119
BAT_DET 51 LED_CAP# GPA4/PWM4/5VT 5VT/CRX0/GPC0 ALL_SYS_PW RGD 5,13,40,61,63
66
BAT_VOLT 67 GPI0/ADC0 2
69 GPI1/ADC1 CK32KE/GPJ7 128
3G_PW R_EN 43 D01A
2 THERM_VOLT GPI3/ADC3 CK32K/GPJ6
70 125 EC_SLP_SUS#_R
56 TOTAL_CUR GPI4/ADC4 42,53,54 DD_ON GPE4/PWRSW
106 EC_SLP_SUS# 35,53,54
MODEL_ID 5VT/SSCE1#/VCEN/TM/GPG0 CCD_EN 49 R1854 0_04
73
GPI7/ADC7/CTS1# IT8587E/FX VDD3
107
5VT/( PD )DTR1#/SBUSY/ID7/GPG1 3G_EN 43 R1855 *10K_04
SMBUS
48,56 SMC_BAT
R462 47_04 SMC_BAT_EC 110
GPB3/SMCLK0/5VT
R461 *10K_04
VDD3 RSMRST# PCH & EC ⎒暨PULL DOWNᶨ怲,㑯1 R1856 10K_04
R463 47_04 SMD_BAT_EC 111 95
48,56 SMD_BAT GPB4/SMDAT0/5VT 5VT/CTX1/SOUT1/DAT3/ID2/GPH2 BKL_EN 13 D02 DEFAULT㓡ᶲẞ, (⤪㰺㚱ᶲẞ, RTC便暣忶⣏) VDD3
R465 *0_04 EC_PECI 117 R369 10K_04
35 SMC_CPU_THERM GPF6/SMCLK2/PECI EC_RSMRST#
R464 43_1%_04 35 D01A
5 H_PECI 5VT/RTS1#/GPE5 VBATT_BOOST#R408
17 *10K_04
5VT/LPCPD#/GPE6 SB_KBCRST# 36
C692 10p_50V_NPO_04 3G_DET#
DEL R373 *10K_04
PWM 47 D01A
TACH0A/GPD6 CPU_FANSEN 50 3G_RST#
25 R445 10K_04
45 KBC_BEEP GPA1/PWM1/5VT
31 120
51 LED_BAT_CHG GPA5/PWM5/5VT TMRI0/GPC4 LOT6_CHG 56 SMC_BAT
32 124 R467 1.5K_04
51 LED_BAT_FULL GPA6/PWM6/SSCK/5VT TMRI1/GPC6 PM_PW ROK 40 SMD_BAT
34 R466 1.5K_04
51 LED_PW R GPA7/PWM7/RIG1#/5VT DEBUG PORT BAT_DET R444 10K_04
PS/2 123 J_80DEBUG1
CTX0/TMA0/GPB2 LAN_W AKEUP# 32,51
80CLK 85
B D01A 3IN1 87 GPF0/PS2CLK0/TMB0/CEC/5VT PCLK_KBC R436 *10_04 PCLK_KBC_R C672 *10p_50V_NPO_04 B
GPF2/PS2CLK1/DTR0#/5VT 19 1 80CLK
5VT/L80HLAT/BAO/GPE0 SW I# 34 2 BAT_VOLT
86 3IN1 C670 1u_6.3V_X5R_04
42,53,54 USB_CHARGE_EN GPF1/PS2DAT0/TMB1/5VT 3
88 VDD3
44 BT_EN GPF3/PS2DAT1/RTS0#/5VT 4
112
5VT/RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 PMOSFET_CONTROL# 56
89 *85205-04001 D03
49 TP_CLK GPF4/PS2CLK2/5VT
90 PCB Footprint = 85205-0400M
49 TP_DATA GPF5/PS2DAT2/5VT VDD3
WAKE UP
18 C
54 PW R_SW # GPD0/RI1#
21 AC
13,50 LID_SW # GPD1/RI2#/5VT 48,56 SMC_BAT
D22 A
101 ALSPI_CE# R457 0_04 BAV99 RECTIFIER
5VT/FSCE#/GPG3 ALSPI_MSI HSPI_CE# 32
GP INTERRUPT 102 R458 0_04 C
5VT/FMOSI/GPG4 ALSPI_MSO HSPI_MSI 32
33 103 R459 0_04 AC
35 PW R_BTN# GPD5/GINT/CTS0#/5VT 5VT/FMISO/GPG5 ALSPI_SCLK HSPI_MSO 32 48,56 SMD_BAT
105 R460 0_04 D24 A
5VT/FSCK/GPG7 HSPI_SCLK 32
UART BAV99 RECTIFIER
D01A EC_RTC_RESET 108 104 C
GPB0/RXD/SIN0/5VT 5VT/DSR0#/GPG6 AIRPLAN_LED# 51
109 AC
5 H_PROCHOT_EC GPB1/TXD/SOUT0/5VT 56 BAT_DET
D18 A
VDD3 D01A BAV99 RECTIFIER
C
VCORE

AVSS
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7

AC
VDD3 VDD3 56 BAT_VOLT
D17 A
R1882 BAV99 RECTIFIER
IT8587E/FX U123
12

1
27
49
91
113
122

75

5
10K_04 MC74VHC1G08DFT2G
R1881 1
A
4
D

RSMRST# 35 A
C673 R468 10K_04 EC_RSMRST# 2
*20mil_short-p Q62
0.1u_16V_Y5V_04 G MTN7002ZHS3

3
D02
C

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
D36 Q61
KBC_AGND C A R1883 100K_04 B DTC114EUA R1874 *0_04
VIN
ZD5231BS2 C1738 Title
3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 [48] KBC 8587
E

VDD3 5,30,32,35,38,40,44,50,51,53,54,55,56,57,58 0.1u_16V_Y5V_04


3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61,63 Size Document Number Rev
VIN 13,45,52,53,54,55,56,57,58,61,62,63,64 A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 48 of 79


5 4 3 2 1

KBC-ITE IT8587 B - 49
Schematic Diagrams

TPM, CCD, TP
5 4 3 2 1

TPM_PW R

R477
FOR TP TP_VCC

100K_04
D03
GPIO
H: W / TPM (ᶲ R477 )
L: W/O TPM (ᶲ R474 )
SLB9665TT TPM_PW R
TP_VCC

R420 0_04
R451 R419 C686
3.3VS
TPM_DET 40 10K_04 10K_04 *10u_6.3V_X5R_06
D01A R478 *0_04 3.3V R421 *0_04 5VS
R474 TP_CLK
*100K_04 C698 C697 C659 1u_6.3V_X5R_04 TP_DATA
R479 0_04 3.3VS J_TP1
D U28 0.1u_16V_Y5V_04 *10u_6.3V_X5R_06 C655 0.1u_16V_Y5V_04 C681 C658 D
26 5 PIN5
36,48 LPC_AD0 LAD0 VDD1 1 TP_DATA
23 10 PIN5 47p_50V_NPO_04 47p_50V_NPO_04
36,48 LPC_AD1 LAD1 VDD2 2 TP_CLK TP_DATA 48
20 19
36,48 LPC_AD2 LAD2 VDD3 3 TP_CLK 48
17 24 3.3VS
36,48 LPC_AD3 LAD3 VDD4 4 TP_SMB_DAT TP_VCC
㲐シPCLK_TPM⤪㚱ᷚ暣旣㚱ᶲTPM㗪暨⺢BOM 21 C699 C695 C696 5 TP_SMB_CLK
36 PCLK_TPM LCLK TPM 6
22 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 50501-0060N-001
36,48 LPC_FRAME# BUF_PLT_RST# LFRAME#
16 88511-06L
36,44,48,51 BUF_PLT_RST# LRESET#_1
LRESET# 9 PIN10 PIN19 PIN24
27 LRESET#_2 R214 R231
36,48 SERIRQ SERIRQ
R484 *10K_04 TPM_PP 7 6 TPM_GPIO R482 *4.7K_04 2.2K_04 2.2K_04
3.3VS PP GPIO 3.3VS

2
Q12A
B.Schematic Diagrams

G
R483 4.7K_04 1 R473 C694 MTDK5S6R
2 NC_1 PCLK_TPM PCLK_TPM1 TP_SMB_CLK 1 6
NC_2 SMB_CLK 35,45

D
3
NC_3

5
8 *33_04 *10p_50V_NPO_04 Q12B
NC_4 SMBUS address: 0x2C

G
12 4 MTDK5S6R
13 NC_5 GND_1 11 TP_SMB_DAT 4 3
NC_6 GND_2 SMB_DATA 35,45

D
14 18
R481 *0_04 CLKRUN# 15 NC_7 GND_3 25
35 PM_CLKRUN# LPCPD#_TPM 28 NC_8 GND_4
R476 *0_04
36 S4_STATE# NC_9 M9 M10 M15 M14

Sheet 49 of 79 3.3VS R475 *10K_04 SLB9665TT BUF_PLT_RST# R480 *0_04 LRESET#


*M-MARK *M-MARK *M-MARK *M-MARK

TPM, CCD, TP C LPC_SIRQ & PM_CLKRUN# 䡢娵PCH䪗暨PULL HIGH


R485 *10K_04 H16
*H8_0D4_1
H17
*H8_0D4_1
H23
*H8_0D4_1
H22
*H8_0D4_1
H44 H42
*H9_5B6_5D2_8 *H9_5B6_5D2_8
H12
*H7_5D2_8
C

M16 M13 M11 M12


*M-MARK *M-MARK *M-MARK *M-MARK

CCD H9
*H6_0D3_2
H8
*H6_0D3_2
H6
*H6_0D3_2
H7
*H6_0D3_2 H43 H1 H2 H40 H11 H34 H21
*C111D111N *C111D111N *C111D111N *C111D111N *H8_0D2_8 *H8_0D2_8 *H9_0D2_8
D01A CCD_PW R
U30
1A 1A 48 mil
3.3VS 4 1
5 VIN VOUT
VIN
C7 D01A
C9 C701
1u_6.3V_X5R_04 CCD_EN3 2
EN GND *0.1u_16V_Y5V_04 2.2u_6.3V_X5R_04
UP7553 H20 H18 H15
M-SOT23-5
H25 H10 H31 D01A *H4_2D2_2 *H4_2D2_2 *H4_2D2_2
2 2 2
5 5 5
48 CCD_EN 3 1 3 1 3 1
4 4 4
From KBC default HI
B
Port 9 L1 *MTH8_0D2_8 *MTH8_0D2_8 *MTH8_0D2_8 B
1 2
33 USB_PN9 H3 H5 H26 H13
2 2 2 2
4 3
33 USB_PP9 5 5 5 5
*W CM2012F2S-SHORT J_CCD1 1 1 1 1
3 3 3 3
D03 4 4 4 4
1
2 D03
*MTH7_5D2_8 *MTH8_0D3_5 *MTH8_0D2_8 *MTH8_0D2_8 D02
L2 C5 47p_50V_NPO_04 3 PCB Footprint = MTH8_0D3_5
HCB1005KF-121T20 4
MIC_DATA_L 3.3VS 5
1 2
45 MIC_DATA MIC_CLK_L 6
1 2
45 MIC_CLK 7
8
H33 H29 H28 H30 H27 D01A
HCB1005KF-121T20 C4 47p_50V_NPO_04 *H6_0D3_2 *H4_2D2_2 *H4_2D2_2 *H4_2D2_2 *H4_2D2_2 H14 H32
L3 87213-0800G 2 2
5 5
BEAD & CAP FOR EMI 6-20-44A00-108 3 1 3 1
4 4
D01A
*MTH8_0D2_8 *MTH8_0D2_8
MAIN: 6-20-44A00-108
D02 2ND: 6-21-C3A00-108 EMI_GND EMI_GND EMI_GND EMI_GND
EMI_GND
EMI㒢㓦

戭㞙BOT朊 戭㞙 TOP朊 戭㞙 TOP朊 戭㞙 TOP朊 戭㞙 TOP朊 戭㞙 TOP朊 戭㞙BOT朊 13,17,34,45,46,47,50,51,54 5VS


A 2,13,30,41,42,43,44,51,52,54,55,58,59,60 3.3V A
H41 H19 H24 H47 H48 H49 H36 H35 H39 H37 H38 H45 H46 H4
3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,50,51,54,59,61,63 3.3VS
H7_5B5_7D3_7 H7_5D3_7 H7_5D3_7 H7_5D3_7 H7_5D3_7 H7_5D3_7 H7_5D3_2 H7_5D3_2 H7_5D3_2 H7_5D3_7 H7_5D3_7 H9_5B7_5D3_2 H9_5B7_5D3_2 H7_5D3_7
41,45,51,52,54,57,58,59,60,61,62,63,64 5V

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[49] TPM, CCD, TP
Size Document Number Rev
NGFF WLAN USB LAN Board NGFF 3G HDD Board (P655xᶵᶲẞ) NGFF SSD P67 KB P65 KB
6-34-P750S-010 6-34-M56AS-011-1 6-34-M56AS-011-1 6-34-T80VS-022 6-34-M56AS-011-1 6-34-T80VS-022 6-36-00380-25C-1 A3
P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 49 of 79


5 4 3 2 1

B - 50 TPM, CCD, TP
Schematic Diagrams

Fan, LID, KB, LED


5 4 3 2 1

VGA FAN CONTROL-Selector CPU FAN CONTROL


5VS
FON1# 1
U5
8
LID SWITCH IC
2 FON GND 7 VDD3
5VS 3 VIN GND 6
C265 C261 4 VOUT GND 5 R40 100K_04
VSET GND
D U12 1u_6.3V_X5R_04 *4.7u_6.3V_X5R_06 NCT3940S-A U2 D
2 12 C458 0.1u_16V_Y5V_04 1 2
11 0B0 VCC CPU_FAN 48
CPU_FAN VCC OUT LID_SW # 13,48

GND
1B0 1
10 A0 3 5VS_CPU_FAN C67 C68 C61
S0 GND J_FAN1

3
VGA_FAN2SEN AH9249NTR-G1
5 9 *1u_10V_Y5V_06 0.1u_16V_Y5V_04 *100p_50V_NPO_04
VGA_FAN1SEN 8 0B1 VCC 1
1B1 4 C733 2
A1 VGA_FANSEN 48 3
7 6 GND GND
48 VGASEN_SEL S1 GND PSU1, PSU2
10u_6.3V_X5R_06 85204-03001
PI5A3158BZAE D02 㬌䁢ⶍ⺈枸䔁 GND GND 3
P/N = 6-03-53158-0J1
( 06 SIZE )
śɥš–‘š 48 CPU_FANSEN
J_FAN1
1 2
śɨš–‘š
3
R528 4.7K_04 6-02-09249-LC0
3.3VS 2ND:6-02-08251-LC0

B.Schematic Diagrams
1

VGA FAN1 CONTROL Sheet 50 of 79


C
5VS
VFAN1ON# 1
2
3
U42
FON
VIN
GND
GND
8
7
6
C
Fan, LID, KB, LED
C913 C918 4 VOUT GND 5
VSET GND
1u_6.3V_X5R_04 *4.7u_6.3V_X5R_06 NCT3940S-A
VGA_FAN1 48
VGA_FAN1
5VS_VGA_FAN1
J_VFAN1
1
C896 2
3
10u_6.3V_X5R_06 85204-03001

VGA_FAN1SEN J_FAN1
3
R730 4.7K_04
3.3VS
1

B
VGA FAN2 CONTROL B

5VS U43
VFAN2ON# 1 8 3.3VS
2 FON GND 7
VIN GND
C914

1u_6.3V_X5R_04
C919

*4.7u_6.3V_X5R_06
3
4 VOUT
VSET
NCT3940S-A
GND
GND
6
5
R273
GPIO
H: W / KB_LED
L: W/O KB_LED
LED KEY BOARD 5VS L18 . *HCB1608KF-121T30 KB_LED_PW R
*10K_04
C588
VGA_FAN2 48
VGA_FAN2 D01A
10u_6.3V_X5R_06
5VS_VGA_FAN2 KBLED_DET 36 P650SE P670SE
J_VFAN2
R285 5VS
J_LEDKB1 J_LEDKB2 U19
1 *10K_04 FON-KB 1 8
2 6 KB_LED_PW R 6 KB_LED_PW R FON GND
C867 2 7
3 5 5 3 VIN GND 6
4 4 KB_LED_PW R VOUT GND
10u_6.3V_X5R_06 88266-03001 C573 4 5
3 3 VSET GND
2 2 0.1u_16V_Y5V_04 NCT3940S-A
VGA_FAN2SEN J_FAN1 1 1
3 50501-0060N-001 50501-0060N-001
KBLIGHT_ADJ 48
R666 4.7K_04
3.3VS
1 6-20-94K30-106 6-20-94K30-106
A A

VDD3 5,30,32,35,38,40,44,48,51,53,54,55,56,57,58 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/


VIN 13,45,48,52,53,54,55,56,57,58,61,62,63,64 Title
3.3VS 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,51,54,59,61,63
3.3V 2,13,30,41,42,43,44,49,51,52,54,55,58,59,60
[50] FAN, LID, KB LED
5VS 13,17,34,45,46,47,49,51,54 Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 50 of 79


5 4 3 2 1

Fan, LID, KB, LED B - 51


Schematic Diagrams

Connector
5 4 3 2 1

3.3VS

LED BOARD C403


LAN BOARD
*0.01u_16V_X7R_04 (⏓USB3.0x2, PHONE JACK)
D J_LED1 D
J_LAN1
12 LED_ACIN 48
5V 1 2 USB_PN4 33
11 LED_PW R 48 1 2
3 4 USB_PP4 33
10 LED_BAT_CHG 48 3 4
C469 C463 5 6
9 LED_BAT_FULL 48 5 6
NC1 7 8
8 LED_NUM# 48 7 8 USB3_TXN4 36
D03 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 9 10
7 LED_CAP# 48 9 10 USB3_TXP4 36
NC2 R1914 0_04 PS8331_SW 3,13,30,36 11 12
6 LED_SCROLL# 48 11 12 USB3_RXN4 36
13 14
5 AIRPLAN_LED# 48 13 14 USB3_RXP4 36
R1915 *0_04 15 16
4 LED_HDD# DGPU_PW R_EN 58,59 15 16
VDD3 17 18
3 17 18 USB_PN3 33
GND 19 20
2 19 20 USB_PP3 33
B.Schematic Diagrams

3.3VS C503 21 22
1 23 21 22 24
23 24 USB3_TXN3 36
FP225H-012S10M 0.1u_16V_Y5V_04 25 26
25 26 USB3_TXP3 36
PCB Footprint = fp225-012g 27 28
27 28 USB3_RXN3 36
29 30
29 30 USB3_RXP3 36
31 32
33 31 32 34
33 34 CLK_PCIE_GLAN# 37
VDD3 35 36
35 36 CLK_PCIE_GLAN 37
3.3V 3.3VS 37 38

Sheet 51 of 79 3.3VS
D01A C541 C547
3.3V
39
41
43
37
39
41
43
38
40
42
44
40
42
44
PCIE_TXN5_GLAN
PCIE_TXP5_GLAN
PCIE_RXN5_GLAN
33
33
33
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 45 46

Connector 婳EC PIN24復↢ầSSD


LED≽ἄ䘬㊯䣢炻德忶AP忂䞍BIOS ⛐⏲䞍EC ↢≽ἄ
47
49
51
45
47
49
46
48
50
48
50
52
PCIE_RXP5_GLAN

SIM_DET 43
33

5
51 52 LAN_CLKREQ# 37
53 54
1 43 UIM_PW R 53 54 PCIE_W AKE# 35,44
C
LED_HDD# EC_SSD_LED# 48 55 56 C
4 43 UIM_DATA 55 56 LAN_W AKEUP# 32,48
57 58
2 43 UIM_CLK 57 58 BUF_PLT_RST# 36,44,48,49
PCH_SATAHDD_LED# 34 59 60 DD_ON# 41,52,54
43 UIM_RST 59 60
61 62
U20 61 62
63 64
3

MC74VHC1G08DFT2G 3.3VS 63 64 CLK_PCIE_SD40# 37


65 66
65 66 CLK_PCIE_SD40 37
67 68
69 67 68 70
69 70 PCIE_TXN7_SD40 33
71 72
71 72 PCIE_TXP7_SD40 33
73 74
73 74 PCIE_RXN7_SD40 33
75 76
75 76 PCIE_RXP7_SD40 33
77 78
79 77 78 80
79 80 SD40_CLKREQ# 37

POWER BTN BOARD CONN 50185-08041-001


PCB Footprint = 50185-0804X
3.3VS

J_BTN1 J_BTN1
1 1
2 NC1
54 M_BTN# 3 NC2 4
4
FP226H-004S10M
PCB Footprint = JXT_FP226H-004XXAM

B B

Audio Jack BOARD HDD BOARD (P655xᶵᶲẞ) FP


5VS
J_SATA2 3.3VS
2 1
4 2 1 3 J_FP1
4 3 30mil 30mil
EMC12 D01A 6
8 6 5
5
7
SATA_TXP3 34 1
L35 .FCM1005KF-121T03
0.1u_16V_Y5V_04 J_AUDIO1 10 8 7 9 NC1 2
9,10,11,12,17,35 SMB_DATA_R 10 9 SATA_TXN3 34 NC2 3 USB_PN7 33
9,10,11,12,17,35 SMB_CLK_R 12 11
1 12 11 4 USB_PP7 33
14 13
2 40mil 14 13 SATA_RXN3 34
5V 16 15 FP226H-004S10M
45 SPDIFO 3 16 15
18 17 PCB Footprint = JXT_FP226H-004XXAM
45 JD_SENSEA 4 18 17 SATA_RXP3 34
EMC4 5VS 20 19 D01A
45 JD_SENSEB 5 20 19
680p_50V_X7R_04 45 MIC1_R_M 22 21
D01A 6 5V D01A 24 22 21 23
45 MIC1_L_M 7 24 23 P670RG-M_TPLED 48
26 25
8 28 26 25 27
45 SIDE_R 9 28 27
45 SIDE_L C1737 30 29 3.3VS
R336 *20mil_Short-p 10 30 29
11 *10u_6.3V_X5R_06 50185-03041-001
45 HEADPHONE-RC 12
A 45 HEADPHONE-LC 13 PCB Footprint = 50185-0304X A
R335 *20mil_Short-p
14
D01A 45 HP_JSGND 15
EMC13 1000p_50V_X7R_04
D01A 87151-15051

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P/N = 6-20-94K00-115
EMC11 0.1u_16V_Y5V_04 PCB Footprint = 87151-15-X5_L
2,13,30,41,42,43,44,49,52,54,55,58,59,60 3.3V
3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,54,59,61,63 3.3VS Title
EMC15 0.1u_16V_Y5V_04
41,45,52,54,57,58,59,60,61,62,63,64
13,17,34,45,46,47,49,50,54
5V
5VS
[51] CONNECTOR
5,30,32,35,38,40,44,48,50,53,54,55,56,57,58 VDD3 Size Document Number Rev
AUDG
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 51 of 79


5 4 3 2 1

B - 52 Connector
Schematic Diagrams

DDR 1.2V / 0.6VS


5 4 3 2 1

EMI D03
DDR4: 1.2V/0.6VS 5V A
PD7
C
PQ27
MDU1516 EMC17 PC240 PC252
VIN

D
DDR4㗪炻UP6163 ULTRASO-8

1000p_50V_X7R_04
PU7
ᶵ⎗ⷞ6-02-05616-CQ0䔞2ND

15u_25V_6.3*4.4
0.1u_50V_Y5V_06
UP6163 RB0540S2 G D02 +
VDDQ_R

S
VTT_MEM(0.6V) PC225
23
VLDOIN VBST
22
PC86 0.1u_10V_X7R_04 1.2V
DEFAULT SHORT
D 2 1
2A 10u_6.3V_X5R_06
24 21
EMR2 D02 VDDQ_R
13A D
VTT_MEM VTT DRVH DEFAULT SHORT
PL12
PJ18 2mm 0_06 BCIHP0730-1R0M PJ26
1 20 1 2 1 2
PC84 VTTGND LL VDDQ
PC82 PC83
PR71 EMR3 8mm
22u_6.3V_X5R_08 *10u_6.3V_X5R_06 *10u_6.3V_X5R_06 0_06 2 19
VTTSNS DRVL PQ25 EMC14 PC232

C
0_06 +

PD18 CSOD140SH
MDU1512
3 18 ULTRASO-8 2200p_50V_X7R_04

D
GND PGND

330uF_2.5V_12m_6.6*6.6*4.2
VDDQ_R PR73 0_06 17 PR75 0_06
CS_GND D02
PR72 *0_04 4 16 PR77 6.49K_1%_04 D01A 5V G D03
5V EMR5

A
MODE CS

S
PR74 *0_04 15 2.2_06 EMI
PC88 0.1u_10V_X7R_04 5 PVCC5 14 PR79 2.2_04

B.Schematic Diagrams
VTTREF VCC5

5V PR76 0_06 6 13 PC89 PC91


COMP PGOOD 3.3V

1u_10V_Y5V_06

1u_10V_Y5V_06
EE
PR78
PR70 *22_04 8 11 PR80
VTT_MEM VDDQSNS S5
*1000p_50V_X7R_04
PC90

D01A

Sheet 52 of 79
PR315 0_06
D

D01A 9 10
VDDQSET S3 47K_04
*10_04

PQ5
D01A
*1000p_50V_X7R_04

VTTEN_R G D02

GND
VDDQSET

DDR 1.2V / 0.6VS

NC

NC
*2SK3018S3
VDDQ_PW RGD 55
S

PC92

C C

12

25
PR87
PR83 6.04K_1%_04 D02
5V
*10K_1%_04
PR90 10K_1%_06
PC96 *100p_50V_NPO_04

EE PR318 10K_04 VTTEN PR317 68K_1%_04 D03


5V 5V
D

D
PC284 D01A D01A

D
PQ36 PQ34 PQ35 PC283
PR320 *0_04 VTTEN_R G *0.1u_16V_Y5V_04 PR319 100K_04 G 2SK3018S3 D03
15,17,54 SUSB 0.1u_10V_X7R_04
2SK3018S3 G

D
S

S
1
PR321 10K_04 *2SK3018S3
5V

S
1

PQ37 PJ20
G
C

PJ25 *CV-40mil
35,48,55,57 SUSC#
*CV-40mil 2SK3018S3
PR322 1K_04 B PQ38

2
S
5 DDR_VTT_PG_CTRL
2

2N3904
D01A
E

C1734
41,51,54 DD_ON#
0.01u_16V_X7R_04
B ON B

DEL

D02

D01A

DEL

A A

9,10,11,12,57 2.5V
41,45,51,54,57,58,59,60,61,62,63,64 5V ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
13,45,48,53,54,55,56,57,58,61,62,63,64 VIN Title
4,7,9,10,11,12,35,57
2,13,30,41,42,43,44,49,51,54,55,58,59,60
VDDQ
3.3V
[52] DDR 1.2V/0.6VS
9,10,11,12 VTT_MEM Size Document Number Rev
5,30,32,35,38,40,44,48,50,51,53,54,55,56,57,58 VDD3
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 52 of 79


5 4 3 2 1

DDR 1.2V / 0.6VS B - 53


Schematic Diagrams

VDD3, VDD5
5 4 3 2 1

D D
VREF

PR219 *0_04 PR220 0_04


PC93

1u_10V_Y5V_06

PR85 PR94
EN_3V EN_5V
B.Schematic Diagrams

PC220 D01A D01A


130K_1%_04 130K_1%_04 PC235
1000p_50V_X7R_04 1000p_50V_X7R_04 VIN

1
PU17
VREG3

EN2

TONSEL
VFB2

VFB1

EN1
VREF
VIN PC251
PC250
PC246 PC111 PC110 PC103 7 24 EE

*15u_25V_6.3*4.4
VO2 VO1 PC239

15u_25V_6.3*4.4
Sheet 53 of 79
+ VDD3_5_POK 55 + +

0.1u_50V_Y5V_06
PC219

*4.7u_25V_X5R_08

*4.7u_25V_X5R_08
8 23 PR323 10K_04 0.1u_50V_Y5V_06

15u_25V_6.3*4.4
SYS5V
VDD3 1u_10V_X7R_06 LDO3 POK

10 A
VDD5
VDD3, VDD5 9
BOOT2 BOOT1
22 PC231 0.1u_10V_X7R_04

5
5
5
5

5
5
5
5
PC221
C 10A PQ23 0.1u_10V_X7R_04 UP6182B PQ26 C
MDV1526URH 4 10 21 4 MDV1526URH D02
VDD3 SYS3V PL11 UGATE2 UGATE1 PL15 SYS5V VDD5

3
2
1

1
2
3
PJ38 BCIHP0730-4R7M EMC10 BCIHP0730-2R2M PJ40
2 1 2 1 *1000p_50V_X7R_04 11 20 2 1 1 2
PHASE2 PHASE1
5mm PQ21 PQ28 EMC16 5mm
R1

C
5
5
5
5

5
5
5
5
PC218

for EMI
12 19

FM5822 PD19
MDV1524URH MDV1524URH *1000p_50V_X7R_04 DEFAULT SHORT

GND PAD
SKIPSEL
C
DEFAULT SHORT PC222 LGATE2 LGATE1 PC97 PR93 D02
R1

VCLK
LDO5
PD16 4 4 *1000p_50V_X7R_04 30.9K_1%_06

GND
EN0

VIN
0.1u_16V_Y5V_04

PC228 PR217

3
2
1

1
2
3
+

100p_50V_NPO_04
13K_1%_06 FM5822 for EMI

PC249
A
220u_6.3V_6.3*6.3*4.2

EMR4
EMR6

*5.1_06

13

14

25
15

16

17

18
A
*5.1_06 PC243
+
PR222
EN_ALL R2 0.1u_16V_Y5V_04
R2 PR86 D02

220u_6.3V_6.3*6.3*4.2
PR241 PR245
PR218 *680K_1%_04 19.1K_1%_06

PR233
18.7K_1%_06
VREF PR226 *0_04 0_04 *0_04

PR230 0_04
Vout=2*(1+R1/R2) VREG5

2.2_06
PR224 *0_04 Vout=2*(1+R1/R2)
=2*(1+13K/20K)
=3.3 VIN1
VREG5 =2*(1+30.1K/18.7K)
PD17
PC230
PC227 =5.219
B C A 1u_10V_X7R_06 B
VIN
4.7u_25V_X5R_08
RB751V-40(lision)

EE PR324 *0_04 EN_3V


VREG5
D01A
EN_3V5V

Qpxfs!po!WEE40WEE6 PR325 0_04 EN_5V

QXN PR326
AC_IN VDD5 ᶵᶲẞ
6
10K_04 D
PQ39A
DD_ON_EN_VDD 2 G
PQ39B 3 S MTDK5S6R
D 1
MTDK5S6R
1

PR327
5 G PJ19
42,48,54 DD_ON S *CV-40mil
100K_04
4
2
D

G
42,48,54 USB_CHARGE_EN
A PQ40 A
S

2SK3018S3
D

D01A

35,48,54,55 EC_SLP_SUS#
PQ41
G DMFWP!DP/!!ᙔϺႝတ
55 VREG5
S

*2SK3018S3 Title
5,30,32,35,38,40,44,48,50,51,54,55,56,57,58 VDD3
42,54,55 VDD5
[53] VDD3,VDD5
54 VIN1 Size Document Number Rev
13,45,48,52,54,55,56,57,58,61,62,63,64 VIN A3 P650RE 6-71-P65R0-D03 D03
Date: Friday, July 03, 2015 Sheet 53 of 79
5 4 3 2 1

B - 54 VDD3, VDD5
Schematic Diagrams

5V, 5VS, 3.3V, 3.3VS, 3.3VA


1 2 3 4 5

VIN1
U23
VIN VA VIN1 R384 10K_04 1 8 R398 100K_04 DD_ON
VA VA VIN1
D01A R392 1_1%_06 2 7 R400 *100K_04
VIN VIN DD_ON_LATCH USB_CHARGE_EN 42,48,53
C618 C631 C638
R401 10K_04 3 6 R406 10K_04 VDD3
51 M_BTN# M_BTN# PWR_SW#
0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 0.1u_50V_Y5V_06
R412 *100K_04 4 5 R411 1K_1%_04
INSTANT-ON GND PW R_SW # 48
USB_CHARGE_EN R407 1K_1%_04 P2808B0
Clost to P2808B0
VDD3
A A
C1045 U116 G5016

3.3VA 0.1u_16V_Y5V_04 1
2 IN1
IN1
IN2
IN2
6
7

VDD3 VDD3 3.3VA 3A 13


14 OUT1 OUT2
8
9
OUT1 OUT2
D01A C1044
12 10
PR92 PR136 VDD3 0.1u_16V_Y5V_04 CT1 CT2

VBIAS
R1814

GND

GND
EN1

EN2
10K_04 10K_04 100_04 C1042

B.Schematic Diagrams
220p_50V_NPO_04
DD_ON# SUSB R1815
DD_ON# 41,51,52 SUSB 15,17,52

15

11

5
100K_04
D

6
PQ7 PQ9 Q56A D
R838
G 2SK3018S3 PC99 G 2SK3018S3 PC120 2G 10K_04
42,48,53 DD_ON 13,35,40,42,46,48,55 SUSB# S 3.3VA_ON
MTDK5S6R VDD3

1
35,48,53,55 EC_SLP_SUS#
S

S
*0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04

Sheet 54 of 79

3
PR100 PR128 Q56B D C1043 C1046
1u_6.3V_X5R_04
100K_04 100K_04 3.3VA_ON 5G D01A VDD3 R1809 *10K_04 *0.1u_10V_X7R_04
MTDK5S6R S

5V, 5VS, 3.3V,

4
B

VDD5 VDD5
B
3.3VS, 3.3VA
C546 U16 G5016 C501

0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04

5V
5V 6A
2

13
IN1
IN1
IN2
IN2
7

8 6A
5VS 5VS
14 OUT1 OUT2 9
C532 OUT1 OUT2 C502
R777 12 10 R302
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
*100_04 *100_04

VBIAS
GND

GND
EN1

EN2
C523 C512
220p_50V_NPO_04 470p_50V_X7R_04 Q19
D

D
Q48 PR84 10K_04 VDD3_R 1 2 2 1 VDD3_R *2SK3018S3
VDD3

15

11

5
DD_ON# G *2SK3018S3 PJ23 *CV-40mil PJ27*CV-40mil G SUSB
DEFAULT SHORT R313 R332 DEFAULT SHORT
S

S
10K_04 10K_04
DD_ON 1 2 DD_ON_EN SUSB#_EN 2 1 SUSB#
VDD5
PJ24 1mm C539 C519 C540 PJ28 1mm
EMI EMI D01A 1u_6.3V_X5R_04
DEL *0.1u_10V_X7R_04 *0.1u_10V_X7R_04
VIN VIN VIN ON
VIN SUSB#_EN 57
C
ON C

C104 C1002 C354 VDD3 VDD3


C8
C473 U14 G5016 C455
1000p_50V_X7R_04
0.01u_50V_X7R_04

0.01u_50V_X7R_04
1000p_50V_X7R_04

0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04

6A
2 IN1
IN1
IN2
IN2
7

6A
3.3VS
3.3V 3.3V
C468
13
14 OUT1
OUT1
OUT2
OUT2
8
9
C443
3.3VS

12 10 VDD3
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04 R258
VBIAS

R298 *100_04
GND

GND
EN1

*100_04 C461 EN2 C450


220p_50V_NPO_04 330p_50V_NPO_04 R237
*100K_04
3

15

11

6
D Q16A
D

Q18
R284 G2
DD_ON# G *2SK3018S3 10K_04 S *MTDK5S6R

1
DD_ON_EN 3.3VS_ON R268 10K_04 SUSB#_EN
VDD3
S

3
D Q16B
C474 C429 C423
1u_6.3V_X5R_04 G5 3.3VS_ON
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 S *MTDK5S6R

4
D D

5,32,33,34,35,36,38,40 3.3VA
13,45,48,52,53,55,56,57,58,61,62,63,64
4,7,9,10,11,12,35,52,57
VIN
VDDQ ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
53 VIN1
56 VA
42,53,55 VDD5
5,30,32,35,38,40,44,48,50,51,53,55,56,57,58 VDD3
[54] 5V,5VS,3.3V,3.3VS,3.3VA
41,45,51,52,57,58,59,60,61,62,63,64 5V Size Document Number Rev
13,17,34,45,46,47,49,50,51
2,13,30,41,42,43,44,49,51,52,55,58,59,60
5VS
3.3V A3 P650RE 6-71-P65R0-D03 D03
3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,59,61,63 3.3VS Date: Friday, July 03, 2015 Sheet 54 of 79
1 2 3 4 5

5V, 5VS, 3.3V, 3.3VS, 3.3VA B - 55


Schematic Diagrams

Power 1.0V, VCCIO


1 2 3 4 5

EE For CV test VIN

VDD3
PR328 100K_04
PJ13
1 2
*CV-40mil
PR65 820K_1%_06
D02_BCN
VDD1.0
PC205 15u_25V_SMD-B2 PC73 PC72
1 2 VDD1.0_EN 6-11-15612-8B0 PC71
53 VDD3_5_POK 6-11-15612-8B1 +
PJ14 *1mm PU5

4.7u_25V_X5R_08

4.7u_25V_X5R_08
0.1u_50V_Y5V_06

15u_25V_SMD-B2
*TEPSLB21E156M8R
PC285
D01A DEL PR61 PC204
0_06 0.1u_10V_X7R_04
A 15 13 A
*0.01u_16V_X7R_04 EN_PSV BST
D02
1 2

2
3
4
35,48,53,54
VTT_SELECT EC_SLP_SUS#
VTT VR Output Voltages
PJ47 1mm G5602_5V 16
TON DH
12
1 PL8
V1.0A 10A VDD1.0
low 1.1 V DEFAULT SHORT
BCIHP0730-3R3M
high (V1.1S_VTT) 1.05 V D01A PR66 1 11 D02_BCN 9 2 1 1 2
VOUT LX
6-19-41001-73J
2.2_04 D01A 8 PJ11 6mm
2 10 PR204 4.99K_1%_04
VCC ILIM EMC1
D01A *1000p_50V_X7R_04

5
6
7
PC69 PC70
3 9

C
D01A
B.Schematic Diagrams

VFB VDD G5602_5V *470u_2V_SMD-V 470u_2V_SMD-V


PC74 PQ19 for EMI
PD15
MDU5693 COMMON COMMON
1u_6.3V_X5R_04 4 8 20% 20%
PGOOD DL EMR1
2V 2V
AL POLYMER AL POLYMER

CSOD140SH
PC206 *5.1_06

A
3.0A@105C 3.0A@105C

M-SOD123
6 7 0.009R 0.009R
AGND PGND 17 1u_6.3V_X5R_04 SMD_7343 SMD_7343
PGND

NC

NC
Sheet 55 of 79

14
VDD3 PR330 10K_04 G5602R41U

Power 1.0V, VCCIO B


VDD1.0_PW RGD
B

D01A
D02 3.3V
G5602_5V PR68 36K_1%_04
VREG5 DEFAULT SHORT
20mil 2 1 20mil
PC75 *15p_50V_NPO_04 3.3V
PJ44 1mm R230
VDD5 10K_04
20mil 2 1 20mil ON
PR67 VCCIO_PW RGD
PJ45 *1mm
100K_1%_04 VCCIO_PW RGD 40
R224
0.75*(1+36K/100K)=1.02 10K_04

D
Q14 C379
VCCIO G
2SK3018S3 *0.01u_16V_X7R_04

S
R203

1
B Q11

NOTE: 100K_04 2N3904 PJ16

E
1.0V_VCCST Ton need <10ms C1736 D01A *CV-40mil

2
G5016 TURN-ON TIME=1.21ms VDD1.0 VDD1.0 0.022u_16V_X7R_04
DEFAULT SHORT
C330 G5016 U27 C320
C 2 1 C
1.0V_VCCSFR
0.1u_16V_Y5V_04 6 1 0.1u_16V_Y5V_04

1.0V_VCCST
1mm

2
PJ8

1
1.0V 1A
7

8
IN2
IN2
IN1
IN1
2

13 6A
DEFAULT SHORT
1 2
VCCIO VCCIO
9 OUT2 OUT1 14
1mm PJ9 C344 OUT2 OUT1 C798 PJ12
C338 C329 VDD3
10 12 3mm
0.1u_16V_Y5V_04 CT2 CT1 0.1u_16V_Y5V_04 R172

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08
D01A VDD3

VBIAS
*100_04

GND

GND
R1857
EN2

EN1
C345 C346
*100_04 220p_50V_NPO_04 D01A R145
220p_50V_NPO_04
R1858 *100K_04
5

11

15

6
D Q7A
*100K_04
6

Q10A D D01A D03


R147 R142 G2
68K_1%_04 10K_04 S *MTDK5S6R
2G

1
SUSC# VCCIO_EN
*MTDK5S6R S35,48,52,57 SUSC#

3
D
1

C310 D03 Q7B


C306
3

Q10B D VDD3
D03 G5 VCCIO_EN
VCCIO_EN 57 S
C311 1u_6.3V_X5R_04 0.1u_10V_X7R_04 *MTDK5S6R
SUSC# 5G

4
S D03 VREG5 53
*MTDK5S6R
4

0.1u_10V_X7R_04 VDD1.0 37,38,57


VDD3 VCCIO 2,3,5,7
VDD3 5,30,32,35,38,40,44,48,50,51,53,54,56,57,58
VIN 13,45,48,52,53,54,56,57,58,61,62,63,64
0.1u_10V_X7R_04 C309 VDD5 42,53,54
D 1.0V_VCCSFR 7 D

5
DEFAULT SHORT D02 1.0V_VCCST 5,7,34,35,61,63
1 5V 41,45,51,52,54,57,58,59,60,61,62,63,64
VDD1.0_PW RGD VDDQ_PW RGD 52
1 2 1 2 4 3.3V 2,13,30,41,42,43,44,49,51,52,54,58,59,60
2
SUSB# 13,35,40,42,46,48,54
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
PJ5 *CV-40mil PJ6 1mm
U6

3
For CV test MC74VHC1G08DFT2G
Title
[55] POWER 1.0V,VCCIO
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: W ednesday, July 08, 2015 Sheet 55 of 79


1 2 3 4 5

B - 56 Power 1.0V, VCCIO


Schematic Diagrams

AC_In, Charger
1 2 3 4 5

VA

470K_04
PC126

SMART CHARGER

0.1u_50V_Y5V_06

PR141
VIN

4
A A
1 5 V_BAT
2 6
8 3 7 PR149
7 3 PQ1 8
6 2 EMB20P03V
5 1 PC271 PQ30 20K_04
PC128 EMB20P03V

4
1500p_50V_04
0.1u_50V_Y5V_06
8 1 5
7 3 2 6
EML1 6 2 PQ2 3 7
HCB2012KF-800T80 5 1 EMB20P03V 8
D01A
PQ31
PRS5 PRS6
4
J_DC_JACK1 EML2 VA EMB20P03V

B.Schematic Diagrams
HCB2012KF-800T80 VA1 D01A 6-19-41001-739
8 *0.01_1%_32 *0.01_1%_32
PL16
4

1 PD20 FMS3004-AS-H
7 3 BCIHP0730-4R7M
2 PRS3 PRS4
3 PC33 6 2 C A
3
5

PC165 PC164 PR45 5 1


0.01_1%_32 0.01_1%_32

0_04
2DC3003-002211 PR294 PC121 PC122

C
*470K_04 PD11
0.1u_50V_Y5V_06

0.1u_50V_Y5V_06

PQ17 PR190 2.2_04 PC144


0.1u_50V_Y5V_06

SK540SB
4

1
0_04
EMB20P03V 100K_04 PC34 PC261 PC263 PC262 PC269 PC140 PC141 PC142

PR200

4.7u_25V_X5R_08

4.7u_25V_X5R_08
+ +
+ PR291 PC264 PC143 15u_25V_SMD-B2
D01A PR290

*TEPSLB21E156M8R

*TEPSLB21E156M8R
PC275
4.7u_25V_X5R_08

4.7u_25V_X5R_08

4.7u_25V_X5R_08

4.7u_25V_X5R_08

4.7u_25V_X5R_08
6-11-15612-8B0

15u_25V_6.3*4.4

0.1u_50V_Y5V_06
0_04

1500p_50V_04

1000p_50V_X7R_04
15u_25V_SMD-B2 0_04 6-11-15612-8B1

Sheet 56 of 79

2
A
6-11-15612-8B0 4700p_50V_X7R_04
PR201
6-11-15612-8B1

P/N = 6-20-B3J00-003 PR191


PCB Footprint = TDC-099DHSR2-L-005-J-1 15K_1%_04

PR152 PC134
D01A
PC131 PC135
AC_In, Charger

34
14
15
16
17
18
19

24
25
26

20
21
22
23
27
33
PC278 PC277 4700p_50V_X7R_04
B 4700p_50V_X7R_04 B
Battery Voltage:

VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS

GNDP
GNDP
GNDP

LX
LX
LX
LX
LX
LX
*0_06 D01A 4700p_50V_X7R_04 4700p_50V_X7R_04 0.22u_16V_X7R_06
VA PD14

S D A
MDL914S2
C
PR153
VAC ICHP
4 ICHP 12V~16.8V
BST 13 1 ICHM J_BAT1
PQ13 10_06 BST ICHM
PR311 MTE1K0P15KN3 C A VDDP 29 11 PR123 330_04 1
G

VDDP SDA 2
300K_1%_04 PD13 MDL914S2 IACM 32 10 PR122 330_04 SMC_BAT PL4 HCB1005KF-121T20 3
IACM SCL SMD_BAT PL3 HCB1005KF-121T20 4
PU20
D

C
IACP 31 6 IAC1 5
IACP IAC 48 BAT_DET 6
PD10 PD9 PD12 PD8
PQ29 G PR120 100K_1%_04 AC AV 9 1.0DX_VCCSTG 7
ACAV 8

SS1040WG

*MMSZ5232BS

*MMSZ5232BS
PR307 MTN7002ZHS3
D02 PR279
S

SS1040WG

EMC5
30 12 50458-00801-002

A
100K_1%_04 VAC PROCHOT#
*51_04

PMON
COMP

GNDA
GNDA

EMC6
PSYS
5

FBV
PQ33 PR121 PC280 IBSET
D

30p_50V_NPO_04
MTN7002ZHS3 D02 PC265 PR280 *0_04
H_PROCHOT# 5,61,63 SMC_BAT 48

EMC7
OZ8685 D01A
100K_04

28
35

8
1000p_50V_X7R_04

30p_50V_NPO_04
G PR281 0_04 1u_25V_X5R_06
48 LOT6_CHG 48 PMOSFET_CONTROL#
S

PR292

PR298
PC281 PR286 PR133
PR130

30p_50V_NPO_04
Hi-----Battery in Charge 33_1%_04 V_BAT
Low-----Battery remove no
4.7u_25V_X5R_08
charge EC GPIO PD pin 470K_04 100K_1%_04 SMD_BAT 48

D01A

D01A
PC267 PR129

27K_1%_04
PC123 24.9K_1%_04 PR288 10_04

*0_04
TOTAL_CUR 48
4.7u_6.3V_X5R_06
0.1u_10V_X7R_04
PR135
PC127
PC270
24K_1%_04
47p_50V_NPO_04 1u_25V_X5R_06
GND_SIGNAL D01A
BAT DET(BATTERY INTERNAL) :
PR119 D01A
C
GND_SIGNAL GND_SIGNAL Option close to EC
2S / 5K / NT1912 C

*0_04 PR142 2S / 10K / NT1908


61 PSYS *28mil_short-p
3S / 2K
D01A
PR295 3S/2800mAH / 4.02K
GND_SIGNAL
VDD3 10K_1%_04 4S / 390
4S/2800mAH /7.15K
PR300

10K_04
AC/BATL# 30
D

VDD3
2SK3018S3
G PQ32
S

PR283
PQ11 PR293
47K_04
MTE1K0P15KN3 300K_1%_04
V_BAT S D
BAT_VOLT 48
AC_IN# 48
C

PD5

C
PQ8
PR146 PR301 PC274
C A B DTC114EUA

G
VA PD21
100K_04 60.4K_1%_04 0.1u_16V_Y5V_04 *RB0540S2
ZD5245BS2
E

A
D
D02A modify

AC_IN
G PQ12
VDD3
2SK3018S3

S
D D

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
5,7,57 1.0DX_VCCSTG
54 VA
[56] AC_IN,CHARGER
5,30,32,35,38,40,44,48,50,51,53,54,55,57,58 VDD3 Size Document Number Rev
13,45,48,52,53,54,55,57,58,61,62,63,64 VIN
Custom P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 56 of 79


1 2 3 4 5

AC_In, Charger B - 57
Schematic Diagrams

1.0DX_VCCSTG/VCCSFR_OC/2.5V

5 4 3 2 1

NOTE:
1.0DX_VCCSTG TURN-ON need <65us
M5938 TURN-ON TIME=60us 1.0DX_VCCSTG DEFAULT SHORT
1 2 1.0DX_VCCSTG
VCCSFR_OC DEFAULT SHORT
1 2 VCCSFR_OC
VDD1.0 VDDQ
U36 PJ35 1mm U37 PJ34 1mm

1A 9 8 1A 1A 9 8 1A
C783 C331 VIN VOUT C786 C805 C794 VIN VOUT C791
7 7

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06
VOUT VOUT
D 6 6 D
VOUT VDD3 VOUT R576
R571 VDD3
5 5
VOUT VOUT *100_04
D01A *100_04
M5938BRD1U M5938BRD1U
D01A
R1864
D03 *100K_04 R1865

6
R1916 4.7K_04 Q43A D *100K_04
55 VCCIO_EN

6
Q44A D
2G
B.Schematic Diagrams

SUSB#_EN R567 *4.7K_04 VCCSTG_EN 2 4 *MTDK5S6R S SUSB#_EN R585 0_04 VCCSFROC_EN 2 4 2G


54 SUSB#_EN 5V 5V

1
EN VBIAS EN VBIAS *MTDK5S6R S
D01A D03

1
3
R1 Q43B D
R584

3
C1733 Q44B D
R568 VCCSTG_EN 5G R1
10K_04 S *10K_04 VCCSFROC_EN
0.1u_10V_X7R_04 *MTDK5S6R 5G

4
C793 C812 *MTDK5S6R S

4
A

A
1u_6.3V_X5R_04

1u_6.3V_X5R_04
Sheet 57 of 79 D1
D26
RB0540S2
D1
D27

*RB0540S2

1.0DX_VCCSTG/

C
1 3 1 3
GATE GND GATE GND

VCCSFR_OC/2.5V C C1
C789
6-15-59381-7B0
C1
D01A
C811
6-15-59381-7B0
C
*0.01u_10V_X7R_04 *1 VOUT rising time can be speed up if adding *0.01u_16V_X7R_04 *1 VOUT rising time can be speed up if adding
R1 & D1 network between EN and GATE R1 & D1 network between EN and GATE
*2 VOUT rising time can be slow down if adding *2 VOUT rising time can be slow down if adding
C1 between GATE and GND C1 between GATE and GND

D02
PR339

VIN
0_04

PC287 PC288
PC290

0.1u_10V_X5R_04
2.5V/4A

10
4.7u_25V_X5R_08 4.7u_25V_X5R_08 PU64
PL17 2.5V
PJ48

BST
1 8 BCIHP0730-1R5M
VIN LX
LX
9 1 2 6A 1 2
15 6mm
LX 16 PC295
LX PC286 PC296 PC294
PJ50 D02 7
+ D03
VOUT 220u_6.3V_6.3*6.3*4.2 22u_6.3V_X5R_06 22u_6.3V_X5R_06 0.1u_10V_X5R_04
1 2 13
35,48,52,55 SUSC# EN D03
OPEN_4mil PR335
B
NB671GQ-Z PC291
PC293 㨇㥳旸檀炻㓡0402 B

C
3
LP# *0.1u_10V_X5R_04
PJ49 *CV-40mil 0.1u_10V_X5R_04 PD22 *10K_04
VDD3 PR340 100K_04 1 2 CSOD140SH
12 PR62
FB
For CV test 31.6K_1%_04

A
PC289 PR338 PR336
*10K_04
0.1u_10V_X5R_04
11 2 *10K_04
VCC PGND
4 14 PR337
PG AGND PR334
10K_1%_04
PR333 *15mil_short_06
10K_04

PC292 NB671_SIGNAL1_GND
1u_25V_X5R_06
NB671_SIGNAL1_GND
月役PIN11

A NB671_SIGNAL1_GND A

13,45,48,52,53,54,55,56,58,61,62,63,64 VIN
9,10,11,12,52

4,7,9,10,11,12,35,52 VDDQ
2.5V
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
7 VCCSFR_OC Title
41,45,51,52,54,58,59,60,61,62,63,64 5V [57]1.0DX_VCCSTG/VCCSFR_OC/2.5V
5,7,56 1.0DX_VCCSTG
37,38,55 VDD1.0 Size Document Number Rev
5,30,32,35,38,40,44,48,50,51,53,54,55,56,58 VDD3 A3 P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 57 of 79


5 4 3 2 1

B - 58 1.0DX_VCCSTG/VCCSFR_OC/2.5V
Schematic Diagrams

PEX_VDD, 3V3_AON, 3V3_RUN


1 2 3 4 5 6 7 8

5V
Open VREG Type 0 PEX_VDD
PC3 PC4
2.6Amps @ 1.0V
PR14 PR5
22u_6.3V_X5R_08 10_06 PU2 0.1u_10V_X7R_04 10K_1%_04
INS102335846

APW8805
GND DFN10

PR182 10K_04 0.200 COMMON PS6_BOOT_PEXVDD PR4 *160K_04 PEX_VDD

GND
3V3_RUN GND
PEXVDD_PWRGD 9 PGOOD VIN 3
60 PEXVDD_PWRGD 1.1V
OpenVReg
PR181 15K_04 PS3_1V05_EN 10 EN/FS PC5 *0.01u_16V_X7R_04 4A PL1 2.4A
A 3V3_RUN 0.400
A
BOOT/NC 8 1 2
BCIHP0412-R47M
PC15 PS6_VCC_PEXVDD 2 VCC PC150 PC1 PC10
PR175 *0_04 SW 6
PS6_SW_PEXVDD

22u_6.3V_X5R_08

22u_6.3V_X5R_08

0.1u_10V_X7R_04
0.22u_10V_X5R_04 SW 7
PC13 GND 4
1 FB GND 5
0.1u_10V_X7R_04 THERM 11
PS6_FB_RC_PEXVDD PR17 0_04 PR15 0_04
GND PC16 3300p_50V_X7R_04

GND GND
PS1_NVVDD_PGOOD 59,60
PS6_FB_PEXVDD Rt PR18 3.3K_1%_04
Vout= Vref * (1+(Rt/Rb)) GND

B.Schematic Diagrams
1.084V= 0.8 * (1+(3.3K/9.31K)) Rb PR19 9.31K_1%_04

GND
PS6_FB_RR_PEXVDD
Cold boot/Optimus: 3V3_AONĺ3V3_RUNĺNVVDDĺ PEX_VDDĺFBVDDQ PS6_FB_MARGIN_PEXVDD
PR16 *10_1%_04
GC6 2.0 Exit: 3V3_RUNĺNVVDD, PEX_VDD

PWR_SRC_NV_FB VIN
3V3_RUN
Sheet 58 of 79
PU1
0.400
10A 4
3
PRS1
1 10A
2
SMDRL1632L4-R005-FNH
0.400

PWR_SRC_VINP_R PR10 10_1%_04 PWR_SRC_VINP


12
INS102336298
QFN16
COMMON
3V3_RUN

PC9
PR12
*10K_04
PEX_VDD,
COMMON 4

3V3,_AON,
B PC2 VIN1P VS 0.01u_16V_X7R_04 B
1% 1206 GND
3V3_AON 10u_6.3V_X5R_06 SCL 6 PR6 *0_04
11 7
GC6_FB_EN 3V3_MAIN PWR_SRC_VINN_R PR2 10_1%_04 PWR_SRC_VINN
VIN1N SDA

3V3_RUN
5 I2CC_SCL
NVVDD PWR_SRC_NV
A0 I2CC_SCL 30,58
VR Complex PWR_SRC_NV_FB I2CC_SDA
3V3_MAIN_EN PEX&1.05V 0.400 PRS2 PR162 10_1%_04 VIN2P 15 VIN2P
I2CC_SDA 30,58
1 4
FBVDD/Q 10A
2 3 PWR_SRC_NV_VINP_R PC12
SMDRL1632L4-R005-FNH PWR_SRC_IMON_A0 PR11 10K_04
COMMON 10u_6.3V_X5R_06 14 VIN2N
1% 1206
Place resistors close to IC
PWR_SRC_NV_VINN_R PR161 10_1%_04 VIN2N
GND

SNN_VIN3P 2 10 PWR_SRC_VALID PR1 *0_04 PS1_NVVDD_EN


GPU_PWR_EN VIN3P PV
TC 13 SNN_TC PS1_NVVDD_EN 59,60
16 SNN_VPU
GPU_EVENT# VPU

PR13 *0_04 SNN_VIN3N 1 VIN3N


GPU GPU_RST# EC/PCH 60 PWR_SRC_NV_FB
59,60 PWR_SRC_NV
SYS_PEX_RST_MON# PLATFORM_RST# 18,28,29 PEX_VDD
8 WARN 13,45,48,52,53,54,55,56,57,61,62,63,64 VIN
3
GPU_PEX_RST_HOLD# 9 CRIT
GND
PAD 17
2,13,30,41,42,43,44,49,51,52,54,55,59,60 3.3V
3V3_RUN 41,45,51,52,54,57,59,60,61,62,63,64 5V
23,28,29,30,31,36,59 3V3_RUN
GC6 2.0 Control Signals INA3221AIRGV
3,18,30,31 3V3_AON
1.3V3_MAIN_EN PR7 10K_04 PWR_SRC_WARN* PR8 0_04 GND
5,30,32,35,38,40,44,48,50,51,53,54,55,56,57 VDD3
2.GC6_FB_EN PR3 10K_04 PWR_SRC_CRTCAL* PR9 *0_04 GPIO3_OC_WARN# 30
3.GPU_EVENT#
C C
4.GPU_PEX_RST_HOLD#
5.SYS_PEX_RST_MON#
GPU_PEX_RST#

GPU_PWR_EN EN PGOOD
POWER RAIL State in GC6
(SYSTEM) GC6 2.0 - VR Complex
3V3_AON 1. GPU_PWR_EN 3V3_AON ON
2. 3V3_MAIN_EN
3V3_AON 3. GC6_FB_EN 3V3_MAIN OFF
PEX&1.05V OFF
3.3V 3.3V
3V3_AON C700 U29 G5016 C703
3V3_RUN NVVDD OFF
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
3V3_AON IN1 IN2
2 7
IN1 IN2 3V3_RUN PGOOD EN PGOOD FBVDD/Q ON
1A 13
14 OUT1 OUT2
8
9
1A EN
OUT1 OUT2 PEX&1.05V
PC148 12 10 PC153 VDD3
VDD3 CT1 CT2 R489
3V3_MAIN_EN 3V3_MAIN I2CC_SCL
GPU 30,58 I2CC_SCL
VBIAS

R486 4.7u_6.3V_X5R_06 C706 4.7u_6.3V_X5R_06


GND

GND
EN1

EN2

C702 100_04 I2CC_SDA


30,58 I2CC_SDA
100_04 220p_50V_NPO_04 220p_50V_NPO_04 R487
R1 100K_04 EN PGOOD GPU_VSS_SENSE
18,59 GPU_VSS_SENSE
3

15

11

100K_04 D Q34A
6

D Q1A GPU_VDD_SENSE
D G2 NVVDD 18,59 GPU_VDD_SENSE
D
G2 S MTDK5S6R FBVDDQ_SENSE
31,60 FBVDDQ_SENSE
1

S MTDK5S6R DGPU_PWR_EN R2 10K_04 PR164 10K_04 3V3_MAIN_EN


3.3V
1

D Q34B FBVDDQ_SENSE_RTN
31,60 FBVDDQ_SENSE_RTN
3

D Q1B C2 C704 C705


1u_6.3V_X5R_04 G 5 3V3_MAIN_EN PS2_FBVDDQ_FB
G5 S 60 PS2_FBVDDQ_FB
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 3V3_MAIN_EN 30 MTDK5S6R
4

S MTDK5S6R

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
4

EN PGOOD

FBVDD/Q Title
51,59 DGPU_PWR_EN
GC6_FB_EN [58] PEX_VDD, 3V3_AON, 3V3_RUN
Size Document Number Rev
Custom P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 58 of 79


1 2 3 4 5 6 7 8

PEX_VDD, 3V3_AON, 3V3_RUN B - 59


Schematic Diagrams

NVVDD Phase 1 & 2


1 2 3 4 5 6 7 8

5V

PR198
2.2_1%_06 PWR_SRC_NV
PAGE 21: NVVDD PHASE 1 and 2 PS1_NVVDD_VCC PR46 100K_04 PS1_NVVDD_PVCC
Place Close to DrMOS
Optional

PC32 PC166 PC167 PC63 PC52 PC203 PC55 PC65 PC64 PC48 PC61 PC60

3900p_50V_X7R_04

0.1u_25V_X7R_06

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08
FREQ SELECTION 0.1u_10V_X7R_04 0.1u_10V_X7R_04 22u_6.3V_X5R_08

PR24 90.9K_1%_04
PWR_SRC_NV
GND
PR23 *2.2K_04 PS1_NVVDD_BST_PH1 PR196 3phase 6.8K_1%_04 GND GND
GND

PR40
(pin 24)
A PC21 *0.1u_25V_X7R_06 5V A

PR174 10K_04

2phase *0_04
PS1_NVVDD_PGOOD 3V3_RUN
D1 1
58,60 PS1_NVVDD_PGOOD
PU3 PC31 2 GND
3V3_RUN PR34 10K_04 UP1642P PR42
INS102338383 *0_04 *1u_25V_X5R_06 INS102338505
QFN24 3 G1 MLP08
COMMON
GPIO6_PSI PR35 0_04 PS1_NVVDD_PSI COMMON
30 GPIO6_PSI 6-19-41001-111

4
S1
OPENVREG 6 PL6
GND D2 NVVDD

A
PR37 4.7K_04 8 CMME104T-R22MS Optional
3V3_RUN
15
OPT1 OPT2
21 PD4 7 PS1_NVVDD_DRVR1_PH 1 2
EMI
VCC PVCC 0.500
ISEN1
*RB0540S2
DGPU_PWR_EN C A

PR39
PC30 PU11

C
PD2 5 G2 CSD87350Q5D PC179 PC53 PC56 PC51 PC50 PC190 PC41 PC168

0.1u_10V_X7R_04

*4.7u_25V_X5R_08
*RB751S-40C2 EMI 470p_50V_X7R_04 470u_2V_SMD-V 470u_2V_SMD-V 470u_2V_SMD-V *220u_2V_SMD-V
PS1_NVVDD_DRVR1_UGATE

0.1u_25V_X7R_06

1000p_50V_X7R_04
HGATE1 2 0.300
S2 9
COMMON COMMON COMMON COMMON
PR193 0_06 20% 20% 20% 20%
C A 0.300 2V 2V 2V 2V
58,60 PS1_NVVDD_EN 9 PS1_NVVDD_BOOT_PH1 PS1_NVVDD_BOOT_PH1_R
FS BOOT1 1 0.300 0.300 PC36 0.1u_10V_X7R_04 AL POLYMER AL POLYMER AL POLYMER AL-Polymer
PS1_NVVDD_DRVR1_SNUB

200K_04
3.0A@105C 3.0A@105C 3.0A@105C
PD1 PR44 0_06
RB751S-40C2 PHASE1 24
PS1_NVVDD_BST_PH1 1
0.009R 0.009R 0.009R 0.006ohm
B.Schematic Diagrams

0.300 D1 SMD_7343 SMD_7343 SMD_7343 SMD_7343


2
LGATE1 23 0.300 PS1_NVVDD_DRVR1_LGATE PR202
PR192 0_06 INS102337682 1_1%_06
PR48 *10K_04 3 G1 MLP08
COMMON
GND GND GND

4
S1
GND
16 PGOOD D2 6 GND
GND 8 PWR_SRC_NV
PS1_NVVDD_EN_R 3 7
EN

4 17
EMI 0.300 PS1_NVVDD_DRVR2_UGATE PU12
PSI HGATE2
PR197 0_06 5 G2 CSD87350Q5D

Sheet 59 of 79
Vout: 0.6V~1.2V GPIO0_NVVDD_PWM_VID 5 VID PC35 PC54 PC46 PC201 PC172 PC170
30 GPIO0_NVVDD_PWM_VID PS1_NVVDD_BOOT_PH2 PS1_NVVDD_BOOT_PH2_R

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

2.2u_25V_X5R_08

2.2u_25V_X5R_08
18 0.300 9
Vboot: 0.875V BOOT2 0.300 PR43 0_06 S2
B PS1_NVVDD_VREF PS1_NVVDD_BST_PH2 B
PC22 1u_10V_X7R_06 8 19 0.1u_10V_X7R_04

GND
PHASE2 0.300
VREF
PS1_NVVDD_DRVR2_LGATE

NVVDD Phase 1 & 2


PC23 LGATE2 20 0.300
*1u_10V_X7R_06 R2 PR25 GND
GPU_VSS_SENSE 39.2K_1%_04 PR195 *10K_04
PS1_NVVDD_REFIN 7 REFIN
Optional
R4 R3 PR31 39.2K_1%_04 6 REFADJ GND
PS1_NVVDD_REFIN_R45 PR27 PS1_NVVDD_REFADJ_R R1 GND
30.1K_1%_04 PR26 1.5K_1%_04 PS1_NVVDD_REFADJ 10 1
GNDSNS D1
PC28 2 PWR_SRC_NV
R5 VSNS 11
PR28 1500p_50V_04 INS102337478 Place Close to DrMOS
Optional
1.4K_1%_04 3 G1 MLP08
COMMON
PC43 PC49 PC175 PC173 PC176 PC178

3900p_50V_X7R_04

0.1u_25V_X7R_06

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

2.2u_25V_X5R_08

2.2u_25V_X5R_08
COMP 12

4
PR36 *0_04 S1
PS1_NVVDD_GND_SENSE_REFADJ 3V3_RUN
PR20 *0_04 D2 6
OPT1 OPT2 8
PS1_NVVDD_BST_PH2 PR38 3phase 6.8K_1%_04 PS1_NVVDD_DRVR2_PH_R 14 7
TALERT ISEN2 5V
PR21
0_04 PR52 *220_04
30 GPIO9_THERM_ALERT#
PU9
5 G2 CSD87350Q5D
PS1_NVVDD2_ISEN3
13 TSNS ISEN3 6-19-41001-111
S2 9 NVVDD
PC159 PL5
PS1_NVVDD_GATE3_R 22 PR41
GND PR33 GND PWM3 GND CMME104T-R22MS EMI
*0_04 PS1_NVVDD_DRVR2_PH

*0.1u_25V_X7R_06
3phase PRT3 PR188 D1 1 0.500 1 2 1V 0.4 110A

3phase: *100K_04
2phase: 0_04
PR194 *100K_04
6.8K_1%_04 25 THERM/GND PC37 2
*150K_NTC_04 *2.2K_04 *1u_25V_X5R_06
PS1_NVVDD_BST_PH3 PR32 3phase 0_04 PR47 INS102338615
60 PS1_NVVDD_BST_PH3

A
0_04 3 G1 MLP08
COMMON
PC169 PC42 PC47 PC57 PC58 PC59
PS1_NVVDD_VREF

*4.7u_25V_X5R_08
PR186 *0_04 3phase PD3 470p_50V_X7R_04 470u_2V_SMD-V *220u_2V_SMD-V

4
S1

0.1u_25V_X7R_06

1000p_50V_X7R_04
GND GND GND *RB0540S2 COMMON COMMON
PS1_NVVDD_GATE3 GND D2 6 20% 20%
60 PS1_NVVDD_GATE3 8 0.300 2V 2V

C
7 PS1_NVVDD_DRVR2_SNUB AL POLYMER AL POLYMER
3.0A@105C 3.0A@105C
C GND 0.009R 0.009R C
GND SMD_7343 SMD_7343
PU10 PR199
5 G2 CSD87350Q5D 1_1%_06

S2 9
GND GND GND

GND

GC6 2.0 ENTRY /EXIT Timing GND

PR51
Opamp Compensation 100_04
PS1_NVVDD_FB
GND
PC26
FB_CKE Normal Self-Refresh Self-Refresh Normal PS1_NVVDD_CP *22p_50V_NPO_04

PC25
PC20 PR30 PS1_NVVDD_FB_RC *1000p_50V_X7R_04
PS1_NVVDD_CP_RC GPU_VSS_SENSE 18,58
Active X X Detect Train PR22 *4700p_50V_X7R_04 *40.2_1%_04 PC18
PEX_LINK 15.8K_1%_04 1000p_50V_X7R_04
GPU_VDD_SENSE 18,58
PR29 1K_1%_04

PC27 PC19
GPU_PEX_RST# *0.01u_50V_X7R_04 4700p_50V_X7R_04 PR50
100_04
NVVDD
OC6_FB_EN
GND GND D02
PR341 *0_04
T1 GM Amp Compensation
0.04ms<T1<4ms
3V3_MAIN_EN 3.3V 3.3VS

D D

PR172 PR166
ALL RAIL PGOOD 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,61,63 3.3VS
2,13,30,41,42,43,44,49,51,52,54,55,58,60 3.3V
1K_04 *1K_04
41,45,51,52,54,57,58,60,61,62,63,64 5V
23,28,29,30,31,36,58 3V3_RUN
T0 PR163 1K_04 DGPU_PWR_EN
DGPU_PWR_EN 51,58 58,60 PWR_SRC_NV
CPU_EVENT#

D
T0<0.001ms 27,31,60 NVVDD
PQ15
PC155

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
G 2SK3018S3
36,48 DGPU_PWR_EN#
*0.1u_16V_Y5V_04 PC149

S
1000p_50V_X7R_04
GC6 2.0 ENTRY GC6 2.0 EXIT PR165 Title

100K_04
[59] NVVDD PHASE 1 AND 2
Size Document Number Rev
Custom P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 59 of 79


1 2 3 4 5 6 7 8

B - 60 NVVDD Phase 1 & 2


Schematic Diagrams

FBVDDQ
1 2 3 4 5 6 7 8

PAGE22: NVVDD PHASE 3, FBVDDQ, and MXM Mounting Holes

~6A at 15A/1.5V Output with 7V Input


PWR_SRC_NV_FB

Place Close to DrMOS


Optional EMI㒢㓦

FBVDDQ PU8
PC162 PC163 PC11 PC17 PC8 PC6 PC158
+
PC7
+
PC14 PC297
D02

INS102340263
A A
5V

3900p_50V_X7R_04

0.1u_25V_X7R_06

2.2u_25V_X5R_08

2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*15u_25V_SMD-B2

*15u_25V_SMD-B2

100p_50V_NPO_04
TPS51211
DFN10
COMMON LFPAK D 5
3.3V PQ16
PC161 7 V5IN INS102340183
PR187 9 PS2_FBVDDQ_HG 4G LFPAK
DRVH 0.400
COMMON
1u_10V_X7R_06 S 1 MAX_VOLTAGE = 30V
CONTINUOUS_CURRENT = 13A
*10K_04 2 R_DS_ON = 10.8mohm@10V / [email protected] / [email protected]

PR167 10 PS2_FBVDDQ_BOOT PR189 0_04 PS2_FBVDDQ_BOOT1_RC 3 MAX_WATTAGE


MAX_CURRENT = 85A
VBST = 3W

*10K_04 D01A 0.400 0.400


V_BE_GS = 20V
CSD17507Q5A
58 PEXVDD_PWRGD PR180 0_04 3.3V GND FBVDDQ
U31 1 PGOOD GND EMI㒢㓦
18,36 DGPU_PWRGD D02
PR173 *0_04 1 5 PC160
58,59 PS1_NVVDD_PGOOD
30,36 GC6_FB_EN
2 A
B
Vcc PR168
0_04
0.1u_16V_X7R_04
PS2_FBVDDQ_PH PL2 BCIH1040-0R56M 24A 0.400 1.35V 1.35V 20A
3 4 PS2_FBVDDQ_EN_R PS2_FBVDDQ_EN 3 PC45 PC29
EN
GND Y PC154 PC156 PC298 PC303 PC299 PC300 PC301 PC302
470u_2V_SMD-V 470u_2V_SMD-V
74AHC1G32GW PR185 *470K_04 SW 8 0.400 LFPAK D 5 PC38 COMMON COMMON

10u_6.3V_X5R_06

10u_6.3V_X5R_06

100p_50V_NPO_04

100p_50V_NPO_04

100p_50V_NPO_04

100p_50V_NPO_04

100p_50V_NPO_04

100p_50V_NPO_04
PQ18 20% 20%
PC157
PR157 INS102339949 1000p_50V_X7R_04 2V 2V
PS2_FBVDDQ_TST

PC24
GND 100K_1%_04 5 4G LFPAK
PR183 AL POLYMER AL POLYMER
RF/TST COMMON 3.0A@105C 3.0A@105C
S 1 MAX_VOLTAGE = 30V

6 PS2_FBVDDQ_LG 2 CONTINUOUS_CURRENT = 24A


15K_1%_04 0.022u_16V_X7R_04
0.009R 0.009R
DRVL 0.400 R_DS_ON = 4.1mohm@10V / [email protected] / [email protected] SMD_7343 SMD_7343

B.Schematic Diagrams
3 MAX_CURRENT = 155A
MAX_WATTAGE = 3.2W

FBVDDQ_VRIPPLE
PS2_FBVDDQ_TRIP TRIP PS2_FBVDDQ_RC

*1u_10V_X7R_06
2 V_BE_GS = 20V

CSD17506Q5A 0.400
GND PR49 1_08
PR184 GND
470K_04 PR169 11 4 PS2_FBVDDQ_FB
GND FB
GND 100K_1%_04 GND

PC151 PS2_FBVDDQ_CP PR171 *0_04 PS2_FBVDDQ_SENSE PR177 100_04

*15p_50V_NPO_04

Sheet 60 of 79
58 PS2_FBVDDQ_FB
GND Rtop
PR170 PC152
B 22.6K_1%_04 330p_50V_X7R_04 FBVDDQ B

PR176 0_04 FBVDDQ_SENSE_R


PR178

PR179
*100_04

0_04 FBVDDQ_SENSE
FBVDDQ_SENSE 31,58
FBVDDQ
Rbot2
PR160 Rbot1
*113K_1%_04
PR159
24.3K_1%_04

PS2_FBVDDQ_FB_R Vout = Vref * (1 + Rtop / Rbot)


1G1D1S 3
D
PQ14 *BSS138 1.5V = 0.704V * (1 + 22.6k/(24.3K/113k))
INS102340359
GPIO24_DVS 1G SOT23_1G1D1S
30 GPIO24_DVS DNI 1.35V = 0.704V * (1 + 22.6k/24.3K)
S 2 FBVDDQ_SENSE_RTN
FBVDDQ_SENSE_RTN 31,58

PR158
0_04

GND

C PWR_SRC_NV C

D02 EMI㒢㓦

PC44 PC62 PC194 PC192 PC186 PC188 PC183 PC185 PC182 PC180 PC304 PC305 PC306

NVVDD PHASE 3 D1 1

3900p_50V_X7R_04

0.1u_25V_X7R_06

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

2.2u_25V_X5R_08

2.2u_25V_X5R_08

*2.2u_25V_X5R_08

*2.2u_25V_X5R_08

100p_50V_NPO_04

100p_50V_NPO_04

100p_50V_NPO_04
5V 2

INS102340809
3 G1 MLP08
COMMON
4

PR55 PC68 S1
D2 6
*0_04 *1u_10V_X7R_06 8
7
A

PS1_NVVDD_EN PR58 0_04 3phase GND


58,59 PS1_NVVDD_EN
PD6 GND PU13
*RB0540S2 5 G2 CSD87350Q5D
PS1_NVVDD_GATE3 3phase PC187 PC171 PC184 PC181 PC177 PC174
59 PS1_NVVDD_GATE3 9 + + + + + +
PU4 S2
C

*15u_25V_SMD-B2

*15u_25V_SMD-B2

*15u_25V_SMD-B2

*15u_25V_SMD-B2

*15u_25V_SMD-B2

*15u_25V_SMD-B2
5V INS102340551
DFN8
COMMON 0.300 0.300
2 IN DRVH 8 PR54 ŖŏŏłŎņŅŠijijŠœŠŊĶĶĹŠIJ
3_1%_06 PS1_NVVDD_UG_PH3_R GND
PR57 *300K_04 3phase
7 PS1_NVVDD_BST_PH3
SWN
0.300
D1 1
PS1_NVVDD_PH3_OD 3 OD*/NC BST 1 PR56 0.300 PS1_NVVDD_BOOT_RC_PH3 PC66 2 Optional
PR59 *10K_04 1.5_04
0.300 3phase 0.1u_10V_X7R_04 INS102340709
PS1_NVVDD_BOOT_PH3 3phase 3 G1 MLP08
PL7 NVVDD
COMMON GND
0.500 CMME104T-R22MS EMI
PS1_NVVDD_VCC_PH3 D02
4

3phase 4 S1 PS1_NVVDD_DRVR3_PH 1 2 PWR_SRC_NV


VCC 59 PS1_NVVDD_BST_PH3
PR60 0_04 D2 6
8 6-19-41001-111
PC67 7 3phase
58 PWR_SRC_NV_FB
D 1u_10V_X7R_06 PC191 3phase PC40 PC189 PC39 PC195 PC197 PC200 PC198 D
PC307 PC308 58,59 PWR_SRC_NV
3phase PU14 1500p_50V_04 13,45,48,52,53,54,55,56,57,58,61,62,63,64 VIN
*4.7u_25V_X5R_08

0.1u_25V_X7R_06

1000p_50V_X7R_04

2.2u_25V_X5R_08
3phase

2.2u_25V_X5R_08
3phase

2.2u_25V_X5R_08
3phase

2.2u_25V_X5R_08
3phase
6 PGND CSD87350Q5D

100p_50V_NPO_04

100p_50V_NPO_04
0.300 0.300
PS1_NVVDD_LG_PH3 PS1_NVVDD_LG_PH3_R 5 G2 PS1_NVVDD_SNUB_PH3 2,13,30,41,42,43,44,49,51,52,54,55,58,59 3.3V
3phase

3phase
9 TP DRVL 5 PR53 0_06 3phase
0.300 41,45,51,52,54,57,58,59,61,62,63,64 5V
3phase 19,20,21,22,23,24,25,26,27,31 FBVDDQ
TPS53603A 3phase S2 9
27,31,59 NVVDD
PR203
GND 0_06
3phase

GND GND GND


Optional ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
GND Title
GND [60] FBVDDQ
GND EMI㒢㓦
Size Document Number Rev
Custom P650RE 6-71-P65R0-D03 D03

Date: Monday, July 06, 2015 Sheet 60 of 79


1 2 3 4 5 6 7 8

FBVDDQ B - 61
Schematic Diagrams

VCC_Core & VCCSA

8 7 6 5 4 3 2 1

VCORE_PROG

EE 3.3VS
,QWHO6.</$.(,09332:(5&.73+$6( 2+1
CONFIGURATION
3.3VS 5V VIN 1.0V_VCCST
PR263
PR272
13K_1%_04
PR108 1K_1%_04
PR116
D01A
PR262 PR110
2.2_06 PR268 PR270 PR269 PC259
100K_04 *1K_1%_04
D 100K_04 1u_6.3V_X5R_04 D
PC255
PC113

1
0.01u_50V_X7R_04
*CV-40mil
PC117 PC108 PU18
100_04 45.3_1%_04 *45.3_1%_04 PUT CLOSE
4.7u_6.3V_X5R_06 TO PWM VCORE_VBOOT/ADDR
PJ30
*0.1u_16V_X7R_04 *0.1u_16V_X7R_04
NCP81203PMNTXG 6-02-81203-CQ0
DEFAULT SHORT 6X6 52PIN QFN PR259 DEFAULT SHORT

9
2
PJ29 1mm PR261

1
3 10_04

VCC

VRMP
SDIO H_CPU_SVIDDAT 5,63 *CV-40mil
1 2 2 5 49.9_1%_04 PJ22
5,13,40,48,63 ALL_SYS_PW RGD EN SCLK H_CPU_SVIDCLK 5,63
4 0_04 PJ21
ALERT# H_CPU_SVIDALRT# 5,63 1mm
PR260

2
PR112 0_04 6 35
40 VCORE_PG VRDY DRVON DRVON1 62
34
PWM1 PW M11 62
50 38 CSN11 VCORE VBOOT
B.Schematic Diagrams

DIFF CSN1 CSN11 62


2200p_50V_X7R_04 39 PR235 *100K_1%_04
PR103 PC112 D02 PR252 PC245 48 CSP1 SET AT 0V, PR82 PR81
COMP PR234 SVID
47.5_1%_04 3.01K_1%_04 CSP11 PC229
470p_50V_X7R_04 62 CSP11 15K_1%_04 21.5K_1%_04
5.1K_1%_04 0.033u_16V_X7R_04 ADDRESS=00h
PR105 1K_1%_04 PC247 33
VCORE PWM2 PW M21 62
47p_50V_NPO_04 49 40 CSN21
FB CSN2 CSN21 62
41 PR89
CSP2 *100K_1%_04
PR244
PR107 CSP21 PC233
62 CSP21

Sheet 61 of 79 PR255
0_04
100_04

51
PWM3
CSN3
32
42
43 PR247 2K_1%_04
5.1K_1%_04
5V
0.033u_16V_X7R_04 VCORE_IMAX

6 VCC_VCORE_SENSE VSP CSP3

VCC_Core &
PC114
PR111 PR257
C 0_04 1K_1%_04 52 VCORE C
6 VSS_VCORE_SENSE VSN
PWM2A
31 IMAX SET PR97
1000p_50V_X7R_04 PC109 24 AT 68A
VCCSA PR113
100_04
4700p_50V_X7R_04
CSN2A
CSP2A
23 PR246 2K_1%_04
53.6K_1%_04

D01A
1
IOUT 45 PR236 102K_1%_06 CSP11
CSSUM PR102 PR99
VCORE PORTION
PC107 47 36K_1%_04 150K_1%_04 PR240 102K_1%_06 CSP21 VCCSA_VBOOTA/ADDRA
PR104 CSCOMP
26.1K_1%_04 VCORE_PROG 10 1 2 PC238
470p_50V_X7R_04 VCORE_VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR 46 PR250
D01A PRT6 D01A
*220p_50V_NPO_04
VCORE_IMAX 36 VBOOT/ADDR ILIM 16.2K_1%_04 100k_1%_04_NTC PC102
ICCMAX 1000p_50V_X7R_04 VCCSA VBOOT
CSREF
44 PR232 10_04 CSN11 SET AT 1.05V,
D02 SVID PR95
16 PR88 10_04 CSN21
PR254 PR251 PC242 DIFFA ADDRESS=02h
PC248 52.3K_1%_04
47.5_1%_04 3.01K_1%_04 18
COMPA PC104
470p_50V_X7R_04 2200p_50V_X7R_04
VCCSA
PR253 1K_1%_04 PC244 1000p_50V_X7R_04
47p_50V_NPO_04 17
FBA
PR106
30
100_04 PWM1A PW M1A 62
26 CSN1A
B CSN1A CSN1A 62 PW M1A B
25 PR242 *100K_1%_04
CSP1A
D01A PR243
PR109 0_04 15 CSP1A PC236
7 VCCSA_SENSE VSPA 62 CSP1A
PC253 5.1K_1%_04 0.022u_16V_X7R_04
PR265
D01A VCCSA
7 VSS_SA_SENSE
PR266 0_04 1K_1%_04 14
VSNA CSSUMA
21 PR91 82K_1%_06 CSP1A IMAX SET PR96
36K_1%_04 PR248 AT 11A
1000p_50V_X7R_04 PC257 19 PR101
CSCOMPA 8.66K_1%_04
PR276
150K_1%_04
100_04 4700p_50V_X7R_04 1
PRT5 2

100k_1%_04_NTCPC237 *100p_50V_NPO_04
PR249
20
13 ILIMA PC101 820p_50V_X7R_04
IOUTA 12.7K_1%_04
22 PR98 10_04 CSN1A
PR114 CSREFA
1.0V_VCCST PC260
470p_50V_X7R_04
26.1K_1%_04 PC105
VCCSA_VBOOTA/ADDRA 27
PR275 29 VBOOTA/ADDRA 1000p_50V_X7R_04
PSYS SA PORTION
*1K_04 PR239 10K_1%_04
56 PSYS D02_BCN 13,45,48,52,53,54,55,56,57,58,62,63,64 VIN
D02 PR264 *100_04 12
5,56,63 H_PROCHOT# VRHOT 41,45,51,52,54,57,58,59,60,62,63,64 5V
11
TSENSEA 7,62 VCCSA

ROSC

EPAD
37
TSENSE 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,63 3.3VS
5,7,34,35,55,63 1.0V_VCCST
PR273
6,62 VCORE
A PR238 A

53
4.12K_1%_04 PUT CLOSE
4.12K_1%_04 PC256
TO VCCSA

1
0.1u_16V_X7R_04 PRT1
HOT SPOT
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
1

PUT CLOSE PRT4 PC100 PR271


0.1u_16V_X7R_04 BOTTOM PAD PR274 100k_1%_04_NTC
TO VCORE

2
PR237 Work F=
HOT SPOT 100k_1%_04_NTC 20K_1%_04
CONNECT TO 9.31K_1%_04 Title
430Khz [61] VCC_CORE & VCCSA
2

9.31K_1%_04 GND Through


D02 5 VIAs
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 61 of 79


8 7 6 5 4 3 2 1

B - 62 VCC_Core & VCCSA


Schematic Diagrams

VCore & VCCSA Output Stage


8 7 6 5 4 3 2 1

DEFAULT SHORT VCCVIN


VIN D01A
5V
PJ36
2 1 VCORE & VCCSA OUTPUT STAGE

1
PC234 PC98 PC241 PC106
5mm +

1u_25V_X5R_06

4.7u_25V_X5R_08

4.7u_25V_X5R_08

*25TQC15MYFB
2
PR221 PC223
2.2_06 PR223
2.2_06
0.22u_16V_X7R_06
PU16
D NCP81151MNTBG 1 1 D
D1 D1
2 2
1 8 PR225 1_1%_06
BST HG INS118403478 INS118404489
2 PR229 10K_06 3 G1 MLP08
3 G1 MLP08 6-19-41001-043
61 PW M11 PWM SW 7 COMMON COMMON
PL13

4
3 S1 S1 CMME063T-R15MS0R907
61,62 DRVON1 EN GND 6
D2 6 D2 6 2 1
VCORE
4 5 8 8 PCB Footprint = BCIHP0735A
VCC LG
7 7 0V~1.2V/68A

*20mil_Short-p

PR227 *20mil_Short-p
PAD

PR231
2.2_1%_06
PC224
PQ6 PQ22
D01A 2.2u_6.3V_X5R_04 5 G2 CSD87350Q5D 5 G2 CSD87350Q5D

B.Schematic Diagrams
PC226
S2 9 S2 9
2200p_50V_X7R_04

PR228
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs 61 CSP11

VCCVIN
D01A
61 CSN11 Sheet 62 of 79
VCore & VCCSA

1
PC79 PC210 PC78 PC77
+

4.7u_25V_X5R_08

4.7u_25V_X5R_08
1u_25V_X5R_06
5V

*25TQC15MYFB
C C

Output Stage

2
PC217
PR216
PR215 2.2_06
2.2_06 0.22u_16V_X7R_06
PU15
D1 1
NCP81151MNTBG D1 1
2
2
1 8 PR211 1_1%_06 INS118408163
BST HG INS118411338
3 G1 MLP08 6-19-41001-043
2 PR214 10K_06 3 G1 MLP08 COMMON
61 PW M21 PWM SW 7 COMMON PL10
OS-CON

4
S1 CMME063T-R15MS0R907
4

3 S1
61,62 DRVON1 EN GND 6 D2 6 2 1
D2 6
8 PCB Footprint = BCIHP0735A
4 5 8
VCC LG 7

*20mil_Short-p

*20mil_Short-p
7

PR207
2.2_1%_06
PAD
PC80 PC87 PC81 PC85
PC216
PQ4 + + + +
D01A PQ20
5 G2 CSD87350Q5D 6-11-3371P-AB1
2.2u_6.3V_X5R_04 5 G2 CSD87350Q5D

330u_2.5V_V_B

330u_2.5V_V_B

330u_2.5V_V_B

330u_2.5V_V_B
PC209
S2 9
S2 9
2200p_50V_X7R_04

PR213

PR212
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
B B

61 CSP21

61 CSN21
VIN DEFAULT SHORT VSAVIN
PJ37
2 1
PC212 PC211
1mm
5V
4.7u_25V_X5R_08

4.7u_25V_X5R_08

PC207
PR63
PR206 2.2_06
2.2_06 0.22u_16V_X7R_06
PU6
NCP81151MNTBG
2
3
4

1 8 PR64 1_1%_06 VCCSA


BST HG 1 PL9
2 PR210 10K_06 BCIHP0730-R47M
61 PW M1A PWM SW 7
9 2 1
3 GND 6
PCB Footprint = BCIHP0735A
61,62 DRVON1 EN 8A
8 13,45,48,52,53,54,55,56,57,58,61,63,64 VIN
PR209 *20mil_Short-p

PR208 *20mil_Short-p

PC215 PC214 PC213 6,61 VCORE


PR205
2.2_1%_06

4 5
A VCC LG A
7,61 VCCSA
PAD
5
6
7

2200p_50V_X7R_04

PC76 D01A 41,45,51,52,54,57,58,59,60,61,63,64 5V


*22u_6.3V_X5R_06
22u_6.3V_X5R_06

22u_6.3V_X5R_06

PQ3
D01A 2.2u_6.3V_X5R_04 MDU5693
PC208

BOTTOM PAD ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/


CONNECT TO Title
GND Through
4 VIAs
[62] VCORE OUTPUT STAGE
61 CSP1A
Size Document Number Rev
61 CSN1A A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 62 of 79


8 7 6 5 4 3 2 1

VCore & VCCSA Output Stage B - 63


Schematic Diagrams

VCCGT
8 7 6 5 4 3 2 1

,QWHO6.</$.(,09332:(5&.73+$6(
EE 3.3VS
3.3VS 5V VIN 1.0V_VCCST

PR125
D01A PR127
PR145 1K_1%_04
D PR132 PR148 D
100K_04 *1K_1%_04 2.2_06 PR144 PR137 PR140 PC130
100K_04
1u_6.3V_X5R_04
PC266
PC125

1
*CV-40mil 0.01u_50V_X7R_04 *100_04 *45.3_1%_04 *45.3_1%_04 PUT CLOSE VCCGT_PROG
PC268 PC273 4.7u_6.3V_X5R_06
PU19 TO PWM
PJ31
DEFAULT SHORT *0.1u_16V_X7R_04 0.1u_16V_X7R_04
NCP81203PMNTXG 6-02-81203-CQ0 PR297

9
6X6 52PIN QFN 1+0

2
PJ32 1mm PR287
3 PR289 10_04 CONFIGURATION

VRMP
VCC
1 2 2 SDIO 5 H_CPU_SVIDDAT 5,61
49.9_1%_04
5,13,40,48,61 ALL_SYS_PWRGD EN SCLK H_CPU_SVIDCLK 5,61
4 0_04
ALERT# H_CPU_SVIDALRT# 5,61
PR131
PR285 0_04 6 35
40 VCCGT_PG VRDY DRVON DRVON2 64
34 19.1K_1%_04
50 PW M1 38 CSN12 PWM12 64
DIFF CSN1 CSN12 64
PR304 PC282 PR155 39 PR299 *100K_1%_04
PC147 CSP1
B.Schematic Diagrams

47.5_1%_04 4.02K_1%_04 48
COMP CSP12 PR150 PC139
2200p_50V_X7R_04 64 CSP12
470p_50V_X7R_04 5.1K_1%_04 0.033u_16V_X7R_04
PC279 33 5V
VCCGT PW M2
PR151 1K_1%_04 47p_50V_NPO_04 49 40
FB CSN2 41 PR302 2K_1%_04
CSP2 VCCGT_VBOOT/ADDR
PR313
100_04 DEFAULT SHORT
32

Sheet 63 of 79 PW M3

1
PR305 42
CSN3 *CV-40mil
0_04 51 43 PR308 2K_1%_04 PJ42
8 VCCGT_SENSE VSP CSP3
PC146 PJ41
1mm
PR314 1000p_50V_X7R_04

2
VCCGT C 8 VSSGT_SENSE
0_04

PR156
PR306
1K_1%_04
PC136
52
VSN
PW M2A
CSN2A
31
24
23 PR278 2K_1%_04
VCCGT VBOOT
SET AT 0V, PR284 PR282
C

4700p_50V_X7R_04 CSP2A
100_04 SVID
41.2K_1%_04 49.9K_1%_04
ADDRESS=00h
1 D01A
IOUT 45 PR154 68K_1%_06 CSP12
CSSUM
D01A VCORE PORTION PR312 PR310
PC276 47 36K_1%_04 150K_1%_04
PR147 CSCOMP
30.1K_1%_04 VCCGT_PROG 10 D01A 1 2 PC137 *220p_50V_NPO_04 VCCGT_IMAX
VCCGT_VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR 46 PR309
470p_50V_X7R_04 PRT7
VCCGT_IMAX 36 VBOOT/ADDR ILIM 8.06K_1%_04
100k_1%_04_NTC
ICCMAX PC145 1000p_50V_X7R_04
44 PR303 10_04 CSN12
CSREF
VCCGT
16 PC138
DIFFA IMAX SET PR138
18 1000p_50V_X7R_04 AT 55A
COMPA 15.8K_1%_04

17 5V
FBA
30
PW M1A 26
CSN1A 25 PR118 2K_1%_04
CSP1A
B B
15
VSPA

14 21
VSNA CSSUMA
19
CSCOMPA

20
13 ILIMA
IOUTA 22
1.0V_VCCST CSREFA

27
29 VBOOTA/ADDRA
PR124 PR332 20K_1%_04
PSYS SA PORTION
*1K_04

D02 PR126 *100_04 12


5,56,61 H_PROCHOT# VRHOT 11
TSENSEA

ROSC

EPAD
37
TSENSE

PR296

53
4.12K_1%_04
1

A PUT CLOSE PRT2 PC129 PR139 A


TO VCORE 0.1u_16V_X7R_04 Work F= 41,45,51,52,54,57,58,59,60,61,62,64 5V
HOT SPOT
PR143
430Khz 20K_1%_04 BOTTOM PAD 13,45,48,52,53,54,55,56,57,58,61,62,64 VIN
100k_1%_04_NTC 5,7,34,35,55,61 1.0V_VCCST
CONNECT TO
2

9.31K_1%_04 3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,40,43,44,45,46,48,49,50,51,54,59,61 3.3VS


D02 GND Through 8,64 VCCGT

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
5 VIAs

Title
[63] VCCGT
Size Document Number Rev
Custom P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 63 of 79


8 7 6 5 4 3 2 1

B - 64 VCCGT
Schematic Diagrams

VCCGT Output Stage

8 7 6 5 4 3 2 1

D D
DEFAULT SHORT VGTVIN
VIN
PJ43 D01A
2 1
PC272 PC132 PC133
5mm
5V

4.7u_25V_X5R_08
1u_25V_X5R_06

4.7u_25V_X5R_08
PR117
PC119
PR134 2.2_06
0.22u_16V_X7R_06
2.2_06 D1 1
PU63 2
NCP81151MNTBG
PR115

B.Schematic Diagrams
INS118517944
1_1%_06
1 8 3 G1 MLP08
COMMON
BST HG PL14 6-19-41001-043

4
2 PR277 S1 CMME063T-R15MS0R907
63 PW M12 PWM SW 7
10K_1%_04 D2 6 2 1
VCCGT
8 PCB Footprint = BCIHP0735A

PC95

PC118
PC94
63 DRVON2 3 GND 6 PC116 PC115
EN 7 PR267

PR258 *20mil_Short-p

PR256 *20mil_Short-p
4 5 470u_2V_SMD-V *470u_2V_SMD-V
VCC LG

Sheet 64 of 79
2.2_1%_06 COMMON COMMON
PAD PQ10 20% 20%

22u_6.3V_X5R_08

*22u_6.3V_X5R_08
22u_6.3V_X5R_08
2V 2V
PC124 5 G2 CSD87350Q5D PC258 AL POLYMER AL POLYMER
3.0A@105C 3.0A@105C
D01A 2.2u_6.3V_X5R_04 9 2200p_50V_X7R_04

VCCGT Output
0.009R 0.009R
S2
SMD_7343 SMD_7343

C BOTTOM PAD C
CONNECT TO 63 CSP12
GND Through
4 VIAs 63 CSN12 Stage

B B

13,45,48,52,53,54,55,56,57,58,61,62,63 VIN
8,63 VCCGT
A 41,45,51,52,54,57,58,59,60,61,62,63 5V A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[64] VCCGT OUTPUT STAGE
Size Document Number Rev
A3 P650RE 6-71-P65R0-D03 D03

Date: Friday, July 03, 2015 Sheet 64 of 79


8 7 6 5 4 3 2 1

VCCGT Output Stage B - 65


Schematic Diagrams

P650RE Audio Board A

5 4 3 2 1

AJ_SPDIF1
1
ASIDE_L AL5 FCM1005KF-121T03 2
A_5VS ASIDE_R AL7 FCM1005KF-121T03 3
AJ_MB1 ASIDE_SENSE 4
AC2 AC10 A_AUDG 5
1 680p_50V_X7R_04 680p_50V_X7R_04 A_5VS
ASPDIFO 2 A
3 A_AUDG
D AJD_SENSEA B DRIVE D
AJD_SENSEB 4 ASPDIFO AL1 FCM1005KF-121T03 C
5 IC
AMIC1-R TX
AMIC1-L 6 AC8 TOJ-0015STR2-2-H4-PA9T-J
7 AC7 P/N = 6-20-B2820-005
AGND 8
ASIDE_R AR10 0.1u_16V_Y5V_04 PCB Footprint = TOJ-001ST-2-H4
B.Schematic Diagrams

D02 ASIDE_L 9 220_04 180p_50V_NPO_04 VENDOR P/N = TOJ-0015STR2-2-H4-PA9T-J


AR14 *20mil_Short-p 10
AHEADPHONE-RC 11
AHEADPHONE-LC 12
AR13 *20mil_Short-p 13 AGND AGND AGND
AHP_AUDG 14
15
Sheet 65 of 79 A_AUDG
87151-15051
P/N = 6-20-94K00-115 5
AJ_MIC1

PCB Footprint = 87151-15-X5_L AMIC_SENSE 4


P650RE Audio AMIC1-R AL2 FCM1005KF-121T03 3
6
AMIC1-L 2
Board A C
AL6 FCM1005KF-121T03

AC6 AC9
1
AJ006AH-006L10P C
PCB Footprint = 2SJ-T351-018-A
100p_50V_NPO_04 100p_50V_NPO_04 P/N = 6-20-B2880-006
AJD_SENSEA AR11 20K_1%_04 AMIC_SENSE vendor P/N = 2SJ-T351-018
AR5 39.2K_1%_04 AHP_SENSE
AJD_SENSEB AR4 5.1K_1%_04 ASIDE_SENSE A_AUDG A_AUDG A_AUDG MAIN 6-20-B28K0-006
SECOND6-20-B28L0-006

AHP_SENSE
AJ_HP1
AHP_PLUG 5
A_AUDG
4
AHEADPHONE-RC AR2 0_04 AL3 FCM1005KF-121T03 3
6
AHEADPHONE-LC AR9 0_04 AL4 FCM1005KF-121T03 2
1
AC3 AC4 AJ006AH-006L10P
AR1 AR3 AR6 AR8 PCB Footprint = 2SJ-T351-018-A
100p_50V_NPO_04 100p_50V_NPO_04 *1K_04 *1K_04 P/N = 6-20-B2880-006
B ARc ARd vendor P/N = 2SJ-T351-018 B
22K_04 22K_04
MAIN 6-20-B28K0-006
A_AUDG A_AUDG SECOND6-20-B28L0-006
1AR *0_04 4AR *0_04 A_AUDG A_AUDG A_AUDG A_AUDG

2AR *0_04 5AR *0_04

AHP_AUDG ARa AR7 0_04 ARb AR12 *0_04


3AR *0_04 6AR *0_04

ARa ARb ARc, ARd A_AUDG


SV3H612 0_04 NC NC
SV3H615 NC 0_04 1K_04
AC12 0.1u_16V_Y5V_04

AC11 0.1u_16V_Y5V_04 AH2 AH1 AH4 AH3

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
A A
*H4_2D2_2 *H4_2D2_2 *H7_5D2_8 *H7_5D2_8
AC5 0.1u_16V_Y5V_04

AC1 0.1u_16V_Y5V_04 Title


[65] P650RE AUDIO BOARD_A
AGND A_AUDG Size Document Number Rev
A4 P650RE 6-71-P65R8-D02 D02
AGND AGND AGND AGND
Date: Friday, July 03, 2015 Sheet 65 of 79
5 4 3 2 1

B - 66 P650RE Audio Board A


Schematic Diagrams

P650RE Power Board


5 4 3 2 1

B3.3VS

BJ_BTN1
D B3.3VS D
1
BM_BTN# 2 NC1
3 NC2
4
FP226H-004S10M 20mil
PCB Footprint = fp226h-004xxxm_r BR1

220_1%_04
BGND

B.Schematic Diagrams
20mil

B_SW1 20mil BC1


POWER BUTTON 5
P650RE D01 1 2 *0.1u_16V_Y5V_04

3
B_SW1
TJE-532-Q-T/R
1
3
6
4

BGND
Sheet 66 of 79
4 2 BM_BTN#
P650RE Power
C C
Board
5
6

PCB Footprint = tje-53x-q

A
BD2 BC2 P650RE D01

A
BD1
BGND 0.1u_50V_Y5V_06 BD3
*V15AVLC0402 BLUE RE2*0.8 2P
VARISTOR P/N = RY-SP190DNB84-5/1X *BLUE RE2*0.8 2P
2

6-24-30003-006 P650Rx, P670Rx P/N = RY-SP190DNB84-5/1X

C
POWER SWITCH P670RG-M

C
BGND LED POWER SWITCH
LED
P2808A1, 㛔幓㚫䅺㭨, BGND BGND
P2808A1
⮵䫾 D26 mounted VARISTOR.
6-53-3050B-B41 100g
B B
3

1BR *0_04 4BR *0_04


6

2BR *0_04 5BR *0_04

3BR *0_04 6BR *0_04


BH1 BH3 BH4 BH2
*H6_3D2_3 *H6_3D2_3 *H3_2D2_2 *H3_2D2_2

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
A A
4

Title
[66] P650RE POWER BOARD
BGND BGND BGND BGND
Size Document Number Rev
A4 P650RE 6-71-P65RC-D01 D01

Date: Friday, July 03, 2015 Sheet 66 of 79


5 4 3 2 1

P650RE Power Board B - 67


Schematic Diagrams

P650RE HDD Board


5 4 3 2 1

HJ_MB1
SATA PORT1 HGND 2
4 2 1
1
3
HGND
P650RE HDD D01 6 4 3 5 HSATA_TXP1
HJ_SATA1 6 5
8 7
S1 HSMB_SDA 8 7 HSATA_TXN1
H_SATA_TXP1 10 9
S2 HSMB_SCK 10 9
H_SATA_TXN1 12 11
S3 12 11 HSATA_RXN1
14 13
S4 14 13
H_SATA_RXN1 H_5V 16 15
S5 16 15 HSATA_RXP1
H_SATA_RXP1 18 17
S6 18 17
H_5VS 20 19
S7 20 19
22 21
D H_3.3VS 22 21 HP670RG-M_TPLED D
24 23
26 24 23 25 P650RE HDD D01
P1 26 25 H_3.3VS
28 27
P2 28 27
30 29
P3 HC13 HC11 30 29
P4
50009-03041-001
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06
P/N = 6-21-C2430-215
P6
PCB Footprint = 50009-0304x
P7 H_5VS
P8 HGND HGND
NC1 P9
NC2 P10
P11
P12 HC9 HC10 HC12 + HC8
B.Schematic Diagrams

HGND P13 EEFCX0J221YR


P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 220u,6.3V,ESR=15mȍ,H=1.9mm
P15 220u_6.3V_SMD-D

For P670RG-M TP LED ᶲẞ


51824-0227A-001
P/N = 6-20-437J0-022
PCB Footprint = 50887-0220A-XXX HGND
P650RE HDD D01
HGND

Sheet 67 of 79 H5V_TPLED

HU2 HJ_LEDTP1

P650RE HDD Board C


H_5V
HC18
5
VIN VOUT
1 100 mil
HC19 HC21
6
5
4 C
2
10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04 *10u_6.3V_X5R_06 3
2
4 3 1
HGND EN# OC# 50501-0060N-001
HP670RG-M_TPLED uP7549UMA5-20
PCB Footprint = M-SOT23-5
HGND HGND

H_3.3VS

SATA re-driver HGND HR10 *0_04 HR9 0_04

HC6 HC7 HC5

0.01u_16V_X7R_04 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 HR11


4.7K_04
PIN6 PIN10 PIN16 Note:
HGND HGND HGND Close to Re-driver IC

10
16
20
Port 1

6
HU1
B 7 B

VCC33
VCC33
VCC33
VCC33
EN HC17 0.01u_16V_X7R_04 H_SATA_TXP1
HSATA_TXP1 HC4 0.01u_16V_X7R_04 1 15 HTXP1
HSATA_TXN1 HC3 0.01u_16V_X7R_04 2 AIP AOP 14 HTXN1 HC16 0.01u_16V_X7R_04 H_SATA_TXN1
AIN AON
From PCH HOST DEVICE
HSATA_RXN1 HC2 0.01u_16V_X7R_04 4 12 HRXN1 HC15 0.01u_16V_X7R_04 H_SATA_RXN1 To Conn.
HSATA_RXP1 HC1 0.01u_16V_X7R_04 5 BON BIN 11 HRXP1
BOP BIP HC14 0.01u_16V_X7R_04 H_SATA_RXP1

SMB_SCK
SMB_SDA
Note:
Close to Re-driver IC

T-PAD
REXT
DE_B
DE_A

GND
GND
H_3.3VS ASM1466_new

8
17

21
3
13

18
19
co-lay, place under SN75LVCP601 HR12 *100K_04
HR21 *100K_04 HR15 *100K_04
HSATA_TXP1 HR1 *0_04 HR8 *0_04 HTXP1 HR16 *100K_04 HR19 *100K_04 H_3.3VS
HR22 0_04 HSMB_SDA
HSATA_TXN1 HR2 *0_04 HR7 *0_04 HTXN1 HR13 *0_04 HGND
HR23 0_04 HSMB_SCK
HR20 *0_04
HSATA_RXN1 HR3 *0_04 HR5 *0_04 HRXN1
P650RE HDD D01 BCN
HR14 *0_04
HSATA_RXP1 HR4 *0_04 HR6 *0_04 HRXP1 HR18 *0_04
HR17 2K_1%_04

HGND
A HGND A

HH4 HH3 HH1


*H6_3D2_3 *H6_3D2_3 *H6_3D2_3

1HR *0_04 4HR *0_04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/


2HR *0_04 5HR *0_04 Title
[67] P650RE HDD B'd_H
3HR *0_04 6HR *0_04
Size Document Number Rev
HGND HGND HGND
A3 P650RE 6-71-P65RN-D01 D01

Date: Monday, July 06, 2015 Sheet 67 of 79


5 4 3 2 1

B - 68 P650RE HDD Board


Schematic Diagrams

P650RE LED Board


5 4 3 2 1

LJ_LED1
LLED_ACIN
12 LLED_PWR LD9 LD11
11 LLED_BAT_CHG LLED_PWR LR9 330_04 A C LLED_BAT_FULL LR13 330_04 A C
D 10 LLED_BAT_FULL D
NC1 9 LLED_NUM# Green Green
8 LLED_CAP# RY-SP260UYG24-5M RY-SP260UYG24-5M
7 LLED_SCROLL# LD10 LD12
NC2
6 L_WLAN_AIRPLANE# LLED_ACIN LR7 330_04 A C LLED_BAT_CHG LR11 330_04 A C
5 L_dGPU_LED
4 LSATA_LED# Amber Amber
3 RY-SP260USO24-5M RY-SP260USO24-5M
2 LED_GND
1 L_3.3VS AC IN/POWER ON LED BAT CHARGE/FULL LED

B.Schematic Diagrams
FP225H-012S10M LED_GND
PCB Footprint = fp225-012g LED_GND
1LR *0_04 4LR *0_04

2LR *0_04 5LR *0_04


L_3.3VS
3LR *0_04 6LR *0_04 Sheet 68 of 79
P650RE LED Board
C C

LR3 LR2
LR6 LR5 LR4 LR1
330_04 330_04
330_04 330_04 330_04 330_04
A

A
LD4 LD7 LD6 LD5 LD3 LD2

RY-SP260UYG24-5M RY-SP260UYG24-5M RY-SP260UYG24-5M RY-SP260UYG24-5M RY-SP260UYG24-5M RY-SP260UYG24-5M


dGPU LED SCROLL CAPS LOCK NUM LOCK AIRPLANE LED HDD LED
LOCK LED LED
C

C
P650RE LED D02
LR14 *0_04
LED
LLED_SCROLL# LLED_CAP# LLED_NUM# L_WLAN_AIRPLANE# LSATA_LED#
C

B B L_dGPU_LED B

LQ1
DTC114EUA
E

LED_GND

LH1 LH4 LH3 LH2


*H3_2D2_2 *H3_2D2_2 *H6_3D2_3 *H6_3D2_3

P6504-D03 to P65R4-D01: LQ1侣朊


LED_GND LED_GND LED_GND LED_GND

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
A A

Title
[68] P650RE LED BOARD
Size Document Number Rev
A4 P650RE 6-71-P65R4-D02 D02
Date: Friday, July 03, 2015 Sheet 68 of 79
5 4 3 2 1

P650RE LED Board B - 69


Schematic Diagrams

Finger Sensor Board


5 4 3 2 1

NOTE: MODE
MODE=HIGH (NC) , USB MODE
FU1 MODE=LOW , SPI MODE

1 30
D EGND MODE D
2 29 FUSB_PP FJ1
F3.3V AVDD DP
3 28 FUSB_PN F2.5V 1 2
F2.5V DVDD DN 3 4
F3.3V 4 27 F3.3V FMOSI 5 6
VDDIO UVDD FMCLK 7 8 FLED1
FLED1 5 26 FMCS FMCS 9 10 FLED2
LED1 SPI_CS FMISO 11 12 FDISCON
B.Schematic Diagrams

FMOSI 6 25 FMISO 13 14
SPI_MOSI SPI_MISO F_XIN 15 16
FMCLK 7 24 FLED2 F_XOUT 17 18
SPI_CLK LED2 F_RST_N 19 20
FDISCON 8 23 21 22 FUSB_PN
DISCON DVSS_1 F3.3V F3.3V 23 24 FUSB_PP
Sheet 69 of 79 9
UVSS AVSS_1
22
SPNZ-24S1-B-017-1-R

Finger Sensor F_XOUT 10

11
XO XI
21

20
F_XIN
FGND
P/N = 6-21-41700-212
FGND
F2.5V
Board C
F3.3V 12
DVDD_1

RVDD
AVSS

AVDD_1
19 F3.3V
C

F_RST_N 13 18
RESETN CLK_SEL NOTE: CLK_SEL
14 17 CLK_SEL=HIGH (NC) , FREQ=12MHz Crystal
DVSS EGND_2 CLK_SEL=LOW , FREQ=48MHz OSC
15 16
SGND EGND_1

ES603-WB
FGND FGND

B B

**GU1㕩怲ᶵ⎗≈㷔溆,ẍ⃵ᶲẞ⼴䞕嶗
FJ1
1 23 23 1

2 24 24 2
BOTTON VIEW TOP VIEW

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
A A

Title
[69] FINGER SENSOR BOARD
Size Document Number Rev
A4 P650RE 6-71-P650F-D01B D01B

Date: Friday, July 03, 2015 Sheet 69 of 79


5 4 3 2 1

B - 70 Finger Sensor Board


Schematic Diagrams

P650RE Click Board

5 4 3 2 1

T_TP_VCC
T3.3V
TJ_CLICK
W/O FP㗪炻⎒ᶲ㬌⋨暞ẞ TJ_TP1

TL1 1 T_TP_BTN_L 1 T_TP_CLK


NC1 2 2 T_TP_DATA
TO BOTTOM/B

.
FCM1005KF-121T03 NC2 3 T_TP_BTN_R 3 T_TP_BTN_L
4 4
FP226H-004S10M
TO T/P 5
T_TP_BTN_R

JXT_FP226H-004XXAM 8 PIN 6
7
T_TP_SMB_CLK

1
TJ_FP1 T_TP_VCC T_TP_SMB_DAT
TGND 8 TD1 TD2
1 TJ_MB FP225H-008S10M
2

*V15AVLC0402

*V15AVLC0402
D
NC1 TR5 27.4_1%_04 TUSB_PN10 fp225h-008gxxxm_r TGND D
NC2 3 TR6 27.4_1%_04 TUSB_PP10 1 T_TP_DATA TD3 TD4
4 2 6-20-94K30-108
T_TP_CLK TC9

2
3
TO M/B

*V15AVLC0402

*V15AVLC0402
FP226H-004S10M TGND TH2 TH1
PCB Footprint = fp226h-004xxxm_r 4 T_TP_SMB_DAT 0.1u_10V_X7R_04 H7_0D3_7 H7_0D3_7
5 T_TP_SMB_CLK

2
6 TGND
50501-0060N-001
TGND
88511-06R D02
TGND
It is strongly recommended that the TESD_GND has
a dedicated connection to the system chassis or TGND TGND
cable shield.

B.Schematic Diagrams
T3.3V
TU1
6 1
VP NC
TC8

0.1u_10V_X7R_04 TUSB_PP10 4
5
NC VN
2

3 TUSB_PN10
Sheet 70 of 79
CH2 CH1

TGND
CM1293A-02SO

TGND
P650RE Click
FOR ESD, 月役FFC CONNECTOR㒢㓦
C C

Board

T_XIN TJ_FPB1

TR2 1M_04 T_XOUT T2.5V 1 2


3 4
TGND TMOSI 5 6
3 4 TMCLK 7 8 TLED1
TGND TMCS 9 10 TLED2
2 1 TMISO 11 12 TDISCON
TX1 13 14 NOTE: MODE
TC4 HSX321G_12Mhz TC5 T_XIN 15 16 MODE=HIGH (NC) , USB MODE
T_XOUT 17 18 MODE=LOW , SPI MODE
15p_50V_NPO_04 15p_50V_NPO_04 T_RST_N 19 20
21 22 TUSB_PN10
T3.3V 23 24 TUSB_PP10

*CON24A
TGND TGND QPOFZ-24R2-XD-Z-LD

TGND Place Botton TGND


B B

T2.5V T3.3V

TLED1 TR3 10K_04

TC3 TC7 TC1 TC6 TLED2 TR4 10K_04

0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06

TGND NOTE: CLK_SEL


CLK_SEL=HIGH (NC) , FREQ=12MHz Crystal
CLK_SEL=LOW , FREQ=48MHz OSC
TGND TGND

T3.3V
CLOSE TO SENSOR POWER PIN
S

G TDISCON 1TR *0_04 4TR *0_04

TQ1 2TR *0_04 5TR *0_04


AO3415
D

3TR *0_04 6TR *0_04


TUSB_PP10 TR7 1.5K_04

A A

TR1 47K_04 T_RST_N


T3.3V

TC2

1u_6.3V_X5R_04
Title
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[70] P650RE CLICK BOARD
TGND Size Document Number Rev
A3
P650RE 6-71-P65R2-D02 D02

Date: Friday, July 03, 2015 Sheet 70 of 79


5 4 3 2 1

P650RE Click Board B - 71


Schematic Diagrams

P650RE USB Board 1/3


1 2 3 4 5 6 7 8

LAN (RTL8411B) Switching Regulator close to PIN48


Ra 2 IN 1 SOCKET
(>20mil)
KR80 0_06
KVDD10 㜧ᶲStandard PUSH PUSH CARD READER
La KJ_CARD1
KRSET KR71 2.49K_1%_04 KREGOUT KL4 . KVDD10
KGND (>20mil) KSD_D2/MS_CLK_R P9
KR70 *1K_04 *SW F2520CF-4R7M-M SD_DATA2
Ca Cb
KXTAL2 KGND KC66 KC64 KSD_D3/MS_D3_R P1
KR69 10K_04 *4.7u_6.3V_X5R_06 *0.1u_16V_Y5V_04 SD_DATA3

KAVDD33
KAVDD33
KR77 1M_04 KXTAL1 KSD_CMD/MS_D2_R P2

KVDD10
SD_CMD
A KGND
FOR S5 WAKE UP ON LAN KGND KGND P3 A
1 2 SD_VSS1

T85
KGND
C
KD5
A
RB751S-40C2
KPCIE_W AKE# 72 LDO Mode㗪: La,Ca,Cb ᶵᶲẞ,Raᶲẞ KVCC_CARD P4
4 3 SD_VDD
TO SB PCH WAKE#. 慷䓊䡢娵⼴暣旣,㓡SHORT暞ẞ

KSD_CD#

KLED_CR
KX1 C286-001_25MHZ KLAN_W AKEUP# KC85 KSD_CLK/MS_D0_R P5
KLAN_W AKEUP# 72

KXTAL2
KXTAL1
SD_CLK

KEECS
PCB Footprint = FSX3M
KC72 KC71 TO EC8587 PIN123 LAN_WAKEUP# 0.1u_16V_Y5V_04 P6
SD_VSS2
KLED1/GPO T87
15p_50V_NPO_04 KLED2 T86 KSD_D0/MS_D1_R P7
15p_50V_NPO_04 SD_DATA0
KGND
P65RE USB D02 P65RE USB D02 BIOS pulls high or low to GPO pin, KSD_D1_R P8

48
47
46
45
44
43
42
41
40
39
38
37
KGND KGND KU5 Pkease refer to LAN/PHY Disable SD_DATA1 GND1
Application Note. KMS_BS/SD_W P# P10 GND1 GND2

CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0

LED2
LED1/GPO
LV_CEN
HV_GIGA

LED_CR
RSET

LANWAKEB
49 SD_WP GND2 GND3
E_PAD KSD_CD# P11 GND3 GND4
B.Schematic Diagrams

KR39 1K_04 SD_C/D GND4


K3.3VS
KC59 CM2S-061-H-N
KGND 0.1u_16V_Y5V_04 KGND PCB Footprint = SD-10395-001-3 KGND
KR38 K3.3VS
KGND
15K_04
KLAN_MDIP0 1 36 KREGOUT
MDIP0 REG_OUT KREGOUT
KLAN_MDIN0 2 35 Remind that R109 using the KSD_CMD/MS_D2 KR93 0_04 KSD_CMD/MS_D2_R
MDIN0 VDDREG KD3V3 main power (S0 power).
KVDD10 3 34 KENSW REG KR23
AVDD10 ENSWREG

Sheet 71 of 79
KLAN_MDIP1 4 33 KSD_D0/MS_D1 KR94 0_04 KSD_D0/MS_D1_R
MDIP1 VDD1 KVDD10
KLAN_MDIN1 5 32 KGND *10K_04
MDIN1 VD33 KAVDD33
KLAN_MDIP2 6 31 KISOLATEB KSD_D1 KR95 0_04 KSD_D1_R
KLAN_MDIN2 7 MDIP2 ISOLATEBPIN 30 KPERSTB KR31 *0402_short
MDIN2 RTL8411B PERSTBPIN KBUF_PLT_RST# 72

P650RE USB Board B


KVDD10 KLAN_MDIP3
KLAN_MDIN3
8
9
10
11
AVDD10
MDIP3
MDIN3
QFN48
CLKREQBPIN
MS_BS/SD_WP#
DV33_18
29
28
27
26
KCLKREQB
KMS_BS/SD_W P#

KRTL8411B_HSON
KVDD33/18
KC25
KR22
LAN_CLKREQ#⤪ᶵἧ䓐⎗㕟攳,㕤PCH䪗䚜㍍PULL DOWN
0.1u_10V_X7R_04
0_04 KLAN_CLKREQ# 72
KSD_D2/MS_CLK KR96

KSD_CLK/MS_D0 KR97
0_04

0_04
KSD_D2/MS_CLK_R

KSD_CLK/MS_D0_R B

KAVDD33 HV_GIGA HSON KPCIE_RXN5_GLAN 72

1/3 K3.3VS 12
VDD3 HSOP
25 KRTL8411B_HSOP KC26 0.1u_10V_X7R_04

capacitors must be close to pin side.


KPCIE_RXP5_GLAN 72
KSD_D3/MS_D3

⼭EMI䡢娵⬴,㓡SHORT
KR98 0_04 KSD_D3/MS_D3_R
崘ℏⰌ.

SD_CMD/MS_D2
KC87 KC88 KC89 KC90 KC91 KC92

SD_CLK/MS_D0

SD_D2/MS_CLK
KC34

SD_D0/MS_D1

SD_D3/MS_D3
Close to chip

*5p_50V_NPO_04

*5p_50V_NPO_04

*5p_50V_NPO_04

*5p_50V_NPO_04

*5p_50V_NPO_04

*5p_50V_NPO_04
REFCLK_N
REFCLK_P
CARD_3V3
0.1u_16V_Y5V_04
PIN12

VDDTX
SD_D1
GIGA LAN KAVDD33

HSIN
PULL HIGH: SWR Mode

HSIP
KGND
KENSW REG KR55 *0_04
RTL8411B

13
14
15
16
17
18
19
20
21
22
23
24
KR54 0_04 KGND KGND KGND KGND KGND KGND

KSD_CMD/MS_D2
KCARD_3V3 KCLK_PCIE_GLAN# 72

KSD_CLK/MS_D0

KSD_D2/MS_CLK
PULL LOW: LDO Mode
KSD_D0/MS_D1

KSD_D3/MS_D3
KCLK_PCIE_GLAN 72
KGND

KEVDD10
KPCIE_TXN5_GLAN 72
KSD_D1

KPCIE_TXP5_GLAN 72

KCARD_3V3 KVCC_CARD
Near Cardreader CONN
KVDD10 KVDD10 KVDD10 KVDD10 KR1 0.2R 5% SMD0603 40 mil 旸檀
KVCC_CARD
KC6 KC7 KC8 KC9
KC52 KC39 KC51 KC61 KR2 SD Card Remove
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04
C 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *150_06
Fall time less than C
PIN3 PIN8 PIN32 PIN46 1 ms when SD
KGND card remove.
KGND KGND KGND KGND KGND
KGND
KVDD33/18 KVDD33/18 Near Cardreader CONN
KC31 KC33 KR100 0_04
*2.2u_6.3V_X5R_04 KR99 0_04
Pin#27 0.1u_16V_Y5V_04 4 KL5 3 KDLMX1-
Pin#27
1 2 KDLMX1+
KGND KGND KL7 *W CM2012F2S-161T03 1KR *0_04 4KR *0_04
KEVDD10 KR106 0_04 KJ_RJ1
KLAN_MDIN0 12 13 KLMX1- KR105 0_04 KDLMX1+ 1 GND1 2KR *0_04 5KR *0_04
KR13 0_06 KLAN_MDIP0 11 TD4- MX4- 14 KLMX1+ 4 KL6 3 KDLMX2- KDLMX1- 2 DA+ shield GND2
KVDD10 KLAN_MDIN1 TD4+ MX4+ DA- shield
9 16 KLMX2- KDLMX2+ 3 3KR *0_04 6KR *0_04
KC30 KC29 KLAN_MDIP1 8 TD3- MX3- 17 KLMX2+ 1 2 KDLMX2+ KDLMX2- 6 DB+
TD3+ MX3+ *W CM2012F2S-161T03 DB- KGND
VDD3 meet rising time 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 KR104 0_04
PIN20 PIN20 KLAN_MDIN2 6 19 KLMX3- KR103 0_04 KDLMX3+ 4
>1ms KLAN_MDIP2 5 TD2- MX2- 20 KLMX3+ 4 KL8 3 KDLMX3- KDLMX3- 5 DC+
KLAN_MDIN3 TD2+ MX2+ DC- 72 KVDD3
KGND KGND KAVDD33 3 22 KLMX4- KDLMX4+ 7
KLAN_MDIP3 TD1- MX1- DD+ 72,73 K3.3V
2 23 KLMX4+ 1 2 KDLMX3+ KDLMX4- 8
TD1+ MX1+ DD- 72 K3.3VS
KVDD3 KR51 *28mil short-p KR64 *28mil short-p *W CM2012F2S-161T03
10 15 KR102 0_04 P JS-08SO1B
KC36 KC49 KC62 7 TCT4 MCT4 18 KR101 0_04 P/N = 6-21-B40C0-008
4 TCT3 MCT3 21 4 KL9 3 KDLMX4- PCB Footprint = PJS-08SL3B
D 40 mil 1 TCT2 MCT2 24
D
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
TCT1 MCT1
P65RE USB D02
PIN11 PIN32 PIN48 1 2 KDLMX4+
NS892402 *W CM2012F2S-161T03 P65RE USB D02A㨇㥳ᾖ㓡2 USB Conᷳ攻䘥㺮
KGND KGND KGND KC75
KL3
*HCB1608KF-121T30
. KR74
60 mil
*28mil short-p
KD3V3
0.01u_16V_X7R_04 KNMCT_4
KNMCT_3
KR81
KR83
75_1%_04
75_1%_04
KNMCT_R ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
K3.3V
KNMCT_2 KR88 75_1%_04 KC84 Title
KC60 KC58 LDO Mode KGND KNMCT_1 KR89 75_1%_04 [71] P650RE USB BOARD_K 1/3
MA1206CG-101J-202ER
*4.7u_6.3V_X5R_06 *0.1u_16V_Y5V_04 Size Document Number Rev
PIN35 PIN35 A3 6-71-P65R3-D02A D02A
KGND
KGND KGND Date: Tuesday, July 07, 2015 Sheet 71 of 79
1 2 3 4 5 6 7 8

B - 72 P650RE USB Board 1/3


Schematic Diagrams

P650RE USB Board 2/3

5 4 3 2 1

K3.3V
USB3.0 re-driver USB3.0 PORT4 (MB⎛ᶳ)
KR68 *0_04
KR62 *4.7K_04 KUSBVCC3.0_6
KR58 *4.7K_04
KU3 100 MIL
KR53 2K_1%_04 5 1
K5V VIN VOUT
D KC45 KC46 D
KC28 2
10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04

KGND KGND 4 3
EN# OC#

6
KU6 KGND
25 uP7549UMA5-20

VCC

EN_RXD
EQ_A

DE_A

SW_A

GND
KR79 *4.7K_04 K_SDA_P4 24 GND 7 K_SCK_P4 KR37 *4.7K_04 KGND
KGND SMB_DATA SMB_SCK KGND PCB Footprint = M-SOT23-5
2A/90mohm
KTXN4 0.1u_10V_X7R_04 KC70 23 8 KC44 0.1u_10V_X7R_04 KUSB3_TXN4
TX1- RX1- KR28 *0402_short
KUSB3_TXP4 72,73 KDD_ON#
KTXP4 0.1u_10V_X7R_04 KC69 22 9 KC43 0.1u_10V_X7R_04
TX1+ RX+

B.Schematic Diagrams
21 10
To Conn. TYPE_IND# CHIP_EN# KGND From PCH KC82 22u_6.3V_X5R_08
KRXN4 0.1u_10V_X7R_04 KC68 20 11 KC42 0.1u_10V_X7R_04 KUSB3_RXN4

Reserverd
RX2- TX2- KC83 22u_6.3V_X5R_08
KUSBVCC3.0_6 KGND
SW_B
EQ_B

KUSB3_RXP4
DE_B
KRXP4 0.1u_10V_X7R_04 KC67 19 12 KC41 0.1u_10V_X7R_04
GND

VCC
RX2+ TX2+
KJ_USB3_2
CLOSE TO CONNECTOR
18

17

16

15

14

13 ASM1464 K3.3V KTXP4_J 9 GND1


Sheet 72 of 79

Standard-A
K3.3V SSTX+ SHIELD
PCB Footprint = QFN24-4X4MM ⚈⍾㴰co-lay, ⎴㬍⍾㴰暣⭡ KTXN4_J
1
8 VBUS
KUSB_PN4_J 2 SSTX-

KR56 *0_04 KR57 *4.7K_04 KC27 KC50 KC47


KUSB_PP4_J
KRXP4_J
4
3
6
D-
GND
D+
SSRX+
P650RE USB Board
KR61 *4.7K_04 7
C
KR72 *0_04
KR66 *4.7K_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 KRXN4_J 5 GND_D
SSRX- SHIELD
GND2 C
2/3
USB3.0 Max Trace length 377AH09FZT S4NVCB KGND
KGND Follow Design Guide P/N = 6-20-B4Z40-109
KGND KGND PCB Footprint = 317AH09FZTS4T4CX
KD4 KD2
⍾㴰co-lay, ⚈䃉layout䨢攻
KUSB_PN4 4 3 KUSB_PN4_CON10 1 KUSB_PN4_J KTXP4 10 1 KTXP4_J
KL1 KUSB_PP4_CON 9 2 KUSB_PP4_J KTXN4 9 2 KTXN4_J
KUSB_PP4 1 2 8 3 8 3
KGND KGND KGND KGND
*W CM2012F2S-161T03-short 7 4 KRXP4 7 4 KRXP4_J
6 5 KRXN4 6 5 KRXN4_J

PUSB3F96 PUSB3F96

LAN BOARD KH7 KH9 KH8 KH4 KH2 KH1


(⏓USB3.0x2, PHONE JACK, SIM) *H7_5D2_8 *H9_5B6_5D2_8 *H9_5B6_5D2_8 *H7_5D2_8 *H7_0B7_5D2_2 *H7_0B7_5D2_2
KJ_MB1
1 2 KUSB_PN4
K5V 1 2
3 4 KUSB_PP4
B KC4 KC5 5 3 4 6 B
KVDD3 7 5 6 8 KUSB3_TXN4
2.2u_6.3V_X5R_04 0.1u_16V_Y5V_04 9 7 8 10 KUSB3_TXP4
11 9 10 12 KUSB3_RXN4 KGND KGND KGND KGND KGND KGND
KC2 13 11 12 14 KUSB3_RXP4
KGND KGND 15 13 14 16
0.1u_16V_Y5V_04 17 15 16 18
17 18 KUSB_PN3 73
19 20
19 20 KUSB_PP3 73
21 22 KH6 KH13 KH12 KH14 KH15
23 21 22 24 *H4_2D2_2 *H4_2D2_2 *H4_2D2_2 *H4_2D2_2 *H4_2D2_2
23 24 KUSB3_TXN3 73
KGND 25 26
25 26 KUSB3_TXP3 73
27 28
27 28 KUSB3_RXN3 73
29 30
29 30 KUSB3_RXP3 73
31 32
33 31 32 34
K3.3V K3.3VS 33 34 KCLK_PCIE_GLAN# 71
KVDD3 35 36
35 36 KCLK_PCIE_GLAN 71
37 38
39 37 38 40 KGND KGND KGND KGND KGND
39 40 KPCIE_TXN5_GLAN 71
KC3 KC1 41 42
41 42 KPCIE_TXP5_GLAN 71
K3.3V 43 44
43 44 KPCIE_RXN5_GLAN 71
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 45 46
45 46 KPCIE_RXP5_GLAN 71
47 48
49 47 48 50
49 50 KDETECT_SW 73
51 52 KH3
51 52 KLAN_CLKREQ# 71
KGND KGND 53 54 *H4_2D2_2
73 KUIM_PW R 53 54 KPCIE_W AKE# 71 K5V 73
55 56
73 KUIM_DATA 55 56 KLAN_W AKEUP# 71
57 58
73 KUIM_CLK 57 58 KBUF_PLT_RST# 71 KVDD3 71
59 60
73 KUIM_RST 59 60 KDD_ON# 72,73 K3.3V 71,73
A
61 62 A
61 62 K3.3VS 71
K3.3VS 63 64 KT1
65 63 64 66 KT2
67 65 66 68
69 67 68 70 KT3 KGND
69 70
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
71 72 KT4
73 71 72 74 KT5
P65RE USB D02
75 73 74 76 KT6
77 75 76 78 Title
79 77
79
78
80
80 KT7 [72] P650RE USB BOARD 2/3
51049-08041-001 Size Document Number Rev
PCB Footprint = 51049-0804X KGND A3 P650RE 6-71-P65R3-D02A D02A
KGND P65SE USB D03 ᾖ㓡lib ⯢⮠
Date: Tuesday, July 07, 2015 Sheet 72 of 79
5 4 3 2 1

P650RE USB Board 2/3 B - 73


Schematic Diagrams

P650RE USB Board 3/3


5 4 3 2 1

USB3.0 PORT3 (MB⎛ᶲ)


USB3.0 re-driver
K3.3V KUSBVCC3.0_2

KR32 *0_04 KU8


K5V
KR33 *4.7K_04 5
VIN VOUT
1 100 mil
KR24 *4.7K_04 KC38
D 10u_6.3V_X5R_06 KC48 KC40 D
2
KR15 2K_1%_04 GND 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
KGND
KR42 *0402_short 4 3
72 KDD_ON# EN# OC#
uP7549UMA5-20
PCB Footprint = M-SOT23-5 KGND
2A/90mohm
KGND

6
KU2
25 KGND

VCC

EN_RXD
EQ_A

DE_A

SW_A

GND
KR44 *4.7K_04 K_SDA_P3 24 GND 7 K_SCK_P3 KR49 *4.7K_04 KC81 22u_6.3V_X5R_08
KGND SMB_DATA SMB_SCK KGND
B.Schematic Diagrams

KTXN3 0.1u_10V_X7R_04 KC56 23 8 KC24 0.1u_10V_X7R_04 KUSB3_TXN3 72 KC80 22u_6.3V_X5R_08 KGND


TX1- RX1- KUSBVCC3.0_2
KTXP3 0.1u_10V_X7R_04 KC55 22 9 KC23 0.1u_10V_X7R_04 KUSB3_TXP3 72
TX1+ RX+ KJ_USB3_1
21 10
To Conn. TYPE_IND# CHIP_EN# KGND From PCH KTXP3_J 9 GND1

Standard-A
SSTX+ SHIELD
KRXN3 0.1u_10V_X7R_04 KC54 20 11 KC22 0.1u_10V_X7R_04 ⚈⍾㴰co-lay, ⎴㬍⍾㴰暣⭡ 1

Reserverd
RX2- TX2- KUSB3_RXN3 72 VBUS
KTXN3_J 8
SSTX-

SW_B
EQ_B
KUSB_PN3_J

DE_B
KRXP3 0.1u_10V_X7R_04 KC53 19 12 KC21 0.1u_10V_X7R_04 2

Sheet 73 of 79

GND

VCC
RX2+ TX2+ KUSB3_RXP3 72 D-
4
KUSB_PP3_J 3 GND
KRXP3_J 6 D+

18

17

16

15

14

13
ASM1464 K3.3V 7 SSRX+

P650RE USB Board C


PCB Footprint = QFN24-4X4MM K3.3V KRXN3_J 5 GND_D
SSRX- SHIELD
GND2

C
377AH09FZT S4NVCB KGND
3/3 KR20 *0_04 KR16
KR21
*4.7K_04
*4.7K_04
KC65 KC63 KC57 KGND
P/N = 6-20-B4Z40-109
PCB Footprint = 317AH09FZTS4T4CX

KR30 *4.7K_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 USB3.0 Max Trace length


KR41 *0_04 Follow Design Guide
KD3
KGND
KGND 4 KL2 3 KUSB_PN3_CON10 1 KUSB_PN3_J
72 KUSB_PN3
KUSB_PP3_CON 9 2 KUSB_PP3_J
⍾㴰co-lay, ⚈䃉layout䨢攻 72 KUSB_PP3 1 2
*W CM2012F2S-161T03-short
KGND 8
7
3
4
KGND
6 5

PUSB3F96

KD6

KTXP3 6 5 KTXP3_J
KTXN3 7 4 KTXN3_J
KGND 8 3 KGND
KRXP3 9 2 KRXP3_J
KRXN3 10 1 KRXN3_J

PUSB3F96
B B

Layout㗪
1. SIMᷳ㇨㚱ᾉ嘇䶂≈䰿(10mil)
2. ㇨㚱ᾉ嘇䶂ᷳ攻≈GND
SIM CONN 3. SIM hold 㛔橼⚃␐≈GND⚵丆
4.SIM CONN 月役 MINI CARD CONN
KR86 *4.7K_04 5. SIMᷳ㭷ᶨᾉ嘇䶂䘬Layout嵹䶂暨⮷㕤10℔↮.

KJ_SIM1
KDETECT_SW KR82 0_04
72 KDETECT_SW
(TOP VIEW) KR84
KR85 SW1 C8 *0402_short
*0402_short C4 DETECT_SW UIM_MCMD C7 KUIM_DATA_R KUIM_DATA
KUIM_CLK KUIM_CLK_R UIM_DATA UIM_I/O KUIM_VPP KUIM_DATA 72
C3 C6
72 KUIM_CLK KUIM_RST UIM_CLK UIM_VPP
C2 C5
72 KUIM_RST UIM_RST UIM_GND
C1
GNG
GND
GND
GND

KUIM_PW R UIM_PWR KC76 KC74 KC78


72 KUIM_PW R
SIMLOCK MEGA SIM W / SW STANDARD *22p_50V_NPO_04 *22p_50V_NPO_04 *22p_50V_NPO_04
GND1
GND2
GND3
GND4

KC77

*22p_50V_NPO_04
A KGND KGND KGND A
PCB Footprint = msmps-s02-xxr
KGND P/N = 6-86-2B010-003 KGND
MSMPS-S02

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[73] P650RE USB BOARD 3/3
K5V 72 Size Document Number Rev
K3.3V 71,72
K3.3VS 71,72 A3 P650RE 6-71-P65R3-D02A D02A

Date: Tuesday, July 07, 2015 Sheet 73 of 79


5 4 3 2 1

B - 74
Schematic Diagrams

P670RE USB Board 1/3

1 2 3 4 5 6 7 8

LAN (RTL8411B) Switching Regulator close to PIN48


Ra
Crystal 㓡䓐5032 SIZE ZR44 0_06 2 IN 1 SOCKET
㜧ᶲStandard PUSH PUSH CARD READER
ZRSET ZR33 2.49K_1%_04 (>20mil) ZVDD10
meet realtek Freq tolerance 50ppm ZGND
ZR37 *1K_04 ZREGOUT ZL8 . ZVDD10
ZXTAL2 ZGND ZJ_CARD1
(>20mil)
ZR41 10K_04 *SW F2520CF-4R7M-M Ca ZC71 Cb ZC70 ZSD_D2/MS_CLK_R P9

ZAVDD33
ZAVDD33 SD_DATA2
ZR36 1M_04 ZXTAL1 La

ZVDD10
FOR S5 WAKE UP ON LAN *4.7u_6.3V_X5R_06 *0.1u_16V_Y5V_04 ZSD_D3/MS_D3_R P1
SD_DATA3
1 2 ZGND

ZT3
C A ZSD_CMD/MS_D2_R P2
ZPCIE_W AKE# 75 SD_CMD
A ZD6 RB751S-40C2 ZGND ZGND A
ZGND 4 3 TO SB PCH WAKE#.
LDO Mode㗪: La,Ca,Cb ᶵᶲẞ,Raᶲẞ P3
SD_VSS1

ZSD_CD#

ZLED_CR
ZX1 C286-001_25MHZ ZLAN_W AKEUP#
ZLAN_W AKEUP# 75

ZXTAL2
ZXTAL1
慷䓊䡢娵⼴暣旣,㓡SHORT暞ẞ

ZEECS
PCB Footprint = FSX3M P4
ZC41 ZC44 TO EC8587 PIN123 LAN_WAKEUP# ZVCC_CARD SD_VDD
ZLED1/GPO ZT4 ZC96 ZSD_CLK/MS_D0_R P5
15p_50V_NPO_04 ZLED2 ZT5 SD_CLK
15p_50V_NPO_04
0.1u_16V_Y5V_04 P6
P67RE USB D02 SD_VSS2
P67RE USB D02
48
47
46
45
44
43
42
41
40
39
38
37
ZGND ZGND ZU4 BIOS pulls high or low to GPO pin, ZSD_D0/MS_D1_R P7
Pkease refer to LAN/PHY Disable ZGND SD_DATA0
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0

LED2
LED1/GPO
LV_CEN
HV_GIGA

LED_CR
RSET

LANWAKEB
49 Application Note. ZSD_D1_R P8
E_PAD SD_DATA1

B.Schematic Diagrams
GND1
ZR53 1K_04 ZMS_BS/SD_W P# P10 GND1 GND2
Z3.3VS SD_WP GND2
ZC51 Z3.3VS GND3
ZGND 0.1u_16V_Y5V_04 ZSD_CD# P11 GND3 GND4
ZR69 SD_C/D GND4
ZGND
15K_04 CM2S-061-H-N
ZLAN_MDIP0 1 36 ZREGOUT ZR51 ZGND PCB Footprint = SD-10395-001-3 ZGND
MDIP0 REG_OUT ZREGOUT
ZLAN_MDIN0 2 35 Remind that R109 using the
MDIN0 VDDREG ZD3V3 main power (S0 power).

Sheet 74 of 79
ZVDD10 3 34 ZENSW REG *10K_04
ZLAN_MDIP1 4 AVDD10 ENSWREG 33
MDIP1 VDD1 ZVDD10
ZLAN_MDIN1 5 32 ZGND ZSD_CMD/MS_D2 ZR103 0_04 ZSD_CMD/MS_D2_R
MDIN1 VD33 ZAVDD33
ZLAN_MDIP2 6 31 ZISOLATEB
MDIP2 ISOLATEBPIN

ZVDD10
ZLAN_MDIN2

ZLAN_MDIP3
ZLAN_MDIN3
7
8
9
10
MDIN2
AVDD10
MDIP3 QFN48
PERSTBPIN
CLKREQBPIN
MS_BS/SD_WP#
30
29
28
27
ZPERSTB
ZCLKREQB
ZR52

ZMS_BS/SD_W P#
*0402_short
ZBUF_PLT_RST# 75

LAN_CLKREQ#⤪ᶵἧ䓐⎗㕟攳,㕤PCH䪗䚜㍍PULL DOWN
ZR68 0_04 ZLAN_CLKREQ# 75
ZSD_D0/MS_D1

ZSD_D1
ZR104

ZR105
0_04

0_04
ZSD_D0/MS_D1_R

ZSD_D1_R P670RE USB Board


MDIN3 DV33_18 ZVDD33/18
B
ZAVDD33
Z3.3VS
11
12 HV_GIGA
VDD3
HSON
HSOP
26
25
ZRTL8411B_HSON
ZRTL8411B_HSOP
ZC52
ZC50
0.1u_10V_X7R_04
0.1u_10V_X7R_04

capacitors must be close to pin side.


ZPCIE_RXN5_GLAN
ZPCIE_RXP5_GLAN
75
75
ZSD_D2/MS_CLK ZR106

ZSD_CLK/MS_D0 ZR107
0_04

0_04
ZSD_D2/MS_CLK_R

ZSD_CLK/MS_D0_R
B
1/3
SD_CMD/MS_D2
SD_CLK/MS_D0

SD_D2/MS_CLK

ZC39 ZSD_D3/MS_D3 ZR108 0_04 ZSD_D3/MS_D3_R


SD_D0/MS_D1

SD_D3/MS_D3

崘ℏⰌ.
REFCLK_N
REFCLK_P
CARD_3V3

0.1u_16V_Y5V_04
PIN12 PULL HIGH: SWR Mode ZAVDD33 ⼭EMI䡢娵⬴,㓡SHORT ZC95 ZC94 ZC93 ZC92 ZC91 ZC98
Close to chip
VDDTX
SD_D1

*5p_50V_NPO_04

*5p_50V_NPO_04

*5p_50V_NPO_04

*5p_50V_NPO_04

*5p_50V_NPO_04

*5p_50V_NPO_04
ZENSW REG ZR54 *0_04
HSIN
HSIP

ZGND

RTL8411B
GIGA LAN ZR67 0_04
13
14
15
16
17
18
19
20
21
22
23
24

PULL LOW: LDO Mode ZGND


ZSD_CMD/MS_D2

ZCARD_3V3 ZCLK_PCIE_GLAN# 75
ZSD_CLK/MS_D0

ZSD_D2/MS_CLK
ZSD_D0/MS_D1

ZSD_D3/MS_D3

ZCLK_PCIE_GLAN 75
ZGND ZGND ZGND ZGND ZGND ZGND
ZEVDD10

ZPCIE_TXN5_GLAN 75 ZVCC_CARD ZCARD_3V3


Near Cardreader CONN
ZSD_D1

ZPCIE_TXP5_GLAN 75
ZR23 0.2R 5% SMD0603 40 mil
ZVCC_CARD
ZC22 ZC23 ZC24 ZC25
ZVDD10 ZVDD10 ZVDD10 ZVDD10 ZR22 SD Card Remove
0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 *10u_6.3V_X5R_06 0.1u_16V_Y5V_04
PIN13 *150_06
Fall time less than
ZC36 ZC35 ZC64 ZC42 1 ms when SD
ZGND card remove.
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 ZGND
PIN3 PIN8 PIN32 PIN46 ZGND
C Near Cardreader CONN C
ZGND ZGND ZGND ZGND

ZVDD33/18 ZVDD33/18 ZR109 0_04


ZR110 0_04
4 ZL7 3 ZDLMX1-
ZC67 ZC65
P67RE USB D02A 1 2 ZDLMX1+
*4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04 ὅⶍ⺈⓮䓇暨㯪ᾖ㓡ZC20, ZL5攻嶅 *W CM2012F2S-161T03
Pin#27 Pin#27 ZL5 ZR111 0_04
ZR112 0_04 ZJ_RJ1
ZGND ZGND ZLAN_MDIN0 12 13 ZLMX1- 4 ZL6 3 ZDLMX2- ZDLMX1+ 1 GND1
ZEVDD10 ZLAN_MDIP0 11 TD4- MX4- 14 ZLMX1+ ZDLMX1- 2 DA+ shield GND2
ZLAN_MDIN1 9 TD4+ MX4+ 16 ZLMX2- 1 2 ZDLMX2+ ZDLMX2+ 3 DA- shield
ZR38 0_06 ZLAN_MDIP1 8 TD3- MX3- 17 ZLMX2+ *W CM2012F2S-161T03 ZDLMX2- 6 DB+
ZVDD10 TD3+ MX3+ DB-
ZR113 0_04
ZC48 ZC49 ZR114 0_04
ZLAN_MDIN2 6 19 ZLMX3- 4 ZL4 3 ZDLMX3- ZDLMX3+ 4 Z_CHASSIS_GND
0.1u_16V_Y5V_04 1u_6.3V_X5R_04 ZLAN_MDIP2 5 TD2- MX2- 20 ZLMX3+ ZDLMX3- 5 DC+
VDD3 meet rising time PIN20 PIN20 ZLAN_MDIN3 TD2+ MX2+ DC-
3 22 ZLMX4- 1 2 ZDLMX3+ ZDLMX4+ 7
>1ms ZLAN_MDIP3 2 TD1- MX1- 23 ZLMX4+ *W CM2012F2S-161T03 ZDLMX4- 8 DD+ 75 ZVDD3
TD1+ MX1+ DD- 75,76 Z3.3V
ZGND ZGND ZAVDD33 ZR115 0_04
75 Z3.3VS
10 15 ZR116 0_04 P JS-08SO1B
ZR92 *28mil short-p ZR91 *28mil short-p 7 TCT4 MCT4 18 4 ZL3 3 ZDLMX4- P/N = 6-21-B40C0-008
ZVDD3 TCT3 MCT3
4 21 PCB Footprint = PJS-08SL3B
ZC66 ZC38 ZC37 1 TCT2 MCT2 24 1 2 ZDLMX4+ P67RE USB D02
TCT1 MCT1 *W CM2012F2S-161T03 1ZR *0_04 4ZR *0_04
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 NS892402
PIN11 PIN32 PIN48 ZC20 ZNMCT_4 ZR24 75_1%_04 ZNMCT_R 2ZR *0_04 5ZR *0_04
D D
ZNMCT_3 ZR21 75_1%_04 ZC31
ZGND ZGND ZGND 0.01u_16V_X7R_04 ZNMCT_2 ZR20 75_1%_04 3ZR *0_04 6ZR *0_04
ZL9 ZD3V3 ZNMCT_1 ZR19 75_1%_04 MA1206CG-101J-202ER
*HCB1608KF-121T30
60 mil
40 mil
.
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Z3.3V ZR72 *28mil short-p ZC87 0.1u_16V_Y5V_04

ZC72 ZC63 LDO Mode ZC88 *0.1u_16V_Y5V_04


Title
*4.7u_6.3V_X5R_06 *0.1u_16V_Y5V_04 ZC89 0.01u_50V_X7R_04 Z_CHASSIS_GND [74] P670RE USB BOARD_Z 1/3
PIN35 PIN35 ZGND
ZC90 *0.01u_50V_X7R_04 Size Document Number Rev
ZGND ZGND A3 6-71-P67R3-D02A D02A
⺈⓮⺢嬘枸䔁 Date: Friday, July 03, 2015 Sheet 74 of 79
1 2 3 4 5 6 7 8

P670RE USB Board 1/3 B - 75


Schematic Diagrams

P670RE USB Board 2/3


5 4 3 2 1

Z3.3V
USB3.0 re-driver USB3.0 PORT4 (MB⎛ᶲ)
ZR60 *0_04
ZR70 *4.7K_04 ZUSBVCC3.0_6
ZR79 *4.7K_04
ZU2 100 MIL
ZR88 2K_1%_04 5 1
Z5V VIN VOUT
D ZC6 ZC8 D
ZC19 2
10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04

ZGND ZGND 4 3
EN# OC#

6
ZU5 ZGND
25 uP7549UMA5-20

VCC

EN_RXD
EQ_A

DE_A

SW_A

GND
ZR43 *4.7K_04 Z_SDA_P4 24 GND 7 Z_SCK_P4 ZR98 *4.7K_04 ZR18 *0402_short PCB Footprint = M-SOT23-5 ZGND
ZGND SMB_DATA SMB_SCK ZGND 75,76 ZDD_ON#
2A/90mohm
ZTXN4 0.1u_10V_X7R_04 ZC55 23 8 ZC78 0.1u_10V_X7R_04 ZUSB3_TXN4
TX1- RX1-
ZTXP4 0.1u_10V_X7R_04 ZC56 22 9 ZC79 0.1u_10V_X7R_04 ZUSB3_TXP4
TX1+ RX+
B.Schematic Diagrams

21 10 ZC7 22u_6.3V_X5R_08
To Conn. TYPE_IND# CHIP_EN# ZGND From PCH
ZRXN4 0.1u_10V_X7R_04 ZC53 20 11 ZC80 0.1u_10V_X7R_04 ZUSB3_RXN4 ZC10 22u_6.3V_X5R_08

Reserverd
RX2- TX2- ZUSBVCC3.0_6 ZGND

SW_B
EQ_B
ZUSB3_RXP4

DE_B
ZRXP4 0.1u_10V_X7R_04 ZC54 19 12 ZC81 0.1u_10V_X7R_04

GND

VCC
RX2+ TX2+ ZJ_USB3_2

ZTXP4_J 9 GND1

18

17

16

15

14

13

Standard-A
Z3.3V SSTX+ SHIELD
ASM1464 ⚈⍾㴰co-lay, ⎴㬍⍾㴰暣⭡ 1

Sheet 75 of 79 PCB Footprint = QFN24-4X4MM Z3.3V ZTXN4_J


ZUSB_PN4_J
8
2
4
VBUS
SSTX-
D-
GND
ZUSB_PP4_J 3

P670RE USB Board ZR86 *0_04 ZR85


ZR77
*4.7K_04
*4.7K_04
ZC68 ZC57 ZC82
ZRXP4_J

ZRXN4_J
6
7
5
D+
SSRX+
GND_D
SSRX- SHIELD
GND2
C ZR65 *4.7K_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 C

2/3 ZR58 *0_04


USB3.0 Max Trace length 377AH09FZT S4NVCB
P/N = 6-20-B4Z40-109
ZGND Follow Design Guide ZGND PCB Footprint = 317AH09FZTS4T4CX ZGND
ZGND
⍾㴰co-lay, ⚈䃉layout䨢攻 ZD3 ZD4
CLOSE TO CONNECTOR
ZUSB_PN4 4 3 ZUSB_PN4_CON 6 5 ZUSB_PN4_J ZTXP4 6 5 ZTXP4_J
ZL1 ZUSB_PP4_CON 7 4 ZUSB_PP4_J ZTXN4 7 4 ZTXN4_J
ZUSB_PP4 1 2 8 3 8 3
ZGND ZGND ZGND ZGND
*W CM2012F2S-161T03-short 9 2 ZRXP4 9 2 ZRXP4_J
10 1 ZRXN4 10 1 ZRXN4_J

PUSB3F96 PUSB3F96

LAN BOARD ZH2 ZH1 ZH3 ZH4


(⏓USB3.0x2, PHONE JACK, SIM) *H5_0D2_5 *H7_0D2_3 *H8_0D2_8 *H7_0D2_3
ZJ_MB1
1 2 ZUSB_PN4
Z5V 1 2
3 4 ZUSB_PP4
B ZC1 ZC5 5 3 4 6 B
ZVDD3 7 5 6 8 ZUSB3_TXN4
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 9 7 8 10 ZUSB3_TXP4
11 9 10 12 ZUSB3_RXN4 ZGND ZGND
ZC2 13 11 12 14 ZUSB3_RXP4
ZGND ZGND 15 13 14 16
0.1u_16V_Y5V_04 17 15 16 18 ZH6 ZH7 ZH5
17 18 ZUSB_PN3 76
19 20 *H7_0D2_3 *H7_0D2_3 *H5_0D2_5
19 20 ZUSB_PP3 76
21 22
23 21 22 24
23 24 ZUSB3_TXN3 76
ZGND 25 26
25 26 ZUSB3_TXP3 76
27 28
27 28 ZUSB3_RXN3 76
29 30
29 30 ZUSB3_RXP3 76
31 32
33 31 32 34
Z3.3V Z3.3VS 33 34 ZCLK_PCIE_GLAN# 74
ZVDD3 35 36 ZGND ZGND ZGND
35 36 ZCLK_PCIE_GLAN 74
37 38
39 37 38 40
39 40 ZPCIE_TXN5_GLAN 74
ZC3 ZC4 41 42
41 42 ZPCIE_TXP5_GLAN 74
Z3.3V 43 44
43 44 ZPCIE_RXN5_GLAN 74
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 45 46
45 46 ZPCIE_RXP5_GLAN 74
47 48
49 47 48 50 D02
51 49 50 52
51 52 ZLAN_CLKREQ# 74
ZGND ZGND 53 54
53 54 ZPCIE_W AKE# 74
55 56
55 56 ZLAN_W AKEUP# 74
57 58
57 58 ZBUF_PLT_RST# 74 Z5V 76
59 60
59 60 ZDD_ON# 75,76
A
61 62 A
61 62 ZVDD3 74
Z3.3VS 63 64
63 64 ZT1 Z3.3V 74,76
65 66
65 66 ZT6 Z3.3VS 74
67 68
69 67 68 70
69 70 ZT7

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
71 72
73 71 72 74
ZT8 P67RE USB D02
73 74 ZT9
75 76
75 76 ZT10 Title
77 78
79 77
79
78
80
80
ZT11
[75] P670RE USB BOARD 2/3
51049-08041-001 Size Document Number Rev
ZGND PCB Footprint = 51049-0804X ZGND A3 P650RE 6-71-P67R3-D02A D02A
P67 USB D03 ᾖ㓡LIB⯢⮠
Date: Monday, July 06, 2015 Sheet 75 of 79
5 4 3 2 1

B - 76 P670RE USB Board 2/3


Schematic Diagrams

P670RE USB Board 3/3

5 4 3 2 1

USB3.0 PORT3 (MB⎛ᶳ)


USB3.0 re-driver
Z3.3V ZUSBVCC3.0_2

ZR62 *0_04 ZU1 100 mil


Z5V
ZR73 *4.7K_04 5 1
ZR81 *4.7K_04 ZC18 VIN VOUT
D 10u_6.3V_X5R_06 ZC17 ZC16 D
2
ZR90 2K_1%_04 GND 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
ZGND
ZR17 *0402_short 4 3
75 ZDD_ON# EN# OC#
uP7549UMA5-20
PCB Footprint = M-SOT23-5 ZGND
2A/90mohm
ZGND

6
ZU6
25 ZGND
VCC

EN_RXD
EQ_A

DE_A

SW_A

GND
ZR46 *4.7K_04 Z_SDA_P3 24 GND 7 Z_SCK_P3 ZR97 *4.7K_04

B.Schematic Diagrams
ZGND SMB_DATA SMB_SCK ZGND
ZC11 22u_6.3V_X5R_08
ZTXN3 0.1u_10V_X7R_04 ZC58 23 8 ZC75 0.1u_10V_X7R_04 ZUSB3_TXN3 75
TX1- RX1- ZC9 22u_6.3V_X5R_08
ZUSBVCC3.0_2 ZGND
ZTXP3 0.1u_10V_X7R_04 ZC59 22 9 ZC76 0.1u_10V_X7R_04 ZUSB3_TXP3 75
TX1+ RX+
21 10 ZJ_USB3_1
To Conn. TYPE_IND# CHIP_EN# ZGND From PCH
ZRXN3 0.1u_10V_X7R_04 ZC60 20 Reserverd 11 ZC77 0.1u_10V_X7R_04 ZTXP3_J 9 GND1

Sheet 76 of 79
ZUSB3_RXN3 75

Standard-A
RX2- TX2- SSTX+ SHIELD
⚈⍾㴰co-lay, ⎴㬍⍾㴰暣⭡ 1
VBUS
SW_B
EQ_B

ZTXN3_J
DE_B

ZRXP3 0.1u_10V_X7R_04 ZC61 19 12 ZC74 0.1u_10V_X7R_04 8


GND

VCC
RX2+ TX2+ ZUSB3_RXP3 75 SSTX-
ZUSB_PN3_J 2
4 D-
ZUSB_PP3_J 3 GND
P670RE USB Board
18

17

16

15

14

13

ASM1464 Z3.3V ZRXP3_J 6 D+


PCB Footprint = QFN24-4X4MM Z3.3V 7 SSRX+
ZRXN3_J 5 GND_D GND2
C SSRX- SHIELD

377AH09FZT S4NVCB ZGND


C
3/3
ZR84 *0_04 ZR83 *4.7K_04 ZC62 ZC73 ZC69 P/N = 6-20-B4Z40-109
ZR76 *4.7K_04 ZGND PCB Footprint = 317AH09FZTS4T4CX
ZR64 *4.7K_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04
ZR55 *0_04
USB3.0 Max Trace length
Follow Design Guide
ZGND
ZGND
ZD1
⍾㴰co-lay, ⚈䃉layout䨢攻 1 2 ZUSB_PN3_CON 6 5 ZUSB_PN3_J
75 ZUSB_PN3
ZL2 ZUSB_PP3_CON 7 4 ZUSB_PP3_J
75 ZUSB_PP3 4 3 ZGND 8 3 ZGND
9 2
*W CM2012F2S-161T03-short 10 1

PUSB3F96

ZD2

ZTXP3 6 5 ZTXP3_J
ZTXN3 7 4 ZTXN3_J
ZGND 8 3 ZGND
ZRXP3 9 2 ZRXP3_J
ZRXN3 10 1 ZRXN3_J
B B

PUSB3F96

A Z5V 75 A
Z3.3V 74,75
Z3.3VS 74,75

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[76] P670RE USB BOARD 3/3
Size Document Number Rev
A3 P650RE 6-71-P67R3-D02A D02A

Date: Monday, July 06, 2015 Sheet 76 of 79


5 4 3 2 1

P670RE USB Board 3/3 B - 77


Schematic Diagrams

P670RE LED Board

5 4 3 2 1

YR30 *330_04
YJ_MB YD1
YLED_ACIN YLED_ACIN YR17 330_04 YD1_1 1 2
12 YLED_PWR
11 YLED_BAT_CHG Oragne YR31 *330_04
UHY
10 YLED_BAT_FULL
9 YLED_NUM# YLED_PWR YD1_3
UYG
D NC1 YR16 330_04 3 4 D
8 YLED_CAP#
NC2 7 YLED_SCROLL# Green RY-SP195UHYUYG4
6 Y_WLAN_AIRPLANE#
5 Y_dGPU_LED
AC IN/POWER ON LED
4 YSATA_LED# Y_GND
3
B.Schematic Diagrams

2 Y_GND
1 Y_3.3VS
YR32 *330_04
FP225H-012S10M YD8
PCB Footprint = fp225-012g YLED_BAT_CHG YR19 330_04 YD8_1 1 2
Oragne YR33 *330_04
UHY
Sheet 77 of 79 YLED_BAT_FULL YR18 330_04 YD8_3 3
UYG
4

P670RE LED Board Green RY-SP195UHYUYG4


BAT CHARGE/FULL LED
Y_GND

C C

Y_3.3VS

YR24 YR25 YR26 YR27 YR28 YR29

220_04 220_04 220_04 220_04 220_04 220_04

SCROLL AIRPLANE
A

A
CAPS LOCK NUM LOCK dGPU LED
YD7 LOCK YD6 YD5 YD2 HDD LED YD3 LED
LED LED LED YD4
B RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M B

P670RE LED D01


C

C
YR1 *0_04

C
YLED_SCROLL# YLED_CAP# YLED_NUM# YSATA_LED# Y_WLAN_AIRPLANE#
B Y_dGPU_LED

YQ1
DTC114EUA

E
Y_GND
YH8 YH7 YH6 YH5
*H3_2D2_2 *H3_2D2_2 *H6_3D2_3 *H6_3D2_3

1YR *0_04 4YR *0_04

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A A

2YR *0_04 5YR *0_04


Title
3YR *0_04 6YR *0_04 Y_GND Y_GND Y_GND Y_GND
[77] P670RE LED BOARD
Size Document Number Rev
A4 P650RE 6-71-P67R4-D01 D01

Date: Friday, July 03, 2015 Sheet 77 of 79


5 4 3 2 1

B - 78 P670RE LED Board


Schematic Diagrams

P655RE Power Board

5 4 3 2 1

I3.3VS

IJ_BTN1
1
D IM_BTN# 2 NC1 D
3 NC2
4
FP226H-004S10M
PCB Footprint = fp226h-004xxxm_r

B.Schematic Diagrams
IGND

P655RE D01
I3.3VS
POWER BUTTON
I_SW1
POWER
1IR *0_04 4IR *0_04
Sheet 78 of 79
TJE-532-Q-T/R SWITCH
3 1
IM_BTN#
LED 2IR *0_04 5IR *0_04 P655RE Power
4 2 20mil
C IR1 3IR *0_04 6IR *0_04 C Board
5
6

1K_04
1

PCB Footprint = tje-53x-q


ID2 IC2 20mil

IGND 0.1u_50V_Y5V_06 20mil IC1


*V15AVLC0402
VARISTOR BSW1 *0.1u_16V_Y5V_04
2

6-24-30003-006 5
1 2
3 4 A IGND
IGND 6
ID1
P2808A1, 㛔幓㚫䅺㭨, P2808A1 BLUE RE2*0.8 2P
⮵䫾 D26 mounted VARISTOR. P/N = RY-SP190DNB84-5/1X
PCB Footprint = RY-SP190YG34-5M
C

B B
IH1 IH2
6-53-3050B-B41 100g *H6_0D2_2 *H6_0D2_2
3

IGND

IGND IGND
6

A ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/ A

Title
[78] P655RE POWER BOARD_I
4

Size Document Number Rev


A P650RE 6-71-P655C-DR1 D01

Date: Friday, July 03, 2015 Sheet 78 of 79


5 4 3 2 1

P655RE Power Board B - 79


Schematic Diagrams

P655RE LED Board


5 4 3 2 1

OJ_LED1
OLED_ACIN
12 OLED_PWR OD9 OD11
11 OLED_BAT_CHG OLED_PWR OR9 330_04 A C OLED_BAT_FULL OR13 330_04 A C
D 10 OLED_BAT_FULL D
NC1 9 OLED_NUM# Green Green
8 OLED_CAP# RY-SP260UYG24-5M RY-SP260UYG24-5M
7 OLED_SCROLL# OD10 OD12
NC2 LOT3
6 O_WLAN_AIRPLANE# OLED_ACIN OR7 330_04 A C OLED_BAT_CHG OR11 330_04 A C
5 O_dGPU_LED
4 OSATA_LED# Amber Amber
3 RY-SP260USO24-5M RY-SP260USO24-5M
2 O_GND
1 O_3.3VS AC IN/POWER ON LED BAT CHARGE/FULL LED
B.Schematic Diagrams

FP225H-012S10M O_GND
PCB Footprint = fp225-012g O_GND
1OR *0_04 4OR *0_04

2OR *0_04 5OR *0_04


O_3.3VS
Sheet 79 of 79 3OR *0_04 6OR *0_04

P655RE LED Board C C

OR3 OR6 OR5 OR4 OR2 OR1

330_04 330_04 330_04 330_04 330_04 330_04


A

A
OD4 OD7 OD6 OD5 OD3 OD2

RY-SP260UYG24-5M RY-SP260UYG24-5M RY-SP260UYG24-5M RY-SP260UYG24-5M RY-SP260UYG24-5M RY-SP260UYG24-5M


dGPU LED SCROLL CAPS LOCK NUM LOCK AIRPLANE LED HDD LED
P655RE LED D02 LOCK LED LED
C

C
OR14 *0_04 LED
OLED_SCROLL# OLED_CAP# OLED_NUM# O_WLAN_AIRPLANE# OSATA_LED#
C

B B O_dGPU_LED B

OQ1
DTC114EUA
E

O_GND

P655RE LED D02A㨇㥳ᾖ㓡⢾✳

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A A

Title
[79] P655RE LED BOARD
Size Document Number Rev
A4 P650RE 6-71-P6554-DR2A D02A
Date: Wednesday, July 08, 2015 Sheet 79 of 79
5 4 3 2 1

B - 80 P655RE LED Board


BIOS Update

Appendix C:Updating the FLASH ROM BIOS 


BIOS Version
To update the FLASH ROM BIOS, you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.

C:BIOS Update
V1.01.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.01.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.01.04).

Set the computer to boot from the external drive


1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.

C - 1
BIOS Update

Use the flash tools to update the BIOS


1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “EFI Shell”. You will then be prompted to give “Y” or “N” responses to the programs being
loaded by EFI Shell. Choose “N” for any memory management programs.
2. You should now see DISK fsX:\> (X is the designated drive number for the CD/DVD drive/USB flash drive).
3. Type the following command:
fsX:\> Flash.nsh
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.
C:BIOS Update

Restart the computer (booting from the HDD)


1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.

Your computer is now running normally with the updated BIOS


You may now enter the BIOS and make any changes you require to the default settings.

C-2

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